OSDN Git Service

[ARM] Select fp16 fabs
[android-x86/external-llvm.git] / lib / Target /
2019-05-26 David Green[ARM] Select fp16 fabs
2019-05-26 David Green[ARM] Select fp16 fsqrt
2019-05-26 David Green[ARM] Promote fp16 frem
2019-05-25 Simon Pilgrim[X86] lowerBuildVectorToBitOp - support build_vector...
2019-05-25 Nikita Popov[X86] Combine fminnum/fmaxnum with non-nan operand...
2019-05-25 Craig Topper[X86FixupLEAs] Turn optIncDec into a generic two addres...
2019-05-25 Craig Topper[X86] Add zero idioms to the haswell, broadwell, and...
2019-05-25 Peter CollingbourneRevert r361644, "[AMDGPU] Divergence driven ISel. Assig...
2019-05-24 Jessica Paquette[GlobalISel][AArch64] Make FP constraint checks conside...
2019-05-24 Jessica Paquette[GlobalISel][AArch64] NFC: Factor out HasFPConstraints...
2019-05-24 Jason LiuImplement call lowering without parameters on AIX
2019-05-24 Jessica Paquette[GlobalISel][AArch64] Improve register bank mappings...
2019-05-24 Nick Desaulniers[AArch64] check for INLINEASM_BR along w/ INLINEASM
2019-05-24 Nick Desaulniers[ARM] additionally check for ARM::INLINEASM_BR w/ ARM...
2019-05-24 Matt ArsenaultAMDGPU: Activate all lanes when spilling CSR VGPR for...
2019-05-24 Matt ArsenaultAMDGPU: Boost inline threshold with addrspacecasted...
2019-05-24 Alexander Timofeev[AMDGPU] Divergence driven ISel. Assign register class...
2019-05-24 Stefan Pintilie[PowerPC] Remove CRBits Copy Of Unset/set CBit
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: support SVE2 String Processing...
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: support SVE2 Narrowing Group
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: support SVE2 Accumulate Group
2019-05-24 Simon Pilgrim[SelectionDAG] computeKnownBits - support constant...
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: add PMULLB/PMULLT instructions
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: add integer add/sub long/wide...
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: add various bitwise shift instructions
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: add saturating add/sub instructions
2019-05-24 Cullen Rhodes[AArch64][SVE2] Asm: fix overlapping bit
2019-05-24 Tim NorthoverGlobalISel: support swifterror attribute on AArch64.
2019-05-24 Simon Atanasyan[mips] Always check that `shift and add` optimization...
2019-05-24 Sjoerd Meijer[ARM] ARMExpandPseudoInsts: add debug messages
2019-05-24 QingShan Zhang[Power9] Add a specific heuristic to schedule the addi...
2019-05-24 Reid Kleckner[AArch64] Preserve X8 for thunks ending in variadic...
2019-05-24 Serge Pavlov[AArch64] Add nvcast patterns for v2f32 -> v1f64
2019-05-24 Thomas Lively[WebAssembly] Expand more SIMD float ops
2019-05-23 Matt ArsenaultAMDGPU: Correct maximum possible private allocation...
2019-05-23 Robert LougherResubmit r360436 "[X86] Avoid SFB - Fix inconsistent...
2019-05-23 Thomas Lively[WebAssembly] Implement ReplaceNodeResults to fix a...
2019-05-23 Matt ArsenaultAMDGPU/GlobalISel: Legality for integer min/max
2019-05-23 Thomas Lively[WebAssembly] Add multivalue and tail-call target features
2019-05-23 Lewis Revill[RISCV] Support assembling TLS LA pseudo instructions
2019-05-23 Sam Parker[ARM][CGP] Clear SafeWrap before each search
2019-05-23 Thomas Lively[WebAssembly] Implement __builtin_return_address for...
2019-05-23 Fangrui Song[X86] Support -fno-plt __tls_get_addr calls
2019-05-22 Craig Topper[X86] Explcitly disable VEXTRACT instruction matching...
2019-05-22 Galina KistanovaReverted r361134 because of a failing test left unatten...
2019-05-22 Craig Topper[X86][InstCombine] Remove InstCombine code that turns...
2019-05-22 Alexey Lapshin[DebugInfo][AArch64] Recognise target specific instruct...
2019-05-22 Matt ArsenaultAMDGPU: Move disassembler support check to constructor
2019-05-22 Matt ArsenaultMC: Allow getMaxInstLength to depend on the subtarget
2019-05-22 Dmitry Preobrazhensky[AMDGPU][MC] Corrected parsing of op_sel* and neg_...
2019-05-22 Simon Pilgrim[Hexagon] assert getRegisterBitWidth returns non-zero...
2019-05-22 Sjoerd Meijer[TargetMachine] error message unsupported code model
2019-05-22 Fangrui Song[PPC64] Parse -elfv1 -elfv2 when specified on target...
2019-05-22 Sjoerd Meijer[AArch64] Subtarget crypto extension defaults
2019-05-22 Nikita Popov[X86] Don't compare i128 through vector if construction...
2019-05-22 Chen Zheng[PowerPC] use meaningful name for displacement form...
2019-05-22 Chen Zheng[PowerPC] [ISEL] select x-form instruction for unaligne...
2019-05-22 Pengfei Wang[X86] [CET] Deal with return-twice function such as...
2019-05-21 Matt ArsenaultAMDGPU: Assume calls read exec
2019-05-21 Matt ArsenaultAMDGPU: Assume call pseudos are convergent
2019-05-21 Matt ArsenaultAMDGPU: Fix not marking new gfx10 SGPRs as CSRs
2019-05-21 Dan Gohman[WebAssembly] Add the signature for the new llround...
2019-05-21 Craig Topper[X86] Remove an unneeded ZERO_EXTEND creation from...
2019-05-21 Simon Pilgrim[X86][SSE] computeKnownBitsForTargetNode - add X86ISD...
2019-05-21 Fangrui Song[PPC64] Update LocalEntry from assigned symbols
2019-05-21 Florian Hahn[AArch64] Skip mask checks for masks with an odd number...
2019-05-21 Cullen Rhodes[AArch64][SVE2] Asm: add integer unary instructions...
2019-05-21 Cullen Rhodes[AArch64][SVE2] Asm: add integer pairwise arithmetic...
2019-05-21 Sam Parker[ARM][CGP] Skip nuw in PrepareConstants
2019-05-21 Dylan McKayAdd TargetLoweringInfo hook for explicitly setting...
2019-05-21 Chen Zheng[PowerPC] use more meaningful name - NFC
2019-05-20 Matt ArsenaultAMDGPU: Force skip branches over calls
2019-05-20 Martin Storsjo[AArch64] Handle lowering lround on windows, where...
2019-05-20 Bjorn Pettersson[AMDGPU] Fix std::array initializers to avoid warnings...
2019-05-20 Matt ArsenaultR600: Fix unconditional return in loop
2019-05-20 Cullen Rhodes[AArch64][SVE2] Asm: add SADALP and UADALP instructions
2019-05-20 Petar Jovanovic[DebugInfoMetadata] Refactor DIExpression::prepend...
2019-05-20 Cullen Rhodes[AArch64][SVE2] Asm: add int halving add/sub (predicate...
2019-05-20 Cullen Rhodes[AArch64][SVE2] Asm: add saturating multiply-add interl...
2019-05-20 Fangrui SongUse llvm::sort. NFC
2019-05-20 Carl Ritson[AMDGPU] gfx1010 Avoid SMEM WAR hazard for some s_waitc...
2019-05-19 Craig Topper[X86] Remove combineShift function. Just dispatch direc...
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Implement s64->s64 [SU]ITOFP
2019-05-17 Matt ArsenaultGlobalISel: Implement lower for S64->S32 [SU]ITOFP
2019-05-17 Sam Clegg[WebAssembly] Remove expected failure of builtin-locati...
2019-05-17 Simon Pilgrim[X86][SSE] Fold movmsk(not(x)) -> not(movmsk)
2019-05-17 Simon Pilgrim[X86][SSE] Match all-of bool scalar reductions into...
2019-05-17 Dmitry Preobrazhensky[AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers
2019-05-17 Dmitry Preobrazhensky[AMDGPU][MC] Enabled labels with s_call_b64 and s_cbran...
2019-05-17 Simon Pilgrim[X86][AVX] Remove LowerCTTZ's AVX1 custom vector handling.
2019-05-17 Simon Pilgrim[X86][AVX] isNOT - add extract_subvector(xor X, -1...
2019-05-17 Dmitry Preobrazhensky[AMDGPU][MC] Enabled expressions for most operands...
2019-05-17 Matt ArsenaultAMDGPU: Fix unused variable warnings in release builds
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Legalize G_FCEIL
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Legalize G_INTRINSIC_TRUNC
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Legalize G_FRINT
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Legalize G_FCOPYSIGN
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: RegBankSelect for llvm.amdgcn.s...
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Use subreg index instead of extra...
2019-05-17 Matt ArsenaultAMDGPU/GlobalISel: Use waterfall loop for buffer_load
next