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[InstSimplify] Simplify uadd/sadd/umul/smul with overflow intrinsics when the Zero...
[android-x86/external-llvm.git] / lib / Target /
2017-05-24 Matthew SimpsonRevert r291254: [AArch64] Reduce vector insert/extract...
2017-05-24 Nirav Dave[AMDGPU] Prevent too large store merges in AMDGPU Subta...
2017-05-24 Vadzim Dambrouski[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameI...
2017-05-24 Marek OlsakRevert "AMDGPU: Fold CI-specific complex SMRD patterns...
2017-05-24 Krzysztof Parzyszek[Hexagon] Fix comment in HexagonPacketizer::runOnMachin...
2017-05-24 Jonas Paulsson[LoopVectorizer] Let target prefer scalar addressing...
2017-05-24 Jonas Paulsson[SystemZ] Fix register modelling in expandLoadStackGuard()
2017-05-24 Simon PilgrimStrip trailing whitespace. NFCI.
2017-05-24 Florian Hahn[ARM] Remove ThumbTargetMachines. (NFC)
2017-05-24 Javed Absar[ARM] Add VLDx/VSTx sched defs for machine-schedulers...
2017-05-23 Vadzim Dambrouski[MSP430] Add subtarget features for hardware multiplier.
2017-05-23 Simon Pilgrim[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class...
2017-05-23 Changpeng FangAMDGPU/SI: Move the local memory usage related checking...
2017-05-23 Geoff Berry[AArch64][Falkor] Refine sched details for LSLfast...
2017-05-23 Stanislav Mekhanoshin[AMDGPU] Combine and (srl) into shl (bfe)
2017-05-23 Geoff Berry[AArch64][Falkor] Fix sched details for FMOV of WZR...
2017-05-23 Oleg Ranevskyy[ARM] Temporarily disable globals promotion to constant...
2017-05-23 Nirav Dave[DAG] Add AddressSpace parameter to canMergeStoresTo...
2017-05-23 Marek OlsakAMDGPU: Fold CI-specific complex SMRD patterns into...
2017-05-23 Stanislav Mekhanoshin[AMDGPU] Convert shl (add) into add (shl)
2017-05-23 Simon Atanasyan[mips] Remove unused class field. NFC
2017-05-23 Simon Atanasyan[mips] Change type of MipsSubtarget ctor arguments...
2017-05-23 Sam Kolton[AMDGPU] SDWA: Add assembler support for GFX9
2017-05-23 Florian Hahn[AArch64] Make instruction fusion more aggressive.
2017-05-23 Igor Breger[GlobalISel][X86] G_LOAD/G_STORE vec256/512 support
2017-05-23 Akira Hatanaka[AArch64] Fix PRR33100.
2017-05-22 Krzysztof Parzyszek[Hexagon] Fix definitions of vector predicate loads...
2017-05-22 Stanislav Mekhanoshin[AMDGPU] Narrow lshl from 64 to 32 bit if possible
2017-05-22 Valery Pykhtin[AMDGPU] Fix incorrect register usage tracking in GCNUp...
2017-05-22 Simon Atanasyan[mips] Support micromips attribute passed by front-end
2017-05-22 James MolloyRe-apply r302416: [ARM] Clear the constant pool cache...
2017-05-22 Strahinja Petrovic[MIPS] Add support to match more patterns for DINS...
2017-05-22 James MolloyRevert "[ARM] Clear the constant pool cache on explicit...
2017-05-21 Igor Breger[GlobalISel][X86] Fix G_TRUNC instruction selection.
2017-05-21 Hiroshi InoueSummary
2017-05-19 Dmitry Preobrazhensky[AMDGPU][MC] Corrected disassembler to decode instructi...
2017-05-19 Dmitry Preobrazhensky[AMDGPU][MC] Fixed bugs in export instruction
2017-05-19 Guy Blank[X86][AVX512] Make i1 illegal in the CodeGen
2017-05-19 Daniel Sanders[globalisel][tablegen] Demote OptForSize/OptForMinSize...
2017-05-18 Hans WennborgRevert r302938 "Add LiveRangeShrink pass to shrink...
2017-05-18 Reid Kleckner[IR] De-virtualize ~Value to save a vptr
2017-05-18 Francis Visoiu Mistrih[LegacyPassManager] Remove TargetMachine constructors
2017-05-18 Sam Kolton[AMDGPU] SDWA operands should not intersect with potent...
2017-05-18 Igor Breger[GlobalISel][X86] G_ADD/G_SUB vector legalizer/selector...
2017-05-18 Simon Pilgrim[X86][AVX512] Add 512-bit vector ctpop costs + tests
2017-05-18 Lama Saba[X86] Replace slow LEA instructions in X86
2017-05-18 Davide Italiano[Target/X86] Remove unneeded return. NFCI.
2017-05-17 Matt ArsenaultAMDGPU: Start defining a calling convention
2017-05-17 Kyle ButtCodeGen: Power: Add lowering for shifts of v1i128.
2017-05-17 Michael LiaoFix PR33028
2017-05-17 Matt ArsenaultAMDGPU: Expand frame indexes to be relative to scratch...
2017-05-17 Matt ArsenaultAMDGPU: Change mubuf soffset register when SP relative
2017-05-17 Simon Pilgrim[X86][AVX512] Add 512-bit vector ctlz costs + tests
2017-05-17 Matt ArsenaultAMDGPU: Make better use of op_sel with high components
2017-05-17 Simon Pilgrim[X86][AVX512] Add 512-bit vector cttz costs + tests
2017-05-17 Dehao ChenOnly enable LiveRangeShrink for x86.
2017-05-17 Matt ArsenaultAMDGPU: Try to use op_sel when selecting packed instruc...
2017-05-17 Jacob Gravelle[WebAssembly][NFC] Update expected testsuite failures...
2017-05-17 Matt ArsenaultAMDGPU: Use appropriate soffset for spilling
2017-05-17 Matt ArsenaultAMDGPU: Fix min3/max3 combines for f16/i16
2017-05-17 Simon Pilgrim[X86][AVX512] Add 512-bit vector bitreverse costs ...
2017-05-17 Krzysztof Parzyszek[PPC] Properly update register save area offsets
2017-05-17 Igor Breger[GlobalISel][X86] Support add i64 in IA32.
2017-05-17 Jonas Paulsson[SystemZ] Modelling of costs of divisions with a const...
2017-05-17 Diana PicusReland r303247: [ARM] GlobalISel: Remove dead instructi...
2017-05-17 Diana PicusRevert "[ARM] GlobalISel: Remove dead instruction selec...
2017-05-17 Diana Picus[ARM] GlobalISel: Remove dead instruction selection...
2017-05-17 Daniel Cederman[Sparc] Remove execute permissions from non-executable...
2017-05-17 Francis Visoiu MistrihBitVector: add iterators for set bits
2017-05-16 Amara EmersonRe-commit r302678, fixing PR33053.
2017-05-16 Tim Shen[PPC] Lower load acquire/seq_cst trailing fence to...
2017-05-16 Reid KlecknerRevert "[X86] Replace slow LEA instructions in X86"
2017-05-16 Renato GolinRevert "[ARM] Mark LEApcrel instructions as isAsCheapAs...
2017-05-16 Stanislav Mekhanoshin[AMDGPU] Use GCNRPTracker dumper methods in scheduler
2017-05-16 Stanislav Mekhanoshin[AMDGPU] Cache live-ins and register pressure in scheduler
2017-05-16 Lama Saba[X86] Replace slow LEA instructions in X86
2017-05-16 Stanislav Mekhanoshin[AMDGPU] Turn register pressure estimation into forward...
2017-05-16 Chad RosierFix an improperly placed curly bracket. NFC.
2017-05-16 NAKAMURA TakumiAMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable]
2017-05-16 Peter CollingbourneIR: Give function GlobalValue::getRealLinkageName(...
2017-05-15 Davide Italiano[AMDGPU] Kill now unused phiInfoElementGetDebugLoc...
2017-05-15 Tim NorthoverAArch64: use linker-private symbols for globals in...
2017-05-15 Adam Nemet[SLP] Enable 64-bit wide vectorization on AArch64
2017-05-15 Hans WennborgRevert r302678 "[AArch64] Enable use of reduction intri...
2017-05-15 Jan SjodinRe-submit AMDGPUMachineCFGStructurizer.
2017-05-15 Tim NorthoverAArch64: diagnose unrecognized features in .cpu directive.
2017-05-15 Geoff Berry[AArch64][Falkor] Fix sched details for FMOV
2017-05-15 Jan SjodinRevert 303091.
2017-05-15 Jan SjodinAdd AMDGPUMachineCFGStructurizer.
2017-05-15 Simon Pilgrim[NVPTX] Don't flag StoreParam/LoadParam memory chain...
2017-05-15 Florian Hahn[AArch64] Enable FeatureFuseAES on Cortex-A72.
2017-05-15 Dmitry Preobrazhensky[AMDGPU][MC] Corrected several VI opcodes to avoid...
2017-05-15 Dmitry Preobrazhensky[AMDGPU][MC] Removed V_MQSAD_U16_U8
2017-05-15 John Brawn[ARM] Mark LEApcrel instructions as isAsCheapAsAMove
2017-05-15 John Brawn[ARM] Mark LEApcrel as not having side effects
2017-05-15 Simon Pilgrim[NVPTX] Don't rely on default arguments to SelectionDAG...
2017-05-14 Zvi Rackover[X86] Utilize SelectionDAG::getSelect(). NFC.
2017-05-14 Simon Pilgrim[X86][AVX1] Account for cost of extract/insert of 256...
2017-05-14 Simon Pilgrim[X86][AVX2] Fix costs for v4i64 ashr by splat
2017-05-14 Simon Pilgrim[X86][AVX1] Account for cost of extract/insert of 256...
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