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TargetLowering: Clean up method description comments
[android-x86/external-llvm.git] / lib /
2013-06-08 David MajnemerTargetLowering: Clean up method description comments
2013-06-08 Aaron Ballmansys::process::get_id() now returns the process ID inste...
2013-06-08 Venkatraman Govind... [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instr...
2013-06-08 Amaury de la VieuvilleARM: fix VMOVvnf32 decoding when ambiguous with VCVT
2013-06-08 Amaury de la VieuvilleARM: enforce SRS decoding constraints
2013-06-08 Amaury de la VieuvilleARM: fix CPS decoding when ambiguous with QADD
2013-06-08 Amaury de la VieuvilleARM: fix VCVT decoding
2013-06-08 Shuxin Yang Fix a potential bug in r183584.
2013-06-08 Sean SilvaDon't artifically restrict input object size.
2013-06-08 JF BastienFix unused variable warning from my previous patch.
2013-06-08 Akira Hatanaka[mips] Use a helper function which compares the size...
2013-06-08 Quentin ColombetReapply r183552. This time, use a standard type for...
2013-06-07 Vincent LejeuneR600: Use a refined heuristic to choose when switching...
2013-06-07 Vincent LejeuneR600: Anti dep better handled in tex clause
2013-06-07 Jakob Stoklund OlesenRemember the anyext patterns.
2013-06-07 Jakob Stoklund OlesenAdd missing zextloadi1 to i64 patterns. PR16721.
2013-06-07 Shuxin Yang Fix an assertion in MemCpyOpt pass.
2013-06-07 Hal FinkelDisallow i64 div/rem in PPC32 counter loops
2013-06-07 Quentin ColombetRevert commits related to stack warning.
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingRemove unused c'tor.
2013-06-07 Tom StellardR600: Fix calculation of stack offset in AMDGPUFrameLow...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Tom StellardR600: Fix the fetch limits for R600 generation GPUs
2013-06-07 Tom StellardR600: Move Subtarget feature definitions into AMDGPU.td
2013-06-07 Tom StellardR600: Remove unnecessary include
2013-06-07 Quentin ColombetAdd a backend option to warn on a given stack size...
2013-06-07 JF BastienARM FastISel integer sext/zext improvements
2013-06-07 Benjamin KramerR600: Don't compare iterators of different maps.
2013-06-07 Quentin ColombetTeach AsmPrinter how to print odd constants.
2013-06-07 Manman RenDIBuilder: No functionality change.
2013-06-07 Benjamin KramerVincent says the element is at most once in the vector...
2013-06-07 Rafael EspindolaUse isxdigit.
2013-06-07 Roman DivackyFix a typo in asm string of BP* family of instructions...
2013-06-07 Rafael EspindolaSupport OpenBSD's native frame protection conventions.
2013-06-07 Benjamin KramerR600: Fix a potential iterator invalidation issue.
2013-06-07 Vincent LejeuneR600: Remove an extra break in R600OptimizeVectorRegist...
2013-06-07 Benjamin KramerFold variable that's only used in assert into the assert.
2013-06-07 Duncan SandsCorrect wrong register in this example, pointed out...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Michael Gottesman[objc-arc] Ensure that the cfg path count does not...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-07 Bill WendlingDon't cache the instruction info and register info...
2013-06-07 Manman RenDIBuilder: No functionality change.
2013-06-07 Arnold SchwaighoferARM sched model: Use the right resources for DIV
2013-06-07 Arnold SchwaighoferARM sched model: Add VFP div instruction on Swift
2013-06-07 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions...
2013-06-07 Venkatraman Govind... [Sparc]: Use cmp instruction instead of subcc to compar...
2013-06-06 Jakub StaszakSimplify code. No functionality change.
2013-06-06 Vincent LejeuneR600: Rewrite an awkward loop in R600MachineScheduler
2013-06-06 Nadav RotemJeffrey Yasskin volunteered to benchmark the vectorizer...
2013-06-06 David BlaikieFix break in r183446 - helps to increment the iterator...
2013-06-06 Arnold SchwaighoferRevert "ARM sched model: Add SIMD/VFP load/store instru...
2013-06-06 David BlaikieDebug Info: simplify parameter ordering preservation
2013-06-06 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions...
2013-06-06 Arnold SchwaighoferARM sched model: Add integer VFP/SIMD instructions...
2013-06-06 Jakub StaszakRe-apply "Use IRBuilder instead of ConstantInt methods...
2013-06-06 Arnold SchwaighoferARM sched model: Add integer load/store instructions...
2013-06-06 Arnold SchwaighoferARM sched model: Add integer arithmetic instructions...
2013-06-06 Arnold SchwaighoferARM sched model: Cortex A9 - More InstRW sched resources
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb instructions
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions
2013-06-06 Arnold SchwaighoferARM sched model: Add branch instructions
2013-06-06 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions
2013-06-06 Arnold SchwaighoferARM sched model: Add preload instructions
2013-06-06 Kevin EnderbyTeach llvm-objdump with the -macho parser how to use...
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb instructions
2013-06-06 Rafael EspindolaRevert "Use IRBuilder instead of ConstantInt methods...
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb2 instructions
2013-06-06 Vincent LejeuneR600: Remove leftover code in R600MachineScheduler.cpp
2013-06-06 Rafael EspindolaPrint symbol names in relocations when dumping COFF...
2013-06-06 Bill WendlingCast to the correct type. Pointer, not reference.
2013-06-06 NAKAMURA TakumiR600OptimizeVectorRegisters.cpp: Tweak a warning. ...
2013-06-06 NAKAMURA TakumiR600OptimizeVectorRegisters.cpp: Suppress a warning...
2013-06-06 NAKAMURA TakumiTrailing linefeed.
2013-06-06 Bill WendlingCast to the proper type.
2013-06-06 Jakub StaszakRemove unneeded cast<>.
2013-06-06 Bill WendlingCache the TargetLowering info object as a pointer.
2013-06-06 Jakub StaszakUse IRBuilder instead of ConstantInt methods.
2013-06-06 Bill WendlingDon't cache the TargetLoweringInfo object inside of...
2013-06-05 Sean SilvaAdd writeAsHex(raw_ostream &) method to BinaryRef.
2013-06-05 Tom StellardR600: Replace predicate loop with predicate function
2013-06-05 Sean SilvaRename BinaryRef::isBinary to more descriptive DataIsHe...
2013-06-05 Bill WendlingAdd space to assert message.
2013-06-05 Sean SilvaAdd writeAsBinary(raw_ostream &) method to BinaryRef.
2013-06-05 Vincent LejeuneR600: Add a pass that merge Vector Register
2013-06-05 Vincent LejeuneR600: Schedule copy from phys register at beginning...
2013-06-05 Akira Hatanaka[mips] brcond + setgt/setugt instruction selection...
2013-06-05 Jakub StaszakUse IRBuilder instead of ConstantInt methods. It simpli...
2013-06-05 Michael Liao[PATCH] Fix VGATHER* operand constraints
2013-06-05 Arnold SchwaighoferARM sched model: Add more ALU and CMP instructions
2013-06-05 Arnold SchwaighoferARM sched model: Add divsion, loads, branches, vfp cvt
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