OSDN Git Service

(root) / qmiga / qemu.git / history
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
python: use avocado's "new" runner
[qmiga/qemu.git] / target / riscv /
2022-01-21 Peter MaydellMerge remote-tracking branch 'remotes/alistair/tags... tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Relax UXL field for debugging tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Enable uxl field write tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Set default XLEN for hypervisor tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Adjust scalar reg in vector with XLEN tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Adjust vector address with mask tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Fix check range for first fault only tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Remove VILL field in VTYPE tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Adjust vsetvl according to XLEN tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Split out the vill from vtype tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Split pm_enabled into mask and base tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Calculate address according to XLEN tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Alloc tcg global for cur_pm[mask|base] tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Create current pm fields in env tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Adjust csr write mask with XLEN tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Relax debug check for pm write tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Use gdb xml according to max mxlen tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Extend pc for runtime pc write tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Ignore the pc bits above XLEN tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Create xl field in env tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Sign extend pc for different XLEN tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Sign extend link reg for jal and jalr tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Don't save pc when exception return tree | commitdiff
2022-01-21 LIU Zhiweitarget/riscv: Adjust pmpcfg access with mxl tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Allow Zve32f extension to be... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve32f support for narrowing... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve32f support for widening... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve32f support for single... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve32f support for scalar... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve32f support for configura... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve32f extension into RISC-V tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Allow Zve64f extension to be... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for narrowing... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for widening... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for single... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for scalar... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for vsmul... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for vmulh... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for load... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f support for configura... tree | commitdiff
2022-01-21 Frank Changtarget/riscv: rvv-1.0: Add Zve64f extension into RISC-V tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Support virtual time context synchronization tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Implement virtual time adjusting with... tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Add kvm_riscv_get/put_regs_timer tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Add host cpu type tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Handle KVM_EXIT_RISCV_SBI exit tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Support setting external interrupt by KVM tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Support start kernel directly by KVM tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Implement kvm_arch_put_registers tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Implement kvm_arch_get_registers tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Implement function kvm_arch_init_vcpu tree | commitdiff
2022-01-21 Yifei Jiangtarget/riscv: Add target/riscv/kvm.c to place the publi... tree | commitdiff
2022-01-12 Cédric Le GoaterMerge tag 'qemu-slof-20220110' of github.com:aik/qemu... tree | commitdiff
2022-01-11 Peter MaydellMerge remote-tracking branch 'remotes/philmd/tags/sdmmc... tree | commitdiff
2022-01-11 Peter MaydellMerge remote-tracking branch 'remotes/mst/tags/for_upst... tree | commitdiff
2022-01-08 Richard HendersonMerge tag 'bsd-user-arm-pull-request' of gitlab.com... tree | commitdiff
2022-01-08 Richard HendersonMerge tag 'pull-riscv-to-apply-20220108' of github... tree | commitdiff
2022-01-08 Alistair Francistarget/riscv: Implement the stval/mtval illegal instruction tree | commitdiff
2022-01-08 Alistair Francistarget/riscv: Fixup setting GVA tree | commitdiff
2022-01-08 Alistair Francistarget/riscv: Set the opcode in DisasContext tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: actual functions to realize crs 128-bit... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: modification of the trans_csrxx for 128... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: helper functions to wrap calls to 128... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: adding high part of some csrs tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: support for 128-bit M extension tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: support for 128-bit arithmetic instructions tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: support for 128-bit shift instructions tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: support for 128-bit U-type instructions tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: support for 128-bit bitwise instructions tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: accessors to registers upper part and... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: moving some insns close to similar insns tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: setup everything for rv64 to support... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: array for the 64 upper bits of 128-bit... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: separation of bitwise logic and arithmeti... tree | commitdiff
2022-01-08 Frédéric Pétrottarget/riscv: additional macros to check instruction... tree | commitdiff
2022-01-08 Frédéric Pétrotexec/memop: Adding signedness to quad definitions tree | commitdiff
2022-01-08 Philipp Tomsichtarget/riscv: Fix position of 'experimental' comment tree | commitdiff
2022-01-08 Frank Changtarget/riscv: rvv-1.0: Call the correct RVF/RVD check... tree | commitdiff
2022-01-08 Frank Changtarget/riscv: rvv-1.0: Call the correct RVF/RVD check... tree | commitdiff
2022-01-08 Frank Changtarget/riscv: rvv-1.0: Call the correct RVF/RVD check... tree | commitdiff
2022-01-08 Alistair Francistarget/riscv: Enable the Hypervisor extension by default tree | commitdiff
2022-01-08 Alistair Francistarget/riscv: Mark the Hypervisor extension as non... tree | commitdiff
2022-01-08 Nikita Shubintarget/riscv/pmp: fix no pmp illegal intrs tree | commitdiff
2021-12-20 Richard HendersonMerge tag 'pull-user-20211220' of https://gitlab.com... tree | commitdiff
2021-12-20 Richard HendersonMerge tag 'pull-riscv-to-apply-20211220-1' of github... tree | commitdiff
2021-12-20 Vineet Guptatarget/riscv: Enable bitmanip Zb[abcs] instructions tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: Add ELEN checks for widening... tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: update opivv_vadc_check() comment tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: rename vmandnot.mm and vmornot... tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: add vector unit-stride mask... tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: add evl parameter to vext_ldst_us() tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: add vsetivli instruction tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: rename r2_zimm to r2_zimm11 tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: floating-point reciprocal estima... tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: floating-point reciprocal square... tree | commitdiff
2021-12-20 Hsiangkai Wangtarget/riscv: gdb: support vector registers for rv64... tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: trigger illegal instruction... tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: implement vstart CSR tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits tree | commitdiff
2021-12-20 Frank Changtarget/riscv: rvv-1.0: narrowing floating-point/integer... tree | commitdiff
next
About OSDN
Find Software
Develop Software
Help