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Rafael Espindola [Wed, 24 May 2017 16:39:12 +0000 (16:39 +0000)]
Add some tips on benchmarking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303769
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Nirav Dave [Wed, 24 May 2017 15:59:09 +0000 (15:59 +0000)]
[AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI.
Various address spaces on the SI and R600 subtargets have stricter
limits on memory access size that other address spaces. Use
canMergeStoresTo predicate to prevent the DAGCombiner from creating
these stores as they will be split up during legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303767
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Matthew Simpson [Wed, 24 May 2017 15:26:15 +0000 (15:26 +0000)]
[LV] Update type in cost model for scalarization
For non-uniform instructions marked for scalarization, we should update
`VectorTy` when computing instruction costs to reflect the scalar type. In
addition to determining instruction costs, this type is also used to signal
that all instructions in the loop will be scalarized. This currently affects
memory instructions and non-pointer induction variables and their updates. (We
also mark GEPs scalar after vectorization, but their cost is computed together
with memory instructions.) For scalarized induction updates, this patch also
scales the scalar cost by the vectorization factor, corresponding to each
induction step.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303763
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Vadzim Dambrouski [Wed, 24 May 2017 15:08:30 +0000 (15:08 +0000)]
[MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex.
Use ADDframe pseudo instruction instead.
This will fix machine verifier error, and will help to fix PR32146.
Differential Revision: https://reviews.llvm.org/D33452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303758
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Sanjay Patel [Wed, 24 May 2017 14:56:51 +0000 (14:56 +0000)]
[InstCombine] add tests to show potential missing folds; NFC
As noted in https://bugs.llvm.org/show_bug.cgi?id=33138 and
the comments, there are multiple ways to view this. If we
choose not to solve this in InstCombine, these tests will
serve as documentation of that choice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303755
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Marek Olsak [Wed, 24 May 2017 14:53:50 +0000 (14:53 +0000)]
Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns"
This reverts commit
e065977c4b5f68ab845400b256f6a3822b1325fa.
It doesn't work. S_LOAD_DWORD_IMM_ci and friends aren't selected by any of
the patterns, so it was putting 32-bit literals into the 8-bit field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303754
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Sanjay Patel [Wed, 24 May 2017 14:21:31 +0000 (14:21 +0000)]
[InstCombine] add tests to document bitcast + bitwise-logic behavior; NFC
The solution for PR26702 ( https://bugs.llvm.org/show_bug.cgi?id=26702 )
added a canonicalization rule, but the minimal regression tests don't
demonstrate how that rule interacts with other folds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303750
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Diana Picus [Wed, 24 May 2017 14:16:04 +0000 (14:16 +0000)]
Revert "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"
This reverts commit r303730 because it broke all the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303747
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Krzysztof Parzyszek [Wed, 24 May 2017 13:43:42 +0000 (13:43 +0000)]
[Hexagon] Fix comment in HexagonPacketizer::runOnMachineFunction
Patch by Wei-Ren Chen.
Differential Revision: https://reviews.llvm.org/D33439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303745
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Jonas Paulsson [Wed, 24 May 2017 13:42:56 +0000 (13:42 +0000)]
[LoopVectorizer] Let target prefer scalar addressing computations.
The loop vectorizer usually vectorizes any instruction it can and then
extracts the elements for a scalarized use. On SystemZ, all elements
containing addresses must be extracted into address registers (GRs). Since
this extraction is not free, it is better to have the address in a suitable
register to begin with. By forcing address arithmetic instructions and loads
of addresses to be scalar after vectorization, two benefits result:
* No need to extract the register
* LSR optimizations trigger (LSR isn't handling vector addresses currently)
Benchmarking show improvements on SystemZ with this new behaviour.
Any other target could try this by returning false in the new hook
prefersVectorizedAddressing().
Review: Renato Golin, Elena Demikhovsky, Ulrich Weigand
https://reviews.llvm.org/D32422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303744
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Jonas Paulsson [Wed, 24 May 2017 13:15:48 +0000 (13:15 +0000)]
[SystemZ] Fix register modelling in expandLoadStackGuard()
EXPENSIVE_CHECKS found this bug (https://bugs.llvm.org/show_bug.cgi?id=33047), which
this patch fixes. The EAR instruction defines a GR32, not a GR64.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303743
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Tamas Berghammer [Wed, 24 May 2017 11:29:02 +0000 (11:29 +0000)]
Demangler: Fix constructor cv qualifier handling
Previously if we parsed a constructor then we set parsed_ctor_dtor_cv
to true and never reseted it. This causes issue when a template argument
references a constructor (e.g. type of lambda defined inside a
constructor) as we will have the parsed_ctor_dtor_cv flag set what will
cause issues when parsing later arguments.
Differential Revision: https://reviews.llvm.org/D33385
libcxxabi change: https://reviews.llvm.org/rL303737
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303738
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Simon Pilgrim [Wed, 24 May 2017 11:02:27 +0000 (11:02 +0000)]
Strip trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303736
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Florian Hahn [Wed, 24 May 2017 10:18:57 +0000 (10:18 +0000)]
[ARM] Remove ThumbTargetMachines. (NFC)
Summary:
Thumb code generation is controlled by ARMSubtarget and the concrete
ThumbLETargetMachine and ThumbBETargetMachine are not needed.
Eric Christopher suggested removing the unneeded target machines in
https://reviews.llvm.org/D33287.
I think it still makes sense to keep separate TargetMachines for big and
little endian as we probably do not want to have different endianess for
difference functions in a single compilation unit. The MIPS backend has
two separate TargetMachines for big and little endian as well.
Reviewers: echristo, rengolin, kristof.beyls, t.p.northover
Reviewed By: echristo
Subscribers: aemerson, javed.absar, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D33318
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303733
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Mikael Holmen [Wed, 24 May 2017 09:35:23 +0000 (09:35 +0000)]
MachineCSE: Respect interblock physreg liveness
Summary:
This is a fix for PR32538. MachineCSE first looks at MO.isDead(), but
if it is not marked dead, MachineCSE still wants to do its own check
to see if it is trivially dead. This check for the trivial case
assumed that physical registers cannot be live out of a block.
Patch by Mattias Eriksson.
Reviewers: qcolombet, jbhateja
Reviewed By: qcolombet, jbhateja
Subscribers: jbhateja, llvm-commits
Differential Revision: https://reviews.llvm.org/D33408
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303731
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Max Kazantsev [Wed, 24 May 2017 08:52:18 +0000 (08:52 +0000)]
[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start
When folding arguments of AddExpr or MulExpr with recurrences, we rely on the fact that
the loop of our base recurrency is the bottom-lost in terms of domination. This assumption
may be broken by an expression which is treated as invariant, and which depends on a complex
Phi for which SCEVUnknown was created. If such Phi is a loop Phi, and this loop is lower than
the chosen AddRecExpr's loop, it is invalid to fold our expression with the recurrence.
Another reason why it might be invalid to fold SCEVUnknown into Phi start value is that unlike
other SCEVs, SCEVUnknown are sometimes position-bound. For example, here:
for (...) { // loop
phi = {A,+,B}
}
X = load ...
Folding phi + X into {A+X,+,B}<loop> actually makes no sense, because X does not exist and cannot
exist while we are iterating in loop (this memory can be even not allocated and not filled by this moment).
It is only valid to make such folding if X is defined before the loop. In this case the recurrence {A+X,+,B}<loop>
may be existant.
This patch prohibits folding of SCEVUnknown (and those who use them) into the start value of an AddRecExpr,
if this instruction is dominated by the loop. Merging the dominating unknown values is still valid. Some tests that
relied on the fact that some SCEVUnknown should be folded into AddRec's are changed so that they no longer
expect such behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303730
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Daniel Sanders [Wed, 24 May 2017 07:02:37 +0000 (07:02 +0000)]
Explicitly set CPU and -slow-incdec to try to fix r303678's test on llvm-clang-x86_64-expensive-checks-win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303727
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Craig Topper [Wed, 24 May 2017 07:00:55 +0000 (07:00 +0000)]
[APInt] Use std::end to avoid mentioning the size of a local buffer repeatedly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303726
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Daniel Sanders [Wed, 24 May 2017 06:44:55 +0000 (06:44 +0000)]
Revert r303720: Tweak r303678's test to try to fix llvm-clang-x86_64-expensive-checks-win.
It doesn't fix that builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303721
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Daniel Sanders [Wed, 24 May 2017 06:05:14 +0000 (06:05 +0000)]
Tweak r303678's test to try to fix llvm-clang-x86_64-expensive-checks-win.
I suspect this buildbot has slow-incdec set by default, most likely due to
the default CPU having this set. This feature bit can prevent optsize from
having an effect on this IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303720
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Javed Absar [Wed, 24 May 2017 05:32:48 +0000 (05:32 +0000)]
[ARM] Add VLDx/VSTx sched defs for machine-schedulers. NFCI
This patch adds missing scheds for Neon VLDx/VSTx instructions.
This will help one write schedulers easier/faster in the future for ARM sub-targets.
Existing models will not affected by this patch.
Reviewed by: Renato Golin, Diana Picus
Differential Revision: https://reviews.llvm.org/D33120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303717
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Davide Italiano [Wed, 24 May 2017 02:30:24 +0000 (02:30 +0000)]
[NewGVN] Update additionalUsers when we simplify to a value.
Otherwise we don't revisit an instruction that could be simplified,
and when we verify, we discover there's something that changed, i.e.
what we had wasn't a maximal fixpoint.
Fixes PR32836.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303715
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Zachary Turner [Wed, 24 May 2017 00:35:32 +0000 (00:35 +0000)]
Fix broken build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303711
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George Karpenkov [Wed, 24 May 2017 00:29:12 +0000 (00:29 +0000)]
Revert "Disable coverage opt-out for strong postdominator blocks."
This reverts commit
2ed06f05fc10869dd1239cff96fcdea2ee8bf4ef.
Buildbots do not like this on Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303710
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George Karpenkov [Wed, 24 May 2017 00:29:08 +0000 (00:29 +0000)]
Revert "Fixes for tests for r303698"
This reverts commit
69bfaf72e7502eb08bbca88a57925fa31c6295c6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303709
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Zachary Turner [Wed, 24 May 2017 00:28:46 +0000 (00:28 +0000)]
git-llvm script should add .exe on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303708
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Zachary Turner [Wed, 24 May 2017 00:26:27 +0000 (00:26 +0000)]
Don't do a full scan of the type stream before processing records.
LazyRandomTypeCollection is designed for random access, and in
order to provide this it lazily indexes ranges of types. In the
case of types from an object file, there is no partial index
to build off of, so it has to index the full stream up front.
However, merging types only requires sequential access, and when
that is needed, this extra work is simply wasted. Changing the
algorithm to work on sequential arrays of types rather than
random access type collections eliminates this up front scan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303707
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Davide Italiano [Tue, 23 May 2017 23:59:23 +0000 (23:59 +0000)]
[SCCP] Use the `hasAddressTaken()` version defined in `Function`.
Instead of using the SCCP homegrown one. We should eventually
make the private SCCP version disappear, but that wont' be today.
PR33143 tracks this issue.
Add braces for consistency while here. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303706
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Davide Italiano [Tue, 23 May 2017 23:51:54 +0000 (23:51 +0000)]
[LIR] Use the newly `getRecurrenceVar()` helper. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303704
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George Karpenkov [Tue, 23 May 2017 22:42:34 +0000 (22:42 +0000)]
Fixes for tests for r303698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303701
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Davide Italiano [Tue, 23 May 2017 22:32:56 +0000 (22:32 +0000)]
[LIR] Strengthen the check for recurrence variable in popcnt/CTLZ.
Fixes PR33114.
Differential Revision: https://reviews.llvm.org/D33420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303700
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George Karpenkov [Tue, 23 May 2017 21:58:54 +0000 (21:58 +0000)]
Disable coverage opt-out for strong postdominator blocks.
Coverage instrumentation has an optimization not to instrument extra
blocks, if the pass is already "accounted for" by a
successor/predecessor basic block.
However (https://github.com/google/sanitizers/issues/783) this
reasoning may become circular, which stops valid paths from having
coverage.
In the worst case this can cause fuzzing to stop working entirely.
This change simplifies logic to something which trivially can not have
such circular reasoning, as losing valid paths does not seem like a
good trade-off for a ~15% decrease in the # of instrumented basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303698
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Tim Northover [Tue, 23 May 2017 21:53:11 +0000 (21:53 +0000)]
Revert LLVM changes for "Sema: allow imaginary constants via GNU extension if UDL overloads not present."
The changes accidentally crept into a Clang commit I was making.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303697
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Rui Ueyama [Tue, 23 May 2017 21:50:40 +0000 (21:50 +0000)]
[git-llvm] Check if svn is installed.
The error message that git-llvm script prints out when svn is missing
is very cryptic. I spent a fair amount of time to find what was wrong
with my environment. It looks like many newcomers also exprienced a
hard time to submit their first patches due to this error.
This patch adds a more user-friendly error message.
Differential Revision: https://reviews.llvm.org/D33458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303696
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Vadzim Dambrouski [Tue, 23 May 2017 21:49:42 +0000 (21:49 +0000)]
[MSP430] Add subtarget features for hardware multiplier.
Also add more processors to make -mcpu option behave similar to gcc.
Differential Revision: https://reviews.llvm.org/D33335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303695
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Tim Northover [Tue, 23 May 2017 21:41:49 +0000 (21:41 +0000)]
Sema: allow imaginary constants via GNU extension if UDL overloads not present.
C++14 added user-defined literal support for complex numbers so that you can
write something like "complex<double> val = 2i". However, there is an existing
GNU extension supporting this syntax and interpreting the result as a _Complex
type.
This changes parsing so that such literals are interpreted in terms of C++14's
operators if an overload is present but otherwise falls back to the original
GNU extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303694
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Reid Kleckner [Tue, 23 May 2017 21:35:32 +0000 (21:35 +0000)]
Silence MSVC warning about unsigned integer overflow, which has defined behavior
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303693
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Francis Visoiu Mistrih [Tue, 23 May 2017 21:28:41 +0000 (21:28 +0000)]
abtest: remove duplicate script
This is fixing a mistake from r303690.
Differential Revision: https://reviews.llvm.org/D33303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303692
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Simon Pilgrim [Tue, 23 May 2017 21:27:15 +0000 (21:27 +0000)]
[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)
This fixes 17 of the 41 -verify-machineinstrs test failures identified in PR33045
Differential Revision: https://reviews.llvm.org/D33451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303691
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Francis Visoiu Mistrih [Tue, 23 May 2017 21:22:16 +0000 (21:22 +0000)]
AsmPrinter: mark the beginning and the end of a function in verbose mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303690
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Tom Stellard [Tue, 23 May 2017 20:35:38 +0000 (20:35 +0000)]
merge-request.sh: Use https url for bugzilla
With the http url, the script fails with:
Connection lost/failed: 411 Client Error: Length Required
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303685
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Changpeng Fang [Tue, 23 May 2017 20:25:41 +0000 (20:25 +0000)]
AMDGPU/SI: Move the local memory usage related checking after calling convention checking in PromoteAlloca
Summary:
Promoting Alloca to Vector and Promoting Alloca to LDS are two independent handling of Alloca and should not affect each other.
As a result, we should not give up promoting to vector if there is not enough LDS. This patch factors out the local memory usage
related checking out and replace it after the calling convention checking.
Reviewer:
arsenm
Differential Revision:
http://reviews.llvm.org/D33139
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303684
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Daniel Sanders [Tue, 23 May 2017 20:02:48 +0000 (20:02 +0000)]
Fix unused variable warnings after r303678
This should fix lld-x86_64-darwin13
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303683
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Geoff Berry [Tue, 23 May 2017 19:57:45 +0000 (19:57 +0000)]
[AArch64][Falkor] Refine sched details for LSLfast/ASRfast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303682
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Stanislav Mekhanoshin [Tue, 23 May 2017 19:54:48 +0000 (19:54 +0000)]
[AMDGPU] Combine and (srl) into shl (bfe)
Perform DAG combine:
and (srl x, c), mask => shl (bfe x, nb + c, mask >> nb), nb
Where nb is a number of trailing zeroes in mask.
It replaces two instructions with two and BFE is generally a more
expensive one. However this is only done if we are selecting a byte
or word at an aligned boundary which results in a proper SDWA
operand pattern. It is only done if SDWA is supported.
TODO: improve SDWA pass to actually convert this pattern. It is not
done now because we have an immediate in the instruction, which has
be moved into a VGPR.
Differential Revision: https://reviews.llvm.org/D33455
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303681
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Geoff Berry [Tue, 23 May 2017 19:54:28 +0000 (19:54 +0000)]
[AArch64][Falkor] Fix sched details for FMOV of WZR/XZR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303680
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Oleg Ranevskyy [Tue, 23 May 2017 19:38:37 +0000 (19:38 +0000)]
[ARM] Temporarily disable globals promotion to constant pools to prevent miscompilation
Summary:
A temporary workaround for PR32780 - rematerialized instructions accessing the same promoted global through different constant pool entries.
The patch turns off the globals promotion optimization leaving all its code in place, so that it can be easily turned on once PR32780 is fixed.
Since this is a miscompilation issue causing generation of misbehaving code, and the problem is very subtle, the patch might be valuable enough to get into 4.0.1.
Reviewers: efriedma, jmolloy
Reviewed By: efriedma
Subscribers: aemerson, javed.absar, llvm-commits, rengolin, asl, tstellar
Differential Revision: https://reviews.llvm.org/D33446
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303679
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Daniel Sanders [Tue, 23 May 2017 19:33:16 +0000 (19:33 +0000)]
[globalisel][tablegen] Add support for (set $dst, 1) and test X86's OptForSize predicate.
Summary:
It's rare but a small number of patterns use IntInit's at the root of the match.
On X86, one such rule is enabled by the OptForSize predicate and causes the
compiler to use the smaller:
%0 = MOV32r1
instead of the usual:
%0 = MOV32ri 1
This patch adds support for matching IntInit's at the root and uses this as a
test case for the optsize attribute that was implemented in r301750
Reviewers: qcolombet, ab, t.p.northover, rovka, kristof.beyls, aditya_nandakumar
Reviewed By: qcolombet
Subscribers: igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D32791
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303678
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Zachary Turner [Tue, 23 May 2017 18:56:23 +0000 (18:56 +0000)]
[CodeView] Eliminate redundant hashes and allocations.
When writing field list records, we would construct a temporary
type serializer that shared a bump ptr allocator with the rest
of the application, so anything allocated from here would live
forever. Furthermore, this temporary serializer had all the
properties of a full blown serializer including record hashing
and de-duplication.
These features are required when you're merging multiple type
streams into each other, because different streams may contain
identical records, but records from the same type stream will
never collide with each other. So all of this hashing was
unnecessary.
To solve this, two fixes are made:
1) The temporary serializer keeps its own bump ptr allocator
instead of sharing a global one. When it's finished, all of
its memory is freed.
2) Instead of using the same temporary serializer for the life
of an entire type stream, we use it only for the life of a single
field list record and delete it when the field list record is
completed. This way the hash table will not grow as other
records from the same type stream get inserted. Further improvements
could eliminate hashing entirely from this codepath.
This reduces the link time by 85% in my test, from 1 minute to 9
seconds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303676
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Nirav Dave [Tue, 23 May 2017 18:53:02 +0000 (18:53 +0000)]
[DAG] Add AddressSpace parameter to canMergeStoresTo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303673
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 23 May 2017 18:42:58 +0000 (18:42 +0000)]
[InstSimplify] Add more tests for undef inputs and multiplying by 0 for the add/sub/mul with overflow intrinsics. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303671
91177308-0d34-0410-b5e6-
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Yuka Takahashi [Tue, 23 May 2017 18:39:08 +0000 (18:39 +0000)]
[GSoC] Shell autocompletion for clang
Summary:
This is a first patch for GSoC project, bash-completion for clang.
To use this on bash, please run `source clang/utils/bash-autocomplete.sh`.
bash-autocomplete.sh is code for bash-completion.
Simple flag completion and path completion is available in this patch.
Reviewers: teemperor, v.g.vassilev, ruiu, Bigcheese, efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33237
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303670
91177308-0d34-0410-b5e6-
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David Blaikie [Tue, 23 May 2017 18:36:07 +0000 (18:36 +0000)]
Fix DIEHash refactoring that dropped the DW_AT_name from the hash
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303669
91177308-0d34-0410-b5e6-
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Nirav Dave [Tue, 23 May 2017 18:33:09 +0000 (18:33 +0000)]
[DAG] Add canMergeStoresTo predicate checks. NFCI.
Propagate canMergeStoresTo checks to missing cases in StoreMerge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303668
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Reid Kleckner [Tue, 23 May 2017 18:28:13 +0000 (18:28 +0000)]
Speculative build fix for non-Windows
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303667
91177308-0d34-0410-b5e6-
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David Blaikie [Tue, 23 May 2017 18:27:09 +0000 (18:27 +0000)]
Refactor DWARF hashing to use a .def file to avoid repetition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303666
91177308-0d34-0410-b5e6-
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Reid Kleckner [Tue, 23 May 2017 18:23:59 +0000 (18:23 +0000)]
[PDB] Hash types up front when merging types instead of using StringMap
Summary:
First, StringMap uses llvm::HashString, which is only good for short
identifiers and really bad for large blobs of binary data like type
records. Moving to `DenseMap<StringRef, TypeIndex>` with some tricks for
memory allocation fixes that.
Unfortunately, that didn't buy very much performance. Profiling showed
that we spend a long time during DenseMap growth rehashing existing
entries. Also, in general, DenseMap is faster when the keys are small.
This change takes that to the logical conclusion by introducing a small
wrapper value type around a pointer to key data. The key data contains a
precomputed hash, the original record data (pointer and size), and the
type index, which is the "value" of our original map.
This reduces the time to produce llvm-as.exe and llvm-as.pdb from ~15s
on my machine to 3.5s, which is about a 4x improvement.
Reviewers: zturner, inglorion, ruiu
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33428
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303665
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Craig Topper [Tue, 23 May 2017 17:57:36 +0000 (17:57 +0000)]
[InstSimplify] auto-generate test checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303664
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Sanjay Patel [Tue, 23 May 2017 17:51:22 +0000 (17:51 +0000)]
[InstCombine] auto-generate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303663
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Sanjay Patel [Tue, 23 May 2017 17:29:58 +0000 (17:29 +0000)]
[InstCombine] allow icmp-xor folds for vectors (PR33138)
This fixes the first part of:
https://bugs.llvm.org/show_bug.cgi?id=33138
More work is needed for the bitcasted variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303660
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Craig Topper [Tue, 23 May 2017 17:20:18 +0000 (17:20 +0000)]
[InstCombine] Use update_test_checks to regenerate the ctpop test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303659
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Marek Olsak [Tue, 23 May 2017 17:14:34 +0000 (17:14 +0000)]
AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns
This is just a cleanup. Also, it adds checking that ByteCount is aligned to 4.
Reviewers: arsenm, nhaehnle, tstellarAMD
Subscribers: kzhuravl, wdng, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D28994
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303658
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Reid Kleckner [Tue, 23 May 2017 17:03:28 +0000 (17:03 +0000)]
Commit AttributeList change that was supposed to be part of r303654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303656
91177308-0d34-0410-b5e6-
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Ulrich Weigand [Tue, 23 May 2017 17:03:23 +0000 (17:03 +0000)]
[RuntimeDyld, PowerPC] Fix regression from r303637
Actually, to identify external symbols, we need to check for
*either* non-null Value.SymbolName *or* a SymType of
Symbol::ST_Unknown.
The former may happen for symbols not known to the JIT at all
(e.g. defined in a native library), while the latter happens
for symbols known to the JIT, but defined in a different module.
Fixed several regressions on big-endian ppc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303655
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Reid Kleckner [Tue, 23 May 2017 17:01:48 +0000 (17:01 +0000)]
[IR] Switch AttributeList to use an array for O(1) access
Summary:
Before this change, AttributeLists stored a pair of index and
AttributeSet. This is memory efficient if most arguments do not have
attributes. However, it requires doing a search over the pairs to test
an argument or function attribute. Profiling shows that this loop was
0.76% of the time in 'opt -O2' of sqlite3.c, because LLVM constantly
tests values for nullability.
This was worth about 2.5% of mid-level optimization cycles on the
sqlite3 amalgamation. Here are the full perf results:
https://reviews.llvm.org/P7995
Here are just the before and after cycle counts:
```
$ perf stat -r 5 ./opt_before -O2 sqlite3.bc -o /dev/null
13,274,181,184 cycles # 3.047 GHz ( +- 0.28% )
$ perf stat -r 5 ./opt_after -O2 sqlite3.bc -o /dev/null
12,906,927,263 cycles # 3.043 GHz ( +- 0.51% )
```
This patch *does not* change the indices used to query attributes, as
requested by reviewers. Tracking whether an index is usable for array
indexing is a huge pain that affects many of the internal APIs, so it
would be good to come back later and do a cleanup to remove this
internal adjustment.
Reviewers: pete, chandlerc
Subscribers: javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D32819
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303654
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Sanjay Patel [Tue, 23 May 2017 16:53:05 +0000 (16:53 +0000)]
[InstCombine] add icmp-xor tests to show vector neglect; NFC
Also, rename the tests and the file, add comments, and add more tests
because there are no existing tests for some of these folds.
These patterns are particularly important for crippled vector ISAs that
have limited compare predicates (PR33138).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303652
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Stanislav Mekhanoshin [Tue, 23 May 2017 15:59:58 +0000 (15:59 +0000)]
[AMDGPU] Convert shl (add) into add (shl)
shl (or|add x, c2), c1 => or|add (shl x, c1), (c2 << c1)
This allows to fold a constant into an address in some cases as
well as to eliminate second shift if the expression is used as
an address and second shift is a result of a GEP.
Differential Revision: https://reviews.llvm.org/D33432
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303641
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Zachary Turner [Tue, 23 May 2017 15:50:37 +0000 (15:50 +0000)]
Revert "Make TypeSerializer's StringMap use the same allocator."
This reverts commit
e34ccb7b57da25cc89ded913d8638a2906d1110a.
This is causing failures on the ASAN bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303640
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Simon Atanasyan [Tue, 23 May 2017 15:00:30 +0000 (15:00 +0000)]
[mips] Remove unused class field. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303639
91177308-0d34-0410-b5e6-
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Simon Atanasyan [Tue, 23 May 2017 15:00:26 +0000 (15:00 +0000)]
[mips] Change type of MipsSubtarget ctor arguments s/std::string/StringRef/. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303638
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Ulrich Weigand [Tue, 23 May 2017 14:51:18 +0000 (14:51 +0000)]
[RuntimeDyld, PowerPC] Fix check for external symbols when detecting reloction overflow
The PowerPC part of processRelocationRef currently assumes that external
symbols can be identified by checking for SymType == SymbolRef::ST_Unknown.
This is actually incorrect in some cases, causing relocation overflows to
be mis-detected. The correct check is to test whether Value.SymbolName
is null.
Includes test case. Note that it is a bit tricky to replicate the exact
condition that triggers the bug in a test case. The one included here
seems to fail reliably (before the fix) across different operating
system versions on Power, but it still makes a few assumptions (called
out in the test case comments).
Also add ppc64le platform name to the supported list in the lit.local.cfg
files for the MCJIT and OrcMCJIT directories, since those tests were
currently not run at all.
Fixes PR32650.
Reviewer: hfinkel
Differential Revision: https://reviews.llvm.org/D33402
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303637
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Anna Thomas [Tue, 23 May 2017 13:36:25 +0000 (13:36 +0000)]
[JumpThreading] Safely replace uses of condition
This patch builds over https://reviews.llvm.org/rL303349 and replaces
the use of the condition only if it is safe to do so.
We should not blindly RAUW the condition if experimental.guard or assume
is a use of that
condition. This is because LVI may have used the guard/assume to
identify the
value of the condition, and RUAWing will fold the guard/assume and uses
before the guards/assumes.
Reviewers: sanjoy, reames, trentxintong, mkazantsev
Reviewed by: sanjoy, reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33257
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303633
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Ulrich Weigand [Tue, 23 May 2017 12:43:57 +0000 (12:43 +0000)]
[RuntimeDyld, PowerPC] Fix relocation detection overflow
Code in RuntimeDyldELF currently uses 32-bit temporaries to detect
whether a PPC64 relocation target is out of range. This is incorrect,
and can mis-detect overflow where the distance between relocation site
and target is close to a multiple of 4GB. Fixed by using 64-bit
temporaries.
Noticed while debugging PR32650.
Reviewer: hfinkel
Differential Revision: https://reviews.llvm.org/D33403
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303632
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Sam Kolton [Tue, 23 May 2017 10:08:55 +0000 (10:08 +0000)]
[AMDGPU] SDWA: Add assembler support for GFX9
Summary:
Added separate pseudo and real instruction for GFX9 SDWA instructions.
Currently supports only in assembler.
Depends D32493
Reviewers: vpykhtin, artem.tamazov
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D33132
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303620
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Florian Hahn [Tue, 23 May 2017 09:33:34 +0000 (09:33 +0000)]
[AArch64] Make instruction fusion more aggressive.
Summary:
This patch makes instruction fusion more aggressive by
* adding artificial edges between the successors of FirstSU and
SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps.
* updating PostGenericScheduler::tryCandidate to keep clusters together,
similar to GenericScheduler::tryCandidate.
This change increases the number of AES instruction pairs generated on
Cortex-A57 and Cortex-A72. This doesn't change code at all in
most benchmarks or general code, but we've seen improvement on kernels
using AESE/AESMC and AESD/AESIMC.
Reviewers: evandro, kristof.beyls, t.p.northover, silviu.baranga, atrick, rengolin, MatzeB
Reviewed By: evandro
Subscribers: aemerson, rengolin, MatzeB, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33230
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303618
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Igor Breger [Tue, 23 May 2017 08:23:51 +0000 (08:23 +0000)]
[GlobalISel][X86] G_LOAD/G_STORE vec256/512 support
Summary: mark G_LOAD/G_STORE vec256/512 legal for AVX/AVX512. Implement instruction selection.
Reviewers: zvi, guyblank
Reviewed By: zvi
Subscribers: rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D33268
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303617
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Craig Topper [Tue, 23 May 2017 07:18:37 +0000 (07:18 +0000)]
[KnownBits] Use !hasConflict() in asserts in place of Zero & One == 0 or similar. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303614
91177308-0d34-0410-b5e6-
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Ayal Zaks [Tue, 23 May 2017 07:08:02 +0000 (07:08 +0000)]
[LV] Report multiple reasons for not vectorizing under allowExtraAnalysis
The default behavior of -Rpass-analysis=loop-vectorizer is to report only the
first reason encountered for not vectorizing, if one is found, at which time the
vectorizer aborts its handling of the loop. This patch allows multiple reasons
for not vectorizing to be identified and reported, at the potential expense of
additional compile-time, under allowExtraAnalysis which can currently be turned
on by Clang's -fsave-optimization-record and opt's -pass-remarks-missed.
Removed from LoopVectorizationLegality::canVectorize() the redundant checking
and reporting if we CantComputeNumberOfIterations, as LAI::canAnalyzeLoop() also
does that. This redundancy is caught by a lit test once multiple reasons are
reported.
Patch initially developed by Dror Barak.
Differential Revision: https://reviews.llvm.org/D33396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303613
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David Blaikie [Tue, 23 May 2017 06:48:53 +0000 (06:48 +0000)]
libDebugInfo: Support symbolizing using DWP files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303609
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Akira Hatanaka [Tue, 23 May 2017 06:08:37 +0000 (06:08 +0000)]
[AArch64] Fix PRR33100.
This commit fixes a bug introduced in r301019 where optimizeLogicalImm
would replace a logical node's immediate operand that was CSE'd and
was also an operand of another node.
This commit fixes the bug by replacing the logical node instead of its
immediate operand.
rdar://problem/
32295276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303607
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Amaury Sechet [Tue, 23 May 2017 05:42:54 +0000 (05:42 +0000)]
Update expected result for or-branch.ll . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303606
91177308-0d34-0410-b5e6-
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Galina Kistanova [Tue, 23 May 2017 05:00:10 +0000 (05:00 +0000)]
Cosmetic. Added braces to address gcc warning: suggest explicit braces to avoid ambiguous 'else' [-Wdangling-else].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303602
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NAKAMURA Takumi [Tue, 23 May 2017 04:49:24 +0000 (04:49 +0000)]
TypeStreamMerger.h: Fix a \param in r303577. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303601
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Galina Kistanova [Tue, 23 May 2017 01:20:52 +0000 (01:20 +0000)]
Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303597
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Galina Kistanova [Tue, 23 May 2017 01:07:19 +0000 (01:07 +0000)]
Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303595
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David Blaikie [Tue, 23 May 2017 00:31:24 +0000 (00:31 +0000)]
FIX: Remove debugging assert left in previous commit
Sorry for the bot noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303592
91177308-0d34-0410-b5e6-
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David Blaikie [Tue, 23 May 2017 00:30:42 +0000 (00:30 +0000)]
libDebugInfo: Avoid independently parsing the same .dwo file for two separate CUs residing there
NFC, just an optimization. Will be building on this for DWP support
shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303591
91177308-0d34-0410-b5e6-
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Teresa Johnson [Tue, 23 May 2017 00:08:00 +0000 (00:08 +0000)]
Support for taking the max of module flags when linking, use for PIE/PIC
Summary:
Add Max ModFlagBehavior, which can be used to take the max of two
module flag values when merging modules. Use it for the PIE and PIC
levels.
This avoids an error when we try to import from a module built -fpic
into a module built -fPIC, for example. For both PIE and PIC levels,
this will be legal, since the code generation gets more conservative
as the level is increased. Therefore we can take the max instead of
somehow trying to block importing between modules compiled with
different levels.
Reviewers: tmsriram, pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33418
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303590
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Craig Topper [Mon, 22 May 2017 23:50:40 +0000 (23:50 +0000)]
[InstSimplify] Fix the indentation throughout the interface header file.
The forward declarations and the SimplifyQuery class at the beginning of the namespace weren't indented. But the closing brace for SimplifyQuery and everything after it were indented.
This commit makes the whole file consistent to no identation per coding standards. The signature of every function in this file changed a few weeks ago so this isn't a big disturbance to the revision history.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303588
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Davide Italiano [Mon, 22 May 2017 23:47:11 +0000 (23:47 +0000)]
[NewPM] Fix an innocent but silly typo. Reported by Craig Topper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303587
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Davide Italiano [Mon, 22 May 2017 23:41:40 +0000 (23:41 +0000)]
[NewPM] Add a temporary cl::opt() to test NewGVN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303586
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Galina Kistanova [Mon, 22 May 2017 22:46:31 +0000 (22:46 +0000)]
Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303585
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Vitaly Buka [Mon, 22 May 2017 21:33:54 +0000 (21:33 +0000)]
[CodeGen] Fix uninitialized variables exposed by r303084
All other calls of analyzeBranch reset PredTBB and PredFBB, so I assume it's
expected behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303581
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Tim Northover [Mon, 22 May 2017 21:28:08 +0000 (21:28 +0000)]
InstructionSimplify: don't speculate about Constants changing.
When presented with an icmp/select pair, we can end up asking what would happen
if we replaced one constant with another in an instruction. This is a mistake,
while non-constant Values could become a constant, constants cannot change and
trying to do so can lead to completely invalid IR (a GEP referencing a
non-existant field in the original case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303580
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Evgeniy Stepanov [Mon, 22 May 2017 21:11:35 +0000 (21:11 +0000)]
Infer relocation model from module flags in relocatable LTO link.
Fix for PR33096.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303578
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Zachary Turner [Mon, 22 May 2017 21:07:43 +0000 (21:07 +0000)]
Implement various flavors of type merging.
Previous algotirhm assumed that types and ids are in a single
unified stream. For inputs that come from object files, this
is the case. But if the input is already a PDB, or is the result
of a previous merge, then the types and ids will already have
been split up, in which case we need an algorithm that can
accept operate on independent streams of types and ids that
refer across stream boundaries to each other.
Differential Revision: https://reviews.llvm.org/D33417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303577
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Zachary Turner [Mon, 22 May 2017 21:07:14 +0000 (21:07 +0000)]
Make TypeSerializer's StringMap use the same allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303576
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Adrian Prantl [Mon, 22 May 2017 20:47:09 +0000 (20:47 +0000)]
Don't generate line&scope debug info for meta-instructions.
MachineInstructions that don't generate any code (such as
IMPLICIT_DEFs) should not generate any debug info either.
Fixes PR33107.
https://bugs.llvm.org/show_bug.cgi?id=33107
This reapplies r303566 without any modifications. The stage2 build
failures persisted even after reverting this patch, and looking back
through history, it looks like these tests are flaky.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303575
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Teresa Johnson [Mon, 22 May 2017 20:28:18 +0000 (20:28 +0000)]
Fix update VP metadata after inlining for instrumentation PGO
Summary:
With instrumentation profiling, when updating the VP metadata after
an inline, VP metadata on the inlined copy was inadvertantly having
all counts zeroed out. This was causing indirect calls from code inlined
during the call step to be marked as cold in the ThinLTO summaries and
not imported.
The CallerBFI needs to be passed down so that the CallSiteCount can be
computed from the profile summary info. With Sample PGO this was working
since the count is extracted from the branch weight metadata on the
call being inlined (even before we stopped looking at metadata for
non-sample PGO in r302844 this largely wasn't working for instrumentation
PGO since only promoted indirect calls would be getting inlined and have
the metadata).
Added an instrumentation PGO test and renamed the sample PGO test.
Reviewers: danielcdh, eraman
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D33389
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303574
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Krzysztof Parzyszek [Mon, 22 May 2017 20:02:53 +0000 (20:02 +0000)]
[Hexagon] Fix definitions of vector predicate loads and stores
This fixes http://llvm.org/PR33048.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303572
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