OSDN Git Service
Artem Dergachev [Fri, 12 Jul 2019 02:16:56 +0000 (02:16 +0000)]
NFC: Unforget a colon in a few CHECK: directives.
Differential Revision: https://reviews.llvm.org/D64526
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365863
91177308-0d34-0410-b5e6-
96231b3b80d8
Jinsong Ji [Fri, 12 Jul 2019 01:59:42 +0000 (01:59 +0000)]
[MachinePipeliner] Fix order for nodes with Anti dependence in same cycle
Summary:
Problem exposed in PowerPC functional testing.
We did not consider Anti dependence for nodes in same cycle,
so we may end up generating bad machine code.
eg: the reduced test won't verify.
*** Bad machine code: Using an undefined physical register ***
- function: lame_encode_buffer_interleaved
- basic block: %bb.4 (0x4bde4e12928)
- instruction: %29:gprc = ADDZE %27:gprc, implicit-def dead $carry, implicit $carry
- operand 3: implicit $carry
Reviewers: bcahoon, kparzysz, hfinkel
Subscribers: MaskRay, wuzish, nemanjai, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64192
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365859
91177308-0d34-0410-b5e6-
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Vitaly Buka [Fri, 12 Jul 2019 01:42:03 +0000 (01:42 +0000)]
Handle IntToPtr in isBytewiseValue
Summary:
This helps with more efficient use of memset for pattern initialization
From @pcc prototype for -ftrivial-auto-var-init=pattern optimizations
Binary size change on CTMark, (with -fuse-ld=lld -Wl,--icf=all, similar results with default linker options)
```
master patch diff
Os 8.
238864e+05 8.
238864e+05 0.0
O3 1.
054797e+06 1.
054797e+06 0.0
Os zero 8.
292384e+05 8.
292384e+05 0.0
O3 zero 1.
062626e+06 1.
062626e+06 0.0
Os pattern 8.
579712e+05 8.
338048e+05 -0.030299
O3 pattern 1.
090502e+06 1.
067574e+06 -0.020481
```
Zero vs Pattern on master
```
zero pattern diff
Os 8.
292384e+05 8.
579712e+05 0.036578
O3 1.
062626e+06 1.
090502e+06 0.025124
```
Zero vs Pattern with the patch
```
zero pattern diff
Os 8.
292384e+05 8.
338048e+05 0.003333
O3 1.
062626e+06 1.
067574e+06 0.003193
```
Reviewers: pcc, eugenis
Subscribers: hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D63967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365858
91177308-0d34-0410-b5e6-
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Alex Lorenz [Fri, 12 Jul 2019 00:48:53 +0000 (00:48 +0000)]
NFC: lit: python3 compatibility for functions
usePlatformSdkOnDarwin/findPlatformSdkVersionOnMacOS
These functions should decode subprocess output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365852
91177308-0d34-0410-b5e6-
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Evandro Menezes [Fri, 12 Jul 2019 00:33:49 +0000 (00:33 +0000)]
[InstCombine] Reorder pow() transformations (NFC)
Move the transformation from `powf(x, itofp(y))` to `powi(x, y)` to the
group of transformations related to the exponent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365851
91177308-0d34-0410-b5e6-
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Michael Liao [Thu, 11 Jul 2019 23:53:30 +0000 (23:53 +0000)]
[AMDGPU] Skip calculating callee saved registers for entry function.
Reviewers: arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365846
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 11 Jul 2019 23:42:57 +0000 (23:42 +0000)]
AMDGPU: s_waitcnt field should be treated as unsigned
Also make it an ImmLeaf, so it should work with global isel as well,
which was part of the point of moving it in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365842
91177308-0d34-0410-b5e6-
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Petr Hosek [Thu, 11 Jul 2019 22:59:23 +0000 (22:59 +0000)]
[sancov] Ignore PC samples with value 0
The sancov runtime for the (Fuchsia) Zircon kernel delivers results
in the standard format, but as the full array of possible samples
with 0 in uncovered slots. That runtime delivers "live" data and
has no final "export" pass to compactify out the uncovered slots,
and it seems silly to require another offline tool just for that.
Patch By: mcgrathr
Differential Revision: https://reviews.llvm.org/D63695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365839
91177308-0d34-0410-b5e6-
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Leonard Chan [Thu, 11 Jul 2019 22:35:40 +0000 (22:35 +0000)]
[NewPM] Port Sancov
This patch contains a port of SanitizerCoverage to the new pass manager. This one's a bit hefty.
Changes:
- Split SanitizerCoverageModule into 2 SanitizerCoverage for passing over
functions and ModuleSanitizerCoverage for passing over modules.
- ModuleSanitizerCoverage exists for adding 2 module level calls to initialization
functions but only if there's a function that was instrumented by sancov.
- Added legacy and new PM wrapper classes that own instances of the 2 new classes.
- Update llvm tests and add clang tests.
Differential Revision: https://reviews.llvm.org/D62888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365838
91177308-0d34-0410-b5e6-
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 22:30:11 +0000 (22:30 +0000)]
[AMDGPU] Fixed asan error with agpr spilling
Instruction was used after it was erased.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365837
91177308-0d34-0410-b5e6-
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Diego Novillo [Thu, 11 Jul 2019 22:08:35 +0000 (22:08 +0000)]
Fix build errors LLVM tests are disabled.
Original patch from alanbaker@google.com
Fixes the error:
CMake Error in <...>/llvm/cmake/modules/CMakeLists.txt:
export called with target "LLVMTestingSupport" which requires target
"gtest" that is not in the export set.
This occurs when LLVM is embedded in a larger project, but is configured not to
include tests. If testing is disabled gtest isn't available and LLVM fails to
configure.
Differential revision: https://reviews.llvm.org/D63097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365836
91177308-0d34-0410-b5e6-
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 21:54:13 +0000 (21:54 +0000)]
[AMDGPU] gfx908 agpr spilling
Differential Revision: https://reviews.llvm.org/D64594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365833
91177308-0d34-0410-b5e6-
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Stefan Stipanovic [Thu, 11 Jul 2019 21:37:40 +0000 (21:37 +0000)]
[Attributor] Deduce "nosync" function attribute.
Introduce and deduce "nosync" function attribute to indicate that a function
does not synchronize with another thread in a way that other thread might free memory.
Reviewers: jdoerfert, jfb, nhaehnle, arsenm
Subscribers: wdng, hfinkel, nhaenhle, mehdi_amini, steven_wu,
dexonsmith, arsenm, uenoku, hiraditya, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D62766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365830
91177308-0d34-0410-b5e6-
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 21:30:34 +0000 (21:30 +0000)]
[AMDGPU] gfx908 hazard recognizer
Differential Revision: https://reviews.llvm.org/D64593
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365829
91177308-0d34-0410-b5e6-
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Huihui Zhang [Thu, 11 Jul 2019 21:28:25 +0000 (21:28 +0000)]
[InstCombine][NFCI] Add more test coverage to onehot_merge.ll
Prep work for upcoming patch D64275.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365828
91177308-0d34-0410-b5e6-
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 21:25:00 +0000 (21:25 +0000)]
[AMDGPU] gfx908 scheduling
Differential Revision: https://reviews.llvm.org/D64590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365826
91177308-0d34-0410-b5e6-
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 21:19:33 +0000 (21:19 +0000)]
[AMDGPU] gfx908 mfma support
Differential Revision: https://reviews.llvm.org/D64584
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365824
91177308-0d34-0410-b5e6-
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Reid Kleckner [Thu, 11 Jul 2019 20:29:32 +0000 (20:29 +0000)]
Open native file handles to avoid converting from FDs, NFC
Follow up to r365588.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365820
91177308-0d34-0410-b5e6-
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David Bolvansky [Thu, 11 Jul 2019 20:14:22 +0000 (20:14 +0000)]
[UpdateTestChecks] Emit warning when invalid test paths
Summary:
Recently I ran into the following issue:
./update_test_checks.py /path/not-existing-file.ll
The script was silent and I was suprised why the real test file hadn't been updated.
Solution:
Emit warning if we detect this problem.
Reviewers: lebedev.ri, spatel, jdoerfert, nikic
Reviewed By: lebedev.ri, spatel, jdoerfert, nikic
Subscribers: jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64572
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365818
91177308-0d34-0410-b5e6-
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David Bolvansky [Thu, 11 Jul 2019 19:39:20 +0000 (19:39 +0000)]
[NFC] Revisited tests for D64285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365815
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 11 Jul 2019 19:21:59 +0000 (19:21 +0000)]
[NVPTX] Remove now unused atomic.load.add.f32 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365811
91177308-0d34-0410-b5e6-
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Jinsong Ji [Thu, 11 Jul 2019 19:16:33 +0000 (19:16 +0000)]
[PowerPC][NFC] Update testcase to avoid dead code
The original testcase might be optimized out due to dead code,
update the testcase to avoid it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365810
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 11 Jul 2019 18:19:27 +0000 (18:19 +0000)]
[X86] Pre commit test cases for D64574. Along with a test case for PR42571. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365803
91177308-0d34-0410-b5e6-
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Wouter van Oortmerssen [Thu, 11 Jul 2019 18:18:07 +0000 (18:18 +0000)]
[WebAssembly] Assembler: support negative float constants.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64367
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365802
91177308-0d34-0410-b5e6-
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Benjamin Kramer [Thu, 11 Jul 2019 17:11:25 +0000 (17:11 +0000)]
[NVPTX] Use atomicrmw fadd instead of intrinsics
AutoUpgrade the old intrinsics to atomicrmw fadd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365796
91177308-0d34-0410-b5e6-
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Nico Weber [Thu, 11 Jul 2019 17:09:35 +0000 (17:09 +0000)]
gn build: Merge r365792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365795
91177308-0d34-0410-b5e6-
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Sanjay Patel [Thu, 11 Jul 2019 15:56:33 +0000 (15:56 +0000)]
[X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483)
Follow up to D58597, where it was noted that the commuted ISD::SUB variant
was having problems with lack of combines.
See also D63958 where we untangled setcc/sub pairs.
Differential Revision: https://reviews.llvm.org/D58875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365791
91177308-0d34-0410-b5e6-
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Nico Weber [Thu, 11 Jul 2019 15:26:45 +0000 (15:26 +0000)]
Fix a few 'no newline at end of file' warnings that Xcode emits
(Xcode even has a snazzy "Fix" button, but clicking that inserts two
newlines. So close!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365789
91177308-0d34-0410-b5e6-
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Nico Weber [Thu, 11 Jul 2019 15:01:50 +0000 (15:01 +0000)]
gn build: Merge r365773
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365787
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 11 Jul 2019 14:45:03 +0000 (14:45 +0000)]
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
We already split extract_subvector(binop(insert_subvector(v,x),insert_subvector(w,y))) -> binop(x,y).
This patch adds support for extract_subvector(binop(concat_vectors(),concat_vectors())) cases as well.
In particular this means we don't have to wait for X86 lowering to convert concat_vectors to insert_subvector chains, which helps avoid some cases where demandedelts/combine calls occur too late to split large vector ops.
The fast-isel-store.ll load folding regression is annoying but I don't think is that critical.
Differential Revision: https://reviews.llvm.org/D63653
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365785
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 11 Jul 2019 14:41:40 +0000 (14:41 +0000)]
RegUsageInfoCollector: Skip calling conventions I missed before
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365784
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 11 Jul 2019 14:18:25 +0000 (14:18 +0000)]
AMDGPU/GlobalISel: Move kernel argument handling to separate function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365782
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 11 Jul 2019 14:18:22 +0000 (14:18 +0000)]
Fix missing C++ mode comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365781
91177308-0d34-0410-b5e6-
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Matt Arsenault [Thu, 11 Jul 2019 14:18:19 +0000 (14:18 +0000)]
GlobalISel: Use Register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365780
91177308-0d34-0410-b5e6-
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George Rimar [Thu, 11 Jul 2019 14:03:27 +0000 (14:03 +0000)]
Revert r365775 - "[Object/ELF] - Improve error reporting for notes."
It broke BB: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/15419
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365779
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George Rimar [Thu, 11 Jul 2019 13:47:44 +0000 (13:47 +0000)]
[Object/ELF] - Improve error reporting for notes.
This patch improves the error messages reported for
note sections and phdrs and also makes a cleanup for
existent test case.
Differential revision: https://reviews.llvm.org/D64470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365775
91177308-0d34-0410-b5e6-
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Sanjay Patel [Thu, 11 Jul 2019 13:44:29 +0000 (13:44 +0000)]
[InstCombine] don't move FP negation out of a constant expression
-(X * ConstExpr) becomes X * (-ConstExpr), so don't reverse that
and infinite loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365774
91177308-0d34-0410-b5e6-
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George Rimar [Thu, 11 Jul 2019 13:26:36 +0000 (13:26 +0000)]
[yaml2obj/elf-override-shsize.yaml] - An attemp to fix ppc64 bot.
Failture:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/35670/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Aelf-override-shsize.yaml
Solution:
Change `od` tool invocation to print single bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365772
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 11 Jul 2019 13:13:02 +0000 (13:13 +0000)]
OpaquePtr: switch to GlobalValue::getValueType in a few places. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365770
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 11 Jul 2019 13:12:38 +0000 (13:12 +0000)]
OpaquePtr: use byval accessor instead of inspecting pointer type. NFC.
The accessor can deal with both "byval(ty)" and "ty* byval" forms
seamlessly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365769
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 11 Jul 2019 13:12:08 +0000 (13:12 +0000)]
OpaquePtr: use load instruction directly for type. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365768
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 11 Jul 2019 13:11:44 +0000 (13:11 +0000)]
InstructionSimplify: Simplify InstructionSimplify. NFC.
The interface predates CallBase, so both it and implementation were
significantly more complicated than they needed to be. There was even
some redundancy that could be eliminated.
Should also help with OpaquePointers by not trying to derive a
function's type from it's PointerType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365767
91177308-0d34-0410-b5e6-
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George Rimar [Thu, 11 Jul 2019 12:59:29 +0000 (12:59 +0000)]
[yaml2obj] - Allow overriding the sh_size field.
There is no way to set broken sh_size field currently
for sections. It can be usefull for writing the
test cases.
Differential revision: https://reviews.llvm.org/D64401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365766
91177308-0d34-0410-b5e6-
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David Bolvansky [Thu, 11 Jul 2019 12:51:33 +0000 (12:51 +0000)]
[NFC] Updated tests for D64285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365765
91177308-0d34-0410-b5e6-
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George Rimar [Thu, 11 Jul 2019 12:26:48 +0000 (12:26 +0000)]
[llvm-readobj/llvm-readelf] - Report a warning instead of a error when dumping a broken dynamic section.
It does not make sence to stop dumping the object if the broken
dynamic section was found. In this patch I changed the behavior from
"report an error" to "report a warning". This matches GNU.
Differential revision: https://reviews.llvm.org/D64472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365762
91177308-0d34-0410-b5e6-
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David Bolvansky [Thu, 11 Jul 2019 10:55:04 +0000 (10:55 +0000)]
[InstCombine] Reorder recently added/improved pow transformations
Changed cases are now faster with exp2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365758
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Florian Hahn [Thu, 11 Jul 2019 10:53:40 +0000 (10:53 +0000)]
Revert [BitcodeReader] Validate OpNum, before accessing Record array.
This reverts r365750 (git commit
8b222ecf2769ee133691f208f6166ce118c4a164)
llvm-dis runs out of memory while opening invalid-fcmp-opnum.bc on
llvm-hexagon-elf, probably because the bitcode file contains other
suspicious values.
http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/21949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365757
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Simon Pilgrim [Thu, 11 Jul 2019 10:40:23 +0000 (10:40 +0000)]
[X86] Regenerate intrinsics tests. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365755
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Thu, 11 Jul 2019 10:37:58 +0000 (10:37 +0000)]
[AMDGPU] Regenerate idot tests. NFCI.
Reduces diff in D63281.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365754
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Fangrui Song [Thu, 11 Jul 2019 10:17:59 +0000 (10:17 +0000)]
[llvm-objcopy] Don't change permissions of non-regular output files
There is currently an EPERM error when a regular user executes `llvm-objcopy a.o /dev/null`.
Worse, root can even change the mode bits of /dev/null.
Fix it by checking if the output file is special.
A new overload of llvm::sys::fs::setPermissions with FD as the parameter
is added. Users should provide `perm & ~umask` as the parameter if they
intend to respect umask.
The existing overload of llvm::sys::fs::setPermissions may be deleted if
we can find an implementation of fchmod() on Windows. fchmod() is
usually better than chmod() because it saves syscalls and can avoid race
condition.
Reviewed By: jakehehrlich, jhenderson
Differential Revision: https://reviews.llvm.org/D64236
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365753
91177308-0d34-0410-b5e6-
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Fangrui Song [Thu, 11 Jul 2019 10:10:09 +0000 (10:10 +0000)]
[X86] -fno-plt: use GOT __tls_get_addr only if GOTPCRELX is enabled
Summary:
As of binutils 2.32, ld has a bogus TLS relaxation error when the GD/LD
code sequence using R_X86_64_GOTPCREL (instead of R_X86_64_GOTPCRELX) is
attempted to be relaxed to IE/LE (binutils PR24784). gold and lld are good.
In gcc/config/i386/i386.md, there is a configure-time check of as/ld
support and the GOT relaxation will not be used if as/ld doesn't support
it:
if (flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
return "call\t%P2";
return "call\t{*%p2@GOT(%1)|[DWORD PTR %p2@GOT[%1]]}";
In clang, -DENABLE_X86_RELAX_RELOCATIONS=OFF is the default. The ld.bfd
bogus error can be reproduced with:
thread_local int a;
int main() { return a; }
clang -fno-plt -fpic a.cc -fuse-ld=bfd
GOTPCRELX gained relative good support in 2016, which is considered
relatively new. It is even difficult to conditionally default to
-DENABLE_X86_RELAX_RELOCATIONS=ON due to cross compilation reasons. So
work around the ld.bfd bug by only using GOT when GOTPCRELX is enabled.
Reviewers: dalias, hjl.tools, nikic, rnk
Reviewed By: nikic
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64304
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365752
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Florian Hahn [Thu, 11 Jul 2019 09:57:00 +0000 (09:57 +0000)]
[BitcodeReader] Validate OpNum, before accessing Record array.
Currently invalid bitcode files can cause a crash, when OpNum exceeds
the number of elements in Record, like in the attached bitcode file.
The test case was generated by clusterfuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15698
Reviewers: t.p.northover, thegameg, jfb
Reviewed By: jfb
Differential Revision: https://reviews.llvm.org/D64507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365750
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Sam Parker [Thu, 11 Jul 2019 09:56:15 +0000 (09:56 +0000)]
[ARM][LowOverheadLoops] Correct offset checking
This patch addresses a couple of problems:
1) The maximum supported offset of LE is -4094.
2) The offset of WLS also needs to be checked, this uses a
maximum positive offset of 4094.
The use of BasicBlockUtils has been changed because the block offsets
weren't being initialised, but the isBBInRange checks both positive
and negative offsets.
ARMISelLowering has been tweaked because the test case presented
another pattern that we weren't supporting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365749
91177308-0d34-0410-b5e6-
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Simon Tatham [Thu, 11 Jul 2019 09:52:15 +0000 (09:52 +0000)]
[ARM] Remove nonexistent unsigned forms of MVE VQDMLAH.
The VQDMLAH.U8, VQDMLAH.U16 and VQDMLAH.U32 instructions don't
actually exist: the Armv8.1-M architecture spec only lists signed
forms of that instruction. The unsigned ones were added in error: they
existed in an early draft of the spec, but they were removed before
the public version, and we missed that particular spec change.
Also affects the variant forms VQDMLASH, VQRDMLAH and VQRDMLASH.
Reviewers: miyuki
Subscribers: javed.absar, kristof.beyls, hiraditya, dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365747
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Kai Luo [Thu, 11 Jul 2019 09:43:03 +0000 (09:43 +0000)]
[NFC][PowerPC] Added test to track current behaviour of TailDup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365746
91177308-0d34-0410-b5e6-
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Petar Avramovic [Thu, 11 Jul 2019 09:28:34 +0000 (09:28 +0000)]
[MIPS GlobalISel] Skip copies in addUseDef and addDefUses
Skip copies between virtual registers during search for UseDefs
and DefUses.
Since each operand has one def search for UseDefs is straightforward.
But since operand can have many uses, we have to check all uses of
each copy we traverse during search for DefUses.
Differential Revision: https://reviews.llvm.org/D64486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365744
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Petar Avramovic [Thu, 11 Jul 2019 09:22:49 +0000 (09:22 +0000)]
[MIPS GlobalISel] RegBankSelect for chains of ambiguous instructions
When one of the uses/defs of ambiguous instruction is also ambiguous
visit it recursively and search its uses/defs for instruction with
only one mapping available.
When all instruction in a chain are ambiguous arbitrary mapping can
be selected. For s64 operands in ambiguous chain fprb is selected since
it results in less instructions then having to narrow scalar s64 to s32.
For s32 both gprb and fprb result in same number of instructions and
gprb is selected like a general purpose option.
At the moment we always avoid cross register bank copies.
TODO: Implement a model for costs calculations of different mappings
on same instruction and cross bank copies. Allow cross bank copies
when appropriate according to cost model.
Differential Revision: https://reviews.llvm.org/D64485
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365743
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Haojian Wu [Thu, 11 Jul 2019 08:54:28 +0000 (08:54 +0000)]
Revert Recommit "[CommandLine] Remove OptionCategory and SubCommand caches from the Option class."
This reverts r365675 (git commit
43d75f977853c3ec891a440c362b2df183a211b5)
The patch causes a crash in SupportTests (CommandLineTest.AliasesWithArguments).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365742
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Jay Foad [Thu, 11 Jul 2019 08:49:52 +0000 (08:49 +0000)]
Remove some redundant code from r290372 and improve a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365741
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Sam Parker [Thu, 11 Jul 2019 07:47:50 +0000 (07:47 +0000)]
[ARM][ParallelDSP] Change the search for smlads
Two functional changes have been made here:
- Now search up from any add instruction to find the chains of
operations that we may turn into a smlad. This allows the
generation of a smlad which doesn't accumulate into a phi.
- The search function has been corrected to stop it falsely searching
up through an invalid path.
The bulk of the changes have been making the Reduction struct a class
and making it more C++y with getters and setters.
Differential Revision: https://reviews.llvm.org/D61780
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365740
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Mikael Holmen [Thu, 11 Jul 2019 07:07:23 +0000 (07:07 +0000)]
[test] Silence gcc 7.4 warning [NFC]
Without this gcc 7.4.0 complains with
../unittests/Analysis/ValueTrackingTest.cpp:937:66: error: ISO C++11 requires at least one argument for the "..." in a variadic macro [-Werror]
::testing::ValuesIn(IsBytewiseValueTests));
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365738
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Heejin Ahn [Thu, 11 Jul 2019 05:55:47 +0000 (05:55 +0000)]
[WebAssembly] Print error message for llvm.clear_cache intrinsic
Summary:
Wasm does not currently support `llvm.clear_cache` intrinsic, and this
prints a proper error message instead of segfault.
Reviewers: dschuff, sbc100, sunfish
Subscribers: jgravelle-google, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365731
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Huihui Zhang [Thu, 11 Jul 2019 04:56:37 +0000 (04:56 +0000)]
[InstCombine][NFCI] Add test coverage to onehot_merge.ll
Prep work for upcoming patch D64275.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365729
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Chen Zheng [Thu, 11 Jul 2019 02:18:22 +0000 (02:18 +0000)]
[SCEV] teach SCEV symbolical execution about overflow intrinsics folding.
Differential Revision: https://reviews.llvm.org/D64422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365726
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Johannes Doerfert [Thu, 11 Jul 2019 01:14:48 +0000 (01:14 +0000)]
Replace three "strip & accumulate" implementations with a single one
This patch replaces the three almost identical "strip & accumulate"
implementations for constant pointer offsets with a single one,
combining the respective functionalities. The old interfaces are kept
for now.
Differential Revision: https://reviews.llvm.org/D64468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365723
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Johannes Doerfert [Thu, 11 Jul 2019 01:14:30 +0000 (01:14 +0000)]
[NFC] Adjust "invalid.ll.bc" tests to check for AttrKind #255 not #63
We are about to add enum attributes with AttrKind numbers >= 63. This
means we cannot use AttrKind #63 to test for an invalid attribute number
in the RAW format anymore. This patch changes the number of an invalid
attribute to #255. There is no change to the character of the tests.
Differential Revision: https://reviews.llvm.org/D64531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365722
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Craig Topper [Thu, 11 Jul 2019 01:01:39 +0000 (01:01 +0000)]
[X86] Don't convert 8 or 16 bit ADDs to LEAs on Atom in FixupLEAPass.
We use the functions that convert to three address to do the
conversion, but changing an 8 or 16 bit will cause it to create
a virtual register. This can't be done after register allocation
where this pass runs.
I've switched the pass completely to a white list of instructions
that can be converted to LEA instead of a blacklist that was
incorrect. This will avoid surprises if we enhance the three
address conversion function to include additional instructions
in the future.
Fixes PR42565.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365720
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 00:10:17 +0000 (00:10 +0000)]
[AMDGPU] gfx908 atomic fadd and atomic pk_fadd
Differential Revision: https://reviews.llvm.org/D64435
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365717
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Stanislav Mekhanoshin [Thu, 11 Jul 2019 00:00:27 +0000 (00:00 +0000)]
[AMDGPU] gfx908 dot instruction support
Differential Revision: https://reviews.llvm.org/D64431
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365715
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Jordan Rupprecht [Wed, 10 Jul 2019 23:32:44 +0000 (23:32 +0000)]
Revert [llvm-objcopy] Allow strip symtab from executables and DSOs
This reverts r365193 (git commit
194f16b3548bcb23a7f0fd638778ed72edd18d37)
This patch doesn't work with binaries built w/ `--emit-relocs`, e.g.
```
$ echo 'int main() { return 0; }' | clang -Wl,--emit-relocs -x c - -o foo && llvm-objcopy --strip-unneeded foo
llvm-objcopy: error: 'foo': not stripping symbol '__gmon_start__' because it is named in a relocation
```
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365712
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Sanjay Patel [Wed, 10 Jul 2019 23:23:54 +0000 (23:23 +0000)]
[SDAG] commute setcc operands to match a subtract
If we have:
R = sub X, Y
P = cmp Y, X
...then flipping the operands in the compare instruction can allow using a subtract that sets compare flags.
Motivated by diffs in D58875 - not sure if this changes anything there,
but this seems like a good thing independent of that.
There's a more involved version of this transform already in IR (in instcombine
although that seems misplaced to me) - see "swapMayExposeCSEOpportunities()".
Differential Revision: https://reviews.llvm.org/D63958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365711
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Vitaly Buka [Wed, 10 Jul 2019 22:56:15 +0000 (22:56 +0000)]
Add IsBytewiseValue unit test
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63966
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365710
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Vitaly Buka [Wed, 10 Jul 2019 22:53:52 +0000 (22:53 +0000)]
NFC: Pass DataLayout into isBytewiseValue
Summary:
We will need to handle IntToPtr which I will submit in a separate patch as it's
not going to be NFC.
Reviewers: eugenis, pcc
Reviewed By: eugenis
Subscribers: hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D63940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365709
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Craig Topper [Wed, 10 Jul 2019 22:44:32 +0000 (22:44 +0000)]
[X86] Add patterns with and_flag_nocf for BLSI and TBM instructions.
Fixes similar issues to r352306.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365705
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Craig Topper [Wed, 10 Jul 2019 22:44:24 +0000 (22:44 +0000)]
[X86] Add a few more TBM and BLSI test cases that show the same issue that r352306 fixed for BLSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365704
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Craig Topper [Wed, 10 Jul 2019 22:14:39 +0000 (22:14 +0000)]
[X86] Add BLSR and BLSMSK to isUseDefConvertible.
Unfortunately subo formation in CGP prevents obvious ways of
testing this.
But we already have BLSI in here and the flag behavior is
well understood.
Might become more useful if we improve PR42571.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365702
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David Tenty [Wed, 10 Jul 2019 22:13:55 +0000 (22:13 +0000)]
[NFC]Fix IR/MC depency issue for function descriptor SDAG implementation
Summary: llvm/IR/GlobalValue.h can't be included in MC, that creates a circular dependency between MC and IR libraries. This circular dependency is causing an issue for build system that enforce layering.
Author: Xiangling_L
Reviewers: sfertile, jasonliu, hubert.reinterpretcast, gribozavr
Reviewed By: gribozavr
Subscribers: wuzish, nemanjai, hiraditya, kbarton, MaskRay, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64445
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365701
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Craig Topper [Wed, 10 Jul 2019 21:01:34 +0000 (21:01 +0000)]
[X86] Remove unused variable. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365697
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Roman Lebedev [Wed, 10 Jul 2019 19:58:13 +0000 (19:58 +0000)]
[NFC][InstCombine] Comb through just-added "omit mask before left-shift" tests once more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365694
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Nico Weber [Wed, 10 Jul 2019 19:31:25 +0000 (19:31 +0000)]
Add support for building with Python 3
LLDB supports Python 3 now.
Differential Revision: https://reviews.llvm.org/D64443
Patch from Christian Biesinger <cbiesinger@google.com>!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365692
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Amara Emerson [Wed, 10 Jul 2019 19:21:43 +0000 (19:21 +0000)]
[AArch64][GlobalISel] Optimize compare and branch cases with G_INTTOPTR and unknown values.
Since we have distinct types for pointers and scalars, G_INTTOPTRs can sometimes
obstruct attempts to find constant source values. These usually come about when
try to do some kind of null pointer check. Teaching getConstantVRegValWithLookThrough
about this operation allows the CBZ/CBNZ optimization to catch more cases.
This change also improves the case where we can't find a constant source at all.
Previously we would emit a cmp, cset and tbnz for that. Now we try to just emit
a cmp and conditional branch, saving an instruction.
The cumulative code size improvement of this change plus D64354 is 5.5% geomean
on arm64 CTMark -O0.
Differential Revision: https://reviews.llvm.org/D64377
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365690
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Nico Weber [Wed, 10 Jul 2019 19:20:17 +0000 (19:20 +0000)]
gn build: Merge r365687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365689
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Nikola Prica [Wed, 10 Jul 2019 18:58:05 +0000 (18:58 +0000)]
Revert "[ELF] Loose a condition for relocation with a symbol"
This reverts commit
8507eca1647118e73435b0ce1de8a1952a021d01.
Reveting due to some suspicious failurse in santizer-x86_64-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365685
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Jessica Paquette [Wed, 10 Jul 2019 18:46:56 +0000 (18:46 +0000)]
[GlobalISel][AArch64] Use getOpcodeDef instead of findMIFromReg
Some minor cleanup.
This function in Utils does the same thing as `findMIFromReg`. It also looks
through copies, which `findMIFromReg` didn't.
Delete `findMIFromReg` and use `getOpcodeDef` instead. This only happens in
`tryOptVectorDup` right now.
Update opt-shuffle-splat to show that we can look through the copies now, too.
Differential Revision: https://reviews.llvm.org/D64520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365684
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Jessica Paquette [Wed, 10 Jul 2019 18:44:57 +0000 (18:44 +0000)]
[GlobalISel][AArch64][NFC] Use getDefIgnoringCopies from Utils where we can
There are a few places where we walk over copies throughout
AArch64InstructionSelector.cpp. In Utils, there's a function that does exactly
this which we can use instead.
Note that the utility function works with the case where we run into a COPY
from a physical register. We've run into bugs with this a couple times, so using
it should defend us from similar future bugs.
Also update opt-fold-compare.mir to show that we still handle physical registers
properly.
Differential Revision: https://reviews.llvm.org/D64513
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365683
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David Greene [Wed, 10 Jul 2019 18:25:58 +0000 (18:25 +0000)]
Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces"
This broke some PPC prefetching tests.
This reverts commit
9fdfb045ae8bb643ab0d0455dcf9ecaea3b1eb3c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365680
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Michael Berg [Wed, 10 Jul 2019 18:23:26 +0000 (18:23 +0000)]
Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context
Summary: Unsafe does not map well alone for each of these three cases as it is missing NoNan context when accessed directly with clang. I have migrated the fold guards to reflect the expectations of handing nan and zero contexts directly (NoNan, NSZ) and some tests with it. Unsafe does include NSZ, however there is already precedent for using the target option directly to reflect that context.
Reviewers: spatel, wristow, hfinkel, craig.topper, arsenm
Reviewed By: arsenm
Subscribers: michele.scandale, wdng, javed.absar
Differential Revision: https://reviews.llvm.org/D64450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365679
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David Greene [Wed, 10 Jul 2019 18:07:01 +0000 (18:07 +0000)]
[System Model] [TTI] Update cache and prefetch TTI interfaces
Rework the TTI cache and software prefetching APIs to prepare for the
introduction of a general system model. Changes include:
- Marking existing interfaces const and/or override as appropriate
- Adding comments
- Adding BasicTTIImpl interfaces that delegate to a subtarget
implementation
- Adding a default "no information" subtarget implementation
Only a handful of targets use these interfaces currently: AArch64,
Hexagon, PPC and SystemZ. AArch64 already has a custom subtarget
implementation, so its custom TTI implementation is migrated to use
the new facilities in BasicTTIImpl to invoke its custom subtarget
implementation. The custom TTI implementations continue to exist for
the other targets with this change. They are not moved over to
subtarget-based implementations.
The end goal is to have the default subtarget implementation defer to
the system model defined by the target. With this change, the default
subtarget implementation essentially returns "no information" for
these interfaces. None of the existing users of TTI will hit that
implementation because they define their own custom TTI
implementations and won't use the BasicTTIImpl implementations.
Once system models are in place for the targets that use these
interfaces, their custom TTI implementations can be removed.
Differential Revision: https://reviews.llvm.org/D63614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365676
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Don Hinton [Wed, 10 Jul 2019 17:57:05 +0000 (17:57 +0000)]
Recommit "[CommandLine] Remove OptionCategory and SubCommand caches from the Option class."
Previously reverted in 364141 due to buildbot breakage, and fixed here
by making GeneralCategory global a ManagedStatic.
Summary:
This change processes `OptionCategory`s and `SubCommand`s as they
are seen instead of caching them in the Option class and processing
them later. Doing so simplifies the work needed to be done by the Global
parser and significantly reduces the size of the Option class to a mere 64
bytes.
Removing the `OptionCategory` cache saved 24 bytes, and removing
the `SubCommand` cache saved an additional 48 bytes, for a total of a
72 byte reduction.
Reviewed By: serge-sans-paille
Tags: #llvm, #clang
Differential Revision: https://reviews.llvm.org/D62105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365675
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Simon Pilgrim [Wed, 10 Jul 2019 17:49:27 +0000 (17:49 +0000)]
[X86] EltsFromConsecutiveLoads - clean up element size calcs. NFCI.
Determine the element/load size calculations earlier and assert that they are whole bytes in size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365674
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Alina Sbirlea [Wed, 10 Jul 2019 17:36:56 +0000 (17:36 +0000)]
[LoopRotate + MemorySSA] Keep an <instruction-cloned instruction> map.
Summary:
The map kept in loop rotate is used for instruction remapping, in order
to simplify the clones of instructions. Thus, if an instruction can be
simplified, its simplified value is placed in the map, even when the
clone is added to the IR. MemorySSA in contrast needs to know about that
clone, so it can add an access for it.
To resolve this: keep a different map for MemorySSA.
Reviewers: george.burgess.iv
Subscribers: jlebar, Prazek, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365672
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Lang Hames [Wed, 10 Jul 2019 17:24:24 +0000 (17:24 +0000)]
[ORC] Add custom IR compiler configuration to LLJITBuilder to enable obj caches.
LLJITBuilder now has a setCompileFunctionCreator method which can be used to
construct a CompileFunction for the LLJIT instance being created. The motivating
use-case for this is supporting ObjectCaches, which can now be set up at
compile-function construction time. To demonstrate this an example project,
LLJITWithObjectCache, is included.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365671
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Simon Pilgrim [Wed, 10 Jul 2019 17:22:31 +0000 (17:22 +0000)]
[X86] Regenerate tests. NFCI.
Hasn't been regenerated since the update script could merge 32/64-bit checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365670
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Craig Topper [Wed, 10 Jul 2019 17:11:18 +0000 (17:11 +0000)]
[X86] Add tests for an alternative sequence for _mm_storel_pi/_mm_storeh_pi intrinsics. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365667
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Nick Desaulniers [Wed, 10 Jul 2019 17:08:25 +0000 (17:08 +0000)]
[TargetLowering] support BlockAddress as "i" inline asm constraint
Summary:
This allows passing address of labels to inline assembly "i" input
constraints.
Fixes pr/42502.
Reviewers: ostannard
Reviewed By: ostannard
Subscribers: void, echristo, nathanchance, ostannard, javed.absar, hiraditya, llvm-commits, srhines
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64167
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365664
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Roman Lebedev [Wed, 10 Jul 2019 16:54:13 +0000 (16:54 +0000)]
[NFC][InstCombine] Fixup some tests in just-added "omit mask before left-shift" tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365663
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Peter Collingbourne [Wed, 10 Jul 2019 16:36:46 +0000 (16:36 +0000)]
MC: AArch64: Add support for pg_hi21_nc relocation specifier.
Differential Revision: https://reviews.llvm.org/D64455
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365661
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Vedant Kumar [Wed, 10 Jul 2019 16:32:20 +0000 (16:32 +0000)]
[CodeExtractor] Fix sinking of allocas with multiple bitcast uses (PR42451)
An alloca which can be sunk into the extraction region may have more
than one bitcast use. Move these uses along with the alloca to prevent
use-before-def.
Testing: check-llvm, stage2 build of clang
Fixes llvm.org/PR42451.
Differential Revision: https://reviews.llvm.org/D64463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365660
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Vedant Kumar [Wed, 10 Jul 2019 16:32:16 +0000 (16:32 +0000)]
[CodeExtractor] Simplify findAllocas, NFC
Split getLifetimeMarkers out into its own method and have it return a
struct.
Differential Revision: https://reviews.llvm.org/D64467
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365659
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Matt Arsenault [Wed, 10 Jul 2019 16:31:19 +0000 (16:31 +0000)]
GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365658
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