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Richard Sandiford [Tue, 20 Aug 2013 09:40:35 +0000 (09:40 +0000)]
[SystemZ] Update README
We now use MVST, CLST and SRST for the obvious cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188781
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Richard Sandiford [Tue, 20 Aug 2013 09:38:48 +0000 (09:38 +0000)]
[SystemZ] Use SRST to optimize memchr
SystemZTargetLowering::emitStringWrapper() previously loaded the character
into R0 before the loop and made R0 live on entry. I'd forgotten that
allocatable registers weren't allowed to be live across blocks at this stage,
and it confused LiveVariables enough to cause a miscompilation of f3 in
memchr-02.ll.
This patch instead loads R0 in the loop and leaves LICM to hoist it
after RA. This is actually what I'd tried originally, but I went for
the manual optimisation after noticing that R0 often wasn't being hoisted.
This bug forced me to go back and look at why, now fixed as r188774.
We should also try to optimize null checks so that they test the CC result
of the SRST directly. The select between null and the SRST GPR result could
then usually be deleted as dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779
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Benjamin Kramer [Tue, 20 Aug 2013 09:27:31 +0000 (09:27 +0000)]
memcmp is not a valid way to compare structs with padding in them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188778
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Daniel Sanders [Tue, 20 Aug 2013 09:22:54 +0000 (09:22 +0000)]
[mips][msa] Added insve
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188777
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Richard Sandiford [Tue, 20 Aug 2013 09:14:46 +0000 (09:14 +0000)]
Fix test typo and add usual "br %r14" test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188775
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Richard Sandiford [Tue, 20 Aug 2013 09:11:13 +0000 (09:11 +0000)]
Fix overly pessimistic shortcut in post-RA MachineLICM
Post-RA LICM keeps three sets of registers: PhysRegDefs, PhysRegClobbers
and TermRegs. When it sees a definition of R it adds all aliases of R
to the corresponding set, so that when it needs to test for membership
it only needs to test a single register, rather than worrying about
aliases there too. E.g. the final candidate loop just has:
unsigned Def = Candidates[i].Def;
if (!PhysRegClobbers.test(Def) && ...) {
to test whether register Def is multiply defined.
However, there was also a shortcut in ProcessMI to make sure we didn't
add candidates if we already knew that they would fail the final test.
This shortcut was more pessimistic than the final one because it
checked whether _any alias_ of the defined register was multiply defined.
This is too conservative for targets that define register pairs.
E.g. on z, R0 and R1 are sometimes used as a pair, so there is a
128-bit register that aliases both R0 and R1. If a loop used
R0 and R1 independently, and the definition of R0 came first,
we would be able to hoist the R0 assignment (because that used
the final test quoted above) but not the R1 assignment (because
that meant we had two definitions of the paired R0/R1 register
and would fail the shortcut in ProcessMI).
This patch just uses the same check for the ProcessMI shortcut as
we use in the final candidate loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188774
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Tim Northover [Tue, 20 Aug 2013 08:57:11 +0000 (08:57 +0000)]
ARM: implement some simple f64 materializations.
Previously we used a const-pool load for virtually all 64-bit floating values.
Actually, we can get quite a few common values (including 0.0, 1.0) via "vmov"
instructions of one stripe or another.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188773
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Michael Gottesman [Tue, 20 Aug 2013 08:56:28 +0000 (08:56 +0000)]
[stackprotector] Small cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188772
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Michael Gottesman [Tue, 20 Aug 2013 08:56:26 +0000 (08:56 +0000)]
[stackprotector] Small Bit of computation hoisting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188771
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Michael Gottesman [Tue, 20 Aug 2013 08:56:23 +0000 (08:56 +0000)]
[stackprotector] Added significantly longer comment to FindPotentialTailCall to make clear its relationship to llvm::isInTailCallPosition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188770
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Michael Gottesman [Tue, 20 Aug 2013 08:46:16 +0000 (08:46 +0000)]
Removed trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188769
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Michael Gottesman [Tue, 20 Aug 2013 08:46:13 +0000 (08:46 +0000)]
[stackprotector] Removed stale TODO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188768
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Daniel Sanders [Tue, 20 Aug 2013 08:38:21 +0000 (08:38 +0000)]
[mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188767
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Michael Gottesman [Tue, 20 Aug 2013 08:36:53 +0000 (08:36 +0000)]
[stackprotector] Added support for emitting the llvm intrinsic stack protector check.
rdar://
13935163
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188766
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Michael Gottesman [Tue, 20 Aug 2013 08:36:50 +0000 (08:36 +0000)]
[stackprotector] Refactor out the end of isInTailCallPosition into the function returnTypeIsEligibleForTailCall.
This allows me to use returnTypeIsEligibleForTailCall in the stack protector pass.
rdar://
13935163
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188765
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Michael Gottesman [Tue, 20 Aug 2013 07:17:27 +0000 (07:17 +0000)]
Remove unused variables that crept in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188761
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Michael Gottesman [Tue, 20 Aug 2013 07:00:16 +0000 (07:00 +0000)]
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188755
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Craig Topper [Tue, 20 Aug 2013 05:23:59 +0000 (05:23 +0000)]
Fix formatting. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188746
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Craig Topper [Tue, 20 Aug 2013 05:22:42 +0000 (05:22 +0000)]
Add AVX-512 and related features to the CPUID detection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188745
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Craig Topper [Tue, 20 Aug 2013 04:24:14 +0000 (04:24 +0000)]
Move AVX and non-AVX replication inside a couple multiclasses to avoid repeating each instruction for both individually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188743
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Craig Topper [Tue, 20 Aug 2013 04:22:09 +0000 (04:22 +0000)]
Add an error check for a typo I accidentally made in a td file that caused an assert to fire.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188742
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Bill Schmidt [Tue, 20 Aug 2013 03:12:23 +0000 (03:12 +0000)]
[PowerPC] More refactoring prior to real PPC emitPrologue/Epilogue changes.
(Patch committed on behalf of Mark Minich, whose log entry follows.)
This is a continuation of the refactorings performed in svn rev 188573
(see that rev's comments for more detail).
This is my stage 2 refactoring: I combined the emitPrologue() &
emitEpilogue() PPC32 & PPC64 code into a single flow, simplifying a
lot of the code since in essence the PPC32 & PPC64 code generation
logic is the same, only the instruction forms are different (in most
cases). This simplification is necessary because my functional changes
(yet to come) add significant complexity, and without the
simplification of my stage 2 refactoring, the overall complexity of
both emitPrologue() & emitEpilogue() would have become almost
intractable for most mortal programmers (like me).
This submission was intended to be a pure refactoring (no functional
changes whatsoever). However, in the process of combining the PPC32 &
PPC64 flows, I spotted a difference that I believe is a bug (see svn
rev 186478 line 863, or svn rev 188573 line 888): This line appears to
be restoring the BP with the original FP content, not the original BP
content. When I merged the 32-bit and 64-bit code, I used the
corresponding code from the 64-bit flow, which I believe uses the
correct offset (BPOffset) for this operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188741
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Andrew Kaylor [Tue, 20 Aug 2013 01:50:50 +0000 (01:50 +0000)]
Marking MCJIT PIC tests as XFAIL on AArch64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188740
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Venkatraman Govindaraju [Tue, 20 Aug 2013 01:26:14 +0000 (01:26 +0000)]
[Sparc] Use HWEncoding instead of unused Num field in Sparc register definitions. Also, correct the definitions of RETL and RET instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188738
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Andrew Kaylor [Tue, 20 Aug 2013 00:37:33 +0000 (00:37 +0000)]
Fixing XPASSes among MCJIT PIC test on i686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188736
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Andrew Kaylor [Tue, 20 Aug 2013 00:22:03 +0000 (00:22 +0000)]
Second attempt to mark Large/PIC MCJIT test as XFAIL for PowerPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188735
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Andrew Kaylor [Tue, 20 Aug 2013 00:14:50 +0000 (00:14 +0000)]
Marking two MCJIT PIC tests as XFAIL on Darwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188734
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Andrew Kaylor [Mon, 19 Aug 2013 23:52:53 +0000 (23:52 +0000)]
Trying again with PIC tests for MCJIT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188730
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Hal Finkel [Mon, 19 Aug 2013 23:35:46 +0000 (23:35 +0000)]
Add a llvm.copysign intrinsic
This adds a llvm.copysign intrinsic; We already have Libfunc recognition for
copysign (which is turned into the FCOPYSIGN SDAG node). In order to
autovectorize calls to copysign in the loop vectorizer, we need a corresponding
intrinsic as well.
In addition to the expected changes to the language reference, the loop
vectorizer, BasicTTI, and the SDAG builder (the intrinsic is transformed into
an FCOPYSIGN node, just like the function call), this also adds FCOPYSIGN to a
few lists in LegalizeVector{Ops,Types} so that vector copysigns can be
expanded.
In TargetLoweringBase::initActions, I've made the default action for FCOPYSIGN
be Expand for vector types. This seems correct for all in-tree targets, and I
think is the right thing to do because, previously, there was no way to generate
vector-values FCOPYSIGN nodes (and most targets don't specify an action for
vector-typed FCOPYSIGN).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188728
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Hal Finkel [Mon, 19 Aug 2013 23:35:24 +0000 (23:35 +0000)]
Don't form PPC CTR-based loops around a copysignl call
copysign/copysignf never become function calls (because the SDAG expansion code
does not lower to the corresponding function call, but rather directly
implements the associated logic), but copysignl almost always is lowered into a
call to the requested libm functon (and, thus, might clobber CTR).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188727
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Andrew Kaylor [Mon, 19 Aug 2013 23:27:43 +0000 (23:27 +0000)]
Adding PIC support for ELF on x86_64 platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188726
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Peter Collingbourne [Mon, 19 Aug 2013 23:13:33 +0000 (23:13 +0000)]
Introduce non-const overloads for GlobalAlias::{get,resolve}AliasedGlobal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188725
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Jakub Staszak [Mon, 19 Aug 2013 22:47:55 +0000 (22:47 +0000)]
Use pop_back_val() instead of both back() and pop_back().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188723
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Matt Arsenault [Mon, 19 Aug 2013 22:17:40 +0000 (22:17 +0000)]
Teach InstCombine visitGetElementPtr about address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188721
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Matt Arsenault [Mon, 19 Aug 2013 22:17:34 +0000 (22:17 +0000)]
Cleanup visitGetElementPtr to make address space change easier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188720
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Matt Arsenault [Mon, 19 Aug 2013 22:17:18 +0000 (22:17 +0000)]
commonPointerCast cleanups to make address space change easier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188719
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Jakub Staszak [Mon, 19 Aug 2013 22:12:00 +0000 (22:12 +0000)]
Make sure that pop_back_val() result is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188717
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Andrew Kaylor [Mon, 19 Aug 2013 22:05:07 +0000 (22:05 +0000)]
Reverting r188709 until I can figure out the proper way to XFAIL it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188715
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Matt Arsenault [Mon, 19 Aug 2013 21:43:16 +0000 (21:43 +0000)]
Fix assert with GEP ptr vector indexing structs
Also fix it calculating the wrong value. The struct index
is not a ConstantInt, so it was being interpreted as an array
index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188713
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Eric Christopher [Mon, 19 Aug 2013 21:41:38 +0000 (21:41 +0000)]
Use less verbose code and update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188711
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Matt Arsenault [Mon, 19 Aug 2013 21:40:31 +0000 (21:40 +0000)]
Revert non-test parts of r188507
Re-add the inboundsless tests I didn't add originally
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188710
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Andrew Kaylor [Mon, 19 Aug 2013 21:08:35 +0000 (21:08 +0000)]
Adding tests for PIC with MCJIT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188709
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Eric Christopher [Mon, 19 Aug 2013 21:07:38 +0000 (21:07 +0000)]
Turn on pubnames by default on linux.
Until gdb supports the new accelerator tables we should add the
pubnames section so that gdb_index can be generated from gold
at link time. On darwin we already emit the accelerator tables
and so don't need to worry about pubnames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188708
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Reid Kleckner [Mon, 19 Aug 2013 20:25:26 +0000 (20:25 +0000)]
Suppress an annoying CMake warning in ChooseMSVCCRT.cmake
Warning was:
Argument not separated from preceding token by whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188701
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Paul Redmond [Mon, 19 Aug 2013 20:01:35 +0000 (20:01 +0000)]
Improve the widening of integral binary vector operations
- split WidenVecRes_Binary into WidenVecRes_Binary and WidenVecRes_BinaryCanTrap
- WidenVecRes_BinaryCanTrap preserves the original behaviour for operations
that can trap
- WidenVecRes_Binary simply widens the operation and improves codegen for
3-element vectors by allowing widening and promotion on x86 (matches the
behaviour of unary and ternary operation widening)
- use WidenVecRes_Binary for operations on integers.
Reviewed by: nrotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188699
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Andrew Kaylor [Mon, 19 Aug 2013 19:38:06 +0000 (19:38 +0000)]
Adding comments to document RuntimeDyld relocation handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188697
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Akira Hatanaka [Mon, 19 Aug 2013 19:08:03 +0000 (19:08 +0000)]
[mips] Fix instruction definitions that were incorrectly marked as code-gen-only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188690
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Jakub Staszak [Mon, 19 Aug 2013 19:02:33 +0000 (19:02 +0000)]
Add definition of __warn_unused_result__ attribute. It will be used in the
futher commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188689
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Peter Collingbourne [Mon, 19 Aug 2013 19:00:35 +0000 (19:00 +0000)]
Introduce SpecialCaseList::isIn overload for GlobalAliases.
Differential Revision: http://llvm-reviews.chandlerc.com/D1437
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188688
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Mihai Popa [Mon, 19 Aug 2013 15:02:25 +0000 (15:02 +0000)]
Thumb2 add immediate alias for SP
The Thumb2 add immediate is in fact defined for SP. The manual is misleading as it points to a different section for add immediate with SP, however the encoding is the same as for add immediate with register only with the SP operand hard coded. As such add immediate with SP and add immediate with register can safely be treated as the same instruction.
All the patch does is adjust a register constraint on an instruction alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188676
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Elena Demikhovsky [Mon, 19 Aug 2013 13:26:14 +0000 (13:26 +0000)]
AVX-512: added arithmetic and logical operations.
ADD, SUB, MUL integer and FP types. OR, AND, XOR.
Added embeded broadcast form for these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188673
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Richard Sandiford [Mon, 19 Aug 2013 12:56:58 +0000 (12:56 +0000)]
[SystemZ] Add negative integer absolute (load negative)
For now this matches the equivalent of (neg (abs ...)), which did hit a few
times in projects/test-suite. We should probably also match cases where
absolute-like selects are used with reversed arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188671
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Richard Sandiford [Mon, 19 Aug 2013 12:48:54 +0000 (12:48 +0000)]
[SystemZ] Add integer absolute (load positive)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188670
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Richard Sandiford [Mon, 19 Aug 2013 12:42:31 +0000 (12:42 +0000)]
[SystemZ] Add support for sibling calls
This first cut is pretty conservative. The final argument register (R6)
is call-saved, so we would need to make sure that the R6 argument to a
sibling call is the same as the R6 argument to the calling function,
which seems worth keeping as a separate patch.
Saying that integer truncations are free means that we no longer
use the extending instructions LGF and LLGF for spills in int-conv-09.ll
and int-conv-10.ll. Instead we treat the registers as 64 bits wide and
truncate them to 32-bits where necessary. I think it's unlikely we'd
use LGF and LLGF for spills in other situations for the same reason,
so I'm removing the tests rather than replacing them. The associated
code is generic and applies to many more instructions than just
LGF and LLGF, so there is no corresponding code removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188669
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Michael Kuperstein [Mon, 19 Aug 2013 06:55:47 +0000 (06:55 +0000)]
Adds missing TLI check for library simplification of
* pow(x, 0.5) -> fabs(sqrt(x))
* pow(2.0, x) -> exp2(x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188656
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Hal Finkel [Mon, 19 Aug 2013 06:55:37 +0000 (06:55 +0000)]
Add ExpandFloatOp_FCOPYSIGN to handle ppcf128-related expansions
We had previously been asserting when faced with a FCOPYSIGN f64, ppcf128 node
because there was no way to expand the FCOPYSIGN node. Because ppcf128 is the
sum of two doubles, and the first double must have the larger magnitude, we
can take the sign from the first double. As a result, in addition to fixing the
crash, this is also an optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188655
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Elena Demikhovsky [Mon, 19 Aug 2013 06:55:01 +0000 (06:55 +0000)]
AVX-512: compiler intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188654
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Hal Finkel [Mon, 19 Aug 2013 05:01:02 +0000 (05:01 +0000)]
Add the PPC fcpsgn instruction
Modern PPC cores support a floating-point copysign instruction, and we can use
this to lower the FCOPYSIGN node (which is created from calls to the libm
copysign function). A couple of extra patterns are necessary because the
operand types of FCOPYSIGN need not agree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188653
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David Blaikie [Mon, 19 Aug 2013 03:36:23 +0000 (03:36 +0000)]
llvm-dwarfdump: Do not include address offsets for attributes, only for tags
This reduces the noise in diffs making it more likely that, at least for
LLVM revision-over-revision, diffs will actually yield usable results.
This is consistent with objdump's DWARF dumping behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188650
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David Blaikie [Mon, 19 Aug 2013 03:34:03 +0000 (03:34 +0000)]
DebugInfo: don't emit zero-length names for parameters
We check this in many/all other cases, just missed this one it seems.
Perhaps it'd be worth unifying this so we never emit zero-length
DW_AT_names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188649
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Peter Collingbourne [Mon, 19 Aug 2013 00:24:20 +0000 (00:24 +0000)]
Remove SpecialCaseList::findCategory.
It turned out that I didn't need this for DFSan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188646
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Tim Northover [Sun, 18 Aug 2013 18:06:03 +0000 (18:06 +0000)]
ARM: make sure we keep inline asm operands tied.
When patching inlineasm nodes to use GPRPair for 64-bit values, we
were dropping the information that two operands were tied, which
effectively broke the live-interval of vregs affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188643
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Elena Demikhovsky [Sun, 18 Aug 2013 13:08:57 +0000 (13:08 +0000)]
AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188637
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Craig Topper [Sun, 18 Aug 2013 08:53:01 +0000 (08:53 +0000)]
Make more of the lowering helpers static. Also use MVT instead of EVT in a couple places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188629
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Dmitri Gribenko [Sun, 18 Aug 2013 08:32:32 +0000 (08:32 +0000)]
docs: command guide: cleanups, no text changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188627
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Dmitri Gribenko [Sun, 18 Aug 2013 08:29:51 +0000 (08:29 +0000)]
Remove unused stdio.h includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188626
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NAKAMURA Takumi [Sun, 18 Aug 2013 03:38:40 +0000 (03:38 +0000)]
Makefile.rules: Avoid -fomit-frame-pointer also on cygwin due to PR14646.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188620
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NAKAMURA Takumi [Sun, 18 Aug 2013 02:46:21 +0000 (02:46 +0000)]
Makefile.rules: Simplify nested if(s) on OmitFramePointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188619
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Chandler Carruth [Sun, 18 Aug 2013 01:55:15 +0000 (01:55 +0000)]
Port the detection of zlib from the main autoconf system to the sample
project's autoconf. This is the last of the missing optional checks used
by libSupport that seemed to be missing from the sample project, but
I could easily have missed some as this was done by inspection when
Craig asked me to add the terminfo support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188618
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Chandler Carruth [Sun, 18 Aug 2013 01:46:34 +0000 (01:46 +0000)]
Add support for linking librt and using clock_gettime to the sample
autoconf setup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188617
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Chandler Carruth [Sun, 18 Aug 2013 01:43:57 +0000 (01:43 +0000)]
Update the sample project autoconf setup to include support for
detecting terminfo. Requested by Craig Topper, and probably should be
done much more systematically.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188616
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Chandler Carruth [Sun, 18 Aug 2013 01:20:32 +0000 (01:20 +0000)]
Go through the really awkward dance required to delete the memory
allocated by setupterm. Without this, some folks are seeing leaked
memory whenever this routine is called more than once. Thanks to Craig
Topper for the report.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188615
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Hal Finkel [Sun, 18 Aug 2013 00:16:23 +0000 (00:16 +0000)]
Fix SCEVExpander creating distinct duplicate PHI entries
This fixes SCEVExpander so that it does not create multiple distinct induction
variables for duplicate PHI entries. Specifically, given some code like this:
do.body6: ; preds = %do.body6, %do.body6, %if.then5
%end.0 = phi i8* [ undef, %if.then5 ], [ %incdec.ptr, %do.body6 ], [ %incdec.ptr, %do.body6 ]
...
Note that it is legal to have multiple entries for a basic block so long as the
associated value is the same. So the above input is okay, but expanding an
AddRec in this loop could produce code like this:
do.body6: ; preds = %do.body6, %do.body6, %if.then5
%indvar = phi i64 [ %indvar.next, %do.body6 ], [ %indvar.next1, %do.body6 ], [ 0, %if.then5 ]
%end.0 = phi i8* [ undef, %if.then5 ], [ %incdec.ptr, %do.body6 ], [ %incdec.ptr, %do.body6 ]
...
%indvar.next = add i64 %indvar, 1
%indvar.next1 = add i64 %indvar, 1
And this is not legal because there are two PHI entries for %do.body6 each with
a distinct value.
Unfortunately, I don't have an in-tree test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188614
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Juergen Ributzka [Sat, 17 Aug 2013 16:38:37 +0000 (16:38 +0000)]
The vbroadcastsi256 intrinsic does not exactly resemble the GCC
builtin. The GCC builtin expects the arguments to be passed by val,
whereas the LLVM intrinsic expects a pointer instead.
This is related to PR 16581 and rdar:
14747994.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188608
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Joerg Sonnenberger [Sat, 17 Aug 2013 11:06:00 +0000 (11:06 +0000)]
Recognize NetBSD's terminfo implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188606
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Joerg Sonnenberger [Sat, 17 Aug 2013 11:04:47 +0000 (11:04 +0000)]
PR 16899: Do not modify the basic block using the iterator, but keep the
next value. This avoids crashes due to invalidation.
Patch by Joey Gouly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188605
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Tom Stellard [Sat, 17 Aug 2013 00:06:51 +0000 (00:06 +0000)]
R600: Fix possible use of an uninitialized variable
Spotted by Nick Lewycky!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188599
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Tom Stellard [Fri, 16 Aug 2013 23:51:33 +0000 (23:51 +0000)]
R600: Expand vector FRINT ops
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188598
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Tom Stellard [Fri, 16 Aug 2013 23:51:29 +0000 (23:51 +0000)]
R600: Expand vector FFLOOR ops
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188597
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Tom Stellard [Fri, 16 Aug 2013 23:51:24 +0000 (23:51 +0000)]
R600: Expand vector float operations for both SI and R600
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188596
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Jim Grosbach [Fri, 16 Aug 2013 23:37:40 +0000 (23:37 +0000)]
ARM: Properly constrain comparison fastisel register classes.
Ongoing 'make the verifier happy' improvements to ARM fast-isel.
rdar://
12594152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188595
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Jim Grosbach [Fri, 16 Aug 2013 23:37:36 +0000 (23:37 +0000)]
ARM: Fast-isel register class constrain for extends.
Properly constrain the operand register class for instructions used
in [sz]ext expansion. Update more tests to use the verifier now that
we're getting the register classes correct.
rdar://
12594152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188594
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Jim Grosbach [Fri, 16 Aug 2013 23:37:31 +0000 (23:37 +0000)]
ARM: Fix more fast-isel verifier failures.
Teach the generic instruction selection helper functions to constrain
the register classes of their input operands. For non-physical register
references, the generic code needs to be careful not to mess that up
when replacing references to result registers. As the comment indicates
for MachineRegisterInfo::replaceRegWith(), it's important to call
constrainRegClass() first.
rdar://
12594152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188593
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Jim Grosbach [Fri, 16 Aug 2013 23:37:23 +0000 (23:37 +0000)]
ARM: Clean up fast-isel machine verifier errors.
Lots of machine verifier errors result from using a plain GPR regclass
for incoming argument copies. A more restrictive rGPR class is more
appropriate since it more accurately represents what's happening, plus
it lines up better with isel later on so the verifier is happier.
Reduces the number of ARM fast-isel tests not running with the verifier
enabled by over half.
rdar://
12594152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188592
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Daniel Dunbar [Fri, 16 Aug 2013 23:30:23 +0000 (23:30 +0000)]
[lit] Rewrite TODO list, and elaborate on some things.
- If anyone is interested in lit's feature set, I'd appreciate any comments on
the elaborated items.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188590
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Daniel Dunbar [Fri, 16 Aug 2013 23:30:19 +0000 (23:30 +0000)]
[typo] An LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188589
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Reed Kotler [Fri, 16 Aug 2013 23:05:18 +0000 (23:05 +0000)]
Fix a subtle difference between running clang vs llc for mips16.
This regards how mips16 is viewed. It's not really a target type but
there has always been a target for it in the td files. It's more properly
-mcpu=mips32 -mattr=+mips16 . This is how clang treats it but we have
always had the -mcpu=mips16 which I probably should delete now but it will
require updating all the .ll test cases for mips16. In this case it changed
how we decide if we have a count bits instruction and whether instruction
lowering should then expand ctlz. Now that we have dual mode compilation,
-mattr=+mips16 really just indicates the inital processor mode that
we are compiling for. (It is also possible to have -mcpu=64 -mattr=+mips16
but as far as I know, nobody has even built such a processor, though there
is an architecture manual for this).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188586
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Reid Kleckner [Fri, 16 Aug 2013 22:42:42 +0000 (22:42 +0000)]
Actually, use GNU inline asm for cpuid with clang
Clang doesn't support the MSVC __cpuid intrinsic yet, and fixing that is
blocked on some fairly complicated issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188584
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Chris Lattner [Fri, 16 Aug 2013 22:29:44 +0000 (22:29 +0000)]
I'm told that != is not ==
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188583
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Chris Lattner [Fri, 16 Aug 2013 22:09:02 +0000 (22:09 +0000)]
allow != to compare PointerUnion, we already support ==.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188582
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Benjamin Kramer [Fri, 16 Aug 2013 21:55:56 +0000 (21:55 +0000)]
Add difference_type to ImmutableMap/Set iterators so they have a complete set of typedefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188579
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David Blaikie [Fri, 16 Aug 2013 20:42:14 +0000 (20:42 +0000)]
DebugInfo: Allow the addition of other (such as static data) members to a record type after construction
Plus a type cleanup & minor fix to enumerate members of declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188577
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Bill Schmidt [Fri, 16 Aug 2013 20:05:04 +0000 (20:05 +0000)]
[PowerPC] Preparatory refactoring for making prologue and epilogue
safe on PPC32 SVR4 ABI
[Patch and following text by Mark Minich; committing on his behalf.]
There are FIXME's in PowerPC/PPCFrameLowering.cpp, method
PPCFrameLowering::emitPrologue() related to "negative offsets of R1"
on PPC32 SVR4. They're true, but the real issue is that on PPC32 SVR4
(and any ABI without a Red Zone), no spills may be made until after
the stackframe is claimed, which also includes the LR spill which is
at a positive offset. The same problem exists in emitEpilogue(),
though there's no FIXME for it. I intend to fix this issue, making
LLVM-compiled code finally safe for use on SVR4/EABI/e500 32-bit
platforms (including in particular, OS-free embedded systems & kernel
code, where interrupts may share the same stack as user code).
In preparation for making these changes, to make the diffs for the
functional changes less cluttered, I am providing the non-functional
refactorings in two stages:
Stage 1 does some minor fluffy refactorings to pull multiple method
calls up into a single bool, creating named bools for repeated uses of
obscure logic, moving some code up earlier because either stage 2 or
my final version will require it earlier, and rewording/adding some
comments. My stage 1 changes can be characterized as primarily fluffy
cleanup, the purpose of which may be unclear until the stage 2 or
final changes are made.
My stage 2 refactorings combine the separate PPC32 & PPC64 logic,
which is currently performed by largely duplicate code, into a single
flow, with the differences handled by a group of constants initialized
early in the methods.
This submission is for my stage 1 changes. There should be no
functional changes whatsoever; this is a pure refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188573
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Richard Mitton [Fri, 16 Aug 2013 18:54:26 +0000 (18:54 +0000)]
Fixed RuntimeDyldELF absolute relocations.
If an ELF relocation is pointed at an absolute address, it will have a symbol ID of zero.
RuntimeDyldELF::processRelocationRef was not previously handling this case, and was instead trying to handle it as a section-relative fixup.
I think this is the right fix here, but my elf-fu is poor on some of the more exotic platforms, so I'd appreciate it if anyone with greater knowledge could verify this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188572
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Richard Mitton [Fri, 16 Aug 2013 18:09:06 +0000 (18:09 +0000)]
Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188568
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Daniel Dunbar [Fri, 16 Aug 2013 18:01:18 +0000 (18:01 +0000)]
[tests] Another attempt to workaround broken misched-copy.s test on some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188567
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Aaron Ballman [Fri, 16 Aug 2013 17:53:28 +0000 (17:53 +0000)]
Switching to using a helper function instead of manually converting the string to UTF-8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188566
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Aaron Ballman [Fri, 16 Aug 2013 17:33:57 +0000 (17:33 +0000)]
Removing unused functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188565
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Stephen Lin [Fri, 16 Aug 2013 17:29:01 +0000 (17:29 +0000)]
FileCheck: Fix stray quote in CHECK-LABEL error message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188564
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Jim Grosbach [Fri, 16 Aug 2013 17:03:36 +0000 (17:03 +0000)]
InstCombine: Use isAllOnesValue() instead of explicit -1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188563
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