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Craig Topper [Sun, 3 Sep 2017 22:25:50 +0000 (22:25 +0000)]
[X86] Add more patterns to use moves to zero the upper portions of a vector register that I missed in r312450.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312459
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Craig Topper [Sun, 3 Sep 2017 22:25:49 +0000 (22:25 +0000)]
[X86] Combine inserting a vector of zeros into a vector of zeros just the larger vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312458
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Craig Topper [Sun, 3 Sep 2017 17:52:25 +0000 (17:52 +0000)]
[X86] Add patterns to turn an insert into lower subvector of a zero vector into a move instruction which will implicitly zero the upper elements.
Ideally we'd be able to emit the SUBREG_TO_REG without the explicit register->register move, but we'd need to be sure the producing operation would select something that guaranteed the upper bits were already zeroed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312450
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Craig Topper [Sun, 3 Sep 2017 17:52:23 +0000 (17:52 +0000)]
[X86] Add VBLENDPS/VPBLENDD to the execution domain fixing tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312449
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Craig Topper [Sun, 3 Sep 2017 17:52:19 +0000 (17:52 +0000)]
[X86] Canonicalize (concat_vectors X, zero) -> (insert_subvector zero, X, 0).
In a future patch, I plan to teach isel to use a small vector move with implicit zeroing of the upper elements when it sees the (insert_subvector zero, X, 0) pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312448
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Sanjay Patel [Sun, 3 Sep 2017 15:35:10 +0000 (15:35 +0000)]
[InstCombine] add tests for fcmp ord/uno canonicalization; NFC
Currently, we canonicalize some cases to use 0.0, but we miss others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312445
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Ayman Musa [Sun, 3 Sep 2017 15:06:26 +0000 (15:06 +0000)]
[X86] Add -mtriple option to LIT tests added in https://reviews.llvm.org/rL312442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312443
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Ayman Musa [Sun, 3 Sep 2017 13:53:44 +0000 (13:53 +0000)]
[X86][AVX512] Add simple tests for all AVX512 shuffle instructions.
Throughout an effort to strongly check the behavior of CodeGen with the IR shufflevector instruction we generated many tests while predicting the best X86 sequence that may be generated.
This is a subset of the generated tests that we think may add value to our X86 set of tests.
Some of the checks are not optimal and will be changed after fixing:
1. PR34394
2. PR34382
3. PR34380
4. PR34359
Differential Revision: https://reviews.llvm.org/D37329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312442
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Ayman Musa [Sun, 3 Sep 2017 10:44:18 +0000 (10:44 +0000)]
[X86] Add RUN line for LIT test committed in "rL312438: [X86] Fix crash on assert of non-simple type after type-legalization.".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312439
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Ayman Musa [Sun, 3 Sep 2017 09:09:16 +0000 (09:09 +0000)]
[X86] Fix crash on assert of non-simple type after type-legalization
The function combineShuffleToVectorExtend in DAGCombine might generate an illegal typed node after "legalize types" phase, causing assertion on non-simple type to fail afterwards.
Adding a type check in case the combine is running after the type legalize pass.
Differential Revision: https://reviews.llvm.org/D37330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312438
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Hal Finkel [Sun, 3 Sep 2017 03:00:27 +0000 (03:00 +0000)]
Add llvm-isel-fuzzer to test/CMakeLists.txt
Tests were added that depend on llvm-isel-fuzzer in r312427, so the tests
should depend on the tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312433
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Craig Topper [Sun, 3 Sep 2017 01:46:26 +0000 (01:46 +0000)]
[X86] Add output register to BTC/BTR/BTS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312432
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Lang Hames [Sun, 3 Sep 2017 00:50:42 +0000 (00:50 +0000)]
[ORC] Add an Error return to the JITCompileCallbackManager::grow method.
Calling grow may result in an error if, for example, this is a callback
manager for a remote target. We need to be able to return this error to the
callee.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312429
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Keith Wyss [Sun, 3 Sep 2017 00:40:13 +0000 (00:40 +0000)]
Revert "[XRay][tools] Function call stack based analysis tooling for XRay traces"
This reverts commit
204a65e0702847a1880336372ad7abd1df414b44.
Double ref qualifier failed bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312428
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Justin Bogner [Sun, 3 Sep 2017 00:37:39 +0000 (00:37 +0000)]
llvm-isel-fuzzer: Add some basic tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312427
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Keith Wyss [Sun, 3 Sep 2017 00:03:47 +0000 (00:03 +0000)]
[XRay][tools] Function call stack based analysis tooling for XRay traces
This change introduces a subcommand to the llvm-xray tool called
"stacks" which allows for analysing XRay traces provided as inputs and
accounting time to stacks instead of just individual functions. This
gives us a more precise view of where in a program the latency is
actually attributed.
The tool uses a trie data structure to keep track of the caller-callee
relationships as we process the XRay traces. In particular, we keep
track of the function call stack as we enter functions. While we're
doing this we're adding nodes in a trie and indicating a "calls"
relatinship between the caller (current top of the stack) and the callee
(the new top of the stack). When we push function ids onto the stack, we
keep track of the timestamp (TSC) for the enter event.
When exiting functions, we are able to account the duration by getting
the difference between the timestamp of the exit event and the
corresponding entry event in the stack. This works even if we somehow
miss the exit events for intermediary functions (i.e. if the exit event
is not cleanly associated with the enter event at the top of the stack).
The output of the tool currently provides just the top N leaf functions
that contribute the most latency, and the top N stacks that have the
most frequency. In the future we can provide more sophisticated query
mechanisms and potentially an export to database feature to make offline
analysis of the stack traces possible with existing tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312426
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Justin Bogner [Sat, 2 Sep 2017 23:43:04 +0000 (23:43 +0000)]
Move some CLI utils out of llvm-isel-fuzzer and into the library
FuzzMutate might not be the best place for these, but it makes more
sense than an entirely new library for now. This will make setting up
fuzz targets with consistent CLI handling easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312425
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Don Hinton [Sat, 2 Sep 2017 22:56:58 +0000 (22:56 +0000)]
Fix buildbot failures for new test that requires the X86 target be built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312424
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Lang Hames [Sat, 2 Sep 2017 19:16:28 +0000 (19:16 +0000)]
[ORC] Update comments in RTDyldObjectLinkingLayer to refer to singular objects
rather than object sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312423
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Craig Topper [Sat, 2 Sep 2017 18:53:46 +0000 (18:53 +0000)]
[X86] Teach fastisel to handle zext/sext i8->i16 and sext i1->i8/i16/i32/i64
Summary:
ZExt and SExt from i8 to i16 aren't implemented in the autogenerated fast isel table because normal isel does a zext/sext to 32-bits and a subreg extract to avoid a partial register write or false dependency on the upper bits of the destination. This means without handling in fast isel we end up triggering a fast isel abort.
We had no custom sign extend handling at all so while I was there I went ahead and implemented sext i1->i8/i16/i32/i64 which was also missing. This generates an i1->i8 sign extend using a mask with 1, then an 8-bit negate, then continues with a sext from i8. A better sequence would be a wider and/negate, but would require more custom code.
Fast isel tests are a mess and I couldn't find a good home for the tests so I created a new one.
The test pr34381.ll had to have fast-isel removed because it was relying on a fast isel abort to hit the bug. The test case still seems valid with fast-isel disabled though some of the instructions changed.
Reviewers: spatel, zvi, igorb, guyblank, RKSimon
Reviewed By: guyblank
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37320
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312422
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Sanjay Patel [Sat, 2 Sep 2017 18:10:29 +0000 (18:10 +0000)]
[InstCombine] replace unnecessary fcmp fold with assert
See https://reviews.llvm.org/rL312411 for related InstSimplify tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312421
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Sanjay Patel [Sat, 2 Sep 2017 17:53:33 +0000 (17:53 +0000)]
[InstCombine] combine foldAndOfFCmps and foldOrOfFcmps; NFCI
In addition to removing chunks of duplicated code, we don't
want these to diverge. If there's a fold for one, there
should be a fold of the other via DeMorgan's Laws.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312420
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Don Hinton [Sat, 2 Sep 2017 17:28:39 +0000 (17:28 +0000)]
[CMAKE] Move version control macros to AddLLVM.cmake so they can be reused by clang, etc.
Summary:
Move version control macros, find_first_existing_file and
find_first_existing_vc_file to AddLLVM.cmake so they can be reused by sub projects
like clang.
Differential Revision: https://reviews.llvm.org/D36971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312419
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Sanjay Patel [Sat, 2 Sep 2017 17:17:17 +0000 (17:17 +0000)]
[InstCombine] fix misnamed locals and use them to reduce code; NFCI
We had these locals:
Value *Op0RHS = LHS->getOperand(1);
Value *Op1LHS = RHS->getOperand(0);
...so we confusingly transposed the meaning of left/right and op0/op1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312418
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Benjamin Kramer [Sat, 2 Sep 2017 16:41:55 +0000 (16:41 +0000)]
[LoopVectorize] Turn static DenseSet into switch.
LLVM transforms this into a bit test which is a lot faster and smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312417
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Sanjay Patel [Sat, 2 Sep 2017 16:32:37 +0000 (16:32 +0000)]
[InstCombine] remove unnecessary code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312416
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Sanjay Patel [Sat, 2 Sep 2017 16:30:27 +0000 (16:30 +0000)]
[InstCombine] move related functions next to each other; NFC
This makes it easier to see that they're almost duplicates.
As with the similar icmp functions, there should be identical
folds for both logic ops because those are DeMorganized variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312415
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Sanjay Patel [Sat, 2 Sep 2017 15:11:55 +0000 (15:11 +0000)]
[InstCombine] use local variable to reduce code duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312414
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Sanjay Patel [Sat, 2 Sep 2017 14:38:15 +0000 (14:38 +0000)]
[InstSimplify] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312413
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Sanjay Patel [Sat, 2 Sep 2017 14:35:18 +0000 (14:35 +0000)]
[InstCombine] put 2 related tests in the same file; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312412
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Sanjay Patel [Sat, 2 Sep 2017 14:27:00 +0000 (14:27 +0000)]
[InstSimplify] move fcmp simplification tests from InstCombine
These are all tests that result in a constant, so moving the tests over to where they are actually handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312411
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Alexander Shaposhnikov [Sat, 2 Sep 2017 08:19:01 +0000 (08:19 +0000)]
[llvm-dwp] Implement -e option
The binutils utility dwp has an option "-e"
https://gcc.gnu.org/wiki/DebugFissionDWP
to specify an executable/library to get the list
of *.dwo files from it. This option is particularly useful when
someone runs the tool manually outside of a build system.
This diff adds an implementation of "-e" to llvm-dwp.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D37371
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312409
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Vitaly Buka [Sat, 2 Sep 2017 05:14:55 +0000 (05:14 +0000)]
Return copy of XML dump
COFF/DriverUtils.cpp uses buffer after WindowsManifestMerger destroyed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312408
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Vitaly Buka [Sat, 2 Sep 2017 03:15:13 +0000 (03:15 +0000)]
llvm-mt: Fix memory management in WindowsManifestMergerImpl::getMergedManifest
Summary:
xmlDoc needs to be released with xmlFreeDoc.
XML_PARSE_NODICT is needed for safe moving nodes between documents.
Buffer returned from xmlDocDumpFormatMemoryEnc needs xmlFree, but it needs
outlive users of getMergedManifest results.
Reviewers: ecbeckmann, rnk, zturner, ruiu
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37321
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312406
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Petr Hosek [Sat, 2 Sep 2017 02:28:03 +0000 (02:28 +0000)]
[CMake][runtimes] Use target specific name for all runtimes targets
We need to use target specific name for all runtimes targets. Target
specific name means the name of target in the LLVM build is different
from the name in runtimes build (in LLVM build, it's suffixed by the
target itself). Previously we have only used target specific names for
check targets collected through SUB_CHECK_TARGETS, but that's not
sufficient, we need to use target specific names for all targets we're
exposing in LLVM build.
Fixes PR34335.
Differential Revision: https://reviews.llvm.org/D37245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312405
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Daniel Berlin [Sat, 2 Sep 2017 02:18:44 +0000 (02:18 +0000)]
Fix PR/33305. caused by trying to simplify expressions in phi of ops that should have no leaders.
Summary:
After a discussion with Rekka, i believe this (or a small variant)
should fix the remaining phi-of-ops problems.
Rekka's algorithm for completeness relies on looking up expressions
that should have no leader, and expecting it to fail (IE looking up
expressions that can't exist in a predecessor, and expecting it to
find nothing).
Unfortunately, sometimes these expressions can be simplified to
constants, but we need the lookup to fail anyway. Additionally, our
simplifier outsmarts this by taking these "not quite right"
expressions, and simplifying them into other expressions or walking
through phis, etc. In the past, we've sometimes been able to find
leaders for these expressions, incorrectly.
This change causes us to not to try to phi of ops such expressions.
We determine safety by seeing if they depend on a phi node in our
block.
This is not perfect, we can do a bit better, but this should be a
"correctness start" that we can then improve. It also requires a
bunch of caching that i'll eventually like to eliminate.
The right solution, longer term, to the simplifier issues, is to make
the query interface for the instruction simplifier/constant folder
have the flags we need, so that we can keep most things going, but
turn off the possibly-invalid parts (threading through phis, etc).
This is an issue in another wrong code bug as well.
Reviewers: davide, mcrosier
Subscribers: sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D37175
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312401
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Zachary Turner [Sat, 2 Sep 2017 00:09:43 +0000 (00:09 +0000)]
[llvm-pdbutil] Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312395
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Eugene Zemtsov [Fri, 1 Sep 2017 23:12:43 +0000 (23:12 +0000)]
Disable 64bit file position on old 32 bit Androids.
This is needed for building LLVM on Android with new NDK (newer
than r15c) and API level < 24. Android C library (Bionic) didn't have
support for 64 bit file position until Android N.
Differential Revision: https://reviews.llvm.org/D37314
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312389
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Stanislav Mekhanoshin [Fri, 1 Sep 2017 22:25:22 +0000 (22:25 +0000)]
[AMDGPU] Testcase for computeKnownBits recursion. NFC.
Testcase for rL312364:
[AMDGPU] Prevent infinite recursion in DAG.computeKnownBits()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312388
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Jessica Paquette [Fri, 1 Sep 2017 22:17:14 +0000 (22:17 +0000)]
[MIParser] Ensure getHexUint doesn't produce APInts with a bitwidth of 0
If getHexUint reads in a hex 0, it will create an APInt with a value of 0.
The number of active bits on this APInt is used to calculate the bitwidth of
Result. The number of active bits is defined as an APInt's bitwidth - its
number of leading 0s. Since this APInt is 0, its bitwidth and number of leading
0s are equal.
Thus, Result is constructed with a bitwidth of 0, triggering an APInt assert.
This commit fixes that by checking if the APInt is equal to 0, and setting the
bitwidth to 32 if it is. Otherwise, it sets the bitwidth using getActiveBits.
This caused issues when compiling MIR files with successor probabilities. In
the case that a successor is tagged with a probability of 0, this assert would
fire on debug builds.
https://reviews.llvm.org/D37401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312387
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Eugene Zelenko [Fri, 1 Sep 2017 21:37:29 +0000 (21:37 +0000)]
[Analysis, Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312383
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Craig Topper [Fri, 1 Sep 2017 21:27:34 +0000 (21:27 +0000)]
[InstCombine][InstSimplify] Teach decomposeBitTestICmp to look through truncate instructions
This patch teaches decomposeBitTestICmp to look through truncate instructions on the input to the compare. If a truncate is found it will now return the pre-truncated Value and appropriately extend the APInt mask.
This allows some code to be removed from InstSimplify that was doing this functionality.
This allows InstCombine's bit test combining code to match a pre-truncate Value with the same Value appear with an 'and' on another icmp. Or it allows us to combine a truncate to i16 and a truncate to i8. This also required removing the type check from the beginning of getMaskedTypeForICmpPair, but I believe that's ok because we still have to find two values from the input to each icmp that are equal before we'll do any transformation. So the type check was really just serving as an early out.
There was one user of decomposeBitTestICmp that didn't want to look through truncates, so I've added a flag to prevent that behavior when necessary.
Differential Revision: https://reviews.llvm.org/D37158
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312382
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Craig Topper [Fri, 1 Sep 2017 21:27:31 +0000 (21:27 +0000)]
[InstCombine] Don't require the compare types to be the same in getMaskedTypeForICmpPair.
A future patch will make the code look through truncates feeding the compare. So the compares might be different types but the pretruncated types might be the same.
This should be safe because we still require the same Value* to be used truncated or not in both compares. So that serves to ensure the types are the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312381
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Craig Topper [Fri, 1 Sep 2017 21:27:29 +0000 (21:27 +0000)]
[InstCombine] When converting decomposeBitTestICmp's APInt return to ConstantInt, make sure we use the type from the Value* that was also returned from decomposeBitTestICmp.
Previously we used the type from the LHS of the compare, but a future patch will change decomposeBitTestICmp to look through truncates so it will return a pretruncated Value* and the type needs to match that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312380
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Sanjay Patel [Fri, 1 Sep 2017 21:09:04 +0000 (21:09 +0000)]
[x86] eliminate redundant shuffle of horizontal math ops when both inputs are the same
This is limited to a set of patterns based on the example in PR34111:
https://bugs.llvm.org/show_bug.cgi?id=34111
...but as I was investigating this, I see that horizontal patterns can go wrong in many,
many other ways that would not be handled by this patch. Each data type may even go
different in the DAG after starting with the same basic IR pattern, so even proper IR
canonicalization won't fix it all.
Differential Revision: https://reviews.llvm.org/D37357
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312379
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Stanislav Mekhanoshin [Fri, 1 Sep 2017 20:43:20 +0000 (20:43 +0000)]
[AMDGPU] Prevent infinite recursion in DAG.computeKnownBits()
Differential Revision: https://reviews.llvm.org/D37392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312364
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Zachary Turner [Fri, 1 Sep 2017 20:17:20 +0000 (20:17 +0000)]
Fix broken test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312359
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Zachary Turner [Fri, 1 Sep 2017 20:06:56 +0000 (20:06 +0000)]
[llvm-pdbutil] Support dumping CodeView from object files.
We have llvm-readobj for dumping CodeView from object files, and
llvm-pdbutil has always been more focused on PDB. However,
llvm-pdbutil has a lot of useful options for summarizing debug
information in aggregate and presenting high level statistical
views. Furthermore, it's arguably better as a testing tool since
we don't have to write tests to conform to a state-machine like
structure where you match multiple lines in succession, each
depending on a previous match. llvm-pdbutil dumps much more
concisely, so it's possible to use single-line matches in many
cases where as with readobj tests you have to use multi-line
matches with an implicit state machine.
Because of this, I'm adding object file support to llvm-pdbutil.
In fact, this mirrors the cvdump tool from Microsoft, which also
supports both object files and pdb files. In the future we could
perhaps rename this tool llvm-cvutil.
In the meantime, this allows us to deep dive into object files
the same way we already can with PDB files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312358
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Davide Italiano [Fri, 1 Sep 2017 19:54:08 +0000 (19:54 +0000)]
[TTI] Fix getGEPCost() for geps with a single operand.
Previously this would sporadically crash as TargetType
was never initialized. We special-case the single-operand
case returning earlier and trying to mimic the behaviour of
isLegalAddressingMode as closely as possible.
Differential Revision: https://reviews.llvm.org/D37277
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312357
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Justin Bogner [Fri, 1 Sep 2017 19:37:49 +0000 (19:37 +0000)]
llvm-isel-fuzzer: Weak function invoke the ire of PE/COFF
It's non-trivial to use weak symbols in a cross platform way (See
sanitizer_win_defs.h in compiler-rt), and doing it naively like we
have here causes some build failures:
http://lab.llvm.org:8011/builders/clang-with-thin-lto-windows/builds/1260
Instead of going down the rabbit hole of emulating weak symbols for
this very trivial dummy fuzzer driver, we can just rely on the fact
that we know which hooks any given fuzz target implements and forward
declare a normal symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312354
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Davide Italiano [Fri, 1 Sep 2017 19:36:34 +0000 (19:36 +0000)]
[TTI] Initialize a value to trigger a crash deterministically.
We expect the pointer to be initialized by the above loop, but
if that's not executed, the contents are garbage.
A fix for the crash will be committed immediately after.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312353
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Daniel Berlin [Fri, 1 Sep 2017 19:20:18 +0000 (19:20 +0000)]
NewGVN: Make sure we don't incorrectly use PredicateInfo when doing PHI of ops
Summary: When we backtranslate expressions, we can't use the predicateinfo, since we are evaluating them in a different context.
Reviewers: davide, mcrosier
Subscribers: sanjoy, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D37174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312352
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Matt Arsenault [Fri, 1 Sep 2017 18:38:02 +0000 (18:38 +0000)]
AMDGPU: Add ds_{read|write}_addtid_b32 definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312349
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Matthias Braun [Fri, 1 Sep 2017 18:36:26 +0000 (18:36 +0000)]
LiveIntervalAnalysis: Fix alias regunit reserved definition
A register in CodeGen can be marked as reserved: In that case we
consider the register always live and do not use (or rather ignore)
kill/dead/undef operand flags.
LiveIntervalAnalysis however tracks liveness per register unit (not per
register). We already needed adjustments for this in r292871 to deal
with super/sub registers. However I did not look at aliased register
there. Looking at ARM:
FPSCR (regunits FPSCR, FPSCR~FPSCR_NZCV) aliases with FPSCR_NZCV
(regunits FPSCR_NZCV, FPSCR~FPSCR_NZCV) hence they share a register unit
(FPSCR~FPSCR_NZCV) that represents the aliased parts of the registers.
This shared register unit was previously considered non-reserved,
however given that we uses of the reserved FPSCR potentially violate
some rules (like uses without defs) we should make FPSCR~FPSCR_NZCV
reserved too and stop tracking liveness for it.
This patch:
- Defines a register unit as reserved when: At least for one root
register, the root register and all its super registers are reserved.
- Adjust LiveIntervals::computeRegUnitRange() for new reserved
definition.
- Add MachineRegisterInfo::isReservedRegUnit() to have a canonical way
of testing.
- Stop computing LiveRanges for reserved register units in HMEditor even
with UpdateFlags enabled.
- Skip verification of uses of reserved reg units in the machine
verifier (this usually didn't happen because there would be no cached
liverange but there is no guarantee for that and I would run into this
case before the HMEditor tweak, so may as well fix the verifier too).
Note that this should only affect ARMs FPSCR/FPSCR_NZCV registers today;
aliased registers are rarely used, the only other cases are hexagons
P0-P3/P3_0 and C8/USR pairs which are not mixing reserved/non-reserved
registers in an alias.
Differential Revision: https://reviews.llvm.org/D37356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312348
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Matt Arsenault [Fri, 1 Sep 2017 18:36:06 +0000 (18:36 +0000)]
AMDGPU: Add most d16 load/store instruction definitions
Doesn't include the tied operand necessary for the loads,
but is enough for the assembler to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312347
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Justin Bogner [Fri, 1 Sep 2017 17:49:54 +0000 (17:49 +0000)]
llvm-isel-fuzzer: Add link-time dependency on BitWriter
This should fix the undefined reference to WriteBitcodeToFile here:
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/31682
(Why does every different bot seem to have a different level of
finickiness about LLVM_LINK_COMPONENTS?)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312345
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Justin Bogner [Fri, 1 Sep 2017 17:34:21 +0000 (17:34 +0000)]
llvm-isel-fuzzer: Add link-time dependency on BitReader
This should fix the undefined reference to parseBitcodeFile here:
http://bb.pgr.jp/builders/llvm-i686-linux-RA/builds/5785
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312343
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Sam Clegg [Fri, 1 Sep 2017 17:32:01 +0000 (17:32 +0000)]
[WebAssembly] Update relocation names to match spec
Summary: See https://github.com/WebAssembly/tool-conventions/blob/master/Linking.md
Differential Revision: https://reviews.llvm.org/D37385
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312342
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Justin Bogner [Fri, 1 Sep 2017 17:26:24 +0000 (17:26 +0000)]
Specify the namespace in llvm::make_unique to fix the windows build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312341
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Sam Clegg [Fri, 1 Sep 2017 17:24:19 +0000 (17:24 +0000)]
[WebAssembly] Fix getSymbolValue for exported globals
The code wasn't previously taking into account that the
global index space is not same as the into in the Globals
array since the latter does not include imported globals.
This fixes the WebAssembly waterfall failures.
Differential Revision: https://reviews.llvm.org/D37384
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312340
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Justin Bogner [Fri, 1 Sep 2017 17:02:22 +0000 (17:02 +0000)]
llvm-isel-fuzzer: Make buildable and testable without libFuzzer
This adds a dummy main so we can build and run the llvm-isel-fuzzer
functionality when we aren't building LLVM with coverage. The approach
here should serve as a template to stop in-tree fuzzers from
bitrotting (See llvm.org/pr34314).
Note that I'll probably move most of the logic in DummyISelFuzzer's
`main` to a library so it's easy to reuse it in other fuzz targets,
but I'm planning on doing that in a follow up that also consolidates
argument handling in our LLVMFuzzerInitialize implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312338
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Nicolai Haehnle [Fri, 1 Sep 2017 16:56:32 +0000 (16:56 +0000)]
AMDGPU: IMPLICIT_DEFs and DBG_VALUEs do not contribute to wait states
Summary:
This fixes a bug that was exposed on gfx9 in various
GL45-CTS.shaders.loops.*_iterations.select_iteration_count_fragment tests,
e.g. GL45-CTS.shaders.loops.do_while_uniform_iterations.select_iteration_count_fragment
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D36193
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312337
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Craig Topper [Fri, 1 Sep 2017 16:40:24 +0000 (16:40 +0000)]
[X86] Add test case I forgot to commit with r312285.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312335
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Peter Collingbourne [Fri, 1 Sep 2017 16:24:02 +0000 (16:24 +0000)]
ModuleSummaryAnalysis: Correctly handle refs from function inline asm to module inline asm.
If a function contains inline asm and the module-level inline asm
contains the definition of a local symbol, prevent the function from
being imported in case the function-level inline asm refers to a
symbol in the module-level inline asm.
Differential Revision: https://reviews.llvm.org/D37370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312332
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Manoj Gupta [Fri, 1 Sep 2017 15:36:00 +0000 (15:36 +0000)]
[LoopVectorizer] Use two step casting for float to pointer types.
Summary:
LoopVectorizer is creating casts between vec<ptr> and vec<float> types
on ARM when compiling OpenCV. Since, tIs is illegal to directly cast a
floating point type to a pointer type even if the types have same size
causing a crash. Fix the crash using a two-step casting by bitcasting
to integer and integer to pointer/float.
Fixes PR33804.
Reviewers: mkuper, Ayal, dlj, rengolin, srhines
Reviewed By: rengolin
Subscribers: aemerson, kristof.beyls, mkazantsev, Meinersbur, rengolin, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D35498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312331
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Alexandre Isoard [Fri, 1 Sep 2017 14:59:59 +0000 (14:59 +0000)]
[SCEV] Add URem support to SCEV
In LLVM IR the following code:
%r = urem <ty> %t, %b
is equivalent to
%q = udiv <ty> %t, %b
%s = mul <ty> nuw %q, %b
%r = sub <ty> nuw %t, %q ; (t / b) * b + (t % b) = t
As UDiv, Mul and Sub are already supported by SCEV, URem can be implemented
with minimal effort using that relation:
%r --> (-%b * (%t /u %b)) + %t
We implement two special cases:
- if %b is 1, the result is always 0
- if %b is a power-of-two, we produce a zext/trunc based expression instead
That is, the following code:
%r = urem i32 %t, 65536
Produces:
%r --> (zext i16 (trunc i32 %a to i16) to i32)
Note that while this helps get a tighter bound on the range analysis and the
known-bits analysis, this exposes some normalization shortcoming of SCEVs:
%div = udim i32 %a, 65536
%mul = mul i32 %div, 65536
%rem = urem i32 %a, 65536
%add = add i32 %mul, %rem
Will usually not be reduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312329
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Geoff Berry [Fri, 1 Sep 2017 14:27:20 +0000 (14:27 +0000)]
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
Issues addressed since original review:
- Moved removal of dead instructions found by
LiveIntervals::shrinkToUses() outside of loop iterating over
instructions to avoid instructions being deleted while pointed to by
iterator.
- Fixed ARMLoadStoreOptimizer bug exposed by this change in r311907.
- The pass no longer forwards COPYs to physical register uses, since
doing so can break code that implicitly relies on the physical
register number of the use.
- The pass no longer forwards COPYs to undef uses, since doing so
can break the machine verifier by creating LiveRanges that don't
end on a use (since the undef operand is not considered a use).
[MachineCopyPropagation] Extend pass to do COPY source forwarding
This change extends MachineCopyPropagation to do COPY source forwarding.
This change also extends the MachineCopyPropagation pass to be able to
be run during register allocation, after physical registers have been
assigned, but before the virtual registers have been re-written, which
allows it to remove virtual register COPY LiveIntervals that become dead
through the forwarding of all of their uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312328
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Clement Courbet [Fri, 1 Sep 2017 11:51:23 +0000 (11:51 +0000)]
[MergeICmps] Fix build of rL312315 on clang-with-thin-lto-windows:
MergeICmps.cpp(68,15): error: chosen constructor is explicit in copy-initialization
return {};
APInt.h(339,12): note: explicit constructor declared here
explicit APInt() : BitWidth(1) { U.VAL = 0; }
^
MergeICmps.cpp(56,9): note: in implicit initialization of field 'Offset' with omitted
initializer
APInt Offset;
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312326
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Strahinja Petrovic [Fri, 1 Sep 2017 11:37:53 +0000 (11:37 +0000)]
Adding missing test case in rL312318
Adding test for debug info for integer
variables whose type is shrinked to bool.
Patch by Nikola Prica.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312325
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Diana Picus [Fri, 1 Sep 2017 11:13:39 +0000 (11:13 +0000)]
[ARM] GlobalISel: Support ROPI global variables
In the ROPI relocation model, read-only variables are accessed relative
to the PC. We use the (MOV|LDRLIT)_ga_pcrel pseudoinstructions for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312323
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Clement Courbet [Fri, 1 Sep 2017 10:56:34 +0000 (10:56 +0000)]
Reland rL312315: [MergeICmps] MergeICmps is a new optimization pass that turns chains of integer
Add missing header.
This reverts commit
86dd6335cf7607af22f383a9a8e072ba929848cf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312322
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Oliver Stannard [Fri, 1 Sep 2017 10:47:25 +0000 (10:47 +0000)]
[ARM] Add 2-operand assembly aliases for Thumb1 ADD/SUB
This adds 2-operand assembly aliases for these instructions:
add r0, r1 => add r0, r0, r1
sub r0, r1 => sub r0, r0, r1
Previously this syntax was only accepted for Thumb2 targets, where the
wide versions of the instructions were used.
This patch allows the 2-operand syntax to be used for Thumb1 targets,
and selects the narrow encoding when it is used for Thumb2 targets.
Differential revision: https://reviews.llvm.org/D37377
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312321
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Diana Picus [Fri, 1 Sep 2017 10:44:48 +0000 (10:44 +0000)]
Move static helper into ARMTargetLowering. NFC
This exposes the isReadOnly(GlobalValue *) in the ARMTargetLowering so
we can make use of it in GlobalISel as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312320
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Diana Picus [Fri, 1 Sep 2017 10:18:37 +0000 (10:18 +0000)]
[ARM] GlobalISel: More tests. NFC.
Test constants as well in the PIC tests. These are also represented as
G_GLOBAL_VALUE, and although they are treated just like other globals
for PIC, they won't be for ROPI, so it's good to have this coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312319
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Strahinja Petrovic [Fri, 1 Sep 2017 10:05:27 +0000 (10:05 +0000)]
Debug info for variables whose type is shrinked to bool
This patch provides such debug information for integer
variables whose type is shrinked to bool by providing
dwarf expression which returns either constant initial
value or other value.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D35994
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312318
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Clement Courbet [Fri, 1 Sep 2017 09:43:08 +0000 (09:43 +0000)]
Revert "[MergeICmps] MergeICmps is a new optimization pass that turns chains of integer"
Break build
This reverts commit
d07ab866f7f88f81e49046d691a80dcd32d7198b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312317
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Clement Courbet [Fri, 1 Sep 2017 09:07:05 +0000 (09:07 +0000)]
[MergeICmps] MergeICmps is a new optimization pass that turns chains of integer
comparisons into memcmp.
Thanks to recent improvements in the LLVM codegen, the memcmp is typically
inlined as a chain of efficient hardware comparisons.
This typically benefits C++ member or nonmember operator==().
For now this is disabled by default until:
- https://bugs.llvm.org/show_bug.cgi?id=33329 is complete
- Benchmarks show that this is always useful.
Differential Revision:
https://reviews.llvm.org/D33987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312315
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Craig Topper [Fri, 1 Sep 2017 07:58:16 +0000 (07:58 +0000)]
[AVX512] Suppress duplicate register only FMA patterns.
Previously we generated a register only pattern for each of the 3 instruction forms, but they are all identical as far as isel is concerned. So drop the others and just keep the 213 version.
This removes 2968 bytes from the isel table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312313
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Craig Topper [Fri, 1 Sep 2017 07:58:15 +0000 (07:58 +0000)]
[X86] Remove unused multiclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312312
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Craig Topper [Fri, 1 Sep 2017 07:58:14 +0000 (07:58 +0000)]
[X86] Simplify some multiclasses by inheriting from similar ones. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312311
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Craig Topper [Fri, 1 Sep 2017 07:58:13 +0000 (07:58 +0000)]
[X86] Add a couple TODOs to the PMADD52 instrucions about missing commuting opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312310
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Craig Topper [Fri, 1 Sep 2017 07:58:13 +0000 (07:58 +0000)]
[X86] Add isel patterns for memory forms of FMA3 intrinsic instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312309
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Craig Topper [Fri, 1 Sep 2017 07:58:11 +0000 (07:58 +0000)]
[X86] Remove unnecessary COPY_TO_REGCLASS(VR128) from the output patterns for FMA instrinsics.
The instructions are already defined as writing a VR128 register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312308
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Vitaly Buka [Fri, 1 Sep 2017 01:47:34 +0000 (01:47 +0000)]
Fix check-llvm on kernel 4.9+ with asan or msan
Summary:
Before https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/?h=v4.9.46&id=
84638335900f1995495838fe1bd4870c43ec1f67
test worked because memory allocated with mmap was not counted against RLIMIT_DATA.
Reviewers: eugenis
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37366
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312303
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Leo Li [Fri, 1 Sep 2017 01:05:59 +0000 (01:05 +0000)]
[CMake] Add more runtime configurations.
Summary:
- `project` is required when `runtime/CMakeList.txt` is the top-level `CMakeList.txt` file. This will establish version and policy settings.
- `-D_FILE_OFFSET_BITS=64` should never be set for Android runtimes.
Reviewers: srhines, pirama, beanz
Subscribers: llvm-commits, srhines, mgorny
Differential Revision: https://reviews.llvm.org/D35648
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312302
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Matt Arsenault [Thu, 31 Aug 2017 23:53:50 +0000 (23:53 +0000)]
AMDGPU: Fold clamp modifier for packed instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312297
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Sam Clegg [Thu, 31 Aug 2017 23:22:44 +0000 (23:22 +0000)]
[WebAssembly] Fix getSymbolValue() for data symbols
This is mostly a fix for the output of `llvm-nm`
See Bug 34392: https://bugs.llvm.org//show_bug.cgi?id=34392
Differential Revision: https://reviews.llvm.org/D37359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312294
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Eugene Zelenko [Thu, 31 Aug 2017 22:06:09 +0000 (22:06 +0000)]
[IR] Missing changes for r312289 (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312290
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Eugene Zelenko [Thu, 31 Aug 2017 21:56:16 +0000 (21:56 +0000)]
[Analysis] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes. Also affected in files (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312289
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Reid Kleckner [Thu, 31 Aug 2017 21:56:14 +0000 (21:56 +0000)]
[lit] Fix some issues with short paths in test discovery introduced in r312254
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312288
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Derek Schuff [Thu, 31 Aug 2017 21:51:48 +0000 (21:51 +0000)]
[WebAssembly] Refactor load ISel tablegen patterns into classes
Not all of these will be able to be used by atomics because tablegen, but it
still seems like a good change by itself.
Differential Revision: https://reviews.llvm.org/D37345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312287
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Sam Clegg [Thu, 31 Aug 2017 21:43:45 +0000 (21:43 +0000)]
[WebAssembly] Validate exports when parsing object files
Subscribers: jfb, dschuff, jgravelle-google, aheejin
Differential Revision: https://reviews.llvm.org/D37358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312286
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Craig Topper [Thu, 31 Aug 2017 21:39:23 +0000 (21:39 +0000)]
[X86] Don't pull carry through X86ISD::ADD carryin, -1 if we can't guranteed we're really using the carry flag from the add.
Prior to this patch we had a DAG combine that tried to bypass an X86ISD::ADD with -1 being added to the carry flag of some previous operation. We would then pass the carry flag directly to user.
But this is only safe if the user is looking for the carry flag and not the zero flag.
So we need to only do this combine in a context where we know what flag the consumer is using.
Fixes PR34381.
Differential Revision: https://reviews.llvm.org/D37317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312285
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Sam Clegg [Thu, 31 Aug 2017 21:23:44 +0000 (21:23 +0000)]
[llvm-nm] Fix output formatting of -f sysv for 64bit targets
Differential Revision: https://reviews.llvm.org/D37347
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312284
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Matt Arsenault [Thu, 31 Aug 2017 21:17:22 +0000 (21:17 +0000)]
AMDGPU: Turn int pack pattern into build_vector
build_vector is a more useful canonical form when
pattern matching packed operations, so turn shift
into high element into a build_vector.
Should show no change for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312282
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Jessica Paquette [Thu, 31 Aug 2017 21:02:45 +0000 (21:02 +0000)]
[MachineOutliner] Recommit r312194, missed optimization remarks
Before, this commit caused a buildbot failure:
http://bb.pgr.jp/builders/test-llvm-i686-linux-RA/builds/6026/steps/test_llvm/logs/LLVM%20%3A%3A%20CodeGen__AArch64__machine-outliner-remarks.ll
This was caused by the Key value in DiagnosticInfoOptimizationBase being
deallocated before emitting the remarks defined in MachineOutliner.cpp. As of
r312277 this should no longer be an issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312280
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Sanjay Patel [Thu, 31 Aug 2017 20:59:25 +0000 (20:59 +0000)]
[x86] add more tests for horizontal ops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312279
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Zachary Turner [Thu, 31 Aug 2017 20:50:25 +0000 (20:50 +0000)]
Fix some size_t / uint32_t mismatched comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312278
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Jessica Paquette [Thu, 31 Aug 2017 20:47:37 +0000 (20:47 +0000)]
[NFC] Change Key in Argument to a std::string
Before, Key was a StringRef to avoid unnecessary copies. This commit changes
that to a std::string.
This was okay previously because when people called emit for remarks before,
they would create the remark *within* the call to emit. However, if you build
the remark up and call emit *afterward*, it's possible to end up freeing the
memory assigned to the StringRef before the call to emit.
This caused a test failure with https://reviews.llvm.org/D37085 on Linux.
Since building remarks before a call to emit is a valid use-case, it makes
sense to replace this with a std::string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312277
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Zachary Turner [Thu, 31 Aug 2017 20:43:22 +0000 (20:43 +0000)]
[llvm-pdbutil] Print detailed S_UDT stats.
This adds a new command line option, -udt-stats, which breaks
down the stats of S_UDT records. These are one of the biggest
contributors to the size of /DEBUG:FASTLINK PDBs, so they need
some additional tools to be able to analyze their usage. This
option will dig into each S_UDT record and determine what kind
of record it points to, and then break down the statistics by
the target type. The goal here is to identify how our object
files differ from MSVC object files in S_UDT records, so that
we can output fewer of them and reach size parity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312276
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