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Peter Collingbourne [Thu, 24 Nov 2016 01:13:09 +0000 (01:13 +0000)]
Object: Add IRObjectFile::getTargetTriple().
This lets us remove a use of IRObjectFile::getModule() in llvm-nm.
Differential Revision: https://reviews.llvm.org/D27074
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287846
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Peter Collingbourne [Thu, 24 Nov 2016 00:41:05 +0000 (00:41 +0000)]
Object: Simplify the IRObjectFile symbol iterator implementation.
Change the IRObjectFile symbol iterator to be a pointer into a vector of
PointerUnions representing either IR symbols or asm symbols.
This change is in preparation for a future change for supporting multiple
modules in an IRObjectFile. Although it causes an increase in memory
consumption, we can deal with that issue separately by introducing a bitcode
symbol table.
Differential Revision: https://reviews.llvm.org/D26928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287845
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Matt Arsenault [Thu, 24 Nov 2016 00:26:50 +0000 (00:26 +0000)]
AMDGPU: Preserve m0 value when spilling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287844
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Matt Arsenault [Thu, 24 Nov 2016 00:26:47 +0000 (00:26 +0000)]
TRI: Add hook to pass scavenger during frame elimination
The scavenger was not passed if requiresFrameIndexScavenging was
enabled. I need to be able to test for the availability of an
unallocatable register here, so I can't create a virtual register for
it.
It might be better to just always use the scavenger and stop
creating virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287843
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Matt Arsenault [Thu, 24 Nov 2016 00:26:44 +0000 (00:26 +0000)]
AMDGPU: Remove m0 spilling code
Since m0 isn't allocatable it should never be spilled anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287842
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Matt Arsenault [Thu, 24 Nov 2016 00:26:40 +0000 (00:26 +0000)]
AMDGPU: Make m0 unallocatable
m0 may need to be written for spill code, so
we don't want general code uses relying on the
value stored in it.
This introduces a few code quality regressions where copies
from m0 are not coalesced into copies of a copy of m0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287841
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Davide Italiano [Thu, 24 Nov 2016 00:23:09 +0000 (00:23 +0000)]
[lib/LTO] Rename few instances of Lto to LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287840
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Greg Clayton [Wed, 23 Nov 2016 23:30:37 +0000 (23:30 +0000)]
Rely on a single DWARF version instead of having two copies
This patch makes AsmPrinter less reliant on DwarfDebug by relying on the DWARF version in the AsmPrinter's MCStreamer's MCContext. This allows us to remove the redundant DWARF version from DwarfDebug. It also lets us change code that used to access the AsmPrinter's DwarfDebug just to get to the DWARF version by changing the DWARF version accessor on AsmPrinter so that it grabs the version from its MCStreamer's MCContext.
Differential Revision: https://reviews.llvm.org/D27032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287839
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Eugene Zelenko [Wed, 23 Nov 2016 23:16:32 +0000 (23:16 +0000)]
[DebugInfo] Fix some Clang-tidy modernize-use-default and Include What You Use warnings; other minor fixes (NFC).
Per Zachary Turner and Mehdi Amini suggestion to make only post-commit reviews.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287838
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Simon Pilgrim [Wed, 23 Nov 2016 22:35:06 +0000 (22:35 +0000)]
[X86][SSE] Add awareness of (v)cvtpd2dq and vcvtpd2udq implicit zeroing of upper 64-bits of xmm result
We've already added the equivalent for (v)cvttpd2dq (rL284459) and vcvttpd2udq
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287835
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Eugene Zelenko [Wed, 23 Nov 2016 22:25:16 +0000 (22:25 +0000)]
[IR] Fix some Clang-tidy modernize-use-default, modernize-use-equal-delete and Include What You Use warnings; other minor fixes (NFC).
Per Zachary Turner and Mehdi Amini suggestion to make only post-commit reviews.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287834
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Nicolai Haehnle [Wed, 23 Nov 2016 22:14:20 +0000 (22:14 +0000)]
[SelectionDAG] Early-out in TargetLowering::expandMUL (NFC)
Summary: Reduce indentation level; preparation for D24956.
Reviewers: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27063
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287831
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Simon Pilgrim [Wed, 23 Nov 2016 22:01:50 +0000 (22:01 +0000)]
[X86][AVX512VL] Add v2f64 -> v2i32/v2f32 + zero codegen tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287821
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Matt Arsenault [Wed, 23 Nov 2016 21:51:07 +0000 (21:51 +0000)]
AMDGPU: Cleanup immediate folding code
Move code down to use, reorder to avoid hard to follow
immediate folding logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287818
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Matt Arsenault [Wed, 23 Nov 2016 21:51:05 +0000 (21:51 +0000)]
AMDGPU: Fix debug printing
The uint8_t was printed as a char which didn't really work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287817
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Simon Pilgrim [Wed, 23 Nov 2016 21:19:57 +0000 (21:19 +0000)]
[X86][SSE] Add v2i64 -> v2i32 + zero codegen test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287813
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Matt Arsenault [Wed, 23 Nov 2016 21:00:12 +0000 (21:00 +0000)]
AMDGPU: Fix not setting kill flag on temp reg when spilling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287808
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Matt Arsenault [Wed, 23 Nov 2016 21:00:10 +0000 (21:00 +0000)]
AMDGPU: Fix adding extra implicit def of register
In the scalar case, there's no reason to add an additional
def of the same register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287807
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Matt Arsenault [Wed, 23 Nov 2016 20:52:53 +0000 (20:52 +0000)]
AMDGPU: Fix MMO when splitting spill
The size and offset were wrong. The size of the object was
being used for the size of the access, when here it is really
being split into 4-byte accesses. The underlying object size
is set in the MachinePointerInfo, which also didn't have the
offset set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287806
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Vedant Kumar [Wed, 23 Nov 2016 20:51:09 +0000 (20:51 +0000)]
Revert "[lit] When setting SDKROOT on Darwin, use '--sdk macosx' to find the right SDK path."
This reverts commit r287403. It breaks an internal asan bot. According
to Kuba, a fix is up for review here: https://reviews.llvm.org/D26929
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287804
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Meador Inge [Wed, 23 Nov 2016 20:17:20 +0000 (20:17 +0000)]
llvm-nm: Print correct symbol types for init and fini sections
This patch fixes a small bug where symbols defined in the INIT
and FINI sections were incorrectly getting a type of 'n'.
Differential Revision: https://reviews.llvm.org/D26937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287803
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Meador Inge [Wed, 23 Nov 2016 20:17:15 +0000 (20:17 +0000)]
llvm-nm: Don't print value or size for undefined or weak symbols
Undefined and weak symbols don't have a meaningful size or value.
As such, nothing should be printed for those attributes (this is
already done for the address with 'U') with the BSD format. This
matches what GNU nm does.
Note that for the POSIX.2 format [1] zero values are still
printed for the size and value. This seems in spirit with
the format strings in that specification, but is debatable.
[1] http://pubs.opengroup.org/onlinepubs/
9699919799/
Differential Revision: https://reviews.llvm.org/D26936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287802
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Alexey Bataev [Wed, 23 Nov 2016 20:10:32 +0000 (20:10 +0000)]
[SLP] Add more tests for SLP Vectorizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287801
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Haicheng Wu [Wed, 23 Nov 2016 19:39:26 +0000 (19:39 +0000)]
[LoopUnroll] Move code to exit early. NFC.
Just to save some compilation time.
Differential Revision: https://reviews.llvm.org/D26784
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287800
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Daniel Berlin [Wed, 23 Nov 2016 19:03:54 +0000 (19:03 +0000)]
Revert "[Triple] Add Facebook vendor"
This reverts commit r287684
Objections on the review thread had not been addressed to
prior to commit. I asked the committer to revert, but i expect they
are gone for the US holiday or something.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287798
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Michael Kuperstein [Wed, 23 Nov 2016 18:33:49 +0000 (18:33 +0000)]
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
We did not support subregs in InlineSpiller:foldMemoryOperand() because targets
may not deal with them correctly.
This adds a target hook to let the spiller know that a target can handle
subregs, and actually enables it for x86 for the case of stack slot reloads.
This fixes PR30832.
Differential Revision: https://reviews.llvm.org/D26521
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287792
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Hemant Kulkarni [Wed, 23 Nov 2016 18:04:23 +0000 (18:04 +0000)]
llvm-readobj: Use hash tables to print dynamic symbols.
-symbols prints both .symtab and .dynsym symbols for GNU style in ELF.
-dyn-symbols prints symbols looking up through hash tables. This helps validate hash tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287786
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Chandler Carruth [Wed, 23 Nov 2016 17:53:26 +0000 (17:53 +0000)]
[PM] Change the static object whose address is used to uniquely identify
analyses to have a common type which is enforced rather than using
a char object and a `void *` type when used as an identifier.
This has a number of advantages. First, it at least helps some of the
confusion raised in Justin Lebar's code review of why `void *` was being
used everywhere by having a stronger type that connects to documentation
about this.
However, perhaps more importantly, it addresses a serious issue where
the alignment of these pointer-like identifiers was unknown. This made
it hard to use them in pointer-like data structures. We were already
dodging this in dangerous ways to create the "all analyses" entry. In
a subsequent patch I attempted to use these with TinyPtrVector and
things fell apart in a very bad way.
And it isn't just a compile time or type system issue. Worse than that,
the actual alignment of these pointer-like opaque identifiers wasn't
guaranteed to be a useful alignment as they were just characters.
This change introduces a type to use as the "key" object whose address
forms the opaque identifier. This both forces the objects to have proper
alignment, and provides type checking that we get it right everywhere.
It also makes the types somewhat less mysterious than `void *`.
We could go one step further and introduce a truly opaque pointer-like
type to return from the `ID()` static function rather than returning
`AnalysisKey *`, but that didn't seem to be a clear win so this is just
the initial change to get to a reliably typed and aligned object serving
is a key for all the analyses.
Thanks to Richard Smith and Justin Lebar for helping pick plausible
names and avoid making this refactoring many times. =] And thanks to
Sean for the super fast review!
While here, I've tried to move away from the "PassID" nomenclature
entirely as it wasn't really helping and is overloaded with old pass
manager constructs. Now we have IDs for analyses, and key objects whose
address can be used as IDs. Where possible and clear I've shortened this
to just "ID". In a few places I kept "AnalysisID" to make it clear what
was being identified.
Differential Revision: https://reviews.llvm.org/D27031
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287783
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Alina Sbirlea [Wed, 23 Nov 2016 17:43:15 +0000 (17:43 +0000)]
[LoadStoreVectorizer] Enable vectorization of stores in the presence of an aliasing load
Summary:
The "getVectorizablePrefix" method would give up if it found an aliasing load for a store chain.
In practice, the aliasing load can be treated as a memory barrier and all stores that precede it
are a valid vectorizable prefix.
Issue found by volkan in D26962. Testcase is a pruned version of the one in the original patch.
Reviewers: jlebar, arsenm, tstellarAMD
Subscribers: mzolotukhin, wdng, nhaehnle, anna, volkan, llvm-commits
Differential Revision: https://reviews.llvm.org/D27008
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287781
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Nirav Dave [Wed, 23 Nov 2016 16:48:35 +0000 (16:48 +0000)]
[DAG] Improve loads-from-store forwarding to handle TokenFactor
Forward store values to matching loads down through token
factors. Factored from D14834.
Reviewers: jyknight, hfinkel
Subscribers: hfinkel, nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D26080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287773
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Yichao Yu [Wed, 23 Nov 2016 16:25:31 +0000 (16:25 +0000)]
Fix doc of `llvm.bitreverse.iN`
Summary:
The return type is `iN` rather than always `i16`
Seems to be a typo in https://reviews.llvm.org/rL252878 .
Reviewers: jmolloy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287769
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John Brawn [Wed, 23 Nov 2016 16:05:51 +0000 (16:05 +0000)]
[DAGCombiner] Fix infinite loop in vector mul/shl combining
We have the following DAGCombiner transformations:
(mul (shl X, c1), c2) -> (mul X, c2 << c1)
(mul (shl X, C), Y) -> (shl (mul X, Y), C)
(shl (mul x, c1), c2) -> (mul x, c1 << c2)
Usually the constant shift is optimised by SelectionDAG::getNode when it is
constructed, by SelectionDAG::FoldConstantArithmetic, but when we're dealing
with vectors and one of those vector constants contains an undef element
FoldConstantArithmetic does not fold and we enter an infinite loop.
Fix this by making FoldConstantArithmetic use getNode to decide how to fold each
vector element, the same as FoldConstantVectorArithmetic does, and rather than
adding the constant shift to the work list instead only apply the transformation
if it's already been folded into a constant, as if it's not we're going to loop
endlessly. Additionally add missing NoOpaques to one of those transformations,
which I noticed when writing the tests for this.
Differential Revision: https://reviews.llvm.org/D26605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287766
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Nemanja Ivanovic [Wed, 23 Nov 2016 15:51:52 +0000 (15:51 +0000)]
[PowerPC] Remove InstAlias definitions that cause incorrect assembly
In rL283190, I added some InstAlias definitions to generate extended mnemonics
for some uses of the XXPERMDI instruction. However, when the assembler matches
these extended mnemonics, it matches the new instruction in situations where it
should match the old one.
This patch removes these definitions and accomplishes that by defining these
mnemonics with additional instructions that are isCodeGenOnly.
Fixes PR31127.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287765
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Simon Pilgrim [Wed, 23 Nov 2016 14:01:18 +0000 (14:01 +0000)]
[X86][AVX512] Add support for v4i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets
Use 512-bit instructions with subvector insertion/extraction like we do in a number of similar circumstances
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287762
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Elena Demikhovsky [Wed, 23 Nov 2016 13:58:24 +0000 (13:58 +0000)]
Type legalization for compressstore and expandload intrinsics.
Implemented widening (v2f32) and splitting (v16f64).
On splitting, I use "popcnt" to calculate memory increment.
More type legalization work will come in the next patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287761
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Simon Pilgrim [Wed, 23 Nov 2016 13:42:09 +0000 (13:42 +0000)]
[CostModel][X86] Add missing AVX512DQ v8i64 fptosi/sitofp costs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287760
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Benjamin Kramer [Wed, 23 Nov 2016 11:49:28 +0000 (11:49 +0000)]
[MD5] Use write32le instead of spelling it out with shifts.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287757
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Simon Pilgrim [Wed, 23 Nov 2016 11:43:00 +0000 (11:43 +0000)]
[CostModel][X86] Add v2f32 -> v2i64 fptosi/fptoui cost tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287756
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Craig Topper [Wed, 23 Nov 2016 06:54:55 +0000 (06:54 +0000)]
[AVX-512] Remove intrinsics for valignd/q and autoupgrade them to native shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287744
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Zvi Rackover [Wed, 23 Nov 2016 06:45:25 +0000 (06:45 +0000)]
[X86] Simplify lowerVectorShuffleAsBitMask to handle only integer VT's
Summary: This function is only called with integer VT arguments, so remove code that handles FP vectors.
Reviewers: RKSimon, craig.topper, delena, andreadb
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287743
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Rui Ueyama [Wed, 23 Nov 2016 03:58:12 +0000 (03:58 +0000)]
Fix builbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287735
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Kuba Mracek [Wed, 23 Nov 2016 02:07:04 +0000 (02:07 +0000)]
[xray] Add XRay support for Mach-O in CodeGen
Currently, XRay only supports emitting the XRay table (xray_instr_map) on ELF binaries. Let's add Mach-O support.
Differential Revision: https://reviews.llvm.org/D26983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287734
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Davide Italiano [Wed, 23 Nov 2016 01:42:39 +0000 (01:42 +0000)]
[SCCP] Add a test for switches on undef.
Without this test, you can just remove the code fixing the
switch to the first constant in ResolvedUndefs in and everything
pass. This test, instead, fails with an assertion if the code
is removed. Found while refactoring SCCP to integrate undef in
the solver.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287731
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Rui Ueyama [Wed, 23 Nov 2016 00:46:09 +0000 (00:46 +0000)]
Add convenient functions to compute hashes of byte vectors.
In many sitautions, you just want to compute a hash for one chunk
of data. This patch adds convenient functions for that purpose.
Differential Revision: https://reviews.llvm.org/D26988
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287726
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Eugene Zelenko [Wed, 23 Nov 2016 00:30:24 +0000 (00:30 +0000)]
[ADT] Fix some Clang-tidy modernize-use-default and Include What You Use warnings; other minor fixes.
Differential revision: https://reviews.llvm.org/D27001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287725
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Zachary Turner [Wed, 23 Nov 2016 00:27:23 +0000 (00:27 +0000)]
Make STL range adapter naming consistent.
Differential Revision: https://reviews.llvm.org/D27009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287724
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Zachary Turner [Tue, 22 Nov 2016 23:22:19 +0000 (23:22 +0000)]
Add some searching functions for ArrayRef<T>.
Differential Revision: https://reviews.llvm.org/D26999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287722
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Justin Lebar [Tue, 22 Nov 2016 23:14:11 +0000 (23:14 +0000)]
[StructurizeCFG] Refactor OrderNodes.
Summary:
No need to copy the RPOT vector before using it. Switch from std::map
to SmallDenseMap. Get rid of an unused variable (TempVisited). Get rid
of a typedef, RNVector, which is now used only once.
Differential Revision: https://reviews.llvm.org/D26997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287721
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Justin Lebar [Tue, 22 Nov 2016 23:14:07 +0000 (23:14 +0000)]
[StructurizeCFG] Add whitespace in getAnalysisUsage.
Summary:
"addRequired" and "addPreserved" look very similar when squished up next
to each other -- without the newline this code looked to me like it was
addRequired'ing DominatorTreeWrapperPass twice.
Reviewers: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26996
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287720
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Justin Lebar [Tue, 22 Nov 2016 23:13:49 +0000 (23:13 +0000)]
[StructurizeCFG] Remove unnecessary "using" in class.
Reviewers: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287719
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Justin Lebar [Tue, 22 Nov 2016 23:13:44 +0000 (23:13 +0000)]
[StructurizeCFG] Merge the two constructors into one.
Reviewers: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26994
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287718
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Justin Lebar [Tue, 22 Nov 2016 23:13:37 +0000 (23:13 +0000)]
[StructurizeCFG] Use a for-each loop instead of iterators in runOnRegion.
Summary:
Reviewers: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26993
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287717
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Justin Lebar [Tue, 22 Nov 2016 23:13:33 +0000 (23:13 +0000)]
[StructurizeCFG] Make hasOnlyUniformBranches a non-member function.
Summary: Lets us get rid of one member variable too.
Reviewers: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287716
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Justin Lebar [Tue, 22 Nov 2016 23:13:29 +0000 (23:13 +0000)]
[CUDA] Note in docs that you need to build with -lcudart on MacOS
-lcudart_static doesn't work. We don't know why.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287715
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Sanjay Patel [Tue, 22 Nov 2016 22:54:36 +0000 (22:54 +0000)]
add and use isBitwiseLogicOp() helper function; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287712
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Dehao Chen [Tue, 22 Nov 2016 22:50:01 +0000 (22:50 +0000)]
Before sample pgo annotation, do not inline a function that has no debug info. (NFC)
If there is no debug info in the callee, inlining it will not help annotator. This avoids infinite loop as reported in PR/31119.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287710
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Davide Italiano [Tue, 22 Nov 2016 22:11:25 +0000 (22:11 +0000)]
[SCCP] Remove code in visitBinaryOperator (and add tests).
We visit and/or, we try to derive a lattice value for the
instruction even if one of the operands is overdefined.
If the non-overdefined value is still 'unknown' just return and wait
for ResolvedUndefsIn to "plug in" the correct value. This simplifies
the logic a bit. While I'm here add tests for missing cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287709
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Matthias Braun [Tue, 22 Nov 2016 22:09:03 +0000 (22:09 +0000)]
TargetSubtargetInfo: Move implementation to lib/CodeGen; NFC
TargetSubtargetInfo is filled with CodeGen specific interfaces nowadays
(getInstrInfo(), getFrameLowering(), getSelectionDAGInfo()) most of the
tuning flags like enablePostRAScheduler(), getAntiDepBreakMode(),
enableRALocalReassignment(), ... also do not seem to be universal enough
to make sense outside of CodeGen.
Differential Revision: https://reviews.llvm.org/D26948
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287708
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Sanjay Patel [Tue, 22 Nov 2016 22:05:48 +0000 (22:05 +0000)]
[InstCombine] change bitwise logic type to eliminate bitcasts
In PR27925:
https://llvm.org/bugs/show_bug.cgi?id=27925
...we proposed adding this fold to eliminate a bitcast. In D20774, there was
some concern about changing the type of a bitwise op as well as creating
bitcasts that might not be free for a target. However, if we're strictly
eliminating an instruction (by limiting this to one-use ops), then we should
be able to do this in InstCombine.
But we're cautiously restricting the transform for now to vector types to
avoid possible backend problems. A transform to make sure the logic op is
legal for the target should be added to reverse this transform and improve
codegen.
Differential Revision: https://reviews.llvm.org/D26641
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287707
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Simon Pilgrim [Tue, 22 Nov 2016 22:04:50 +0000 (22:04 +0000)]
[X86][AVX512DQ] Add fp <-> int tests for AVX512DQ/AVX512DQ+VL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287706
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Chandler Carruth [Tue, 22 Nov 2016 21:40:10 +0000 (21:40 +0000)]
[LCG] Add a previously missing assert about the relationship of RefSCCs.
No intended change, everything seems to be in working order already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287705
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Peter Collingbourne [Tue, 22 Nov 2016 21:25:30 +0000 (21:25 +0000)]
LTO: Remove a now-unused InputFile accessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287702
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Vyacheslav Klochkov [Tue, 22 Nov 2016 20:52:53 +0000 (20:52 +0000)]
Fixed the lost FastMathFlags in GVN(Global Value Numbering).
Reviewer: Hal Finkel.
Differential Revision: https://reviews.llvm.org/D26952
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287700
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Chandler Carruth [Tue, 22 Nov 2016 20:35:32 +0000 (20:35 +0000)]
[LCG] Start using SCC relationship predicates in the unittest.
This mostly gives us nice unittesting of the predicates themselves. I'll
start using them further in subsequent commits to help test the actual
operations performed on the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287698
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Rui Ueyama [Tue, 22 Nov 2016 20:32:22 +0000 (20:32 +0000)]
Remove PDBFileBuilder::build() and related functions.
PDBFileBuilder supports two different ways to create files.
One is PDBFileBuilder::commit. That function takes a filename
and write a result to the file. The other is PDBFileBuilder::build.
That returns a new PDBFile object.
This patch removes the latter because no one is using it and
in a real life situation we are very unlikely to need it.
Even if you need it, it'd be easy to write a new PDB to a memory
buffer and read it back.
Removing PDBFileBuilder::build enables us to remove other classes
build transitively.
Differential Revision: https://reviews.llvm.org/D26987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287697
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Vyacheslav Klochkov [Tue, 22 Nov 2016 20:23:04 +0000 (20:23 +0000)]
Fixed the lost FastMathFlags in Reassociate optimization.
Reviewer: Hal Finkel.
Differential Revision: https://reviews.llvm.org/D26957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287695
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Paul Robinson [Tue, 22 Nov 2016 19:46:51 +0000 (19:46 +0000)]
Restructure DwarfDebug::beginInstruction(). [NFC]
Will help a pending patch.
Differential Revision: http://reviews.llvm.org/D26982
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287686
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Shoaib Meenai [Tue, 22 Nov 2016 19:36:26 +0000 (19:36 +0000)]
[Triple] Add Facebook vendor
Add a compiler vendor for Facebook, to enable future vendor-specific
behavior.
Differential Revision: https://reviews.llvm.org/D25136
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287684
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Chandler Carruth [Tue, 22 Nov 2016 19:23:31 +0000 (19:23 +0000)]
[LCG] Add utilities to compute parent and ascestor relationships between
SCCs.
These will be fairly expensive routines to call and might be abused in
real code, but are quite useful when debugging or in asserts and are
reasonable and well formed properties to query.
I've used one of them in an assert that was requested in a code review
here. In subsequent commits I'll start using these routines more
heavily, for example in unittests etc. But this at least gets the
groundwork in place.
Differential Revision: https://reviews.llvm.org/D25506
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287682
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Simon Dardis [Tue, 22 Nov 2016 19:17:23 +0000 (19:17 +0000)]
[mips] seb, seh instruction aliases
Add the single operand form.
Reviewers: vkalintiris
Differential Revision: https://reviews.llvm.org/D26961
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287681
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Andrew Kaylor [Tue, 22 Nov 2016 19:16:04 +0000 (19:16 +0000)]
Add IntrInaccessibleMemOnly property for intrinsics
Differential Revision: https://reviews.llvm.org/D26485
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287680
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Nemanja Ivanovic [Tue, 22 Nov 2016 19:02:07 +0000 (19:02 +0000)]
[PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LE
This patch corresponds to review:
https://reviews.llvm.org/D26861
It also fixes PR30730.
Committing on behalf of Lei Huang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287679
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Simon Pilgrim [Tue, 22 Nov 2016 18:55:49 +0000 (18:55 +0000)]
[CostModel][X86] Updated sitofp/uitofp scalar/vector cost tests
Better coverage of all legal types + special cases.
Removed old fptoui tests which are all handled in fptoui.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287678
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Simon Pilgrim [Tue, 22 Nov 2016 17:50:06 +0000 (17:50 +0000)]
[X86][SSE] Combine UNPCKL(FHADD,FHADD) -> FHADD for v2f64 shuffles.
This occurs during UINT_TO_FP v2f64 lowering.
We can easily generalize this to other horizontal ops (FHSUB, PACKSS, PACKUS) as required - we are doing something similar with PACKUS in lowerV2I64VectorShuffle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287676
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Vasileios Kalintiris [Tue, 22 Nov 2016 16:43:49 +0000 (16:43 +0000)]
[mips] Add support for unaligned load/store macros.
Add missing unaligned store macros (ush/usw) and fix the exisiting
implementation of the unaligned load macros in order to generate
identical expansions with the GNU assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287646
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Tim Northover [Tue, 22 Nov 2016 16:17:20 +0000 (16:17 +0000)]
CodeGen: simplify TargetMachine::getSymbol interface. NFC.
No-one actually had a mangler handy when calling this function, and
getSymbol itself went most of the way towards getting its own mangler
(with a local TLOF variable) so forcing all callers to supply one was
just extra complication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287645
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Zvi Rackover [Tue, 22 Nov 2016 15:33:28 +0000 (15:33 +0000)]
[X86] Change lowerBuildVectorToBitOp() to take a BuildVectorSDNode. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287644
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Zvi Rackover [Tue, 22 Nov 2016 15:17:52 +0000 (15:17 +0000)]
[X86] Remove dead code from LowerVectorBroadcast
Summary: Splat vectors are canonicalized to BUILD_VECTOR's so the code can be simplified. NFC-ish.
Reviewers: craig.topper, delena, RKSimon, andreadb
Subscribers: RKSimon, llvm-commits
Differential Revision: https://reviews.llvm.org/D26678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287643
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Chad Rosier [Tue, 22 Nov 2016 14:25:02 +0000 (14:25 +0000)]
[AArch64] Set the max interleave factor for Falkor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287642
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Chad Rosier [Tue, 22 Nov 2016 14:12:09 +0000 (14:12 +0000)]
[AArch64] Maximize 80-column. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287640
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Simon Pilgrim [Tue, 22 Nov 2016 13:27:29 +0000 (13:27 +0000)]
Fix line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287638
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Benjamin Kramer [Tue, 22 Nov 2016 13:13:33 +0000 (13:13 +0000)]
[wasm] hack around test failure after r287553.
This test is very brittle as small changes to block layout break the
check patterns. Hack around a change one more time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287637
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Simon Pilgrim [Tue, 22 Nov 2016 11:29:19 +0000 (11:29 +0000)]
[SelectionDAG] ComputeNumSignBits of TRUNCATE operations
Add basic ComputeNumSignBits support for TRUNCATE ops for cases where the source's number of sign bits overlaps with the truncated size.
Improves X86 SIGN_EXTEND_IN_REG vector cases which were needlessly sign extending boolean vector results.
Differential Revision: https://reviews.llvm.org/D26851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287635
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Coby Tayree [Tue, 22 Nov 2016 09:30:29 +0000 (09:30 +0000)]
[AVX512][inline-asm] Fix AVX512 inline assembly instruction resolution when the size qualifier of a memory operand is not specified explicitly.
This commit handles cases where the size qualifier of an indirect memory reference operand in Intel syntax is missing (e.g. "vaddps xmm1, xmm2, [a]").
GCC will deduce the size qualifier for AVX512 vector and broadcast memory operands based on the possible matches:
"vaddps xmm1, xmm2, [a]" matches only “XMMWORD PTR” qualifier.
"vaddps xmm1, xmm2, [a]{1to4}" matches only “DWORD PTR” qualifier.
This is different from the current behavior of LLVM, which deduces the size qualifier based on the size of the memory operand.
For "vaddps xmm1, xmm2, [a]"
"char a;" will imply "BYTE PTR" qualifier
"short a;" will imply "WORD PTR" qualifier.
This commit aligns LLVM to GCC’s behavior.
This is the LLVM part of the review.
The Clang part of the review: https://reviews.llvm.org/D26587
Differential Revision: https://reviews.llvm.org/D26586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287630
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Adam Nemet [Tue, 22 Nov 2016 07:35:14 +0000 (07:35 +0000)]
Rename option to -lto-pass-remarks-output
The new option -pass-remarks-output broke LLVM_LINK_LLVM_DYLIB because
of the duplicate option name with opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287627
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Craig Topper [Tue, 22 Nov 2016 07:00:06 +0000 (07:00 +0000)]
[TableGen][ISel] When factoring ScopeMatcher, if the child of the ScopeMatcher we're working on is also a ScopeMatcher, merge all its children into the one we're working on.
There were several cases in X86 where we were unable to fully factor a ScopeMatcher but created nested ScopeMatchers for some portions of it. Then we created a SwitchType that split it up and further factored it so that we ended up with something like this:
SwitchType
Scope
Scope
Sequence of matchers
Some other sequence of matchers
EndScope
Another sequence of matchers
EndScope
...Next type
This change turns it into this:
SwitchType
Scope
Sequence of matchers
Some other sequence of matchers
Another sequence of matchers
EndScope
...Next type
Several other in-tree targets had similar nested scopes like this. Overall this doesn't save many bytes, but makes the isel output a little more regular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287624
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Craig Topper [Tue, 22 Nov 2016 05:31:43 +0000 (05:31 +0000)]
[X86] Remove alternate CodeGenOnly version of (v)movq that declared the load size as i128mem. Change all uses to the use the i64mem version.
I'm sure this caused the load size to misprint in Intel syntax output. We were also inconsistent about which patterns used which instruction between VEX and EVEX.
There are two different reg/reg versions of movq, one from a GPR and one from the lower 64-bits of an XMM register. This changes the loading folding table to use the single i64mem memory form for folding both cases. But we need to use TB_NO_REVERSE to prevent a duplicate entry in the unfolding table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287622
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Craig Topper [Tue, 22 Nov 2016 04:57:34 +0000 (04:57 +0000)]
[AVX-512] Add support for commuting VPERMT2(B/W/D/Q/PS/PD) to/from VPERMI2(B/W/D/Q/PS/PD).
Summary:
The index and one of the table operands can be swapped by changing the opcode to the other version. Neither of these operands are the one that can load from memory so this can't be used to increase memory folding opportunities.
We need to handle the unmasked forms and the kz forms. Since the load operand isn't being commuted we can commute the load and broadcast instructions too.
Reviewers: igorb, delena, Ayal, Farhana, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D25652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287621
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Saleem Abdulrasool [Tue, 22 Nov 2016 04:32:54 +0000 (04:32 +0000)]
MC: ensure that we have a section before accessing it
We would attempt to access the symbol section without ensuring that the symbol
was not absolute. When the assembler referenced relocation is not evaluated to
the absolute, but when we record the relocation, we would query the section.
Because the symbol is absolute, it does not have a section associated with it,
triggering an assertion. Just be more careful about the access of the section.
Addresses PR31064!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287619
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Craig Topper [Tue, 22 Nov 2016 03:51:53 +0000 (03:51 +0000)]
[AVX-512] Add support for changing the element size of PALIGNR/VALIGND/VALIGNQ shuffles if they feed a vselect with a different type
Summary:
Shuffle lowering widens the element size of a shuffle if elements are contiguous. This is sometimes help because wider element types have more shuffle options. If the shuffle is one of the arguments to a vselect this shuffle widening can introduce a bitcast between the vselect and the shuffle. This will prevent isel from selecting a masked operation. If the shuffle can be written equally efficiently with a different element size to match the vselect type we should change the shuffle type to allow masking.
This patch does this conversion for all VALIGND/VALIGNQ sizes. It also supports turning 128-bit PALIGNR into VALIGND/VALIGNQ. This fixes the case shown in PR31018.
I plan to add support for more operations in future patches.
Reviewers: RKSimon, zvi, delena
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287612
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Peter Collingbourne [Tue, 22 Nov 2016 03:38:40 +0000 (03:38 +0000)]
Object: Make SymbolicFile::symbol_{begin,end}() virtual and remove unnecessary wrappers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287611
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Chandler Carruth [Tue, 22 Nov 2016 03:27:43 +0000 (03:27 +0000)]
[ADT] Add initializer list support to SmallPtrSet so that sets can be
easily initialized with some initial values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287610
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Stanislav Mekhanoshin [Tue, 22 Nov 2016 01:42:34 +0000 (01:42 +0000)]
[AMDGPU] Fix multiple vreg definitions in si-lower-control-flow
Differential Revision: https://reviews.llvm.org/D26939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287608
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Peter Collingbourne [Tue, 22 Nov 2016 01:03:40 +0000 (01:03 +0000)]
Analysis: gep inbounds (gep inbounds (...)) is inbounds.
Differential Revision: https://reviews.llvm.org/D26441
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287604
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Zachary Turner [Mon, 21 Nov 2016 23:17:15 +0000 (23:17 +0000)]
Remove LLVM_NODISCARD in one more place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287596
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Zachary Turner [Mon, 21 Nov 2016 23:02:28 +0000 (23:02 +0000)]
Remove LLVM_NODISCARD from two more StringRef members.
This should be everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287594
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Matt Arsenault [Mon, 21 Nov 2016 22:56:42 +0000 (22:56 +0000)]
DAG: Ignore call site attributes when emitting target intrinsic
A target intrinsic may be defined as possibly reading memory,
but the call site may have additional knowledge that it doesn't read
memory. The intrinsic lowering will expect the pessimistic
assumption of the intrinsic definition, so the chain should
still be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287593
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Geoff Berry [Mon, 21 Nov 2016 22:51:10 +0000 (22:51 +0000)]
[AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a clobber.
Summary:
When searching for load/store instructions to pair/merge don't treat
writes to WZR/XZR as clobbers since they don't change the value read
from WZR/XZR (which is always 0).
Reviewers: mcrosier, junbuml, jmolloy, t.p.northover
Subscribers: aemerson, llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D26921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287592
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Justin Lebar [Mon, 21 Nov 2016 22:49:15 +0000 (22:49 +0000)]
[CodeGenPrepare] Don't sink non-cheap addrspacecasts.
Summary:
Previously, CGP would unconditionally sink addrspacecast instructions,
even going so far as to sink them into a loop.
Now we check that the cast is "cheap", as defined by TLI.
We introduce a new "is-cheap" function to TLI rather than using
isNopAddrSpaceCast because some GPU platforms want the ability to ask
for non-nop casts to be sunk.
Reviewers: arsenm, tra
Subscribers: jholewinski, wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26923
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287591
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Justin Lebar [Mon, 21 Nov 2016 22:49:11 +0000 (22:49 +0000)]
[CodeGenPrepare] Rewrite a loop in terms of llvm::none_of. NFC.
Reviewers: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26924
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287590
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