OSDN Git Service
Mircea Trofin [Thu, 24 Jan 2019 00:10:25 +0000 (00:10 +0000)]
[llvm] Clarify responsiblity of some of DILocation discriminator APIs
Summary:
Renamed setBaseDiscriminator to cloneWithBaseDiscriminator, to match
similar APIs. Also changed its behavior to copy over the other
discriminator components, instead of eliding them.
Renamed cloneWithDuplicationFactor to
cloneByMultiplyingDuplicationFactor, which more closely matches what
this API does.
Reviewers: dblaikie, wmi
Reviewed By: dblaikie
Subscribers: zzheng, llvm-commits
Differential Revision: https://reviews.llvm.org/D56220
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351996
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Wed, 23 Jan 2019 22:59:52 +0000 (22:59 +0000)]
[ADT] Notify ilist traits about in-list transfers
Summary:
Previously no client of ilist traits has needed to know about transfers
of nodes within the same list, so as an optimization, ilist doesn't call
transferNodesFromList in that case. However, now there are clients that
want to use ilist traits to cache instruction ordering information to
optimize dominance queries of instructions in the same basic block.
This change updates the existing ilist traits users to detect in-list
transfers and do nothing in that case.
After this change, we can start caching instruction ordering information
in LLVM IR data structures. There are two main ways to do that:
- by putting an order integer into the Instruction class
- by maintaining order integers in a hash table on BasicBlock
I plan to implement and measure both, but I wanted to commit this change
first to enable other out of tree ilist clients to implement this
optimization as well.
Reviewers: lattner, hfinkel, chandlerc
Subscribers: hiraditya, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D57120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351992
91177308-0d34-0410-b5e6-
96231b3b80d8
Hideki Saito [Wed, 23 Jan 2019 22:43:12 +0000 (22:43 +0000)]
[LV][VPlan] Change to implement VPlan based predication for
VPlan-native path
Context: Patch Series #2 for outer loop vectorization support in LV
using VPlan. (RFC:
http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).
Patch series #2 checks that inner loops are still trivially lock-step
among all vector elements. Non-loop branches are blindly assumed as
divergent.
Changes here implement VPlan based predication algorithm to compute
predicates for blocks that need predication. Predicates are computed
for the VPLoop region in reverse post order. A block's predicate is
computed as OR of the masks of all incoming edges. The mask for an
incoming edge is computed as AND of predecessor block's predicate and
either predecessor's Condition bit or NOT(Condition bit) depending on
whether the edge from predecessor block to the current block is true
or false edge.
Reviewers: fhahn, rengolin, hsaito, dcaballe
Reviewed By: fhahn
Patch by Satish Guggilla, thanks!
Differential Revision: https://reviews.llvm.org/D53349
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351990
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 23 Jan 2019 22:39:11 +0000 (22:39 +0000)]
hwasan: Read shadow address from ifunc if we don't need a frame record.
This saves a cbz+cold call in the interceptor ABI, as well as a realign
in both ABIs, trading off a dcache entry against some branch predictor
entries and some code size.
Unfortunately the functionality is hidden behind a flag because ifunc is
known to be broken on static binaries on Android.
Differential Revision: https://reviews.llvm.org/D57084
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351989
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Atanasyan [Wed, 23 Jan 2019 22:02:53 +0000 (22:02 +0000)]
[mips] Handle MipsMCExpr sub-expression for the MEK_DTPREL tag
This is a fix for a regression introduced by the rL348194 commit. In
that change new type (MEK_DTPREL) of MipsMCExpr expression was added,
but in some places of the code this type of expression considered as
unexpected.
This change fixes the bug. The MEK_DTPREL type of expression is used for
marking TLS DIEExpr only and contains a regular sub-expression. Where we
need to handle the expression, we retrieve the sub-expression and
handle it in a common way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351987
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Wed, 23 Jan 2019 21:10:48 +0000 (21:10 +0000)]
Revert r351938 "[ARM] Alter the register allocation order for minsize on Thumb2"
This change caused fatal backend errors when compiling a file in libvpx
for Android.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351979
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Wed, 23 Jan 2019 18:59:54 +0000 (18:59 +0000)]
[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target.
Enable full support for the debug info.
Differential revision: https://reviews.llvm.org/D46189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351974
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Wed, 23 Jan 2019 18:48:36 +0000 (18:48 +0000)]
Revert "[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target."
This reverts commit r351972. Some pieces of the patch was not applied
correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351973
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Wed, 23 Jan 2019 18:28:59 +0000 (18:28 +0000)]
[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target.
Enable full support for the debug info. Recommit to fix the emission of
the not required closing brace.
Differential revision: https://reviews.llvm.org/D46189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351972
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Wed, 23 Jan 2019 18:25:49 +0000 (18:25 +0000)]
[X86] Autogenerate complete checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351970
91177308-0d34-0410-b5e6-
96231b3b80d8
James Henderson [Wed, 23 Jan 2019 17:27:48 +0000 (17:27 +0000)]
[llvm-symbolizer] Improve compatibility of --functions with GNU addr2line
This fixes https://bugs.llvm.org/show_bug.cgi?id=40072.
GNU addr2line's --functions switch is off by default, has a short alias
of -f, and does not take an argument. This patch changes llvm-symbolizer
to allow the second and third point (changing the default behaviour may
have negative impacts on users). If the option is missing a value, it
now treats it as "linkage".
This change does cause one previously valid command-line to behave
differently. Before --functions <value> was accepted, but now only
--functions=<value> is allowed (as well as --functions). The old
behaviour will result in the value being treated as a positional
argument.
The previous testing for --functions=short has been pulled out into a
new test that also tests the other accepted values and option formats.
Reviewed by: ruiu
Differential Revision: https://reviews.llvm.org/D57049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351968
91177308-0d34-0410-b5e6-
96231b3b80d8
Haojian Wu [Wed, 23 Jan 2019 16:39:57 +0000 (16:39 +0000)]
Revert "[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target."
This reverts commit r351846.
This patch may generate illegal assembly code, see
```
$ ./bin/clang -cc1 -triple nvptx64-nvidia-cuda -aux-triple x86_64-grtev4-linux-gnu -S -disable-free -disable-llvm-verifier -discard-value-names -main-file-name new.cc -mrelocation-model pic -pic-level 2 -mthread-model posix -fmerge-all-constants -mdisable-fp-elim -relaxed-aliasing -no-integrated-as -mpie-copy-relocations -munwind-tables -fcuda-is-device -target-feature +ptx60 -target-cpu sm_35 -dwarf-column-info -debug-info-kind=line-directives-only -dwarf-version=2 -debugger-tuning=gdb -o empty.s -x cuda empty.cc
$ cat empty.s
//
// Generated by LLVM NVPTX Back-End
//
.version 6.0
.target sm_35
.address_size 64
}
```
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351966
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Wed, 23 Jan 2019 16:35:07 +0000 (16:35 +0000)]
[MC][X86] Correctly model additional operand latency caused by transfer delays from the integer to the floating point unit.
This patch adds a new ReadAdvance definition named ReadInt2Fpu.
ReadInt2Fpu allows x86 scheduling models to accurately describe delays caused by
data transfers from the integer unit to the floating point unit.
ReadInt2Fpu currently defaults to a delay of zero cycles (i.e. no delay) for all
x86 models excluding BtVer2. That means, this patch is only a functional change
for the Jaguar cpu model only.
Tablegen definitions for instructions (V)PINSR* have been updated to account for
the new ReadInt2Fpu. That read is mapped to the the GPR input operand.
On Jaguar, int-to-fpu transfers are modeled as a +6cy delay. Before this patch,
that extra delay was added to the opcode latency. In practice, the insert opcode
only executes for 1cy. Most of the actual latency is actually contributed by the
so-called operand-latency. According to the AMD SOG for family 16h, (V)PINSR*
latency is defined by expression f+1, where f is defined as a forwarding delay
from the integer unit to the fpu.
When printing instruction latency from MCA (see InstructionInfoView.cpp) and LLC
(only when flag -print-schedule is speified), we now need to account for any
extra forwarding delays. We do this by checking if scheduling classes declare
any negative ReadAdvance entries. Quoting a code comment in TargetSchedule.td:
"A negative advance effectively increases latency, which may be used for
cross-domain stalls". When computing the instruction latency for the purpose of
our scheduling tests, we now add any extra delay to the formula. This avoids
regressing existing codegen and mca schedule tests. It comes with the cost of an
extra (but very simple) hook in MCSchedModel.
Differential Revision: https://reviews.llvm.org/D57056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351965
91177308-0d34-0410-b5e6-
96231b3b80d8
James Henderson [Wed, 23 Jan 2019 16:15:39 +0000 (16:15 +0000)]
[llvm-readelf] Don't suppress static symbol table with --dyn-symbols + --symbols
In r287786, a bug was introduced into llvm-readelf where it didn't print
the static symbol table if both --symbols and --dyn-symbols were
specified, even if there was no dynamic symbol table. This is obviously
incorrect.
This patch fixes this issue, by delegating the decision of which symbol
tables should be printed to the final dumper, rather than trying to
decide in the command-line option handling layer. The decision was made
to follow the approach taken in this patch because the LLVM style dumper
uses a different order to the original GNU style behaviour (and GNU
readelf) for ELF output. Other approaches resulted in behaviour changes
for other dumpers which felt wrong. In particular, I wanted to avoid
changing the order of the output for --symbols --dyn-symbols for LLVM
style, keep what is emitted by --symbols unchanged for all dumpers, and
avoid having different orders of .dynsym and .symtab dumping for GNU
"--symbols" and "--symbols --dyn-symbols".
Reviewed by: grimar, rupprecht
Differential Revision: https://reviews.llvm.org/D57016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351960
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 23 Jan 2019 16:01:19 +0000 (16:01 +0000)]
Fix indentation. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351958
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 23 Jan 2019 16:00:22 +0000 (16:00 +0000)]
[IR] Match intrinsic parameter by scalar/vectorwidth
This patch replaces the existing LLVMVectorSameWidth matcher with LLVMScalarOrSameVectorWidth.
The matching args must be either scalars or vectors with the same number of elements, but in either case the scalar/element type can differ, specified by LLVMScalarOrSameVectorWidth.
I've updated the _overflow intrinsics to demonstrate this - allowing it to return a i1 or <N x i1> overflow result, matching the scalar/vectorwidth of the other (add/sub/mul) result type.
The masked load/store/gather/scatter intrinsics have also been updated to use this, although as we specify the reference type to be llvm_anyvector_ty we guarantee the mask will be <N x i1> so no change in behaviour
Differential Revision: https://reviews.llvm.org/D57090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351957
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Wed, 23 Jan 2019 15:36:33 +0000 (15:36 +0000)]
[Hexagon] Remove incorrect bit negation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351956
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Wed, 23 Jan 2019 14:51:21 +0000 (14:51 +0000)]
[AArch64] Fix out of bounds strlen
CFIInst is not zero-terminated. This is one of more annoying functional
differences between StringRef and ArrayRef.
Found by asan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351955
91177308-0d34-0410-b5e6-
96231b3b80d8
Clement Courbet [Wed, 23 Jan 2019 14:20:59 +0000 (14:20 +0000)]
Re-land rL322538 "Add a value_type to ArrayRef."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351954
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Wed, 23 Jan 2019 13:49:10 +0000 (13:49 +0000)]
Move saturated arithmetic intrinsics to other integer intrinsics. NFCI.
They were in the floating point group.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351953
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Wed, 23 Jan 2019 13:39:12 +0000 (13:39 +0000)]
[llvm-objdump] - Move common code to a new printRelocation() helper. NFC.
This extracts the common code for printing relocations into a new helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351951
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Renouf [Wed, 23 Jan 2019 13:38:06 +0000 (13:38 +0000)]
[AMDGPU] With XNACK, cannot clause a load with result coalesced with operand
Summary:
With XNACK, an smem load whose result is coalesced with an operand (thus
it overwrites its own operand) cannot appear in a clause, because some
other instruction might XNACK and restart the whole clause.
The clause breaker already realized that an smem that overwrites an
operand cannot appear in a clause, and broke the clause. The problem
that this commit fixes is that the SIFormMemoryClauses optimization
formed a bundle with early clobber, which caused the earlier code that
set up the coalesced operand to be removed as dead.
Differential Revision: https://reviews.llvm.org/D57008
Change-Id: I703c4d5b0bf7d6060222bec491f45c18bb3c0016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351950
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Wed, 23 Jan 2019 11:54:55 +0000 (11:54 +0000)]
[llvm-objcopy] [COFF] Error out on use of unhandled options
Prefer erroring out than silently not doing what was requested.
Differential Revision: https://reviews.llvm.org/D57045
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351948
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Wed, 23 Jan 2019 11:54:51 +0000 (11:54 +0000)]
[llvm-objcopy] [COFF] Fix handling of aux symbols for big objects
The aux symbols were stored in an opaque std::vector<uint8_t>,
with contents interpreted according to the rest of the symbol.
All aux symbol types but one fit in 18 bytes (sizeof(coff_symbol16)),
and if written to a bigobj, two extra padding bytes are written (as
sizeof(coff_symbol32) is 20). In the storage agnostic intermediate
representation, store the aux symbols as a series of coff_symbol16
sized opaque blobs. (In practice, all such aux symbols only consist
of one aux symbol, so this is more flexible than what reality needs.)
The special case is the file aux symbols, which are written in
potentially more than one aux symbol slot, without any padding,
as one single long string. This can't be stored in the same opaque
vector of fixed sized aux symbol entries. The file aux symbols will
occupy a different number of aux symbol slots depending on the type
of output object file. As nothing in the intermediate process needs
to have accurate raw symbol indices, updating that is moved into the
writer class.
Differential Revision: https://reviews.llvm.org/D57009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351947
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Wed, 23 Jan 2019 11:54:36 +0000 (11:54 +0000)]
[llvm-objcopy] [COFF] Remove testcase debugging lines. NFC.
These are no longer necessary as the testcase now seems to run fine
on the buildbots that previously failed on this case, after SVN r351934.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351946
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Wed, 23 Jan 2019 11:51:38 +0000 (11:51 +0000)]
[HotColdSplitting] Remove unused SSAUpdater.h include (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351945
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Wed, 23 Jan 2019 10:52:38 +0000 (10:52 +0000)]
[llvm-objdump] - Move variable. NFC.
It was too far from the place where it is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351942
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Wed, 23 Jan 2019 10:33:26 +0000 (10:33 +0000)]
[llvm-objdump] - Split disassembleObject() into two methods. NFCI.
Currently, disassembleObject() is a ~550 lines length function.
This patch splits it into two, where first do all helper objects initializations
and calls the second which does all the rest job.
This is a straightforward split.
Differential revision: https://reviews.llvm.org/D57020
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351940
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Paulsson [Wed, 23 Jan 2019 10:29:12 +0000 (10:29 +0000)]
[SystemZ] Fix test case for buildbot.
llvm-clang-x86_64-expensive-checks-win triggered this assert:
"llvm.dbg.value intrinsic requires a !dbg attachment"
Hopefully, adding reasonable !dbg operands solves this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351939
91177308-0d34-0410-b5e6-
96231b3b80d8
David Green [Wed, 23 Jan 2019 10:18:30 +0000 (10:18 +0000)]
[ARM] Alter the register allocation order for minsize on Thumb2
Currently in Arm code, we allocate LR first, under the assumption that
it needs to be saved anyway. Unfortunately this has the disadvantage
that it will require any instructions using it to be the longer thumb2
instructions, not the shorter thumb1 ones.
This switches the order when we are optimising for minsize, returning to
the default order so that more lower registers can be used. It can end
up requiring more pushed registers, but on average produces smaller code.
Differential Revision: https://reviews.llvm.org/D56008
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351938
91177308-0d34-0410-b5e6-
96231b3b80d8
Dmitry Venikov [Wed, 23 Jan 2019 09:49:37 +0000 (09:49 +0000)]
[llvm-symbolizer] Allow single letter command flags grouping.
Summary: Currently llvm-symbolizer doesn't allow flags combining. This patch allows such grouping behavior just like addr2line. Motivation: https://bugs.llvm.org/show_bug.cgi?id=40304
Reviewers: jhenderson, ruiu
Reviewed By: jhenderson
Subscribers: rupprecht, llvm-commits
Differential Revision: https://reviews.llvm.org/D57046
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351936
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Parker [Wed, 23 Jan 2019 09:18:44 +0000 (09:18 +0000)]
[ARM][CGP] Check trunc type before replacing
In the last stage of type promotion, we replace any zext that uses a
new trunc with the operand of the trunc. This is okay when we only
allowed one type to be optimised, but now its the case that the trunc
maybe needed to produce a more narrow type than the one we were
optimising for. So we need to check this before doing the replacement.
Differential Revision: https://reviews.llvm.org/D57041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351935
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Wed, 23 Jan 2019 09:12:53 +0000 (09:12 +0000)]
[llvm-objcopy] [COFF] Clear the unwritten tail of coff_section::Header::Name
This should fix the add-gnu-debuglink test on all buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351934
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Parker [Wed, 23 Jan 2019 09:11:49 +0000 (09:11 +0000)]
[DAGCombine] Enable more pre-indexed stores
The current check in CombineToPreIndexedLoadStore is too
conversative, preventing a pre-indexed store when the base pointer
is a predecessor of the value being stored. Instead, we should check
the pointer operand of the store.
Differential Revision: https://reviews.llvm.org/D56719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351933
91177308-0d34-0410-b5e6-
96231b3b80d8
Kristof Beyls [Wed, 23 Jan 2019 09:10:12 +0000 (09:10 +0000)]
[SLH][AArch64] Remove accidentally retained -debug-only line from test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351932
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Wed, 23 Jan 2019 08:25:28 +0000 (08:25 +0000)]
Reapply: [llvm-objcopy] [COFF] Implement --add-gnu-debuglink
This was reverted since it broke a couple buildbots. The reason
for the breakage is not yet known, but this time, the test has
got more diagnostics added, to hopefully allow figuring out
what goes wrong.
Differential Revision: https://reviews.llvm.org/D57007
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351931
91177308-0d34-0410-b5e6-
96231b3b80d8
Kristof Beyls [Wed, 23 Jan 2019 08:18:39 +0000 (08:18 +0000)]
[SLH] AArch64: correctly pick temporary register to mask SP
As part of speculation hardening, the stack pointer gets masked with the
taint register (X16) before a function call or before a function return.
Since there are no instructions that can directly mask writing to the
stack pointer, the stack pointer must first be transferred to another
register, where it can be masked, before that value is transferred back
to the stack pointer.
Before, that temporary register was always picked to be x17, since the
ABI allows clobbering x17 on any function call, resulting in the
following instruction pattern being inserted before function calls and
returns/tail calls:
mov x17, sp
and x17, x17, x16
mov sp, x17
However, x17 can be live in those locations, for example when the call
is an indirect call, using x17 as the target address (blr x17).
To fix this, this patch looks for an available register just before the
call or terminator instruction and uses that.
In the rare case when no register turns out to be available (this
situation is only encountered twice across the whole test-suite), just
insert a full speculation barrier at the start of the basic block where
this occurs.
Differential Revision: https://reviews.llvm.org/D56717
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351930
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Paulsson [Wed, 23 Jan 2019 07:42:26 +0000 (07:42 +0000)]
[SystemZ] Handle DBG_VALUE instructions in two places in backend.
Two backend optimizations failed to handle cases when compiled with -g, due
to failing to consider DBG_VALUE instructions. This was in
SystemZTargetLowering::emitSelect() and
SystemZElimCompare::getRegReferences().
This patch makes sure that DBG_VALUEs are recognized so that they do not
affect these optimizations.
Tests for branch-on-count, load-and-trap and consecutive selects.
Review: Ulrich Weigand
https://reviews.llvm.org/D57048
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351928
91177308-0d34-0410-b5e6-
96231b3b80d8
Max Kazantsev [Wed, 23 Jan 2019 07:20:56 +0000 (07:20 +0000)]
[IRCE] Support narrow latch condition for wide range checks
This patch relaxes restrictions on types of latch condition and range check.
In current implementation, they should match. This patch allows to handle
wide range checks against narrow condition. The motivating example is the
following:
int N = ...
for (long i = 0; (int) i < N; i++) {
if (i >= length) deopt;
}
In this patch, the option that enables this support is turned off by
default. We'll wait until it is switched to true.
Differential Revision: https://reviews.llvm.org/D56837
Reviewed By: reames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351926
91177308-0d34-0410-b5e6-
96231b3b80d8
Brendon Cahoon [Wed, 23 Jan 2019 03:26:10 +0000 (03:26 +0000)]
[Pipeliner] Add two pragmas to control software pipelining optimization
#pragma clang loop pipeline(disable)
Disable SWP optimization for the next loop.
“disable” is the only possible value.
#pragma clang loop pipeline_initiation_interval(number)
Set value of initiation interval for SWP
optimization to specified number value for
the next loop. Number is the positive value
greater than 0.
These pragmas could be used for debugging or reducing
compile time purposes. It is possible to disable SWP for
concrete loops to save compilation time or to find bugs
by not doing SWP to certain loops. It is possible to set
value of initiation interval to concrete number to save
compilation time by not doing extra pipeliner passes or
to check created schedule for specific initiation interval.
That is llvm part of the fix
Clang part of fix: https://reviews.llvm.org/D55710
Patch by Alexey Lapshin!
Differential Revision: https://reviews.llvm.org/D56403
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351923
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 23 Jan 2019 02:20:10 +0000 (02:20 +0000)]
hwasan: Move memory access checks into small outlined functions on aarch64.
Each hwasan check requires emitting a small piece of code like this:
https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html#memory-accesses
The problem with this is that these code blocks typically bloat code
size significantly.
An obvious solution is to outline these blocks of code. In fact, this
has already been implemented under the -hwasan-instrument-with-calls
flag. However, as currently implemented this has a number of problems:
- The functions use the same calling convention as regular C functions.
This means that the backend must spill all temporary registers as
required by the platform's C calling convention, even though the
check only needs two registers on the hot path.
- The functions take the address to be checked in a fixed register,
which increases register pressure.
Both of these factors can diminish the code size effect and increase
the performance hit of -hwasan-instrument-with-calls.
The solution that this patch implements is to involve the aarch64
backend in outlining the checks. An intrinsic and pseudo-instruction
are created to represent a hwasan check. The pseudo-instruction
is register allocated like any other instruction, and we allow the
register allocator to select almost any register for the address to
check. A particular combination of (register selection, type of check)
triggers the creation in the backend of a function to handle the check
for specifically that pair. The resulting functions are deduplicated by
the linker. The pseudo-instruction (really the function) is specified
to preserve all registers except for the registers that the AAPCS
specifies may be clobbered by a call.
To measure the code size and performance effect of this change, I
took a number of measurements using Chromium for Android on aarch64,
comparing a browser with inlined checks (the baseline) against a
browser with outlined checks.
Code size: Size of .text decreases from
243897420 to
171619972 bytes,
or a 30% decrease.
Performance: Using Chromium's blink_perf.layout microbenchmarks I
measured a median performance regression of 6.24%.
The fact that a perf/size tradeoff is evident here suggests that
we might want to make the new behaviour conditional on -Os/-Oz.
But for now I've enabled it unconditionally, my reasoning being that
hwasan users typically expect a relatively large perf hit, and ~6%
isn't really adding much. We may want to revisit this decision in
the future, though.
I also tried experimenting with varying the number of registers
selectable by the hwasan check pseudo-instruction (which would result
in fewer variants being created), on the hypothesis that creating
fewer variants of the function would expose another perf/size tradeoff
by reducing icache pressure from the check functions at the cost of
register pressure. Although I did observe a code size increase with
fewer registers, I did not observe a strong correlation between the
number of registers and the performance of the resulting browser on the
microbenchmarks, so I conclude that we might as well use ~all registers
to get the maximum code size improvement. My results are below:
Regs | .text size | Perf hit
-----+------------+---------
~all |
171619972 | 6.24%
16 |
171765192 | 7.03%
8 |
172917788 | 5.82%
4 |
177054016 | 6.89%
Differential Revision: https://reviews.llvm.org/D56954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351920
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 23 Jan 2019 02:19:56 +0000 (02:19 +0000)]
gn build: Merge r351820.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351919
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Wed, 23 Jan 2019 02:10:10 +0000 (02:10 +0000)]
gn build: Merge r351880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351918
91177308-0d34-0410-b5e6-
96231b3b80d8
Rui Ueyama [Wed, 23 Jan 2019 02:03:26 +0000 (02:03 +0000)]
MemoryBlock: Do not automatically extend a given size to a multiple of page size.
Previously, MemoryBlock automatically extends a requested buffer size to a
multiple of page size because (I believe) doing it was thought to be harmless
and with that you could get more memory (on average 2KiB on 4KiB-page systems)
"for free".
That programming interface turned out to be error-prone. If you request N
bytes, you usually expect that a resulting object returns N for `size()`.
That's not the case for MemoryBlock.
Looks like there is only one place where we take the advantage of
allocating more memory than the requested size. So, with this patch, I
simply removed the automatic size expansion feature from MemoryBlock
and do it on the caller side when needed. MemoryBlock now always
returns a buffer whose size is equal to the requested size.
Differential Revision: https://reviews.llvm.org/D56941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351916
91177308-0d34-0410-b5e6-
96231b3b80d8
Jordan Rupprecht [Wed, 23 Jan 2019 01:42:02 +0000 (01:42 +0000)]
[llvm-objcopy] Remove os-dependent message from test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351914
91177308-0d34-0410-b5e6-
96231b3b80d8
Josh Stone [Wed, 23 Jan 2019 00:53:22 +0000 (00:53 +0000)]
[CodeView] Allow empty types in member functions
Summary:
`CodeViewDebug::lowerTypeMemberFunction` used to default to a `Void`
return type if the function's type array was empty. After D54667, it
started blindly indexing the 0th item for the return type, which fails
in `getOperand` for empty arrays if assertions are enabled.
This patch restores the `Void` return type for empty type arrays, and
adds a test generated by Rust in line-only debuginfo mode.
Reviewers: zturner, rnk
Reviewed By: rnk
Subscribers: hiraditya, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D57070
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351910
91177308-0d34-0410-b5e6-
96231b3b80d8
Jordan Rupprecht [Wed, 23 Jan 2019 00:35:04 +0000 (00:35 +0000)]
[llvm-objcopy] Fix error message for msvc tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351905
91177308-0d34-0410-b5e6-
96231b3b80d8
Jordan Rupprecht [Tue, 22 Jan 2019 23:49:16 +0000 (23:49 +0000)]
[llvm-objcopy] Return Error from Buffer::allocate(), [ELF]Writer::finalize(), and [ELF]Writer::commit()
Summary:
This patch changes a few methods to return Error instead of manually calling error/reportError to abort. This will make it easier to extract into a library.
Note that error() takes just a string (this patch also adds an overload that takes an Error), while reportError() takes string + [error/code]. To help unify things, use FileError to associate a given filename with an error. Note that this takes some special care (for now), e.g. calling reportError(FileName, <something that could be FileError>) will duplicate the filename. The goal is to eventually remove reportError() and have every error associated with a file to be a FileError, and just one error handling block at the tool level.
This change was suggested in D56806. I took it a little further than suggested, but completely fixing llvm-objcopy will take a couple more patches. If this approach looks good, I'll commit this and apply similar patche(s) for the rest.
This change is NFC in terms of non-error related code, although the error message changes in one context.
Reviewers: alexshap, jhenderson, jakehehrlich, mstorsjo, espindola
Reviewed By: alexshap, jhenderson
Subscribers: llvm-commits, emaste, arichardson
Differential Revision: https://reviews.llvm.org/D56930
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351896
91177308-0d34-0410-b5e6-
96231b3b80d8
Ana Pazos [Tue, 22 Jan 2019 22:59:47 +0000 (22:59 +0000)]
Fixed isReMaterializable setting for LUI instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351895
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Tue, 22 Jan 2019 22:49:22 +0000 (22:49 +0000)]
[HotColdSplit] Calculate BFI lazily to reduce compile-time, NFC
The splitting pass does not need BFI unless the Module actually has a profile
summary. Do not calcualte BFI unless the summary is present.
For the sqlite3 amalgamation, this reduces time spent in the splitting pass
from 0.4% of the total to under 0.1%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351894
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 22 Jan 2019 22:49:19 +0000 (22:49 +0000)]
[Chrono] Remove ATTRIBUTE_ALWAYS inline from Chrono.h.
I discussed this with Pavel, who told me there was no real
thought behind this, and had no objection to remove the
attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351893
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Tue, 22 Jan 2019 22:49:08 +0000 (22:49 +0000)]
[HotColdSplit] Calculate domtrees lazily to reduce compile-time, NFC
The splitting pass does not need (post)domtrees until after it's found a
cold block. Defer domtree calculation until a cold block is found.
For the sqlite3 amalgamation, this reduces time spent in the splitting
pass from 0.8% of the total to 0.4%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351892
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 22 Jan 2019 22:40:35 +0000 (22:40 +0000)]
[ADT] Move away from __attribute__((always_inline)).
Some member functions of StringRef/SmallVector/StringSwitch
are marked with the `always_inline` attribute. The result
is that the body of these functions is not emitted, hence the
debugger can't evaluate them (a typical example is
StringRef::size()), even if the code is built with `-O0`.
The main driver behind this was that of getting faster turnaround
when running `check-llvm`. A previous commit clarifies how to
get good performance when running the testsuite, so we can
get rid of the attribute here.
An alternative approach considered was that of using attribute `used`,
but in the end we preferred to not slap yet another attribute on
these functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351891
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 22 Jan 2019 22:33:55 +0000 (22:33 +0000)]
[LegalizeTypes] Add debug prints to the top of PromoteFloatOperand and PromoteFloatResult.
Also add debug prints in the default case of the switches in these routines.
Most if not all of the type legalization handlers already do this so this makes promoting floats consistent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351890
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 22:00:19 +0000 (22:00 +0000)]
AMDGPU/GlobalISel: Start selectively legalizing 16-bit operations
It might be a bit nicer to use the fancy .legalIf and co. predicates,
but this was requiring more boilerplate and disables the coverage
assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351886
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 22 Jan 2019 21:52:50 +0000 (21:52 +0000)]
[Docs] Add a note clarifying how to get good test performances.
Differential Revision: https://reviews.llvm.org/D56337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351885
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 21:51:38 +0000 (21:51 +0000)]
AMDGPU/GlobalISel: Handle legality/regbanks for 32/64-bit shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351884
91177308-0d34-0410-b5e6-
96231b3b80d8
Rui Ueyama [Tue, 22 Jan 2019 21:49:56 +0000 (21:49 +0000)]
FileOutputBuffer: handle mmap(2) failure
If the underlying filesystem does not support mmap system call,
FileOutputBuffer may fail when it attempts to mmap an output temporary
file. This patch handles such situation.
Unfortunately, it looks like it is very hard to test this functionality
without a filesystem that doesn't support mmap using llvm-lit. I tested
this locally by passing an invalid parameter to mmap so that it fails and
falls back to the in-memory buffer. Maybe that's all what we can do.
I believe it is reasonable to submit this without a test.
Differential Revision: https://reviews.llvm.org/D56949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351883
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 21:42:11 +0000 (21:42 +0000)]
GlobalISel: Allow shift amount to be a different type
For AMDGPU the shift amount is never 64-bit, and
this needs to use a 32-bit shift.
X86 uses i8, but seemed to be hacking around this before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351882
91177308-0d34-0410-b5e6-
96231b3b80d8
Joel E. Denny [Tue, 22 Jan 2019 21:41:42 +0000 (21:41 +0000)]
[FileCheck] Suppress old -v/-vv diags if dumping input
The old diagnostic form of the trace produced by -v and -vv looks
like:
```
check1:1:8: remark: CHECK: expected string found in input
CHECK: abc
^
<stdin>:1:3: note: found here
; abc def
^~~
```
When dumping annotated input is requested (via -dump-input), I find
that this old trace is not useful and is sometimes harmful:
1. The old trace is mostly redundant because the same basic
information also appears in the input dump's annotations.
2. The old trace buries any error diagnostic between it and the input
dump, but I find it useful to see any error diagnostic up front.
3. FILECHECK_OPTS=-dump-input=fail requests annotated input dumps only
for failed FileCheck calls. However, I have to also add -v or -vv
to get a full set of annotations, and that can produce massive
output from all FileCheck calls in all tests. That's a real
problem when I run this in the IDE I use, which grinds to a halt as
it tries to capture all that output.
When -dump-input=fail|always, this patch suppresses the old trace from
-v or -vv. Error diagnostics still print as usual. If you want the
old trace, perhaps to see variable expansions, you can set
-dump-input=none (the default).
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D55825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351881
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 21:31:02 +0000 (21:31 +0000)]
GlobalISel: Make buildConstant handle vectors
Produce a splat build_vector similar to how
SelectionDAG::getConstant does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351880
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 22 Jan 2019 20:48:24 +0000 (20:48 +0000)]
[X86][AVX512F_SCALAR]: Adding full coverage of MC encoding for the AVX512F_SCALAR isa sets. NFC
Adding MC regressions tests to cover the AVX512F_SCALAR isa sets.
This patch is part of a larger task to cover MC encoding of all X86 isa sets started in revision: https://reviews.llvm.org/D39952
Differential Revision: https://reviews.llvm.org/D41174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351874
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 20:38:15 +0000 (20:38 +0000)]
GlobalISel: Implement widen for extract_vector_elt elt type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351871
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 20:14:29 +0000 (20:14 +0000)]
GlobalISel: Implement fewerElementsVector for basic FP ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351866
91177308-0d34-0410-b5e6-
96231b3b80d8
Konstantin Zhuravlyov [Tue, 22 Jan 2019 19:18:18 +0000 (19:18 +0000)]
Add missing include (cstdlib) to Demangle.h
Differential Revision: https://reviews.llvm.org/D57035
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351861
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 19:04:51 +0000 (19:04 +0000)]
AMDGPU/GlobalISel: Remove vectors from legal constant types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351859
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 19:02:10 +0000 (19:02 +0000)]
GlobalISel: Support narrowing zextload/sextload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351856
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Tue, 22 Jan 2019 18:57:49 +0000 (18:57 +0000)]
[SelectionDAGBuilder] Defer C_Register Assignments to be in line with
those of C_RegisterClass. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351854
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 18:53:41 +0000 (18:53 +0000)]
GlobalISel: Disallow vectors for G_CONSTANT/G_FCONSTANT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351853
91177308-0d34-0410-b5e6-
96231b3b80d8
Rui Ueyama [Tue, 22 Jan 2019 18:44:04 +0000 (18:44 +0000)]
FileOutputBuffer: Handle "-" as stdout.
I was honestly a bit surprised that we didn't do this before. This
patch is to handle "-" as the stdout so that if you pass `-o -` to
lld, for example, it writes an output to stdout instead of file `-`.
I thought that we might want to handle this at a higher level than
FileOutputBuffer, because if we land this patch, we can no longer
create a file whose name is `-` (there's a workaround though; you can
pass `./-` instead of `-`). However, because raw_fd_ostream already
handles `-` as a special file name, I think it's okay and actually
consistent to handle `-` as a special name in FileOutputBuffer.
Differential Revision: https://reviews.llvm.org/D56940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351852
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 18:36:06 +0000 (18:36 +0000)]
Codegen support for atomicrmw fadd/fsub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351851
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 22 Jan 2019 18:18:02 +0000 (18:18 +0000)]
Reapply "IR: Add fp operations to atomicrmw"
This reapplies commits r351778 and r351782 with
RISCV test fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351850
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 17:52:15 +0000 (17:52 +0000)]
[llvm-mca][X86] Tidyup avx512 placeholder tests
Ensure we keep avx512f/bw/dq + vl versions separate, add example broadcast tests - this should allow us to better the test coverage of test\CodeGen\X86\avx512-schedule.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351848
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Tue, 22 Jan 2019 17:43:37 +0000 (17:43 +0000)]
[DEBUGINFO, NVPTX] Enable support for the debug info on NVPTX target.
Summary: Enable full support for the debug info.
Reviewers: echristo
Subscribers: jholewinski, aprantl, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D46189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351846
91177308-0d34-0410-b5e6-
96231b3b80d8
Jordan Rupprecht [Tue, 22 Jan 2019 17:39:02 +0000 (17:39 +0000)]
Revert r351520, "Re-enable terminator folding in LoopSimplifyCFG"
This is still causing compilation crashes in some targets. Will follow up shortly with a repro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351845
91177308-0d34-0410-b5e6-
96231b3b80d8
Alexey Bataev [Tue, 22 Jan 2019 17:24:16 +0000 (17:24 +0000)]
[DEBUG_INFO, NVPTX] Fix relocation info.
Summary: Initial function labels must follow the debug location for the correct relocation info generation.
Reviewers: tra, jlebar, echristo
Subscribers: jholewinski, llvm-commits
Differential Revision: https://reviews.llvm.org/D45784
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351843
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 17:19:44 +0000 (17:19 +0000)]
[llvm-mca][X86] Add VPOPCNTDQ tests
Matches test coverage of test\CodeGen\X86\avx512vpopcntdq-schedule.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351842
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 22 Jan 2019 17:01:06 +0000 (17:01 +0000)]
[x86] add partial undef 'and' test; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351840
91177308-0d34-0410-b5e6-
96231b3b80d8
Kostya Kortchinsky [Tue, 22 Jan 2019 16:43:45 +0000 (16:43 +0000)]
[docs] Scudo: document error messages & their potential cause
Summary:
A couple of changes in the Scudo documentation:
- tag the shell code blocks as `console`;
- document error messages that are displayed in some termination conditions,
the reason they triggered, and potential causes.
Reviewers: eugenis, enh
Reviewed By: eugenis
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D56857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351838
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Tue, 22 Jan 2019 16:40:18 +0000 (16:40 +0000)]
Add DIGlobalVariableExpression to LangRef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351837
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 16:39:28 +0000 (16:39 +0000)]
[llvm-mca][X86] Add missing CLWB/CLZERO/FSGSBASE/LWP/MWAITX/RDPID/SHA tests
We're getting pretty close to matching/exceeding test coverage of the test\CodeGen\X86\*-schedule.ll files, which should allow us to get rid of -print-schedule and fix PR37160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351836
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 16:29:26 +0000 (16:29 +0000)]
[llvm-mca][X86] Add missing enter/leave, invlpg/invlpga, rdmsr/wrmsr, rdpmc and rdtsc/rdtscp tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351835
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 22 Jan 2019 16:26:09 +0000 (16:26 +0000)]
[x86] add another partial undef vector binop test; NFC
The existing test unintentionally shows that we have prematurely
optimized the shuffle into a vector concat and lost the undef info,
so it is not affected by a basic improvement to
SimplifyDemandedVectorElts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351834
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Guelton [Tue, 22 Jan 2019 16:25:17 +0000 (16:25 +0000)]
Use response file when generating LLVM-C.dll
As discovered in D56774 the command line gets to long, so use a response file to give the script the libs. This change has been tested and is confirmed working for me.
Commited on behalf of Jakob Bornecrantz
Differential Revision: https://reviews.llvm.org/D56781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351833
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 16:01:08 +0000 (16:01 +0000)]
[llvm-mca][X86] Add missing mfence/pinsrw tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351831
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 15:48:16 +0000 (15:48 +0000)]
[llvm-mca][X86] Add missing monitor/mwait tests
These technically should be under a MONITOR cpuid bit, but we tag them as SSE3 so I've done that here as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351829
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 14:54:24 +0000 (14:54 +0000)]
[llvm-mca][X86] Add missing vperm2i128 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351828
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 14:53:52 +0000 (14:53 +0000)]
[llvm-mca][X86] Add missing tzcntw tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351827
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 22 Jan 2019 14:24:13 +0000 (14:24 +0000)]
[DAGCombiner] narrow vector binop with 2 insert subvector operands
vecbo (insertsubv undef, X, Z), (insertsubv undef, Y, Z) --> insertsubv VecC, (vecbo X, Y), Z
This is another step in generic vector narrowing. It's also a step towards more horizontal op
formation specifically for x86 (although we still failed to match those in the affected tests).
The scalarization cases are also not optimal (we should be scalarizing those), but it's still
an improvement to use a narrower vector op when we know part of the result must be constant
because both inputs are undef in some vector lanes.
I think a similar match but checking for a constant operand might help some of the cases in
D51553.
Differential Revision: https://reviews.llvm.org/D56875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351825
91177308-0d34-0410-b5e6-
96231b3b80d8
George Rimar [Tue, 22 Jan 2019 14:09:37 +0000 (14:09 +0000)]
[llvm-objdump] - Introduce getRelocsMap() helper. NFCI.
Currently disassembleObject() is a ~550 lines length function.
This patch extracts the code that creates a section->their relocation
mapping into a new helper function to simplify/reduce it a bit.
Differential revision: https://reviews.llvm.org/D57019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351824
91177308-0d34-0410-b5e6-
96231b3b80d8
Alex Bradbury [Tue, 22 Jan 2019 14:05:11 +0000 (14:05 +0000)]
[RISCV][NFC] Change naming scheme for RISC-V specific DAG nodes
Previously we had names like 'Call' or 'Tail'. This potentially clashes with
the naming scheme used elsewhere in RISCVInstrInfo.td. Many other backends
would use names like AArch64call or PPCtail. I prefer the SystemZ approach,
which uses prefixed all-lowercase names. This matches the naming scheme used
for target-independent SelectionDAG nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351823
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Tue, 22 Jan 2019 13:59:08 +0000 (13:59 +0000)]
[MCA] Add tests for int-to-fpu transfer delays. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351822
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Guelton [Tue, 22 Jan 2019 13:57:29 +0000 (13:57 +0000)]
Slight fix for r351820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351821
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Guelton [Tue, 22 Jan 2019 13:48:55 +0000 (13:48 +0000)]
Fix llvm::is_trivially_copyable portability issues
llvm::is_trivially_copyable portability is verified at compile time using
std::is_trivially_copyable as the reference implementation.
Unfortunately, the latter is not available on all platforms, so introduce
a proper configure check to detect if it is available on the target platform.
In a similar manner, std::is_copy_assignable is not fully supported for gcc4.9.
Provide a portable (?) implementation instead.
Differential Revision: https://reviews.llvm.org/D57018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351820
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 13:44:49 +0000 (13:44 +0000)]
[X86][SSE] Canonicalize OR(AND(X,C),AND(Y,~C)) -> OR(AND(X,C),ANDNP(C,Y))
For constant bit select patterns, replace one AND with a ANDNP, allowing us to reuse the constant mask. Only do this if the mask has multiple uses (to avoid losing load folding) or if we have XOP as its VPCMOV can handle most folding commutations.
This also requires computeKnownBitsForTargetNode support for X86ISD::ANDNP and X86ISD::FOR to prevent regressions in fabs/fcopysign patterns.
Differential Revision: https://reviews.llvm.org/D55935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351819
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 13:27:18 +0000 (13:27 +0000)]
[X86][BtVer2] SSE2 vector shifts has local forwarding disabled
Similar to horizontal ops on D56777, the sse2 (but not mmx) bit shift ops has local forwarding disabled, adding +1cy to the use latency for the result.
Differential Revision: https://reviews.llvm.org/D57026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351817
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 13:18:26 +0000 (13:18 +0000)]
Fix "comparison of unsigned expression >= 0 is always true" warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351816
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 13:13:57 +0000 (13:13 +0000)]
[X86][BtVer2] X86ISD::VPERMILPV has local forwarding disabled
Similar to horizontal ops on D56777, the vpermilpd/vpermilps variable mask ops has local forwarding disabled, adding +1cy to the use latency for the result.
Differential Revision: https://reviews.llvm.org/D57022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351815
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Tue, 22 Jan 2019 12:35:34 +0000 (12:35 +0000)]
Revert "[llvm-objcopy] [COFF] Implement --add-gnu-debuglink"
This reverts commit r351801, as it caused errors on (so far)
ppc64be and aarch64 buildbots - the reason is yet unknown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351811
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 22 Jan 2019 12:29:38 +0000 (12:29 +0000)]
[CostModel][X86] Add ICMP Predicate specific costs
First step towards PR40376, this patch adds support for getCmpSelInstrCost to use the (optional) Instruction CmpInst predicate to indicate the type of integer comparison we're performing and alter the costs accordingly.
Differential Revision: https://reviews.llvm.org/D57013
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351810
91177308-0d34-0410-b5e6-
96231b3b80d8