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Matt Arsenault [Mon, 24 Jul 2017 18:07:55 +0000 (18:07 +0000)]
RA: Replace asserts related to empty live intervals
These don't exactly assert the same thing anymore, and
allow empty live intervals with non-empty uses.
Removed in r308808 and r308813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308906
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Evandro Menezes [Mon, 24 Jul 2017 18:06:16 +0000 (18:06 +0000)]
[AArch64] Adjust the cost model for Exynos M1 and M2
Fine tune the resources in a couple of ASIMD loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308904
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Matt Arsenault [Mon, 24 Jul 2017 18:06:15 +0000 (18:06 +0000)]
AMDGPU: Fix allocating pseudo-registers
There's no need for these to be part of a class since
they are immediately replaced. New unreachable hit in
existing tests.'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308903
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Tim Northover [Mon, 24 Jul 2017 17:47:46 +0000 (17:47 +0000)]
Revert "Debug: handle dumping the D language."
Reid beat me to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308902
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Tim Northover [Mon, 24 Jul 2017 17:39:44 +0000 (17:39 +0000)]
Debug: handle dumping the D language.
Mostly just to silence a warning about an unhandled case. There don't seem to
be any tests for this operator (at least that I could find).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308901
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Leo Li [Mon, 24 Jul 2017 17:26:28 +0000 (17:26 +0000)]
[CMake] Remove redundant logic in runtimes/CMakeList.txt
Summary:
`SUB_CHECK_TARGETS` contains all test targets in `SUB_COMPONENTS` when
we load `Components.cmake`. We don't need to add those targets
again and having duplicate targets will break the cmake policy CMP0002.
Reviewers: phosek
Subscribers: mgorny, llvm-commits, srhines, pirama
Differential Revision: https://reviews.llvm.org/D35692
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308900
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Reid Kleckner [Mon, 24 Jul 2017 16:30:44 +0000 (16:30 +0000)]
Add missing case to switch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308894
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Benjamin Kramer [Mon, 24 Jul 2017 16:18:09 +0000 (16:18 +0000)]
[CodeGenPrepare] Cut off FindAllMemoryUses if there are too many uses.
This avoids excessive compile time. The case I'm looking at is
Function.cpp from an old version of LLVM that still had the giant memcmp
string matcher in it. Before r308322 this compiled in about 2 minutes,
after it, clang takes infinite* time to compile it. With this patch
we're at 5 min, which is still bad but this is a pathological case.
The cut off at 20 uses was chosen by looking at other cut-offs in LLVM
for user scanning. It's probably too high, but does the job and is very
unlikely to regress anything.
Fixes PR33900.
* I'm impatient and aborted after 15 minutes, on the bug report it was
killed after 2h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308891
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Reid Kleckner [Mon, 24 Jul 2017 16:16:42 +0000 (16:16 +0000)]
[codeview] Emit 'D' as the cv source language for D code
This matches DMD:
https://github.com/dlang/dmd/blob/
522263965cf3a27ed16b31f3c3562db86cdeabec/src/ddmd/backend/cv8.c#L199
Fixes PR33899.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308890
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Reid Kleckner [Mon, 24 Jul 2017 16:16:17 +0000 (16:16 +0000)]
Format some case labels and shrink an anonymous namespace NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308889
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Ilya Biryukov [Mon, 24 Jul 2017 16:02:29 +0000 (16:02 +0000)]
NFC. Fixed typos in the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308888
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Alexandre Isoard [Mon, 24 Jul 2017 12:55:00 +0000 (12:55 +0000)]
[DOTGraphTraits] Propagate Graph template argument, NFC
Propagates the GraphT template argument to the default value of
the AnalysisGraphTraitsT template argument. This allows to specialize
the DefaultAnalysisGraphTraits<AnalysisT,GraphT> for analysis with a
graph type different from the analysis type and it will automatically
get picked-up.
Note: This was probably the intended purpose and should not result in any
functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308878
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Simon Pilgrim [Mon, 24 Jul 2017 12:44:35 +0000 (12:44 +0000)]
Fix spelling in comments. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308877
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Florian Hahn [Mon, 24 Jul 2017 11:41:30 +0000 (11:41 +0000)]
[LoopInterchange] Update code to use range-based for loops (NFC).
Summary:
The remaining non range-based for loops do not iterate over full ranges,
so leave them as they are.
Reviewers: karthikthecool, blitz.opensource, mcrosier, mkuper, aemerson
Reviewed By: aemerson
Subscribers: aemerson, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D35777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308872
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Ayman Musa [Mon, 24 Jul 2017 08:10:32 +0000 (08:10 +0000)]
[X86][AVX512] Add patterns for masked AVX512 floating point compare instructions that were missing.
patterns were missed by D33188. Adding for completion.
+Updating test.
Differential Revesion: https://reviews.llvm.org/D35179
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308868
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Coby Tayree [Mon, 24 Jul 2017 07:04:55 +0000 (07:04 +0000)]
[X86][InlineAsm][Ms Compatibility]Prefer variable name over a register when the two collides
On MS-style, the following snippet:
int eax;
__asm mov eax, ebx
should yield loading of ebx, into the location pointed by the variable eax
This patch sees to it.
Currently, a reg-to-reg move would have been invoked.
clang: D34740
Differential Revision: https://reviews.llvm.org/D34739
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308866
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Dylan McKay [Sun, 23 Jul 2017 23:39:11 +0000 (23:39 +0000)]
[AVR] Remove the instrumentation pass
I have a much better way of running integration tests now.
https://github.com/dylanmckay/avr-test-suite
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308857
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Dylan McKay [Sun, 23 Jul 2017 23:00:55 +0000 (23:00 +0000)]
[AVR] Improve the 'icall-func-pointer-correct-addr-space.ll' test
Patch by Carl Peto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308856
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Petr Hosek [Sun, 23 Jul 2017 22:30:00 +0000 (22:30 +0000)]
[CodeGen][X86] Fuchsia supports sincos* libcalls and sin+cos->sincos optimization
Patch by Roland McGrath
Differential Revision: https://reviews.llvm.org/D35748
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308854
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Momchil Velikov [Sun, 23 Jul 2017 22:27:34 +0000 (22:27 +0000)]
Fix typo: GETTER to SETTER (NFC)
Use the CALLSITE_DELEGATE_SETTER macro in CallSiteBase::setCannotDuplicate.
Comitted as obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308853
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Florian Hahn [Sun, 23 Jul 2017 21:15:10 +0000 (21:15 +0000)]
[AArch64] Add test for function alignment for a optsize function (NFC).
Reviewers: dblaikie, t.p.northover, rengolin
Reviewed By: rengolin
Subscribers: aemerson, rengolin, javed.absar, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D35620
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308852
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Chad Rosier [Sun, 23 Jul 2017 16:38:08 +0000 (16:38 +0000)]
[AArch64] Redundant Copy Elimination - remove more zero copies.
This patch removes unnecessary zero copies in BBs that are targets of b.eq/b.ne
and we know the result of the compare instruction is zero. For example,
BB#0:
subs w0, w1, w2
str w0, [x1]
b.ne .LBB0_2
BB#1:
mov w0, wzr ; <-- redundant
str w0, [x2]
.LBB0_2
Differential Revision: https://reviews.llvm.org/D35075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308849
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Max Kazantsev [Sun, 23 Jul 2017 15:40:19 +0000 (15:40 +0000)]
[SCEV] Limit max size of AddRecExpr during evolving
When SCEV calculates product of two SCEVAddRecs from the same loop, it
tries to combine them into one big AddRecExpr. If the sizes of the initial
SCEVs were `S1` and `S2`, the size of their product is `S1 + S2 - 1`, and every
operand of the resulting SCEV is combined from operands of initial SCEV and
has much higher complexity than they have.
As result, if we try to calculate something like:
%x1 = {a,+,b}
%x2 = mul i32 %x1, %x1
%x3 = mul i32 %x2, %x1
%x4 = mul i32 %x3, %x2
...
The size of such SCEVs grows as `2^N`, and the arguments
become more and more complex as we go forth. This leads
to long compilation and huge memory consumption.
This patch sets a limit after which we don't try to combine two
`SCEVAddRecExpr`s into one. By default, max allowed size of the
resulting AddRecExpr is set to 16.
Differential Revision: https://reviews.llvm.org/D35664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308847
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NAKAMURA Takumi [Sun, 23 Jul 2017 11:47:22 +0000 (11:47 +0000)]
RuntimeDyldELF.cpp: Prune unused "TargetRegistry.h"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308846
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NAKAMURA Takumi [Sun, 23 Jul 2017 05:09:44 +0000 (05:09 +0000)]
[Modules] Rework r274270. Let Clang targets depend on intrinsics_gen.
This gets rid of almost LLVM targets unconditionally depending on intrinsic_gen.
Clang's modules still have weird dependencies and hard to remove intrinsics_gen in better way.
Then, it'd be better to give whole clang targets depend on intrinsic_gen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308844
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Craig Topper [Sun, 23 Jul 2017 03:59:39 +0000 (03:59 +0000)]
[X86] Add some hasSideEffects=0 flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308835
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Craig Topper [Sun, 23 Jul 2017 03:59:37 +0000 (03:59 +0000)]
[X86] Add patterns for memory forms of SARX/SHLX/SHRX with careful complexity adjustment to keep shift by immediate using the legacy instructions.
These patterns were only missing to favor using the legacy instructions when the shift was a constant. With careful adjustment of the pattern complexity we can make sure the immediate instructions still have priority over these patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308834
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Nirav Dave [Sun, 23 Jul 2017 02:06:28 +0000 (02:06 +0000)]
[DAG] Fix typo preventing some stores merges to truncated stores.
Check the actual memory type stored and not the extended value size
when considering if truncated store merge is worthwhile.
Reviewers: efriedma, RKSimon, spatel, jyknight
Reviewed By: efriedma
Subscribers: llvm-commits, nhaehnle
Differential Revision: https://reviews.llvm.org/D35623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308833
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Petr Hosek [Sat, 22 Jul 2017 02:43:50 +0000 (02:43 +0000)]
Revert "Reland "[LLVM][llvm-objcopy] Added basic plumbing to get things started""
This reverts commit
2b52298eb28ba4d3eca113353a348c02a6ef1f93.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308822
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Petr Hosek [Sat, 22 Jul 2017 02:33:45 +0000 (02:33 +0000)]
Reland "[LLVM][llvm-objcopy] Added basic plumbing to get things started"
As discussed on llvm-dev I've implemented the first basic steps towards
llvm-objcopy/llvm-objtool (name pending).
This change adds the ability to copy (without modification) 64-bit
little endian ELF executables that have SHT_PROGBITS, SHT_NOBITS,
SHT_NULL and SHT_STRTAB sections.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D33964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308821
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Craig Topper [Sat, 22 Jul 2017 01:30:53 +0000 (01:30 +0000)]
[X86] Add nopq instruction which is a rex encoded version of nopl for gas compatibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308818
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Craig Topper [Sat, 22 Jul 2017 01:30:51 +0000 (01:30 +0000)]
[X86] Add register form of NOPL and NOPW for assembler/disassembler.
Fixes PR32805.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308817
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Matt Arsenault [Sat, 22 Jul 2017 00:40:46 +0000 (00:40 +0000)]
AMDGPU: Remove leftover td file
All of the instructions were moved out of this a while ago,
so it's just a useless comment now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308815
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David Blaikie [Sat, 22 Jul 2017 00:24:20 +0000 (00:24 +0000)]
Commit missing/empty test file from r308789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308814
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Matt Arsenault [Sat, 22 Jul 2017 00:24:01 +0000 (00:24 +0000)]
RA: Remove another assert on empty intervals
This case is similar to the one fixed in r308808,
except when rematerializing.
Fixes bug 33884.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308813
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Kostya Serebryany [Sat, 22 Jul 2017 00:10:29 +0000 (00:10 +0000)]
[libFuzzer] reimplement experimental_len_control=1: bump the temporary max_len every time we failed to find new coverage during the last 1000 runs and 1 second. Also fix FileToVector to not load unfinished files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308811
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Matt Arsenault [Fri, 21 Jul 2017 23:56:13 +0000 (23:56 +0000)]
RA: Remove assert on empty live intervals
This is possible if there is an undef use when
splitting the vreg during spilling.
Fixes bug 33620.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308808
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Petr Hosek [Fri, 21 Jul 2017 23:39:39 +0000 (23:39 +0000)]
Revert "[LLVM][llvm-objcopy] Added basic plumbing to get things started"
This reverts commit
2f423248e140b94b8377660d4d2fe9364f30febe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308806
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Petr Hosek [Fri, 21 Jul 2017 23:27:40 +0000 (23:27 +0000)]
Reland "[LLVM][llvm-objcopy] Added basic plumbing to get things started"
As discussed on llvm-dev I've implemented the first basic steps towards
llvm-objcopy/llvm-objtool (name pending).
This change adds the ability to copy (without modification) 64-bit
little endian ELF executables that have SHT_PROGBITS, SHT_NOBITS,
SHT_NULL and SHT_STRTAB sections.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D33964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308803
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Erich Keane [Fri, 21 Jul 2017 22:48:47 +0000 (22:48 +0000)]
Remove Bitrig: LLVM Changes
Bitrig code has been merged back to OpenBSD, thus the OS has been abandoned.
Differential Revision: https://reviews.llvm.org/D35707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308799
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David Blaikie [Fri, 21 Jul 2017 21:41:15 +0000 (21:41 +0000)]
[ProfData] Detect if zlib is available
As discussed on [1], if the profile is compressed and llvm-profdata is not built with zlib support, the error message is not informative. Give a better error message if zlib is not available.
[1] http://lists.llvm.org/pipermail/llvm-dev/2017-July/115571.html
Reviewers: davidxl, dblaikie
Differential Revision: https://reviews.llvm.org/D35586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308789
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Eugene Zelenko [Fri, 21 Jul 2017 21:37:46 +0000 (21:37 +0000)]
[Analysis] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308787
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Xinliang David Li [Fri, 21 Jul 2017 21:36:25 +0000 (21:36 +0000)]
[PGOInstr] Add a debug print
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308785
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Farhana Aleen [Fri, 21 Jul 2017 21:35:00 +0000 (21:35 +0000)]
X86InterleaveAccess: A fix for bug33826
Reviewers: DavidKreitzer
Differential Revision: https://reviews.llvm.org/D35638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308784
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Konstantin Zhuravlyov [Fri, 21 Jul 2017 21:19:23 +0000 (21:19 +0000)]
AMDGPU: Implement memory model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308781
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Guozhi Wei [Fri, 21 Jul 2017 21:06:08 +0000 (21:06 +0000)]
[PPC] Add Defs = [CARRY] to MIR SRADI_32
MIR SRADI uses instruction template XSForm_1rc which declares Defs = [CARRY]. But MIR SRADI_32 uses instruction template XSForm_1, and it doesn't declare such implicit definition. With patch D33720 it causes wrong code generation for perl.
This patch adds the implicit definition.
Differential Revision: https://reviews.llvm.org/D35699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308780
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Konstantin Zhuravlyov [Fri, 21 Jul 2017 21:05:45 +0000 (21:05 +0000)]
AMDGPU: Introduce maybeAtomic instruction flag
Testing is in the follow up change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308779
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Matt Arsenault [Fri, 21 Jul 2017 19:31:44 +0000 (19:31 +0000)]
AMDGPU: Preserve undef flag in eliminateFrameIndex
Fixes verifier errors in some call tests.
Not sure why we haven't run into this before.
Test split into separate patch for once
call support is committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308774
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Xin Tong [Fri, 21 Jul 2017 19:10:19 +0000 (19:10 +0000)]
[DAGCombiner] Update comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308772
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Matt Arsenault [Fri, 21 Jul 2017 18:54:54 +0000 (18:54 +0000)]
AMDGPU: Partially fix improper reliance on memoperands
There are 2 more places doing this, but I'm not sure
what they are doing and don't make any sense to me
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308770
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Matt Arsenault [Fri, 21 Jul 2017 18:34:51 +0000 (18:34 +0000)]
AMDGPU: Don't track lgkmcnt for global_/scratch_ instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308766
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Reid Kleckner [Fri, 21 Jul 2017 18:32:00 +0000 (18:32 +0000)]
Fix DebugInfo/PDB build by adding missing changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308765
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Reid Kleckner [Fri, 21 Jul 2017 18:28:55 +0000 (18:28 +0000)]
[PDB] Dump extra info about the publics stream
This includes the hash table, the address map, and the thunk table and
section offset table. The last two are only used for incremental
linking, which LLD doesn't support, so they are less interesting. The
hash table is particularly important to get right, since this is the one
of the streams that debuggers use to translate addresses to symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308764
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Matt Arsenault [Fri, 21 Jul 2017 18:06:36 +0000 (18:06 +0000)]
AMDGPU: Fix getMemOpBaseRegImmOfs for flat with offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308762
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Krzysztof Parzyszek [Fri, 21 Jul 2017 17:51:27 +0000 (17:51 +0000)]
[Hexagon] Add inline-asm constraint 'a' for modifier register class
For example
asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308761
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Haojie Wang [Fri, 21 Jul 2017 17:25:20 +0000 (17:25 +0000)]
ThinLTO Minimized Bitcode File Size Reduction
Summary: Currently the ThinLTO minimized bitcode file only strip the debug info, but there is still a lot of information in the minimized bit code file that will be not used for thin linker. In this patch, most of the extra information is striped to reduce the minimized bitcode file. Now only ModuleVersion, ModuleInfo, ModuleGlobalValueSummary, ModuleHash, Symtab and Strtab are left. Now the minimized bitcode file size is reduced to 15%-30% of the debug info stripped bitcode file size.
Reviewers: danielcdh, tejohnson, pcc
Reviewed By: pcc
Subscribers: mehdi_amini, aprantl, inglorion, eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D35334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308760
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Simon Dardis [Fri, 21 Jul 2017 17:19:00 +0000 (17:19 +0000)]
[mips] Support -membedded-data and fix a related bug
-membedded-data changes the location of constant data from the .sdata to
the .rodata section. Previously it was (incorrectly) always located in the
.rodata section.
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D35686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308758
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Adrian Prantl [Fri, 21 Jul 2017 16:51:17 +0000 (16:51 +0000)]
De-brief doxygen comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308757
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Adrian Prantl [Fri, 21 Jul 2017 16:51:16 +0000 (16:51 +0000)]
Use default initializers (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308756
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Adrian Prantl [Fri, 21 Jul 2017 16:51:09 +0000 (16:51 +0000)]
Canonicalize the spelling of RefDie (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308755
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Anna Thomas [Fri, 21 Jul 2017 16:30:38 +0000 (16:30 +0000)]
[RuntimeUnroll] NFC: Add a profitability function for mutliexit loop
Separated out the profitability from the safety analysis for multiexit
loop unrolling. Currently, this is an NFC because profitability is true
only if the unroll-runtime-multi-exit is set to true (off-by-default).
This is to ease adding the profitability heuristic up for review at
D35380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308753
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Dinar Temirbulatov [Fri, 21 Jul 2017 16:02:56 +0000 (16:02 +0000)]
[SLPVectorizer] Replace E->Scalars to VL0 at vectorizeTree and move comment, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308750
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Matt Arsenault [Fri, 21 Jul 2017 15:36:16 +0000 (15:36 +0000)]
AMDGPU: Add instruction definitions for some scratch_* instructions
Omit atomics for now since they probably aren't useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308747
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Dinar Temirbulatov [Fri, 21 Jul 2017 15:31:54 +0000 (15:31 +0000)]
[SLPVectorizer] buildTree_rec replace cast<Instruction>(VL[0]) to VL0, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308745
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Petar Jovanovic [Fri, 21 Jul 2017 14:25:42 +0000 (14:25 +0000)]
[mips] Enable IAS by default for Android MIPS64
Follow up to r306280 in Clang.
Enable IAS by default for Android MIPS64 (uses N64 ABI).
Differential Revision: https://reviews.llvm.org/D35482
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308742
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Dmitry Preobrazhensky [Fri, 21 Jul 2017 13:54:11 +0000 (13:54 +0000)]
[AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifier
See bug 33591: https://bugs.llvm.org//show_bug.cgi?id=33591
Reviewers: vpykhtin, artem.tamazov, SamWot, arsenm
Differential Revision: https://reviews.llvm.org/D35424
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308740
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Dinar Temirbulatov [Fri, 21 Jul 2017 13:32:36 +0000 (13:32 +0000)]
[SLPVectorizer] Change canReuseExtract function parameter Opcode from unsigned to Value *, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308739
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Jonas Paulsson [Fri, 21 Jul 2017 13:14:17 +0000 (13:14 +0000)]
[SystemZ] test update
test/CodeGen/SystemZ/loop-01.ll was incorrectly updated by r308729.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308736
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Jonas Paulsson [Fri, 21 Jul 2017 11:59:37 +0000 (11:59 +0000)]
[SystemZ, LoopStrengthReduce]
This patch makes LSR generate better code for SystemZ in the cases of memory
intrinsics, Load->Store pairs or comparison of immediate with memory.
In order to achieve this, the following common code changes were made:
* New TTI hook: LSRWithInstrQueries(), which defaults to false. Controls if
LSR should do instruction-based addressing evaluations by calling
isLegalAddressingMode() with the Instruction pointers.
* In LoopStrengthReduce: handle address operands of memset, memmove and memcpy
as address uses, and call isFoldableMemAccessOffset() for any LSRUse::Address,
not just loads or stores.
SystemZ changes:
* isLSRCostLess() implemented with Insns first, and without ImmCost.
* New function supportedAddressingMode() that is a helper for TTI methods
looking at Instructions passed via pointers.
Review: Ulrich Weigand, Quentin Colombet
https://reviews.llvm.org/D35262
https://reviews.llvm.org/D35049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308729
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Simon Pilgrim [Fri, 21 Jul 2017 10:22:49 +0000 (10:22 +0000)]
[X86][SSE] Add extra (sra (sra x, c1), c2) -> (sra x, (add c1, c2)) test case
We should be able to handle the case where some c1+c2 elements exceed max shift and some don't by performing a clamp after the sum
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308724
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Simon Pilgrim [Fri, 21 Jul 2017 09:58:50 +0000 (09:58 +0000)]
[X86][SSE] Add pre-AVX2 support for (i32 bitcast(v32i1)) -> 2xMOVMSK
Currently we only support (i32 bitcast(v32i1)) using the AVX2 VPMOVMSKB ymm instruction.
This patch adds support for splitting pre-AVX2 targets into 2 x (V)PMOVMSKB xmm instructions and merging the integer results.
In future we could probably generalize this to handle more cases.
Differential Revision: https://reviews.llvm.org/D35303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308723
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Philipp Schaad [Fri, 21 Jul 2017 03:51:01 +0000 (03:51 +0000)]
Commit access test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308712
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Eric Beckmann [Fri, 21 Jul 2017 02:13:02 +0000 (02:13 +0000)]
Only use xml if iconv is found, which is a prerequisite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308711
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Adrian Prantl [Fri, 21 Jul 2017 02:07:33 +0000 (02:07 +0000)]
dsymutil: strip unused types from imported DW_TAG_modules
This patch teaches dsymutil to strip types from the imported
DW_TAG_module inside of an object file (not inside the PCM) if they
can be resolved to the full definition inside the PCM. This reduces
the size of the .dSYM from WebCore from webkit.org by almost 2/3.
<rdar://problem/
33047213>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308710
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Adrian Prantl [Fri, 21 Jul 2017 01:24:05 +0000 (01:24 +0000)]
Debug Info: Don't strip clang module skeleton CUs.
This corrects a (hopefully :-) accidental side-effect of r304020.
rdar://problem/
33442618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308708
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Spyridoula Gravani [Fri, 21 Jul 2017 00:51:32 +0000 (00:51 +0000)]
[DWARF] Generalized verification of .debug_abbrev to be applicable to both .debug_abbrev and .debug_abbrev.dwo sections.
Differential Revision: https://reviews.llvm.org/D35698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308703
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Craig Topper [Fri, 21 Jul 2017 00:40:42 +0000 (00:40 +0000)]
[AVX-512] Fix a bug that prevented some non-temporal loads from using the movntdqa instruction.
The bitconverts here had an input type of 128-bits and an output type of 256 bits. The input type should also have been 256 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308702
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Eric Beckmann [Thu, 20 Jul 2017 23:54:51 +0000 (23:54 +0000)]
Explicitly disable libxml2 on android.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308699
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George Karpenkov [Thu, 20 Jul 2017 23:46:46 +0000 (23:46 +0000)]
Generate a compile_commands.json DB for external projects.
compile_commands.json file is very useful both for tooling and for
reproducible builds.
For files generated from recursive CMake invocation this information was
not previously generated.
Differential Review: https://reviews.llvm.org/D35219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308698
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Evandro Menezes [Thu, 20 Jul 2017 23:41:50 +0000 (23:41 +0000)]
[AArch64] Adjust the cost model for Exynos M1 and M2
Add the cost for the EXT instructions and explicitly add the cost for a few
instructions that were implied by the coarse model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308697
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Eric Beckmann [Thu, 20 Jul 2017 23:14:12 +0000 (23:14 +0000)]
Only defined CombinedRoot if libxml2 is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308694
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Kevin Enderby [Thu, 20 Jul 2017 23:08:41 +0000 (23:08 +0000)]
Add error handling to the dyld compact export entries in libObject.
lld needs a matching change for this will be my next commit.
Expect it to fail build until that matching commit is picked up by the bots.
Like the changes in r296527 for dyld bind entires and the changes in
r298883 for lazy bind, weak bind and rebase entries the export
entries are the last of the dyld compact info to have error handling added.
This follows the model of iterators that can fail that Lang Hanes
designed when fixing the problem for bad archives r275316 (or r275361).
So that iterating through the exports now terminates if there is an error
and returns an llvm::Error with an error message in all cases for malformed
input.
This change provides the plumbing for the error handling, all the needed
testing of error conditions and test cases for all of the unique error messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308690
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Eric Beckmann [Thu, 20 Jul 2017 23:02:49 +0000 (23:02 +0000)]
Only enable libxml2 on linux, because systems like android lack libiconv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308689
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Tim Northover [Thu, 20 Jul 2017 22:58:38 +0000 (22:58 +0000)]
Recommit: GlobalISel: select G_EXTRACT and G_INSERT instructions on AArch64.
It revealed a bug in the Localizer pass which has now been fixed.
This includes the fix for SUBREG_TO_REG committed separately last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308688
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Tim Northover [Thu, 20 Jul 2017 22:58:26 +0000 (22:58 +0000)]
GlobalISel: stop localizer putting constants before EH_LABELs
If the localizer pass puts one of its constants before the label that tells the
unwinder "jump here to handle your exception" then control-flow will skip it,
leaving uninitialized registers at runtime. That's bad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308687
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Rui Ueyama [Thu, 20 Jul 2017 22:39:20 +0000 (22:39 +0000)]
Make a file end with n and remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308685
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Eric Beckmann [Thu, 20 Jul 2017 22:13:16 +0000 (22:13 +0000)]
Make tests always depend on llvm-mt, because some tests are run even w/o
xml2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308682
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Eric Beckmann [Thu, 20 Jul 2017 21:42:04 +0000 (21:42 +0000)]
Implement parsing and writing of a single xml manifest file.
Summary: Implement parsing and writing of a single xml manifest file.
Subscribers: mgorny, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D35425
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308679
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Artem Belevich [Thu, 20 Jul 2017 21:16:03 +0000 (21:16 +0000)]
[NVPTX] Add lowering of i128 params.
The patch adds support of i128 params lowering. The changes are quite trivial to
support i128 as a "special case" of integer type. With this patch, we lower i128
params the same way as aggregates of size 16 bytes: .param .b8 _ [16].
Currently, NVPTX can't deal with the 128 bit integers:
* in some cases because of failed assertions like
ValVTs.size() == OutVals.size() && "Bad return value decomposition"
* in other cases emitting PTX with .i128 or .u128 types (which are not valid [1])
[1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types
Differential Revision: https://reviews.llvm.org/D34555
Patch by: Denys Zariaiev (denys.zariaiev@gmail.com)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308675
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Matt Arsenault [Thu, 20 Jul 2017 21:06:04 +0000 (21:06 +0000)]
AMDGPU: Rename _RTN atomic instructions
Move the _RTN to the end of the name. It reads
better if the other addressing mode components
line up with the non-RTN version. It is also
more convenient to define saddr variants of
FLAT atomics to have the RTN last, and it is
good to have a consistent naming scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308674
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Matt Arsenault [Thu, 20 Jul 2017 21:03:45 +0000 (21:03 +0000)]
Add an ID field to StackObjects
On AMDGPU SGPR spills are really spilled to another register.
The spiller creates the spills to new frame index objects,
which is used as a placeholder.
This will eventually be replaced with a reference to a position
in a VGPR to write to and the frame index deleted. It is
most likely not a real stack location that can be shared
with another stack object.
This is a problem when StackSlotColoring decides it should
combine a frame index used for a normal VGPR spill with
a real stack location and a frame index used for an SGPR.
Add an ID field so that StackSlotColoring has a way
of knowing the different frame index types are
incompatible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308673
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Zvi Rackover [Thu, 20 Jul 2017 21:03:36 +0000 (21:03 +0000)]
[X86] Adding ISel tests for strided-shuffles with non-zero offset. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308672
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Artem Belevich [Thu, 20 Jul 2017 20:57:51 +0000 (20:57 +0000)]
Changed EOL back to LF. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308671
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Matt Morehouse [Thu, 20 Jul 2017 20:43:39 +0000 (20:43 +0000)]
Generate error reports when a fuzz target exits.
Summary:
Implements https://github.com/google/sanitizers/issues/835.
Flush stdout before exiting in test cases.
Since the atexit hook is used for exit reports, pending prints to
stdout can be lost if they aren't flushed before calling exit().
Expect tests to have non-zero exit code if exit() is called.
Reviewers: vitalybuka, kcc
Reviewed By: kcc
Subscribers: eraman, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D35602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308669
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Davide Italiano [Thu, 20 Jul 2017 20:43:05 +0000 (20:43 +0000)]
[PGO] Move the PGOInstrumentation pass to new OptRemark API.
This fixes PR33791.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308668
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Francis Visoiu Mistrih [Thu, 20 Jul 2017 20:31:44 +0000 (20:31 +0000)]
[PEI] Fix refactoring from r308664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308666
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Mandeep Singh Grang [Thu, 20 Jul 2017 20:20:00 +0000 (20:20 +0000)]
[COFF, ARM64, CodeView] Add support to emit CodeView debug info for ARM64 COFF
Reviewers: compnerd, ruiu, rnk, zturner
Reviewed By: rnk
Subscribers: majnemer, aemerson, aprantl, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D35518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308665
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Francis Visoiu Mistrih [Thu, 20 Jul 2017 20:17:17 +0000 (20:17 +0000)]
[PEI] Separate saving and restoring CSRs into different functions. NFC
Split insertCSRSpillsAndRestores into insertCSRSaves + insertCSRRestores.
This is mostly useful for future shrink-wrapping improvements where we
want to save / restore a specific part of the CSRs in a specific block.
Differential Revision: https://reviews.llvm.org/D35644
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308664
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Kostya Serebryany [Thu, 20 Jul 2017 20:15:13 +0000 (20:15 +0000)]
[libFuzzer] delete stale code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308663
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James Y Knight [Thu, 20 Jul 2017 20:09:11 +0000 (20:09 +0000)]
[SPARC] Clean up the support for disabling fsmuld and fmuls instructions.
Summary:
Also enable no-fsmuld for sparcv7 (which doesn't have the
instruction).
The previous code which used a post-processing pass to do this was
unnecessary; disabling the instruction is entirely sufficient.
Reviewers: jacob_hansen, ekedaigle
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D35576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308661
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