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Chris Bieneman [Thu, 11 Oct 2018 04:00:51 +0000 (04:00 +0000)]
[Coverage] Apply filtered paths to summary
Summary:
The script to generate code coverage reports supports passing filter paths to llvm-cov when generating the HTML reports, but doesn't pass those paths to the summary generation as well. This results in a summary report that doesn't match the HTML report.
This patch addresses the problem by also passing the filter paths to the summary report generation.
Reviewers: vsk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53110
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344217
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Zachary Turner [Thu, 11 Oct 2018 03:42:17 +0000 (03:42 +0000)]
Use fully qualified namespace name.
llvm::detail is not the only namespace named detail. So if
someone has done a `using namespace llvm::support`, for example,
this will fail with an ambiguous namespace name. Granted
people generally shouldn't be using large namespaces like that,
but it's common at local function scopes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344216
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Thomas Lively [Thu, 11 Oct 2018 00:49:24 +0000 (00:49 +0000)]
[WebAssembly][NFC] Use intrinsic dag nodes directly
Summary: Instead of custom lowering to WebAssemblyISD nodes first.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53119
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344211
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Fangrui Song [Thu, 11 Oct 2018 00:08:59 +0000 (00:08 +0000)]
[MC][ELF] Fix section_mergeable_size.ll
Some targets use %progbits instead of @progbits.
Updating that check with a {{[@%]}}progbits regex to make those bots happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344206
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Thomas Lively [Thu, 11 Oct 2018 00:01:25 +0000 (00:01 +0000)]
[WebAssembly] Saturating float to int intrinsics
Summary:
Although the saturating float to int instructions are already
emitted from normal IR, the fpto{s,u}i instructions produce poison
values if the argument cannot fit in the result type. These intrinsics
are therefore necessary to get guaranteed defined saturating behavior.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344204
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Saleem Abdulrasool [Wed, 10 Oct 2018 23:53:12 +0000 (23:53 +0000)]
llvm-c: Add C APIs to access DebugLoc info
Add thin shims to C interface to provide access to DebugLoc info for
Instructions, GlobalVariables and Functions. Patch by Josh Berdine!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344202
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Richard Smith [Wed, 10 Oct 2018 23:13:47 +0000 (23:13 +0000)]
Add a flag to remap manglings when reading profile data information.
This can be used to preserve profiling information across codebase
changes that have widespread impact on mangled names, but across which
most profiling data should still be usable. For example, when switching
from libstdc++ to libc++, or from the old libstdc++ ABI to the new ABI,
or even from a 32-bit to a 64-bit build.
The user can provide a remapping file specifying parts of mangled names
that should be treated as equivalent (eg, std::__1 should be treated as
equivalent to std::__cxx11), and profile data will be treated as
applying to a particular function if its name is equivalent to the name
of a function in the profile data under the provided equivalences. See
the documentation change for a description of how this is configured.
Remapping is supported for both sample-based profiling and instruction
profiling. We do not support remapping indirect branch target
information, but all other profile data should be remapped
appropriately.
Support is only added for the new pass manager. If someone wants to also
add support for this for the old pass manager, doing so should be
straightforward.
This is the LLVM side of Clang r344199.
Reviewers: davidxl, tejohnson, dlj, erik.pilkington
Subscribers: mehdi_amini, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51249
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344200
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Warren Ristow [Wed, 10 Oct 2018 22:54:31 +0000 (22:54 +0000)]
[LTO] Account for overriding lib calls via the alias attribute
Given a library call that is represented as an llvm intrinsic call, but
later transformed to an actual call, if an overriding definition of that
library routine is provided indirectly via an alias, prevent LTO from
eliminating the definition.
This is a fix for PR38547.
Differential Revision: https://reviews.llvm.org/D52836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344198
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Nick Desaulniers [Wed, 10 Oct 2018 22:52:32 +0000 (22:52 +0000)]
[MC][ELF] compute entity size for explicit sections
Summary:
Global variables might declare themselves to be in explicit sections.
Calculate the entity size always to prevent assembler warnings
"entity size for SHF_MERGE not specified" when sections are to be
marked merge-able.
Fixes PR31828.
Reviewers: rnk, echristo
Reviewed By: rnk
Subscribers: llvm-commits, pirama, srhines
Differential Revision: https://reviews.llvm.org/D53056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344197
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Craig Topper [Wed, 10 Oct 2018 21:48:34 +0000 (21:48 +0000)]
[X86] Prevent non-temporal loads from folding into instructions by blocking them in X86DAGToDAGISel::IsProfitableToFold rather than with a predicate.
Remove tryFoldVecLoad since tryFoldLoad would call IsProfitableToFold and pick up the new check.
This saves about 5K out of ~600K on the generated isel table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344189
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Chris Bieneman [Wed, 10 Oct 2018 21:36:12 +0000 (21:36 +0000)]
[CMake] NFC. Updating documentation on options
The Ninja pool options are only supported with the Ninja generator and
should be called out as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344188
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Richard Smith [Wed, 10 Oct 2018 21:31:01 +0000 (21:31 +0000)]
Support for remapping profile data when symbols change, for sample-based
profiling.
Reviewers: davidxl, tejohnson, dlj, erik.pilkington
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51248
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344187
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George Burgess IV [Wed, 10 Oct 2018 21:28:44 +0000 (21:28 +0000)]
Replace most users of UnknownSize with LocationSize::unknown(); NFC
Moving away from UnknownSize is part of the effort to migrate us to
LocationSizes (e.g. the cleanup promised in D44748).
This doesn't entirely remove all of the uses of UnknownSize; some uses
require tweaks to assume that UnknownSize isn't just some kind of int.
This patch is intended to just be a trivial replacement for all places
where LocationSize::unknown() will Just Work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344186
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Armando Montanez [Wed, 10 Oct 2018 21:16:57 +0000 (21:16 +0000)]
Test commit: fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344185
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Richard Smith [Wed, 10 Oct 2018 21:09:37 +0000 (21:09 +0000)]
Support for remapping profile data when symbols change, for
instrumentation-based profiling.
Reviewers: davidxl, tejohnson, dlj, erik.pilkington
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51247
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344184
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James Y Knight [Wed, 10 Oct 2018 21:07:02 +0000 (21:07 +0000)]
llvm-ar: Darwin archive format fixes.
* Support writing the DARWIN64 symbol table format.
* In darwin archives, emit a symbol table whenever requested, even
when there are no members, as the apple linker will abort if given
an archive without a symbol table.
Added tests for same, and also simplified and moved the GNU 64-bit
symbol table test into archive-symtab.test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344183
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Roman Lebedev [Wed, 10 Oct 2018 20:50:52 +0000 (20:50 +0000)]
[NFC][X86][AArch64] extract-bits.ll: add tests with constants+storing results.
As noted in https://reviews.llvm.org/D53080#inline-467678,
this *may* get pessimized by that diff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344182
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Sanjay Patel [Wed, 10 Oct 2018 20:47:46 +0000 (20:47 +0000)]
[InstCombine] reverse 'trunc X to <N x i1>' canonicalization; 2nd try
Re-trying r344082 because it unintentionally included extra diffs.
Original commit message:
icmp ne (and X, 1), 0 --> trunc X to N x i1
Ideally, we'd do the same for scalars, but there will likely be
regressions unless we add more trunc folds as we're doing here
for vectors.
The motivating vector case is from PR37549:
https://bugs.llvm.org/show_bug.cgi?id=37549
define <4 x float> @bitwise_select(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %w) {
%c = fcmp ole <4 x float> %x, %y
%s = sext <4 x i1> %c to <4 x i32>
%s1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
%s2 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
%cond = or <4 x i32> %s1, %s2
%condtr = trunc <4 x i32> %cond to <4 x i1>
%r = select <4 x i1> %condtr, <4 x float> %z, <4 x float> %w
ret <4 x float> %r
}
Here's a sampling of the vector codegen for that case using
mask+icmp (current behavior) vs. trunc (with this patch):
AVX before:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vandps LCPI0_0(%rip), %xmm0, %xmm0
vxorps %xmm1, %xmm1, %xmm1
vpcmpeqd %xmm1, %xmm0, %xmm0
vblendvps %xmm0, %xmm3, %xmm2, %xmm0
AVX after:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
AVX512f before:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vpbroadcastd LCPI0_0(%rip), %xmm1 ## xmm1 = [1,1,1,1]
vptestnmd %zmm1, %zmm0, %k1
vblendmps %zmm3, %zmm2, %zmm0 {%k1}
AVX512f after:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vpslld $31, %xmm0, %xmm0
vptestmd %zmm0, %zmm0, %k1
vblendmps %zmm2, %zmm3, %zmm0 {%k1}
AArch64 before:
fcmge v0.4s, v1.4s, v0.4s
zip1 v1.4s, v0.4s, v0.4s
zip2 v0.4s, v0.4s, v0.4s
orr v0.16b, v1.16b, v0.16b
movi v1.4s, #1
and v0.16b, v0.16b, v1.16b
cmeq v0.4s, v0.4s, #0
bsl v0.16b, v3.16b, v2.16b
AArch64 after:
fcmge v0.4s, v1.4s, v0.4s
zip1 v1.4s, v0.4s, v0.4s
zip2 v0.4s, v0.4s, v0.4s
orr v0.16b, v1.16b, v0.16b
bsl v0.16b, v2.16b, v3.16b
PowerPC-le before:
xvcmpgesp 34, 35, 34
vspltisw 0, 1
vmrglw 3, 2, 2
vmrghw 2, 2, 2
xxlor 0, 35, 34
xxlxor 35, 35, 35
xxland 34, 0, 32
vcmpequw 2, 2, 3
xxsel 34, 36, 37, 34
PowerPC-le after:
xvcmpgesp 34, 35, 34
vmrglw 3, 2, 2
vmrghw 2, 2, 2
xxlor 0, 35, 34
xxsel 34, 37, 36, 0
Differential Revision: https://reviews.llvm.org/D52747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344181
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Thomas Lively [Wed, 10 Oct 2018 20:40:54 +0000 (20:40 +0000)]
[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]
Summary:
By moving that line into the `I` multiclass.
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53093
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344180
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Roman Lebedev [Wed, 10 Oct 2018 20:40:12 +0000 (20:40 +0000)]
[X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISelLowering
Summary:
As discussed in [[ https://bugs.llvm.org/show_bug.cgi?id=38938 | PR38938 ]],
we fail to emit `BEXTR` if the mask is shifted.
We can't deal with that in `X86DAGToDAGISel` `before the address mode for the inc is selected`,
and we can't really do it in the normal DAGCombine, because we don't have generic `ISD::BitFieldExtract` node,
and if we simply turn the shifted mask into a normal mask + shift-left, it will be folded back.
So it would seem X86ISelLowering is the place to handle this.
This patch only moves the matchBEXTRFromAnd()
from X86DAGToDAGISel to X86ISelLowering.
It does not add support for the 'shifted mask' pattern.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344179
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Sanjay Patel [Wed, 10 Oct 2018 20:39:39 +0000 (20:39 +0000)]
revert r344082: [InstCombine] reverse 'trunc X to <N x i1>' canonicalization
This commit accidentally included the diffs from D53057.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344178
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David Bolvansky [Wed, 10 Oct 2018 20:10:37 +0000 (20:10 +0000)]
[DwarfVerifier] Fixed -Wimplicit-fallthrough warning
Reviewers: JDevlieghere, RKSimon
Reviewed By: JDevlieghere
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344176
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Thomas Lively [Wed, 10 Oct 2018 19:09:16 +0000 (19:09 +0000)]
[WebAssembly][NFC] Use vnot patfrag to simplify v128.not
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344175
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Renato Golin [Wed, 10 Oct 2018 18:49:49 +0000 (18:49 +0000)]
[LV] Add a new reduction pattern match
Adding a new reduction pattern match for vectorizing code similar to TSVC s3111:
for (int i = 0; i < N; i++)
if (a[i] > b)
sum += a[i];
This patch adds support for fadd, fsub and fmull, as well as multiple
branches and different (but compatible) instructions (ex. add+sub) in
different branches.
I have forwarded to trunk, added fsub and fmul functionality and
additional tests, but the credit goes to Takahiro, who did most of the
actual work.
Differential Revision: https://reviews.llvm.org/D49168
Patch by Takahiro Miyoshi <takahiro.miyoshi@linaro.org>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344172
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Francis Visoiu Mistrih [Wed, 10 Oct 2018 18:43:42 +0000 (18:43 +0000)]
Reland: [OptRemarks] Add library for parsing optimization remarks
Add a library that parses optimization remarks (currently YAML, so based
on the YAMLParser).
The goal is to be able to provide tools a remark parser that is not
completely dependent on YAML, in case we decide to change the format
later.
It exposes a C API which takes a handler that is called with the remark
structure.
It adds a libLLVMOptRemark.a static library, and it's used in-tree by
the llvm-opt-report tool (from which the parser has been mostly moved
out).
Differential Revision: https://reviews.llvm.org/D52776
Fixed the tests by removing the usage of C++11 strings, which seems not
to be supported by gcc 4.8.4 if they're used as a macro argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344171
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Scott Linder [Wed, 10 Oct 2018 18:14:02 +0000 (18:14 +0000)]
[Support] Remove redundant qualifiers in YAMLTraits (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344166
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Francis Visoiu Mistrih [Wed, 10 Oct 2018 18:07:44 +0000 (18:07 +0000)]
Revert "[OptRemarks] Add library for parsing optimization remarks"
This reverts commit
1cc98e6672b6319fdb00b70dd4474aabdadbe193.
Seems to break bots: http://lab.llvm.org:8011/builders/clang-x86_64-linux-abi-test/builds/33398/steps/build-unified-tree/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344164
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Volkan Keles [Wed, 10 Oct 2018 18:01:48 +0000 (18:01 +0000)]
[GlobalISel] Fix the artifact combiner to fold G_IMPLICIT_DEF properly
Summary:
GlobalISel generates incorrect code because the legalizer artifact
combiner assumes `G_[SZ]EXT (G_IMPLICIT_DEF)` is equivalent to
`G_IMPLICIT_DEF `.
Replace `G_[SZ]EXT (G_IMPLICIT_DEF)` with 0 because the top bits
will be 0 for G_ZEXT and 0/1 for the G_SEXT.
Reviewers: aditya_nandakumar, dsanders, aemerson, javed.absar
Reviewed By: aditya_nandakumar
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D52996
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344163
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Francis Visoiu Mistrih [Wed, 10 Oct 2018 17:58:09 +0000 (17:58 +0000)]
[OptRemarks] Add library for parsing optimization remarks
Add a library that parses optimization remarks (currently YAML, so based
on the YAMLParser).
The goal is to be able to provide tools a remark parser that is not
completely dependent on YAML, in case we decide to change the format
later.
It exposes a C API which takes a handler that is called with the remark
structure.
It adds a libLLVMOptRemark.a static library, and it's used in-tree by
the llvm-opt-report tool (from which the parser has been mostly moved
out).
Differential Revision: https://reviews.llvm.org/D52776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344162
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Renato Golin [Wed, 10 Oct 2018 17:55:21 +0000 (17:55 +0000)]
[VPlan] Fix CondBit quoting in dumpBasicBlock
Quotes were being printed for VPInstructions but not the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344161
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Craig Topper [Wed, 10 Oct 2018 17:37:32 +0000 (17:37 +0000)]
Change the timestamp of llvmcache-foo file to meet the thinLTO prune policy
The case will randomly fail if we test it with command "
while llvm-lit test/tools/gold/X86/cache.ll ; do true; done". It is because the llvmcache-foo file is younger than llvmcache-
349F039B8EB076D412007D82778442BED3148C4E and llvmcache-
A8107945C65C2B2BBEE8E61AA604C311D60D58D6. But due to timestamp precision reason their timestamp is the same. Given the same timestamp, the file prune policy is to remove bigger size file first, so mostly foo file is removed for its bigger size. And the files size is under threshold after deleting foo file. That's what test case expect.
However sometimes, the precision is enough to measure that timestamp of llvmcache-
349F039B8EB076D412007D82778442BED3148C4E and llvmcache-
A8107945C65C2B2BBEE8E61AA604C311D60D58D6 are smaller than foo, so llvmcache-
349F039B8EB076D412007D82778442BED3148C4E and llvmcache-
A8107945C65C2B2BBEE8E61AA604C311D60D58D6 are deleted first. Since the files size is still above the file size threshold after deleting the 2 files, the foo file is also deleted. And then the test case fails, because it expect only one file should be deleted instead of 3.
The fix is to change the timestamp of llvmcache-foo file to meet the thinLTO prune policy.
Patch by Luo Yuanke.
Differential Revision: https://reviews.llvm.org/D52452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344158
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Scott Linder [Wed, 10 Oct 2018 16:35:47 +0000 (16:35 +0000)]
Relax trivial cast requirements in CallPromotionUtils
Differential Revision: https://reviews.llvm.org/D52792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344153
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Guillaume Chatelet [Wed, 10 Oct 2018 16:16:43 +0000 (16:16 +0000)]
[llvm-exegesis] Fix always true assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344151
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Andrea Di Biagio [Wed, 10 Oct 2018 16:08:02 +0000 (16:08 +0000)]
[llvm-mca] Minor refactoring in preparation for a patch that will fully fix PR36671. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344149
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Guillaume Chatelet [Wed, 10 Oct 2018 14:57:32 +0000 (14:57 +0000)]
[llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344145
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Andrea Di Biagio [Wed, 10 Oct 2018 14:46:54 +0000 (14:46 +0000)]
[llvm-mca][BtVer2] Add two more move-elimination tests. NFC
These should test all the optimizable moves on Jaguar.
A follow-up patch will teach how to recognize these optimizable register moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344144
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Wed, 10 Oct 2018 14:22:48 +0000 (14:22 +0000)]
[llvm-exegesis][NFC] Code simplification
Summary: Simplify code by having LLVMState hold the RegisterAliasingTrackerCache.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344143
91177308-0d34-0410-b5e6-
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Nirav Dave [Wed, 10 Oct 2018 14:15:52 +0000 (14:15 +0000)]
[DAGCombine] Improve Load-Store Forwarding
Summary:
Extend analysis forwarding loads from preceeding stores to work with
extended loads and truncated stores to the same address so long as the
load is fully subsumed by the store.
Hexagon's swp-epilog-phis.ll and swp-memrefs-epilog1.ll test are
deleted as they've no longer seem to be relevant.
Reviewers: RKSimon, rnk, kparzysz, javed.absar
Subscribers: sdardis, nemanjai, hiraditya, atanasyan, llvm-commits
Differential Revision: https://reviews.llvm.org/D49200
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344142
91177308-0d34-0410-b5e6-
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Sanjay Patel [Wed, 10 Oct 2018 13:39:59 +0000 (13:39 +0000)]
[x86] allow single source horizontal op matching (PR39195)
This is intended to restore horizontal codegen to what it looked like before IR demanded elements improved in:
rL343727
As noted in PR39195:
https://bugs.llvm.org/show_bug.cgi?id=39195
...horizontal ops can be worse for performance than a shuffle+regular binop, so I've added a TODO. Ideally, we'd
solve that in a machine instruction pass, but a quicker solution will be adding a 'HasFastHorizontalOp' feature
bit to deal with it here in the DAG.
Differential Revision: https://reviews.llvm.org/D52997
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344141
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Wed, 10 Oct 2018 13:27:25 +0000 (13:27 +0000)]
Lift VFS from clang to llvm (NFC)
This patch moves the virtual file system form clang to llvm so it can be
used by more projects.
Concretely the patch:
- Moves VirtualFileSystem.{h|cpp} from clang/Basic to llvm/Support.
- Moves the corresponding unit test from clang to llvm.
- Moves the vfs namespace from clang::vfs to llvm::vfs.
- Formats the lines affected by this change, mostly this is the result of
the added llvm namespace.
RFC on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2018-October/126657.html
Differential revision: https://reviews.llvm.org/D52783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344140
91177308-0d34-0410-b5e6-
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John Brawn [Wed, 10 Oct 2018 13:03:23 +0000 (13:03 +0000)]
[llvm-exegesis] Fix function return generation so it doesn't return register 0
When fillMachineFunction generates a return on targets without a return opcode
(such as AArch64) it should pass an empty set of registers as the return
registers, not 0 which means register number zero.
Differential Revision: https://reviews.llvm.org/D53074
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344139
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 10 Oct 2018 13:00:49 +0000 (13:00 +0000)]
[TargetLowering] SimplifyDemandedBits - rename demanded mask args. NFCI.
Help stop bugs like rL343935 by making the 'original' DemandedBits arg more obviously not the mask that is actually used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344138
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Wed, 10 Oct 2018 12:58:40 +0000 (12:58 +0000)]
[llvm-exegesis][NFC] Fix typo
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344137
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 10 Oct 2018 12:32:13 +0000 (12:32 +0000)]
[TargetLowering] SimplifyDemandedBits - pull out repeated getOperands. NFCI.
Part of a minor cleanup to make all the switch statements more consistent prior to improving vector support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344136
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Carlos Alberto Enciso [Wed, 10 Oct 2018 12:09:34 +0000 (12:09 +0000)]
Revert "[DebugInfo][Dexter] Unreachable line stepped onto after SimplifyCFG."
This reverts commit r344120.
It was causing buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344135
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Valery Pykhtin [Wed, 10 Oct 2018 10:52:57 +0000 (10:52 +0000)]
[TableGen] fix assert in !cast when used out of definition in a multiclass
Differential Revision: https://reviews.llvm.org/D53068
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344134
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Wed, 10 Oct 2018 10:44:15 +0000 (10:44 +0000)]
[TargetLowering] Add root node back to work list after successful SimplifyDemandedBits/SimplifyDemandedVectorElts
Similar to what already happens in the DAGCombiner wrappers, this patch adds the root nodes back onto the worklist if the DCI wrappers' SimplifyDemandedBits/SimplifyDemandedVectorElts were successful.
Differential Revision: https://reviews.llvm.org/D53026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344132
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Wed, 10 Oct 2018 10:09:42 +0000 (10:09 +0000)]
[llvm-exegesis] Fix broken build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344131
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Wed, 10 Oct 2018 09:45:17 +0000 (09:45 +0000)]
[llvm-exegesis][NFC] Simplify code now that Instruction has more semantic
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53065
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344130
91177308-0d34-0410-b5e6-
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Jonas Paulsson [Wed, 10 Oct 2018 09:30:29 +0000 (09:30 +0000)]
[SystemZ] Temporarily disable high VFs with integer div/rem.
Until mischeduler is clever enough to avoid spilling in a vectorized loop
with many (scalar) DLRs it is better to avoid high vectorization factors (8
and above).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344129
91177308-0d34-0410-b5e6-
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Neil Henning [Wed, 10 Oct 2018 09:27:45 +0000 (09:27 +0000)]
Fix an ordering bug in the scalarizer.
I've added a new test case that causes the scalarizer to try and use
dead-and-erased values - caused by the basic blocks not being in
domination order within the function. To fix this, instead of iterating
through the blocks in function order, I walk them in reverse post order.
Differential Revision: https://reviews.llvm.org/D52540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344128
91177308-0d34-0410-b5e6-
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Guillaume Chatelet [Wed, 10 Oct 2018 09:12:36 +0000 (09:12 +0000)]
[llvm-exegesis] Remove unused variable, add more semantic to Instruction.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53062
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344127
91177308-0d34-0410-b5e6-
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Carlos Alberto Enciso [Wed, 10 Oct 2018 08:29:55 +0000 (08:29 +0000)]
[DebugInfo][Dexter] Unreachable line stepped onto after SimplifyCFG.
When SimplifyCFG changes the PHI node into a select instruction, the debug line records becomes ambiguous. It causes the debugger to display unreachable source lines.
Differential Revision: https://reviews.llvm.org/D52887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344120
91177308-0d34-0410-b5e6-
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Craig Topper [Wed, 10 Oct 2018 07:43:35 +0000 (07:43 +0000)]
[X86] Remove FeatureRTM from Skylake processor list
Summary:
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz
This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.
Patch by Thiago Macieira
Reviewers: erichkeane, craig.topper
Reviewed By: craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344116
91177308-0d34-0410-b5e6-
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Jonas Paulsson [Wed, 10 Oct 2018 07:36:27 +0000 (07:36 +0000)]
[SystemZ] Take better care when computing needed vector registers in TTI.
A new function getNumVectorRegs() is better to use for the number of needed
vector registers instead of getNumberOfParts(). This is to make sure that the
number of vector registers (and typically operations) required for a vector
type is accurate.
getNumberOfParts() which was previously used works by splitting the vector
type until it is legal gives incorrect results for types with a non
power of two number of elements (rare).
A new static function getScalarSizeInBits() that also checks for a pointer
type and returns 64U for it since otherwise it gets a value of 0). Used in a
few places where Ty may be pointer.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344115
91177308-0d34-0410-b5e6-
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George Burgess IV [Wed, 10 Oct 2018 06:39:40 +0000 (06:39 +0000)]
[Analysis] Make LocationSizes carry an 'imprecise' bit
There are places where we need to merge multiple LocationSizes of
different sizes into one, and get a sensible result.
There are other places where we want to optimize aggressively based on
the value of a LocationSizes (e.g. how can a store of four bytes be to
an area of storage that's only two bytes large?)
This patch makes LocationSize hold an 'imprecise' bit to note whether
the LocationSize can be treated as an upper-bound and lower-bound for
the size of a location, or just an upper-bound.
This concludes the series of patches leading up to this. The most recent
of which is r344108.
Fixes PR36228.
Differential Revision: https://reviews.llvm.org/D44748
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344114
91177308-0d34-0410-b5e6-
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Max Kazantsev [Wed, 10 Oct 2018 04:19:38 +0000 (04:19 +0000)]
[NFC] Make a variable const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344113
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Nemanja Ivanovic [Wed, 10 Oct 2018 04:18:35 +0000 (04:18 +0000)]
[PowerPC][NFC] Add a test case for extract and store patterns
An upcoming patch will change the codegen for these patterns. This test case is
added now so that the patch can show the differences in codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344112
91177308-0d34-0410-b5e6-
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Dylan McKay [Wed, 10 Oct 2018 03:21:42 +0000 (03:21 +0000)]
[AVR] Fix the 'call.ll' CodeGen test
Commit r343851 changed the format of the generated instructions.
An unnecessary load has been removed. Previously, a value would be moved
from r24 into a temporary register just to be copied into r30 before the
indirect call. Now, codegen immediately loads r24 into r30, saving a
MOVW instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344111
91177308-0d34-0410-b5e6-
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QingShan Zhang [Wed, 10 Oct 2018 02:33:48 +0000 (02:33 +0000)]
[PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8
For ISD::SIGN_EXTEND_INREG operation of v2i16 and v2i8 types will cause assert because they are registered as custom operation.
So that the type legalization phase will enter the custom hook, which do not handle ISD::SIGN_EXTEND_INREG operation and fall throw into unreachable assert.
Patch By: wuzish (Zixuan Wu)
Differential Revision: https://reviews.llvm.org/D52449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344109
91177308-0d34-0410-b5e6-
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George Burgess IV [Wed, 10 Oct 2018 01:35:22 +0000 (01:35 +0000)]
[Analysis] Make LocationSize pretty-printing more descriptive
This is the third patch in a series intended to make
https://reviews.llvm.org/D44748 more easily reviewable. Please see that
patch for more context. The second being r344013.
The intent is to make the output of printing a LocationSize more
precise. The main motivation for this is that we plan to add a bit to
distinguish whether a given LocationSize is an upper-bound or is
precise; making that information available in pretty-printing is nice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344108
91177308-0d34-0410-b5e6-
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Thomas Lively [Wed, 10 Oct 2018 01:09:09 +0000 (01:09 +0000)]
[WebAssembly] Fix fneg lowering
Summary:
Subtraction from zero and floating point negation do not have the same
semantics, so fix lowering.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52948
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344107
91177308-0d34-0410-b5e6-
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Heejin Ahn [Wed, 10 Oct 2018 01:04:02 +0000 (01:04 +0000)]
[WebAssembly] Improve comments for SIMD instruction definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344106
91177308-0d34-0410-b5e6-
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George Karpenkov [Wed, 10 Oct 2018 00:57:24 +0000 (00:57 +0000)]
[sancov] Generalize the code to get the previous instruction to multiple architectures
sancov subtracts one from the address to get the previous instruction,
which makes sense on x86_64, but not on other platforms.
This change ensures that the offset is correct for different platforms.
The logic for computing the offset is copied from sanitizer_common.
Differential Revision: https://reviews.llvm.org/D53039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344103
91177308-0d34-0410-b5e6-
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Fangrui Song [Wed, 10 Oct 2018 00:15:31 +0000 (00:15 +0000)]
[opt] Change the parameter of OptTable::PrintHelp from Name to Usage and don't append "[options] <inputs>"
Summary:
Before, "[options] <inputs>" is unconditionally appended to the `Name` parameter. It is more flexible to change its semantic to `Usage` and let user customize the usage line.
% llvm-objcopy
...
USAGE: llvm-objcopy <input> [ <output> ] [options] <inputs>
With this patch:
% llvm-objcopy
...
USAGE: llvm-objcopy input [output]
Reviewers: rupprecht, alexshap, jhenderson
Reviewed By: rupprecht
Subscribers: jakehehrlich, mehdi_amini, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344097
91177308-0d34-0410-b5e6-
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Zachary Turner [Tue, 9 Oct 2018 23:42:28 +0000 (23:42 +0000)]
[git-llvm] Fix some issues surrouding EOL conversion on Windows.
This patch fixes three issues.
The first is that we didn't consider files which are explicitly
set to eolstyle CRLF in the repo, and there are a handful of
these.
Second is that dos2unix doesn't have a -q option in GnuWin32,
so this codepath wasn't working properly.
Finally with newer versions of Python (or newer versions of Git,
or some combination of the two) patches can't be applied when
we treat stdin as text, because Python silently undoes all the
work we did to convert the newlines to LF using dos2unix by
using universal_newlines=True and then converting them *back*
to CRLF. So we need to add a way to force stdin to be treated
as binary, and use it when LF-newlines are required.
Differential Revision: https://reviews.llvm.org/D51444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344095
91177308-0d34-0410-b5e6-
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Thomas Lively [Tue, 9 Oct 2018 23:33:16 +0000 (23:33 +0000)]
[WebAssembly] Handle V128 register class in explicit locals pass
Summary:
Also add tests to catch crashes in passes that are not normally run in
tests.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344094
91177308-0d34-0410-b5e6-
96231b3b80d8
Nemanja Ivanovic [Tue, 9 Oct 2018 23:20:11 +0000 (23:20 +0000)]
[DAGCombiner] Expand combining of FP logical ops to sign-setting FP ops
We already do the following combines:
(bitcast int (and (bitcast fp X to int), 0x7fff...) to fp) -> fabs X
(bitcast int (xor (bitcast fp X to int), 0x8000...) to fp) -> fneg X
When the target has "bit preserving fp logic". This patch just extends it
to also combine:
(bitcast int (or (bitcast fp X to int), 0x8000...) to fp) -> fneg (fabs X)
As some targets have fnabs and even those that don't can efficiently lower
both the fabs and the fneg.
Differential revision: https://reviews.llvm.org/D44548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344093
91177308-0d34-0410-b5e6-
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Rong Xu [Tue, 9 Oct 2018 23:10:56 +0000 (23:10 +0000)]
[X86] Fix sanitizer bot failure from 344085
Fix the memory issue exposed by sanitizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344092
91177308-0d34-0410-b5e6-
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Nemanja Ivanovic [Tue, 9 Oct 2018 23:02:53 +0000 (23:02 +0000)]
[PowerPC][NFC] Commit nabs test case in preparation for committing D44548
This just adds the test case so that the different code gen is clearly visible
when the DAG Combine lands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344091
91177308-0d34-0410-b5e6-
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Justin Bogner [Tue, 9 Oct 2018 22:40:04 +0000 (22:40 +0000)]
[LV] Move test for r343954 into x86 subdirectory
This test uses an x86 triple, so it needs to be in the x86 specific
test directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344087
91177308-0d34-0410-b5e6-
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Heejin Ahn [Tue, 9 Oct 2018 22:23:39 +0000 (22:23 +0000)]
[WebAssembly] Improve readability of SIMD instructions (NFC)
Summary:
- Categorize instructions into the categories as in the SIMD spec
- Move SIMD-related definition to WebAssemblyInstrSIMD.td
- Put definition and use of patterns together
- Add newlines here and there
Reviewers: tlively
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53045
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344086
91177308-0d34-0410-b5e6-
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Rong Xu [Tue, 9 Oct 2018 22:03:40 +0000 (22:03 +0000)]
Recommit r343993: [X86] condition branches folding for three-way conditional codes
Fix the memory issue exposed by sanitizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344085
91177308-0d34-0410-b5e6-
96231b3b80d8
Cameron McInally [Tue, 9 Oct 2018 21:48:00 +0000 (21:48 +0000)]
[FPEnv] PatternMatcher support for checking FNEG ignoring signed zeros
https://reviews.llvm.org/D52934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344084
91177308-0d34-0410-b5e6-
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Sanjay Patel [Tue, 9 Oct 2018 21:26:01 +0000 (21:26 +0000)]
[InstCombine] reverse 'trunc X to <N x i1>' canonicalization
icmp ne (and X, 1), 0 --> trunc X to N x i1
Ideally, we'd do the same for scalars, but there will likely be
regressions unless we add more trunc folds as we're doing here
for vectors.
The motivating vector case is from PR37549:
https://bugs.llvm.org/show_bug.cgi?id=37549
define <4 x float> @bitwise_select(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %w) {
%c = fcmp ole <4 x float> %x, %y
%s = sext <4 x i1> %c to <4 x i32>
%s1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
%s2 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
%cond = or <4 x i32> %s1, %s2
%condtr = trunc <4 x i32> %cond to <4 x i1>
%r = select <4 x i1> %condtr, <4 x float> %z, <4 x float> %w
ret <4 x float> %r
}
Here's a sampling of the vector codegen for that case using
mask+icmp (current behavior) vs. trunc (with this patch):
AVX before:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vandps LCPI0_0(%rip), %xmm0, %xmm0
vxorps %xmm1, %xmm1, %xmm1
vpcmpeqd %xmm1, %xmm0, %xmm0
vblendvps %xmm0, %xmm3, %xmm2, %xmm0
AVX after:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
AVX512f before:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vpbroadcastd LCPI0_0(%rip), %xmm1 ## xmm1 = [1,1,1,1]
vptestnmd %zmm1, %zmm0, %k1
vblendmps %zmm3, %zmm2, %zmm0 {%k1}
AVX512f after:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vpslld $31, %xmm0, %xmm0
vptestmd %zmm0, %zmm0, %k1
vblendmps %zmm2, %zmm3, %zmm0 {%k1}
AArch64 before:
fcmge v0.4s, v1.4s, v0.4s
zip1 v1.4s, v0.4s, v0.4s
zip2 v0.4s, v0.4s, v0.4s
orr v0.16b, v1.16b, v0.16b
movi v1.4s, #1
and v0.16b, v0.16b, v1.16b
cmeq v0.4s, v0.4s, #0
bsl v0.16b, v3.16b, v2.16b
AArch64 after:
fcmge v0.4s, v1.4s, v0.4s
zip1 v1.4s, v0.4s, v0.4s
zip2 v0.4s, v0.4s, v0.4s
orr v0.16b, v1.16b, v0.16b
bsl v0.16b, v2.16b, v3.16b
PowerPC-le before:
xvcmpgesp 34, 35, 34
vspltisw 0, 1
vmrglw 3, 2, 2
vmrghw 2, 2, 2
xxlor 0, 35, 34
xxlxor 35, 35, 35
xxland 34, 0, 32
vcmpequw 2, 2, 3
xxsel 34, 36, 37, 34
PowerPC-le after:
xvcmpgesp 34, 35, 34
vmrglw 3, 2, 2
vmrghw 2, 2, 2
xxlor 0, 35, 34
xxsel 34, 37, 36, 0
Differential Revision: https://reviews.llvm.org/D52747
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344082
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Zachary Turner [Tue, 9 Oct 2018 21:19:03 +0000 (21:19 +0000)]
[PDB] Fix another bug in globals stream name lookup.
When we're on the last bucket the computation is tricky.
We were failing when the last bucket contained multiple
matches. Added a new test for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344081
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Jake Ehrlich [Tue, 9 Oct 2018 21:14:09 +0000 (21:14 +0000)]
[llvm-objcopy] Make -S an alias for --strip-all
-S should be an alias for --strip-all not --strip-all-gnu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344080
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Adrian Prantl [Tue, 9 Oct 2018 20:51:33 +0000 (20:51 +0000)]
llvm-dwarfdump: Extend --name to also search DW_AT_linkage_name.
rdar://problem/
45132695
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344079
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Lang Hames [Tue, 9 Oct 2018 20:44:32 +0000 (20:44 +0000)]
[ORC] Promote and rename private symbols inside the CompileOnDemand layer,
rather than require them to have been promoted before being passed in.
Dropping this precondition is better for layer composition (CompileOnDemandLayer
was the only one that placed pre-conditions on the modules that could be added).
It also means that the promoted private symbols do not show up in the target
JITDylib's symbol table. Instead, they are confined to the hidden implementation
dylib that contains the actual definitions.
For the 403.gcc testcase this cut down the public symbol table size from ~15,000
symbols to ~4000, substantially reducing symbol dependence tracking costs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344078
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Nemanja Ivanovic [Tue, 9 Oct 2018 20:35:15 +0000 (20:35 +0000)]
[PowerPC] Implement hasBitPreservingFPLogic for types that can be supported
This is the PPC-specific non-controversial part of
https://reviews.llvm.org/D44548 that simply enables this combine for PPC
since PPC has these instructions.
This commit will allow the target-independent portion to be truly target
independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344077
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Craig Topper [Tue, 9 Oct 2018 19:05:50 +0000 (19:05 +0000)]
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
This may give slightly better opportunities for DAG combine to simplify with the operations before the setcc. It also matches the type the xors will eventually be promoted to anyway so it saves a legalization step.
Almost all of the test changes are because our constant pool entry is now v2i64 instead of v4i32 on 64-bit targets. On 32-bit targets getConstant should be emitting a v4i32 build_vector and a v4i32->v2i64 bitcast.
There are a couple test cases where it appears we now combine a bitwise not with one of these xors which caused a new constant vector to be generated. This prevented a constant pool entry from being shared. But if that's an issue we're concerned about, it seems we need to address it another way that just relying a bitcast to hide it.
This came about from experiments I've been trying with pushing the promotion of and/or/xor to vXi64 later than LegalizeVectorOps where it is today. We run LegalizeVectorOps in a bottom up order. So the and/or/xor are promoted before their users are legalized. The bitcasts added for the promotion act as a barrier to computeKnownBits if we try to use it during vector legalization of a later operation. So by moving the promotion out we can hopefully get better results from computeKnownBits/computeNumSignBits like in LowerTruncate on AVX512. I've also looked at running LegalizeVectorOps in a top down order like LegalizeDAG, but thats showing some other issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344071
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Sam Clegg [Tue, 9 Oct 2018 18:41:17 +0000 (18:41 +0000)]
[SLPVectorizer] Check that lowered type is floating point before calling isFabsFree
In the case of soft-fp (e.g. fp128 under wasm) the result of
getTypeLegalizationCost() can be an integer type even if the input is
floating point (See LegalizeTypeAction::TypeSoftenFloat).
Before calling isFabsFree() (which asserts if given a non-fp
type) we need to check that that result is fp. This is safe since in
fabs is certainly not free in the soft-fp case.
Fixes PR39168
Differential Revision: https://reviews.llvm.org/D52899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344069
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Wolfgang Pieb [Tue, 9 Oct 2018 18:38:55 +0000 (18:38 +0000)]
[DWARF] Make llvm-dwarfdump display the .debug_loc.dwo section. Fixes PR38991.
Reviewer: dblaikie
Differential Revision: https://reviews.llvm.org/D52444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344068
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Sanjay Patel [Tue, 9 Oct 2018 18:37:20 +0000 (18:37 +0000)]
[InstCombine] add tests for extract subvector shuffles; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344067
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Adrian Prantl [Tue, 9 Oct 2018 18:12:04 +0000 (18:12 +0000)]
Add missing space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344064
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Zachary Turner [Tue, 9 Oct 2018 17:58:51 +0000 (17:58 +0000)]
[PDB] Fix failure on big endian machines.
We changed an ArrayRef<uint8_t> to an ArrayRef<uint32_t>, but
it needs to be an ArrayRef<support::ulittle32_t>.
We also change ArrayRef<> to FixedStreamArray<>. Technically
an ArrayRef<> will work, but it can cause a copy in the underlying
implementation if the memory is not contiguous, and there's no
reason not to use a FixedStreamArray<>.
Thanks to nemanjai@ and thakis@ for helping me track this down
and confirm the fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344063
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Craig Topper [Tue, 9 Oct 2018 17:52:07 +0000 (17:52 +0000)]
[X86] Autogenerate complete checks. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344060
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Sanjay Patel [Tue, 9 Oct 2018 17:20:26 +0000 (17:20 +0000)]
[AArch64][x86] add tests for bitcasted fnabs; NFC
Alternate target coverage for D44548.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344059
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Sanjay Patel [Tue, 9 Oct 2018 15:29:26 +0000 (15:29 +0000)]
[InstCombine] make helper function 'static'; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344056
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Guillaume Chatelet [Tue, 9 Oct 2018 14:51:33 +0000 (14:51 +0000)]
Fix function case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344051
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Guillaume Chatelet [Tue, 9 Oct 2018 14:51:29 +0000 (14:51 +0000)]
[llvm-exegesis] Fix invalid return type and add a Dump function.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53020
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344050
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Sanjay Patel [Tue, 9 Oct 2018 14:04:14 +0000 (14:04 +0000)]
[x86] use demanded bits to simplify masked store codegen
As noted in D52747, if we prefer IR to use trunc for bool vectors rather
than and+icmp, we can expose codegen shortcomings as seen here with masked store.
Replace a hard-coded PCMPGT simplification with the more general demanded bits call
to improve things.
Differential Revision: https://reviews.llvm.org/D52964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344048
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Simon Pilgrim [Tue, 9 Oct 2018 13:13:35 +0000 (13:13 +0000)]
[SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECTORS support to SimplifyDemandedBits
Fix for AVX1 masked load/store regression on D52964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344043
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Simon Atanasyan [Tue, 9 Oct 2018 11:29:51 +0000 (11:29 +0000)]
[mips] Fix FDE/CFI encoding in case of N32 ABI
For O32 and N32 ABI FDE/CFI encoding should be `DW_EH_PE_sdata4` and only
N64 ABI uses `DW_EH_PE_sdata8`. To cover all cases this patch check code
pointer size and setup a correct FDE/CFI encoding type.
Differential revision: https://reviews.llvm.org/D52876
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344040
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Simon Atanasyan [Tue, 9 Oct 2018 11:29:45 +0000 (11:29 +0000)]
[mips] Set pointer size to 4 bytes for N32 ABI
CodePointerSize and CalleeSaveStackSlotSize values are used in DWARF
generation. In case of MIPS it's incorrect to check for Triple::isMIPS64()
only this function returns true for N32 ABI too.
Now we do not have a method to recognize N32 if it's specified by a command
line option and is not a part of a target triple. So we check for
Triple::GNUABIN32 only. It's better than nothing.
Differential revision: https://reviews.llvm.org/D52874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344039
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Nemanja Ivanovic [Tue, 9 Oct 2018 11:17:47 +0000 (11:17 +0000)]
Fix buildbot failures with the newly added test case (triple was missing).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344037
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Nemanja Ivanovic [Tue, 9 Oct 2018 10:54:04 +0000 (10:54 +0000)]
[PowerPC] Remove self-copies in pre-emit peephole
There are occasionally instances where AADB rewrites registers in such a way
that a reg-reg copy becomes a self-copy. Such an instruction is obviously
redundant and can be removed. This patch does precisely that.
Note that this will not remove various nop's that we insert (which are
themselves just self-copies). The reason those are left alone is that all of
them have their own opcodes (that just encode to a self-copy).
What prompted this patch is the fact that these self-copies sometimes end up
using registers that make the instruction a priority-setting nop, thereby
having a significant effect on performance.
Differential revision: https://reviews.llvm.org/D52432
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344036
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Guillaume Chatelet [Tue, 9 Oct 2018 10:06:19 +0000 (10:06 +0000)]
[llvm-exegesis] Fix wrong index type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344032
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Guillaume Chatelet [Tue, 9 Oct 2018 09:33:29 +0000 (09:33 +0000)]
[llvm-exegesis] Fix unused lambda capture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344029
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Guillaume Chatelet [Tue, 9 Oct 2018 08:59:10 +0000 (08:59 +0000)]
[llvm-exegesis][NFC] Use accessors for Operand.
Summary:
This moves checking logic into the accessors and makes the structure smaller.
It will also help when/if Operand are generated from the TD files.
Subscribers: tschuett, courbet, llvm-commits
Differential Revision: https://reviews.llvm.org/D52982
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344028
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