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Carl Worth [Fri, 20 Jun 2014 22:30:21 +0000 (15:30 -0700)]
glsl/glcpp: Abstract a bit of common code for returning string tokens
Now that we have a common macro for returning tokens, it makes sense to
perform some of the common work there, (such as copying string values).
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Carl Worth [Fri, 20 Jun 2014 21:58:48 +0000 (14:58 -0700)]
glsl/glcpp: Drop extra, final newline from most output
The glcpp parser is line-based, so it needs to see a NEWLINE token at the end
of each line. This causes a trick for files that end without a final newline.
Previously, the lexer for glcpp punted in this case by unconditionally
returning a NEWLINE token at end-of-file, (causing most files to have an extra
blank line at the end). Here, we refine this by lexing end-of-file as a
NEWLINE token only if the immediately preceding token was not a NEWLINE token.
The patch is a minor change that only looks huge for two reasons:
1. Almost all glcpp test result ".expected" files are updated to drop
the extra newline.
2. All return statements from the lexer are adjusted to use a new
RETURN_TOKEN macro that tracks the last-token-was-a-newline state.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Carl Worth [Fri, 20 Jun 2014 21:28:20 +0000 (14:28 -0700)]
glsl/glcpp: Add testing for EOF sans newline (and fix for <DEFINE>, <COMMENT>)
The glcpp implementation has long had code to support a file that ends without
a final newline. But we didn't have a "make check" test for this.
Additionally, the <EOF> action was restricted only to the <INITIAL> state so
it would fail to get invoked if the EOF was encountered in the <COMMENT> or
the <DEFINE> case. Neither of these was a bug, per se, since EOF in either
of these cases is an error anyway, (either "unterminated comment" or
"missing macro name for #define").
But with the new explicit support for these cases, we not generate clean error
messages in these cases, (rather than "unexpected $end" from before).
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Carl Worth [Fri, 20 Jun 2014 20:44:51 +0000 (13:44 -0700)]
glsl/glcpp: Remove some un-needed calls to NEWLINE_CATCHUP
The NEWLINE_CATCHUP code is only intended to be invoked after we lex an actual
newline character ('\n'). The two extra calls here were apparently added
accidentally because the pattern happened to contain a (negated) '\n',
(see commit
6005e9cb283214cd57038c7c5e7758ba72ec6ac2).
I don't think either case could have caused any actual bug. (In the first
case, the pattern matched right up to the next newline, so the NEWLINE_CATCHUP
code was just about to be called. In the second case, I don't think it's
possible to actually enter the <SKIP> start condition after commented newlines
without any intervening newline.)
But, if nothing else, the code is cleaner without these extra calls.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Carl Worth [Thu, 19 Jun 2014 18:57:06 +0000 (11:57 -0700)]
glsl/glcpp: Add support for comments between #define and macro identifier
The recent adddition of an error for "#define followed by a non-identifier"
was a bit to aggressive since it used a regular expression in the lexer to
flag any character that's not legal as the first character of an identifier.
But we need to allow comments to appear here, (since we aren't removing
comments in a preliminary pass). So we refine the error here to only flag
characters that could not be an identifier, nor a comment, nor whitespace.
We also augment the existing comment support to be active in the <DEFINE>
state as well.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Carl Worth [Tue, 17 Jun 2014 18:55:07 +0000 (11:55 -0700)]
glsl/glcpp: Emit proper error for #define with a non-identifier
Previously, if the preprocessor encountered a #define with a non-identifier,
such as:
#define 123 456
The lexer had no explicit rules to match non-identifiers in the <DEFINE> start
state. Because of this, flex's default rule was being invoked, (printing
characters to stdout), and all text was being discarded by the compiler until
the next identifier. As one can imagine, this led to all sorts of interesting
and surprising results.
Fix this by adding an explicit rule complementing the existing
identifier-based rules that should catch all non-identifiers after #define and
reliably give a well-formatted error message.
A new test is added to "make check" to ensure this bug stays fixed.
This commit also fixes the following Khronos GLES3 CTS test:
define_non_identifier_vertex
(The "fragment" variant was passing earlier only because the preprocessor was
behaving so randomly and causing the compilation to fail. It's lucky, in fact,
that the "vertex" version succesfully compiled so we could find and fix this
bug.)
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Carl Worth [Mon, 28 Jul 2014 16:38:30 +0000 (09:38 -0700)]
glsl/glcpp: Add testing for directives preceded by a space
This test simply has one of each directive, all of which are preceded by a
single space character.
Carl Worth [Mon, 28 Jul 2014 15:59:25 +0000 (08:59 -0700)]
glsl/glcpp: Fix to emit spaces following directives
The glcpp lexer and parser use the space_tokens state bit to avoid emitting
tokens for spaces while parsing a directive. Previously, this bit was only
being set again by the first non-space token following a directive.
This led to a bug where a space, (or a comment that should emit a space),
immediately following a directive, (optionally searated by newlines), would be
omitted from the output.
Here we fix the bug by also setting the space_tokens bit whenever we lex a
newline in the standard start conditions.
Marek Olšák [Tue, 29 Jul 2014 21:25:42 +0000 (23:25 +0200)]
configure.ac: require libdrm_radeon 2.4.56 because of the Hawaii fix there
Jason Ekstrand [Tue, 29 Jul 2014 01:30:55 +0000 (18:30 -0700)]
main/get_hash_params: Add GL_SAMPLE_SHADING_ARB
GL_SAMPLE_SHADING is specified as a valid pname for glGet in the
GL_ARB_sample_shading extension. It seems as if we forgot to add it to the
table of pnames.
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Yaakov Selkowitz [Thu, 24 Jul 2014 13:16:41 +0000 (14:16 +0100)]
os_process.c: Add cygwin as an expected platform
mesa/mesa/src/gallium/auxiliary/os/os_process.c:40:2: warning: #warning unexpected platform in os_process.c [-Wcpp]
#warning unexpected platform in os_process.c
mesa/mesa/src/gallium/auxiliary/os/os_process.c:77:2: warning: #warning unexpected platform in os_process.c [-Wcpp]
#warning unexpected platform in os_process.c
Signed-off-by: Yaakov Selkowitz <yselkowitz@users.sourceforge.net>
Reviewed-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Brian Paul <brianp@vmware.com>
Yaakov Selkowitz [Thu, 24 Jul 2014 13:17:33 +0000 (14:17 +0100)]
xmlconfig: Use program_invocation_short_name when building for cygwin
mesa/mesa/src/mesa/drivers/dri/common/xmlconfig.c:104:10: warning: #warning "Per application configuration won't work with your OS version." [-Wcpp]
# warning "Per application configuration won't work with your OS version."
Signed-off-by: Yaakov Selkowitz <yselkowitz@users.sourceforge.net>
Reviewed-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Tue, 29 Jul 2014 15:15:01 +0000 (09:15 -0600)]
docs: fix date typo: July 78 -> 18
Brian Paul [Tue, 15 Jul 2014 16:38:40 +0000 (10:38 -0600)]
svga: remove unneeded depth==1 assertion in svga_texture_view_surface()
We can create 3D texture views. Avoids an assertion in piglit
fbo-generatemipmap-3d test and allows it to pass.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
José Fonseca [Thu, 24 Jul 2014 14:50:56 +0000 (15:50 +0100)]
st/wgl: Clamp wglChoosePixelFormatARB's output nNumFormats to nMaxFormats.
While running https://github.com/nvMcJohn/apitest with apitrace I noticed that Mesa was producing bogus results:
wglChoosePixelFormatARB(hdc, piAttribIList = {...}, pfAttribFList = &0, nMaxFormats = 1, piFormats = {19, 65576, 37, 198656, 131075, 0,
402653184, 0, 0, 0, 0, -
573575710}, nNumFormats = &12) = TRUE
However https://www.opengl.org/registry/specs/ARB/wgl_pixel_format.txt states
<nNumFormats> returns the number of matching formats. The returned
value is guaranteed to be no larger than <nMaxFormats>.
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Michel Dänzer [Mon, 28 Jul 2014 07:56:41 +0000 (16:56 +0900)]
gallium/radeon: Add some Emacs .dir-locals.el files
Based on the toplevel one but adapted to the driver/winsys coding styles.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Chia-I Wu [Tue, 29 Jul 2014 02:21:42 +0000 (10:21 +0800)]
ilo: fix fb height of HiZ ops
It was set to aligned width. It appears to be fine on GEN7+, but causes
random hangs on GEN6.
Tapani Pälli [Fri, 25 Jul 2014 07:20:17 +0000 (10:20 +0300)]
glapi: add indexed blend functions (GL 4.0)
This makes some of the UE4 engine demos (Stylized, Mobile Temple)
render correctly, tested on Intel Haswell machine.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78716
Marek Olšák [Sat, 26 Jul 2014 15:15:39 +0000 (17:15 +0200)]
r600g,radeonsi: switch all occurences of array_size to util_max_layer
This fixes 3D texture support in all these cases, because array_size is 1
with 3D textures and depth0 actually contains the "array size".
util_max_layer is universal and returns the last layer index for any texture
target.
A lot of the cases below can't actually be hit with 3D textures, but let's
be consistent.
This fixes a failure in:
piglit layered-rendering/clear-color-all-types 3d single_level
for r600g and radeonsi, which was caused by an incorrect CMASK size
calculation.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sat, 26 Jul 2014 10:57:28 +0000 (12:57 +0200)]
radeonsi: fix occlusion queries on Hawaii
This was just a guess - and it worked!
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sat, 26 Jul 2014 10:37:03 +0000 (12:37 +0200)]
winsys/radeon: fix vram_size overflow with Hawaii
This fixes piglit spec/!OpenGL 3.1/minmax.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sat, 26 Jul 2014 01:16:22 +0000 (03:16 +0200)]
radeonsi: fix a hang with streamout on Hawaii
I actually couldn't reproduce this one, but internal docs recommend this
workaround. Better safe than sorry.
Also, the number of dwords for the sync packets is increased by 4 instead
of 2, because it wasn't bumped last time when a new packet was added there.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sat, 26 Jul 2014 00:56:00 +0000 (02:56 +0200)]
radeonsi: fix a hang with instancing on Hawaii
This fixes "piglit/bin/arb_transform_feedback2-draw-auto instanced".
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sat, 26 Jul 2014 00:54:23 +0000 (02:54 +0200)]
gallium/util: add a helper for calculating primitive count from vertex count
This is needed by the following commit which is a candidate for stable too.
Cc: mesa-stable@lists.freedesktop.org
Marek Olšák [Fri, 25 Jul 2014 22:48:48 +0000 (00:48 +0200)]
radeonsi: fix CMASK and HTILE calculations for Hawaii
This fixes the checkerboard pattern in glxgears and anything that triggers
fast color clear.
num_channels is always <= 8, but Hawaii has 16 pipes.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 25 Jul 2014 21:06:18 +0000 (23:06 +0200)]
r600g,radeonsi: add debug flags which disable tiling
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 24 Jul 2014 18:32:08 +0000 (20:32 +0200)]
gallium: rename shader cap MAX_CONSTS to MAX_CONST_BUFFER_SIZE
This new name isn't so confusing.
I also changed the gallivm limit, because it looked wrong.
Reviewed-by: Brian Paul <brianp@vmware.com>
v2: use sizeof(float[4])
Marek Olšák [Wed, 23 Jul 2014 17:22:30 +0000 (19:22 +0200)]
r600g: switch SNORM conversion to DX and GLES behavior
it also matches GL 4.2
further discussion:
http://lists.freedesktop.org/archives/mesa-dev/2013-August/042680.html
Cc: mesa-stable@lists.freedesktop.org
Tom Stellard [Mon, 28 Jul 2014 20:40:05 +0000 (16:40 -0400)]
util: Fix typo
Spotted by okias on IRC.
Chia-I Wu [Mon, 28 Jul 2014 15:33:47 +0000 (23:33 +0800)]
ilo: correctly propagate resource renames to hardware
Not only should we mark states dirty when the underlying resource is renamed,
we should also update the CSO bo when available.
Chia-I Wu [Mon, 28 Jul 2014 15:52:54 +0000 (23:52 +0800)]
ilo: add ilo_resource_get_bo() helper
We will need it in the following commit.
Tom Stellard [Fri, 18 Jul 2014 19:10:52 +0000 (15:10 -0400)]
radeonsi: Use util_memcpy_cpu_to_le32()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tom Stellard [Fri, 18 Jul 2014 19:55:08 +0000 (15:55 -0400)]
util: Add util_memcpy_cpu_to_le32() v3
v2:
- Preserve word boundaries.
v3:
- Use const and restrict.
- Fix indentation.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tom Stellard [Fri, 25 Jul 2014 21:12:28 +0000 (17:12 -0400)]
clover: Add checks for image support to the image functions v2
Most image functions are required to return a CL_INVALID_OPERATION
error when used on devices without image support.
v2:
- Simplified the code
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Bruno Jiménez [Sun, 27 Jul 2014 11:56:16 +0000 (13:56 +0200)]
r600g/compute: Add debug information to promote and demote functions
v2: Add information about the item's starting point and size
v3: Rebased on top of master
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Sun, 27 Jul 2014 11:56:15 +0000 (13:56 +0200)]
r600g/compute: Add documentation to compute_memory_pool
v2: Rebased on top of master
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Chia-I Wu [Mon, 28 Jul 2014 07:11:42 +0000 (15:11 +0800)]
ilo: unblock an inline write with a staging bo
This should allow a deeper pipeline.
Chia-I Wu [Mon, 28 Jul 2014 01:28:05 +0000 (09:28 +0800)]
ilo: try unblocking a transfer with a staging bo
When mapping a busy resource with PIPE_TRANSFER_DISCARD_RANGE or
PIPE_TRANSFER_FLUSH_EXPLICIT, we can avoid blocking by allocating and mapping
a staging bo, and emit pipelined copies at proper places. Since the staging
bo is never bound to GPU, we give it packed layout to save space.
Chia-I Wu [Mon, 28 Jul 2014 01:50:31 +0000 (09:50 +0800)]
ilo: enable persistent and coherent transfers
Enable PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT and reorder caps a bit.
Chia-I Wu [Mon, 28 Jul 2014 05:03:08 +0000 (13:03 +0800)]
ilo: drop ptr from ilo_transfer
With the recent clean-ups, we can pass the mapped pointer around between
functions cleanly. Drop it to make ilo_transfer smaller.
Chia-I Wu [Mon, 28 Jul 2014 04:56:02 +0000 (12:56 +0800)]
ilo: s/TRANSFER_MAP_UNSYNC/TRANSFER_MAP_GTT_UNSYNC/
It maps to drm_intel_gem_bo_map_unsynchronized(), which results in
unsynchronized GTT mapping.
Chia-I Wu [Mon, 28 Jul 2014 04:04:46 +0000 (12:04 +0800)]
ilo: drop unused context param from transfer functions
Many of the transfer functions do not need an ilo_context. Drop it.
Chia-I Wu [Mon, 28 Jul 2014 03:00:52 +0000 (11:00 +0800)]
ilo: tidy up transfer mapping/unmapping
Add xfer_map() to replace map_bo_for_transfer(). Add xfer_unmap() and
xfer_alloc_staging_sys() to simplify texture and buffer mapping/unmapping, and
enable more code sharing between them.
Chia-I Wu [Fri, 25 Jul 2014 17:10:21 +0000 (01:10 +0800)]
ilo: tidy up choose_transfer_method()
Add a bunch of helper functions and a big comment for
choose_transfer_method(). This also fixes handling of
PIPE_TRANSFER_MAP_DIRECTLY to not ignore tiling.
Chia-I Wu [Sat, 26 Jul 2014 20:55:24 +0000 (04:55 +0800)]
ilo: free transfers with util_slab_free()
We used FREE() in one of the error path.
EdB [Sun, 27 Jul 2014 21:07:39 +0000 (23:07 +0200)]
clover: Add clUnloadPlatformCompiler.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
EdB [Sun, 27 Jul 2014 21:07:38 +0000 (23:07 +0200)]
clover: Add clCreateProgramWithBuiltInKernels.
[ Francisco Jerez: Check for devices not associated with the specified
context. Style fix. ]
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jordan Justen [Wed, 11 Jun 2014 00:43:25 +0000 (17:43 -0700)]
glsl/cs: Add several GLSL compute shader variables
With MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader, this fixes piglit:
built-in-constants tests/spec/arb_compute_shader/minimum-maximums.txt
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Jordan Justen [Mon, 9 Jun 2014 20:40:01 +0000 (13:40 -0700)]
main/cs: Add additional compute shader constant values
With MESA_EXTENSION_OVERRIDE=GL_ARB_compute_shader, this fixes piglit:
* arb_compute_shader-minmax
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Chris Forbes [Sun, 18 May 2014 00:19:04 +0000 (12:19 +1200)]
glsl: No longer require ubo block index to be constant in ir_validate
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Fri, 16 May 2014 10:07:24 +0000 (22:07 +1200)]
glsl: Accept nonconstant array references in lower_ubo_reference
Instead of falling back to just the block name (which we won't find),
look for the first element of the block array. We'll deal with the rest
in the backend by arranging for the blocks to be laid out contiguously.
V2: Squashed together patches 3, 5 of V1, plus a naming tweak.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Sun, 18 May 2014 00:03:54 +0000 (12:03 +1200)]
glsl: Convert uniform_block in lower_ubo_reference to ir_rvalue.
Previously this was a block index with special semantics for -1.
With ARB_gpu_shader5, this need not be a compile-time constant, so
allow any rvalue here and convert the -1 to a NULL pointer.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Fri, 16 May 2014 09:28:09 +0000 (21:28 +1200)]
glsl: Mark entire UBO array active if indexed with non-constant.
Without doing a lot more work, we have no idea which indices may
be used at runtime, so just mark them all.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Fri, 16 May 2014 09:10:18 +0000 (21:10 +1200)]
glsl: Allow non-constant UBO array indexing with GLSL4/ARB_gpu_shader5.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Fri, 25 Jul 2014 02:53:05 +0000 (10:53 +0800)]
ilo: simplify ilo_flush()
Move fence creation to the new ilo_fence_create().
Bruno Jiménez [Sat, 19 Jul 2014 17:35:51 +0000 (19:35 +0200)]
r600g/compute: Defrag the pool at the same time as we grow it
This allows us two things: we now need less item copies when we have
to defrag+grow the pool (to just one copy per item) and, even in the
case where we don't need to defrag the pool, we reduce the data copied
to just the useful data that the items use.
Note: The fallback path is a bit ugly now, but hopefully we won't need
it much.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Mon, 7 Jul 2014 15:50:05 +0000 (17:50 +0200)]
r600g/compute: Try to use a temporary resource when growing the pool
Now, before moving everything to host memory, we try to create a
new resource to use as a pool. I we succeed we just use this resource
and delete the previous one. If we fail we fallback to using the
shadow.
This should make growing the pool faster, and we can also save
64KB of memory that were allocated for the 'shadow', even if they
weren't used.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Rob Clark [Fri, 25 Jul 2014 18:28:10 +0000 (14:28 -0400)]
freedreno: fix typo in gpu version check
Opps, I should use larger fonts, I guess.
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 25 Jul 2014 15:15:59 +0000 (11:15 -0400)]
freedreno/ir3: split out shader compiler from a3xx
Move the bits we want to share between generations from fd3_program to
ir3_shader. So overall structure is:
fdN_shader_stateobj -> ir3_shader -> ir3_shader_variant -> ir3
|- ...
\- ir3_shader_variant -> ir3
So the ir3_shader becomes the topmost generation neutral object, which
manages the set of variants each of which generates, compiles, and
assembles it's own ir.
There is a bit of additional renaming to s/fd3_compiler/ir3_compiler/,
etc.
Keep the split between the gallium level stateobj and the shader helper
object because it might be a good idea to pre-compute some generation
specific register values (ie. anything that is independent of linking).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 25 Jul 2014 14:56:23 +0000 (10:56 -0400)]
freedreno/a3xx/compiler: rename ir3_shader to ir3
First step of reoganization split out compiler (so it can be shared
between a3xx and a4xx). Rename ir3_shader -> ir3 (since we'll want
the name ir3_shader for a higher level object).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 25 Jul 2014 13:50:34 +0000 (09:50 -0400)]
freedreno/a3xx/compiler: scheduler vs pred reg
The scheduler also needs to be aware of predicate register (p0) in
addition to address register (a0).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 25 Jul 2014 13:49:41 +0000 (09:49 -0400)]
freedreno/a3xx/compiler: little cleanups
Remove some obsolete comments, rename deref->addr.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 18 Jun 2014 14:24:04 +0000 (10:24 -0400)]
freedreno/a3xx: enable/disable wa's based on patch-level
It seems like for the most part, different behaviors, workarounds, etc,
should be conditional on GPU patch revision (ie. a320.0 vs a320.2)
rather than GPU id (a320 vs a330).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 23 Jul 2014 21:21:29 +0000 (17:21 -0400)]
freedreno/a3xx/compiler: make IR heap dyanmic
The fixed size heap is a remnant of the fdre-a3xx assembler. Yet it is
convenient for being able to free the entire data structure in one shot
without worrying about leaking nodes.
Change it to dynamically grow the heap size (adding chunks) as needed so
we don't have an artificial upper limit on shader size (other than hw
limits) and don't always have to allocate worst-case size.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Jan Vesely [Fri, 25 Jul 2014 14:33:42 +0000 (10:33 -0400)]
r600g/compute: Fix singed/unsigned comparison compiler warnings.
The iteration variables go from 0 anyway.
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tom Stellard [Thu, 24 Jul 2014 00:37:08 +0000 (20:37 -0400)]
clover: Query the device to see if images are supported
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tom Stellard [Thu, 24 Jul 2014 00:37:07 +0000 (20:37 -0400)]
gallium: Add PIPE_CAP_COMPUTE_IMAGES_SUPPORTED
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Bruno Jiménez [Sat, 19 Jul 2014 17:35:50 +0000 (19:35 +0200)]
r600g/compute: Allow compute_memory_defrag to defragment between resources
This will be used in the following patch to avoid duplicated code
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Thu, 24 Jul 2014 08:28:06 +0000 (10:28 +0200)]
r600g/compute: Allow compute_memory_move_item to move items between resources
v2: Remove unnecesary variables
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Dylan Baker [Tue, 22 Jul 2014 18:43:54 +0000 (11:43 -0700)]
gbm: Search LIBGL_DRIVERS_PATH if GBM_DRIVERS_PATH is not set
The GBM_DRIVERS_PATH environment variable is not documented, and only
used to set the location of gbm drivers, while LIBGL_DRIVERS_PATH is
used for everything else, and is documented.
Generally this split leads to confusion as to why gbm doesn't work.
This patch will read LIBGL_DRIVERS_PATH as a fallback if
GBM_DRIVERS_PATH is not set.
The comments clearly indicate that using LIBGL_DRIVERS_PATH is
preferred over GBM_DRIVERS_PATH.
v2: - Use GBM_DRIVERS_PATH as a fallback
v3: [jordan.l.justen@intel.com] - Make LIBGL_DRIVERS_PATH the fallback
Signed-off-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jerome Glisse [Thu, 24 Jul 2014 21:30:31 +0000 (17:30 -0400)]
winsys/radeon: fix indentation
Can we please keep it clean and avoid ending up in messy situation
like ddx.
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Jason Ekstrand [Mon, 21 Jul 2014 23:46:39 +0000 (16:46 -0700)]
Add an accelerated version of F_TO_I for x86_64
According to a quick micro-benchmark, this new version is 20% faster on my
Haswell laptop.
v2: Removed the XXX note about x86_64 from the comment
v3: Use an intrinsic instead of an __asm__ block. This should give us MSVC
support for free.
v4: Enable it for all x86_64 builds, not just with USE_X86_64_ASM
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Tue, 11 Feb 2014 21:12:07 +0000 (13:12 -0800)]
i965/fs: Decide predicate/predicate_inverse outside of the for loop.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Tue, 11 Feb 2014 21:04:55 +0000 (13:04 -0800)]
i965/fs: Swap if/else conditions in SEL peephole.
Will clarify make the next commit easier to read.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Tue, 15 Jul 2014 22:29:29 +0000 (15:29 -0700)]
i965: Improve dead control flow elimination.
... to eliminate an ELSE instruction followed immediately by an ENDIF.
instructions in affected programs: 704 -> 700 (-0.57%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Sun, 6 Jul 2014 06:06:04 +0000 (02:06 -0400)]
nvc0/ir: support 2d constbuf indexing
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 15 Jul 2014 00:29:04 +0000 (20:29 -0400)]
gm107/ir: emit LDC subops
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 15 Jul 2014 00:20:03 +0000 (20:20 -0400)]
gk110/ir: emit load constant subop
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 6 Jul 2014 03:32:06 +0000 (23:32 -0400)]
mesa/st: add support for interpolate_at_* ops
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ilia Mirkin [Thu, 17 Jul 2014 04:30:40 +0000 (00:30 -0400)]
nv50/ir: fix phi/union sources when their def has been merged
In a situation where double-register values are used, the phi nodes can
still end up being u32 values. They all get merged into one RA node
though. When fixing up the merge (which comes after the phi node), the
phi node's def would get fixed, but not its sources which would remain
at the low register value.
This maintains the invariant that a phi node's defs and sources are
allocated the same register.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 17 Jul 2014 03:20:57 +0000 (23:20 -0400)]
nv50/ir: fix hard-coded TYPE_U32 sized register
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 18 Jul 2014 02:31:11 +0000 (22:31 -0400)]
nvc0: mark shader header if fp64 is used
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 18 Jul 2014 02:30:00 +0000 (22:30 -0400)]
nv50/ir: keep track of whether the program uses fp64
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 18 Jul 2014 02:11:56 +0000 (22:11 -0400)]
nvc0: make sure that the local memory allocation is aligned to 0x10
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Thu, 24 Jul 2014 01:10:51 +0000 (21:10 -0400)]
mesa: add ARB_clear_texture.xml to file list, remove duplicate decls
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Chia-I Wu [Thu, 24 Jul 2014 05:21:41 +0000 (13:21 +0800)]
ilo: check the tilings of imported handles
Just to be cautious.
Chia-I Wu [Thu, 24 Jul 2014 03:10:48 +0000 (11:10 +0800)]
ilo: clean up resource bo renaming
s/alloc_bo/rename_bo/ as that is what the functions do. Simplify bo
allocation and move the complexity to bo renaming.
Chia-I Wu [Thu, 24 Jul 2014 02:32:31 +0000 (10:32 +0800)]
ilo: share some code between {tex,buf}_create_bo
Add resource_get_bo_name() and resource_get_bo_initial_domain() for use by
both functions.
Chia-I Wu [Thu, 24 Jul 2014 01:39:37 +0000 (09:39 +0800)]
ilo: use native 3-component vertex formats on GEN7.5+
GEN7.5 gains support for those formats natively.
Chia-I Wu [Thu, 24 Jul 2014 01:32:34 +0000 (09:32 +0800)]
ilo: allow for device-dependent format translation
Pass ilo_dev_info to all format translation functions.
Jason Ekstrand [Sat, 19 Jul 2014 01:23:30 +0000 (18:23 -0700)]
i965: Accelerate uploads of RGBA and BGRA GL_UNSIGNED_INT_8_8_8_8_REV textures
Since intel is always going to be little-endian,
GL_UNSIGNED_INT_8_8_8_8_REV is the same as GL_UNSIGNED_BYTE for RGBA and
BGRA textures, so the same acceleration code will work. We might as well
use it.
Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Wed, 16 Jul 2014 17:52:32 +0000 (10:52 -0700)]
mesa: Fix the name in the error message
Obvious copy-and-paste bug.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Wed, 16 Jul 2014 20:02:26 +0000 (13:02 -0700)]
glsl: Fix some bad indentation
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 21 Jul 2014 23:17:46 +0000 (16:17 -0700)]
i965/fs: Set LastRT on the final FB write on Broadwell.
In Piglit's EXT_framebuffer_multisample/alpha-to-coverage-dual-src-blend
test, key->nr_color_regions == 2, but the dual source blend FB write has
ir->target set to 0. So we failed to set "Last Render Target Select" on
any FB write message.
We only emit one FB write per render target, so my comment about setting
LastRT on every FB write directed at the last color region is a bit...
misinformed. According to the documentation, depth buffer writes and
scoreboard updates happen on the FB write with LastRT set, so I believe
we want to set it only once.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Kenneth Graunke [Tue, 22 Jul 2014 03:06:23 +0000 (20:06 -0700)]
i965: Port INTEL_DEBUG=optimizer to the vec4 backend.
Largely via copy and paste.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Tue, 22 Jul 2014 03:05:21 +0000 (20:05 -0700)]
i965: Save the gl_shader_stage enum in backend_visitor.
This will be useful for INTEL_DEBUG=optimizer in the vec4 backend, which
needs to know whether it's currently processing a VS or GS. It isn't
worth adding virtual methods for this case.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Thu, 17 Jul 2014 23:41:44 +0000 (16:41 -0700)]
i965: Don't print WE_normal in disassembly.
Dropping this helps most lines fit in an 80 column terminal. The
absence of WE_normal also helps call attention to WE_all, where
something unusual is going on.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Rob Clark [Wed, 23 Jul 2014 19:08:40 +0000 (15:08 -0400)]
freedreno/a3xx/compiler: fix p0 (kill, etc)
Don't assert (debug builds) or assign random uninitialized value for
predicate register (p0).. that screws up kill, etc.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tom Stellard [Wed, 23 Jul 2014 15:52:05 +0000 (11:52 -0400)]
Revert "r600g/compute: Fix warnings"
This reverts commit
467f1585e28adba0e94ef593de131bc327f098bb.
This breaks the build on some systems.
Grigori Goronzy [Thu, 17 Jul 2014 16:44:26 +0000 (18:44 +0200)]
radeon/llvm: fix formatting
Use K&R and same indent as most other code. No functional change
intended.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>