OSDN Git Service
David S. Miller [Mon, 13 Mar 2006 09:27:34 +0000 (01:27 -0800)]
[SPARC64]: First cut at VIS simulator for Niagara.
Niagara does not implement some of the VIS instructions in
hardware, so we have to emulate them.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 9 Mar 2006 01:18:19 +0000 (17:18 -0800)]
[SPARC64]: Fix system type in /proc/cpuinfo and remove bogus OBP check.
Report 'sun4v' when appropriate in /proc/cpuinfo
Remove all the verifications of the OBP version string. Just
make sure it's there, and report it raw in the bootup logs and
via /proc/cpuinfo.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 9 Mar 2006 00:09:19 +0000 (16:09 -0800)]
[SPARC64]: Add SMT scheduling support for Niagara.
The mapping is a simple "(cpuid >> 2) == core" for now.
Later we'll add more sophisticated code that will walk
the sun4v machine description and figure this out from
there.
We should also add core mappings for jaguar and panther
processors.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 8 Mar 2006 23:57:03 +0000 (15:57 -0800)]
[SPARC64]: Fix 32-bit truncation which broke sparsemem.
The page->flags manipulations done by the D-cache dirty
state tracking was broken because the constants were not
marked with "UL" to make them 64-bit, which means we were
clobbering the upper 32-bits of page->flags all the time.
This doesn't jive well with sparsemem which stores the
section and indexing information in the top 32-bits of
page->flags.
This is yet another sparc64 bug which has been with us
forever.
While we're here, tidy up some things in bootmem_init()
and paginig_init():
1) Pass min_low_pfn to init_bootmem_node(), it's identical
to (phys_base >> PAGE_SHIFT) but we should use consistent
with the variable names we print in CONFIG_BOOTMEM_DEBUG
2) max_mapnr, although no longer used, was being set
inaccurately, we shouldn't subtract pfn_base any more.
3) All the games with phys_base in the zones_*[] arrays
we pass to free_area_init_node() are no longer necessary.
Thanks to Josh Grebe and Fabbione for the bug reports
and testing. Fix also verified locally on an SB2500
which had a memory layout that triggered the same problem.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 8 Mar 2006 10:16:07 +0000 (02:16 -0800)]
[SPARC64]: Move over to sparsemem.
This has been pending for a long time, and the fact
that we waste a ton of ram on some configurations
kind of pushed things over the edge.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 7 Mar 2006 06:50:44 +0000 (22:50 -0800)]
[SPARC64]: Fix new context version SMP handling.
Don't piggy back the SMP receive signal code to do the
context version change handling.
Instead allocate another fixed PIL number for this
asynchronous cross-call. We can't use smp_call_function()
because this thing is invoked with interrupts disabled
and a few spinlocks held.
Also, fix smp_call_function_mask() to count "cpus" correctly.
There is no guarentee that the local cpu is in the mask
yet that is exactly what this code was assuming.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 7 Mar 2006 03:59:50 +0000 (19:59 -0800)]
[SPARC64]: Bulletproof MMU context locking.
1) Always spin_lock_init() in init_context(). The caller essentially
clears it out, or copies the mm info from the parent. In both
cases we need to explicitly initialize the spinlock.
2) Always do explicit IRQ disabling while taking mm->context.lock
and ctx_alloc_lock.
Signed-off-by: David S. Miller <davem@davemloft.net>
Eric Sesterhenn [Mon, 6 Mar 2006 21:48:40 +0000 (13:48 -0800)]
[SPARC64]: kzalloc() conversion
this patch converts arch/sparc64 to kzalloc usage.
Crosscompile tested with allyesconfig.
Signed-off-by: Eric Sesterhenn <snakebyte@gmx.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 6 Mar 2006 06:18:50 +0000 (22:18 -0800)]
[SPARC64]: Fix loop termination in mark_kpte_bitmap()
If we were aligned, but didn't have at least 256MB left
to process, we would loop forever.
Thanks to fabbione for the report and testing the fix.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 6 Mar 2006 02:26:24 +0000 (18:26 -0800)]
[SPARC64]: Simplify TSB insert checks.
Don't try to avoid putting non-base page sized entries
into the user TSB. It actually costs us more to check
this than it helps.
Eventually we'll have a multiple TSB scheme for user
processes. Once a process starts using larger pages,
we'll allocate and use such a TSB.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 3 Mar 2006 05:50:47 +0000 (21:50 -0800)]
[SPARC64]: More SUN4V cpu mondo bug fixing.
This cpu mondo sending interface isn't all that easy to
use correctly...
We were clearing out the wrong bits from the "mask" after getting
something other than EOK from the hypervisor.
It turns out the hypervisor can just be resent the same cpu_list[]
array, with the 0xffff "done" entries still in there, and it will do
the right thing.
So don't update or try to rebuild the cpu_list[] array to condense it.
This requires the "forward_progress" check to be done slightly
differently, but this new scheme is less bug prone than what we were
doing before.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 3 Mar 2006 04:42:53 +0000 (20:42 -0800)]
[SPARC64]: Fix sun4v mna winfixup handling.
We were clobbering a base register before we were done
using it. Fix a comment typo while we're here.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 3 Mar 2006 04:28:34 +0000 (20:28 -0800)]
[SPARC64]: Fix mini RTC driver reading.
Need to subtract 1900 from year and 1 from month before
giving it back to userspace.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 3 Mar 2006 02:12:27 +0000 (18:12 -0800)]
[SPARC64]: Do not allow mapping pages within 4GB of 64-bit VA hole.
The UltraSPARC T1 manual recommends this because the chip
could instruction prefetch into the VA hole, and this would
also make decoding certain kinds of memory access traps
more difficult (because the chip sign extends certain pieces
of trap state).
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 2 Mar 2006 06:42:18 +0000 (22:42 -0800)]
[SPARC64]: Fix _PAGE_EXEC handling.
First of all, use the known _PAGE_EXEC_{4U,4V} value instead
of loading _PAGE_EXEC from memory. We either know which one
to use by context, or we can code patch the test.
Next, we need to check executability of a PTE in the generic
TSB miss handler.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 2 Mar 2006 06:27:09 +0000 (22:27 -0800)]
[SPARC64]: Fix typo in SUN4V D-TLB miss handler.
Should put FAULT_CODE_DTLB into %g3 not FAULT_CODE_ITLB.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 2 Mar 2006 06:25:43 +0000 (22:25 -0800)]
[SPARC64]: Kill bogus function externs in asm/pgtable.h
These are all implemented inline earlier in the file.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 2 Mar 2006 01:32:46 +0000 (17:32 -0800)]
[SPARC64]: Add mini-RTC driver for Starfire and SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 28 Feb 2006 23:10:26 +0000 (15:10 -0800)]
[SPARC64]: Fix bugs in SUN4V cpu mondo dispatch.
There were several bugs in the SUN4V cpu mondo dispatch code.
In fact, if we ever got a EWOULDBLOCK or other error from
the hypervisor call, we'd potentially send a cpu mondo multiple
times to the same cpu and even worse we could loop until the
timeout resending the same mondo over and over to such cpus.
So let's bulletproof this thing as follows:
1) Implement cpu_mondo_send() and cpu_state() hypervisor calls
in arch/sparc64/kernel/entry.S, add prototypes to asm/hypervisor.h
2) Don't build and update the cpulist using inline functions, this
was causing the cpu mask to not get updated in the caller.
3) Disable interrupts during the entire mondo send, otherwise our
cpu list and/or mondo block could get overwritten if we take
an interrupt and do a cpu mondo send on the current cpu.
4) Check for all possible error return types from the cpu_mondo_send()
hypervisor call. In particular:
HV_EOK) Our work is done, all cpus have received the mondo.
HV_CPUERROR) One or more of the cpus in the cpu list we passed
to the hypervisor are in error state. Use cpu_state()
calls over the entries in the cpu list to see which
ones. Record them in "error_mask" and report this
after we are done sending the mondo to cpus which are
not in error state.
HV_EWOULDBLOCK) We need to keep trying.
Any other error we consider fatal, we report the event and exit
immediately.
5) We only timeout if forward progress is not made. Forward progress
is defined as having at least one cpu get the mondo successfully
in a given cpu_mondo_send() call. Otherwise we bump a counter
and delay a little. If the counter hits a limit, we signal an
error and report the event.
Also, smp_call_function_mask() error handling reports the number
of cpus incorrectly.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 28 Feb 2006 01:56:51 +0000 (17:56 -0800)]
[SPARC64]: Fix bugs in SMP TLB context version expiration handling.
1) We must flush the TLB, duh.
2) Even if the sw context was seen to be valid, the local cpu's
hw context can be out of date, so reload it unconditionally.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 27 Feb 2006 07:09:37 +0000 (23:09 -0800)]
[SPARC64]: Fix indexing into kpte_linear_bitmap.
Need to shift back up by 3 bits to get 8-byte entry
index.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 27 Feb 2006 04:37:41 +0000 (20:37 -0800)]
[SPARC64]: Use 13-bit context size always.
We no longer have the problems that require using the smaller
sizes.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 27 Feb 2006 03:44:50 +0000 (19:44 -0800)]
[SPARC64]: Avoid dcache-dirty page state management on sun4v.
It is totally wasted work, since we have no D-cache aliasing
issues on sun4v.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 27 Feb 2006 03:31:49 +0000 (19:31 -0800)]
[SPARC64]: Bulletproof hypervisor TLB flushing.
Check TLB flush hypervisor calls for errors and report them.
Pass HV_MMU_ALL always for now, we can add back the optimization
to avoid the I-TLB flush later.
Always explicitly page align the virtual address arguments.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 26 Feb 2006 22:51:29 +0000 (14:51 -0800)]
[SPARC64]: Report mondo error correctly in hypervisor_xcall_deliver().
It's in "arg0" not "func".
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 26 Feb 2006 01:16:29 +0000 (17:16 -0800)]
[SPARC64]: Niagara optimized XOR functions for RAID.
Signed-off-by: David S. Miller <davem@davemloft.net>
Andrew Morton [Fri, 24 Feb 2006 21:21:18 +0000 (13:21 -0800)]
[SPARC64]: Fix binfmt_aout32.c build.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 24 Feb 2006 05:40:15 +0000 (21:40 -0800)]
[SPARC64]: destroy_context() needs to disable interrupts.
get_new_mmu_context() can be invoked from interrupt context
now for the new SMP version wrap handling.
So disable interrupt while taking ctx_alloc_lock in destroy_context()
so we don't deadlock.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 23 Feb 2006 22:19:28 +0000 (14:19 -0800)]
[SPARC64]: Fix TLB context allocation with SMT style shared TLBs.
The context allocation scheme we use depends upon there being a 1<-->1
mapping from cpu to physical TLB for correctness. Chips like Niagara
break this assumption.
So what we do is notify all cpus with a cross call when the context
version number changes, and if necessary this makes them allocate
a valid context for the address space they are running at the time.
Stress tested with make -j1024, make -j2048, and make -j4096 kernel
builds on a 32-strand, 8 core, T2000 with 16GB of ram.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 23 Feb 2006 10:28:25 +0000 (02:28 -0800)]
[SPARC64]: Put syscall tables after trap table.
Otherwise with too much stuff enabled in the kernel config
we can end up with an unaligned trap table.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 23 Feb 2006 09:55:55 +0000 (01:55 -0800)]
[SPARC64]: Export _PAGE_E and _PAGE_CACHE to modules.
SBUS flash driver needs it.
Noticed by Fabbione.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 23 Feb 2006 00:20:11 +0000 (16:20 -0800)]
[SPARC64]: Fix %tstate ASI handling in start_thread{,32}()
Niagara helps us find a ancient bug in the sparc64 port :-)
The ASI_* values are plain constant defines, thus signed 32-bit
on sparc64. To put shift this into the regs->tstate value we were
doing or'ing "(ASI_PNF << 24)" into there.
ASI_PNF is 0x82 and shifted left by 24 makes that topmost bit the
sign bit in a 32-bit value. This would get sign extended to 64-bits
and thus corrupt the top-half of the reg->tstate value.
This never caused problems in pre-Niagara cpus because the only thing
up there were the condition code values. But Niagara has the global
register level field, and this all 1's value is illegal there so
Niagara gives an illegal instruction trap due to this bug.
I'm pretty sure this bug is about as old as the sparc64 port itself.
This also points out that we weren't setting ASI_PNF for 32-bit tasks.
We should, so fix that while we're here.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 23 Feb 2006 00:15:45 +0000 (16:15 -0800)]
[SPARC64]: Drop %gl to 0 before re-enabling PSTATE_IE in rtrap
If we take a window fault, on SUN4V set %gl to zero before we
turn PSTATE_IE back on in %pstate. Otherwise if we take an
interrupt we'll end up with corrupt register state.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 22 Feb 2006 06:31:11 +0000 (22:31 -0800)]
[SPARC64]: Create a seperate kernel TSB for 4MB/256MB mappings.
It can map all of the linear kernel mappings with zero TSB hash
conflicts for systems with 16GB or less ram. In such cases, on
SUN4V, once we load up this TSB the first time with all the
mappings, we never take a linear kernel mapping TLB miss ever
again, the hypervisor handles them all.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 22 Feb 2006 04:51:13 +0000 (20:51 -0800)]
[SPARC64]: Make use of Niagara 256MB PTEs for kernel mappings.
We use a bitmap, one bit for every 256MB of memory. If the
bit is set we can use a 256MB PTE for linear mappings, else
we have to use a 4MB PTE.
SUN4V support is there, and we can very easily add support
for Panther cpu 256MB PTEs in the future.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 22 Feb 2006 00:55:23 +0000 (16:55 -0800)]
[SPARC64]: Use sun4v_cpu_idle() in cpu_idle() on SUN4V.
We have to turn off the "polling nrflag" bit when we sleep
the cpu like this, so that we'll get a cross-cpu interrupt
to wake the processor up from the yield.
We also have to disable PSTATE_IE in %pstate around the yield
call and recheck need_resched() in order to avoid any races.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 22 Feb 2006 00:53:26 +0000 (16:53 -0800)]
[SPARC64] math-emu: Delete debugging printk left by previous commit.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 21 Feb 2006 23:42:09 +0000 (15:42 -0800)]
[SPARC64]: Add sun4v_cpu_yield().
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 21 Feb 2006 23:41:01 +0000 (15:41 -0800)]
[SPARC64]: Kill cpudata->idle_volume.
Set, but never used.
We used to use this for dynamic IRQ retargetting, but that
code died a long time ago.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 21 Feb 2006 22:29:42 +0000 (14:29 -0800)]
[SPARC64]: Niagara optimized memset/bzero/clear_user.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 21 Feb 2006 21:59:47 +0000 (13:59 -0800)]
[SPARC64]: Pass multiple CPUs at once to hypervisor cross-call API.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 21 Feb 2006 06:56:01 +0000 (22:56 -0800)]
[SPARC64]: Args to SUNW,set-trap-table are 64-bit.
They were getting truncated to 32-bit and this is very bad
when your MMU fault status area is in physical memory above
4GB on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Tue, 21 Feb 2006 00:02:24 +0000 (16:02 -0800)]
[SPARC64]: Handle unimplemented FPU square-root on Niagara.
The math-emu code only expects unfinished fpop traps when
emulating FPU sqrt instructions on pre-Niagara chips.
On Niagara we can get unimplemented fpop, so handle that.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 22:39:16 +0000 (14:39 -0800)]
[SPARC] serial: Make sure sysfs nodes get named correctly.
Because we play this trick where we use ttyS? in increasing minor
numbers for different sunfoo.c drivers, we have to inform the TTY
layer of this.
Do so by setting the tty->name_base appropriately.
Probably there should be a generic way to do this in the serial core,
but for now...
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 09:50:09 +0000 (01:50 -0800)]
[SPARC64]: Typo in sun4v_data_access_exception log message.
Should be "Dax" not "Iax".
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 09:42:51 +0000 (01:42 -0800)]
[SPARC64]: Handle zero-length map requests in pci_sun4v.c
By simply changing the do-while loop into a plain
while loop.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 09:09:01 +0000 (01:09 -0800)]
[SPARC64]: Kill stray PGLIST_NENTS check in pci_sun4v.c
I forgot to remove the one in pci_4v_map_sg() during the
iommu batching commit.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 08:54:09 +0000 (00:54 -0800)]
[SPARC64]: Fix typo in dump_tl1_traplog()
Actually make use of the 'limit' we compute.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 08:36:57 +0000 (00:36 -0800)]
[SPARC64]: Disable smp_report_regs() for now.
It's extremely noisy and causes much grief on slow
consoles with large numbers of cpus.
We'll have to provide this some saner way in order
to re-enable this.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 20 Feb 2006 06:21:32 +0000 (22:21 -0800)]
[SPARC64]: Remove PGLIST_NENTS PCI IOMMU mapping limitation on SUN4V.
Use a batching queue system for IOMMU mapping setup,
with a page sized batch.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 19 Feb 2006 01:06:28 +0000 (17:06 -0800)]
[SPARC64]: Use KERN_EMERG in dump_tl1_traplog() and sun4v TLB errors.
We're about to seriously die in these cases so it is important
that the messages make it to the console.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 19 Feb 2006 00:39:39 +0000 (16:39 -0800)]
[SPARC64]: Fix unaligned access winfxup handling on SUN4V.
Another case where we have to force ourselves into global register
level one. Also make sure the arguments passed to sun4v_do_mna() are
correct.
This area actually needs some more work, for example spill fixup is
not necessarily going to do the right thing for this case.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 19 Feb 2006 00:36:39 +0000 (16:36 -0800)]
[SPARC64]: Set %gl to 1 in kvmap_itlb_longpath on SUN4V.
Just like kvmap_dtlb_longpath we have to force the
global register level to one in order to mimick the
PSTATE_MG --> PSTATE_AG trasition done on SUN4U.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 19 Feb 2006 00:32:22 +0000 (16:32 -0800)]
[SPARC64] sunhv: Fix locking in sunhv_start_tx()
Caller takes the lock already.
Also, fixup the poll loop in sunhv_break_ctl(). Just
like in console write, we udelay(2) and use a loop
limit of
1000000 iterations.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sun, 19 Feb 2006 00:30:59 +0000 (16:30 -0800)]
[SPARC64]: Put sunhv.o earliest in the list of sparc serial drivers.
So that it will show up as /dev/ttyS0. Otherwise things like
installers will try to run on whatever serial port gets probed
first.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sat, 18 Feb 2006 20:43:16 +0000 (12:43 -0800)]
[SPARC64]: Export a PAGE_SHARED symbol.
For drivers/media/*, noticed by Fabbione.
Signed-off-by: David S. Miller <davem@davemloft.net>
Fabio M. Di Nitto [Sat, 18 Feb 2006 08:32:31 +0000 (00:32 -0800)]
[SPARC64] Fix build if CONFIG_HUGETLB_PAGE is not set
Signed-off-by: Fabio M. Di Nitto <fabbione@ubuntu.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Sat, 18 Feb 2006 02:01:02 +0000 (18:01 -0800)]
[SPARC64]: More TLB/TSB handling fixes.
The SUN4V convention with non-shared TSBs is that the context
bit of the TAG is clear. So we have to choose an "invalid"
bit and initialize new TSBs appropriately. Otherwise a zero
TAG looks "valid".
Make sure, for the window fixup cases, that we use the right
global registers and that we don't potentially trample on
the live global registers in etrap/rtrap handling (%g2 and
%g6) and that we put the missing virtual address properly
in %g5.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 23:07:43 +0000 (15:07 -0800)]
[SPARC64]: Don't do anything in flush_ptrace_access() on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 22:58:02 +0000 (14:58 -0800)]
[SPARC64]: Fix some SUN4V TLB handling bugs.
1) Add error return checking for TLB load hypervisor
calls.
2) Don't fallthru to dtlb tsb miss handler from itlb tsb
miss handler, oops.
3) On window fixups, propagate fault information to fixup
handler correctly.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 22:40:30 +0000 (14:40 -0800)]
[SPARC64]: Check for errors in hypervisor_tlb_lock().
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 27 Feb 2006 07:32:33 +0000 (23:32 -0800)]
[SPARC64]: Init boot cpu's trap_block[] before paging_init()
It must be ready when we take over the trap table.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 20:33:13 +0000 (12:33 -0800)]
[SPARC64]: Define ARCH_HAS_READ_CURRENT_TIMER.
This gives more consistent bogomips and delay() semantics,
especially on sun4v. It gives weird looking values though...
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 20:03:20 +0000 (12:03 -0800)]
[SPARC64]: Set associativity of kernel TSB descriptor correctly.
It should be 1, not 0.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 18:35:23 +0000 (10:35 -0800)]
[SPARC64]: __bzero_noasi --> __clear_user
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 18:28:24 +0000 (10:28 -0800)]
[SPARC64]: Put SUN4V ITSB miss into correct trap table entry.
It's 0x9 not 0xb.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 18:14:38 +0000 (10:14 -0800)]
[SPARC64]: Add HWCAP_SPARC_BLKINIT elf capability flag for Niagara.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 17:54:42 +0000 (09:54 -0800)]
[SPARC64]: Use phys tsb address in tsb_insert() in SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 16:38:06 +0000 (08:38 -0800)]
[SPARC64]: Fix uniprocessor IRQ targetting on SUN4V.
We need to use the real hardware processor ID when
targetting interrupts, not the "define to 0" thing
the uniprocessor build gives us.
Also, fill in the Node-ID and Agent-ID fields properly
on sun4u/Safari.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 16:20:18 +0000 (08:20 -0800)]
[SPARC64]: Fix PCI IRQ probing regression.
If the top-level cnode had multi entries in it's "reg"
property, we'd fail. The buffer wasn't large enough in
such cases.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 09:29:17 +0000 (01:29 -0800)]
[SPARC64]: Get SUN4V SMP working.
The sibling cpu bringup is extremely fragile. We can only
perform the most basic calls until we take over the trap
table from the firmware/hypervisor on the new cpu.
This means no accesses to %g4, %g5, %g6 since those can't be
TLB translated without our trap handlers.
In order to achieve this:
1) Change sun4v_init_mondo_queues() so that it can operate in
several modes.
It can allocate the queues, or install them in the current
processor, or both.
The boot cpu does both in it's call early on.
Later, the boot cpu allocates the sibling cpu queue, starts
the sibling cpu, then the sibling cpu loads them in.
2) init_cur_cpu_trap() is changed to take the current_thread_info()
as an argument instead of reading %g6 directly on the current
cpu.
3) Create a trampoline stack for the sibling cpus. We do our basic
kernel calls using this stack, which is locked into the kernel
image, then go to our proper thread stack after taking over the
trap table.
4) While we are in this delicate startup state, we put 0xdeadbeef
into %g4/%g5/%g6 in order to catch accidental accesses.
5) On the final prom_set_trap_table*() call, we put &init_thread_union
into %g6. This is a hack to make prom_world(0) work. All that
wants to do is restore the %asi register using
get_thread_current_ds().
Longer term we should just do the OBP calls to set the trap table by
hand just like we do for everything else. This would avoid that silly
prom_world(0) issue, then we can remove the init_thread_union hack.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 09:17:21 +0000 (01:17 -0800)]
[SPARC64]: Disable smp_report_regs() for now.
For 32 cpus and a slow console, it just wedges the
machine especially with DETECT_SOFTLOCKUP enabled.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 07:01:10 +0000 (23:01 -0800)]
[SPARC64]: Rewrite pci_intmap_match().
The whole algorithm was wrong. What we need to do is:
1) Walk each PCI bus above this device on the path to the
PCI controller nexus, and for each:
a) If interrupt-map exists, apply it, record IRQ controller node
b) Else, swivel interrupt number using PCI_SLOT(), use PCI bus
parent OBP node as controller node
c) Walk up to "controller node" until we hit the first PCI bus
in this domain, or "controller node" is the PCI controller
OBP node
2) If we walked to PCI controller OBP node, we're done.
3) Else, apply PCI controller interrupt-map to interrupt.
There is some stuff that needs to be checked out for ebus and
isa, but the PCI part is good to go.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 04:44:25 +0000 (20:44 -0800)]
[SPARC64]: Don't set interrupt state to IDLE in enable_irq().
We'll lose events that way.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 00:23:45 +0000 (16:23 -0800)]
[SPARC64]: Fix return from trap on SUN4V.
We need to set the global register set _AND_ disable
PSTATE_IE in %pstate. The original patch sequence was
leaving PSTATE_IE enabled when returning to kernel mode,
oops.
This fixes the random register corruption being seen
on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Fri, 17 Feb 2006 00:22:26 +0000 (16:22 -0800)]
[SPARC64]: Add GET_GL_GLOBAL() macro for SUN4V.
So we can read the %gl register for debugging.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 22:37:05 +0000 (14:37 -0800)]
[SPARC64]: Set dummy bucket->{imap,iclr} unique on SUN4V.
So that free_irq() disable's the IRQ correctly.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 22:26:53 +0000 (14:26 -0800)]
[SPARC64]: Add sun4v_cpu_qconf() hypervisor call.
Call it from register_one_mondo().
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 6 Mar 2006 00:46:58 +0000 (16:46 -0800)]
[SPARC]: Kill off these __put_user_ret things.
They are bogus and haven't been referenced in years.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 10:18:49 +0000 (02:18 -0800)]
[SPARC64]: do_fptrap needs to load the thread reg into %g6.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 09:45:49 +0000 (01:45 -0800)]
[SPARC64]: Fix bogus call to sun4v_mna in winfixup code.
The C function is named sun4v_do_mna not sun4v_mna.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 09:41:41 +0000 (01:41 -0800)]
[SPARC64]: Fix tl1 trap state capture/dump on SUN4V.
No trap levels above 2 in privileged mode on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 08:42:21 +0000 (00:42 -0800)]
[SPARC64] sunhv: Support SYSRQ properly.
By calling uart_handle_break(). We'll still do the
"sun_do_break()" handling if the user gives two
breaks in a row.
We should probably do this in the other Sparc serial
drivers too.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 06:25:27 +0000 (22:25 -0800)]
[SPARC64] PCI: Size TSB correctly on SUN4V.
Forgot to multiply by 8 * 1024, oops. Correct the size constant when
the virtual-dma arena is 2GB in size, it should bet 256 not 128.
Finally, log some info about the TSB at probe time.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 05:56:49 +0000 (21:56 -0800)]
[SPARC64]: Fix OOPS on sunhv interrupts.
Until the uart is openned, port->info is NULL.
Also, init the port->irq properly and give a non-zero
port->membase so that the uart device reporting is done.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 05:21:17 +0000 (21:21 -0800)]
[SPARC64]: Don't use ASI_QUAD_LDD_PHYS on SUN4V.
Need to use ASI_QUAD_LDD_PHYS_4V instead.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 05:16:42 +0000 (21:16 -0800)]
[SPARC64]: Do not write garbage into %pstate in tsb_context_switch().
For SUN4V, we were clobbering %o5 to do the hypervisor call.
This clobbers the saved %pstate value and we end up writing
garbage into that register as a result. Oops.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 05:01:31 +0000 (21:01 -0800)]
[SPARC64]: Fix flush_tsb_user() on SUN4V.
Needs to use physical addressing just like cheetah_plus.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 04:35:10 +0000 (20:35 -0800)]
[SPARC64]: Fix comment typo in __flush_tlb_kernel_range.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Thu, 16 Feb 2006 03:48:54 +0000 (19:48 -0800)]
[SPARC64]: Decode virtual-devices interrupts correctly.
Need to translate through the interrupt-map{,-mask] properties.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 10:26:54 +0000 (02:26 -0800)]
[SPARC64]: Add prom_{start,stop}cpu_cpuid().
Use prom_startcpu_cpuid() on SUN4V instead of prom_startcpu().
We should really test for "SUNW,start-cpu-by-cpuid" presence
and use it if present even on SUN4U.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 09:19:56 +0000 (01:19 -0800)]
[SPARC64]: Fix pci_intmap_match().
When crawling up the PCI bus chain, stop at the first node
that has an interrupt-map property before we hit the root.
Also, if we use a bus interrupt-{map,mask} do not forget to
update the 'intmask' pointer as we do for the 'intmap' pointer.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 09:18:19 +0000 (01:18 -0800)]
[SPARC64]: Two IRQ handling fixes.
On SUN4V, force IRQ state to idle in enable_irq(). However,
I'm still not sure this is %100 correct.
Call add_interrupt_randomness() on SUN4V too.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 08:41:47 +0000 (00:41 -0800)]
[SPARC64]: Fixup TSTATE layout diagram in asm/pstate.h
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 08:35:50 +0000 (00:35 -0800)]
[SPARC64]: Use different cache sizing defaults on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 06:20:41 +0000 (22:20 -0800)]
[SPARC64]: Make lack of interrupt-map-* a fatal error on SUN4V.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 06:20:13 +0000 (22:20 -0800)]
[SPARC64]: Fix sun4v_intr_setenabled() return value check in enable_irq().
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 00:44:39 +0000 (16:44 -0800)]
[SPARC64]: Explicitly init *nregs to 0 in find_device_prom_node().
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 00:42:11 +0000 (16:42 -0800)]
[SPARC64]: Restrict PCI bus scanning on SUN4V.
On the PBM's first bus number, only allow device 0, function 0, to be
poked at with PCI config space accesses.
For some reason, this single device responds to all device numbers.
Also, reduce the verbiage of the debugging log printk's for PCI cfg
space accesses in the SUN4V PCI controller driver, so that it doesn't
overwhelm the slow SUN4V hypervisor console.
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Wed, 15 Feb 2006 00:39:22 +0000 (16:39 -0800)]
[SPARC64]: Fix C-function name called by sun4v_mna trap code.
The trap code was calling itself :-)
Signed-off-by: David S. Miller <davem@davemloft.net>