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Aart Bik [Wed, 16 Dec 2015 19:21:38 +0000 (19:21 +0000)]
Merge "Revert "X86: Use locked add rather than mfence""
am:
1c70f18dce
* commit '
1c70f18dce7705ff70147ddebf65a97f66df8d5c':
Revert "X86: Use locked add rather than mfence"
Aart Bik [Wed, 16 Dec 2015 19:11:38 +0000 (19:11 +0000)]
Merge "Revert "X86: Use locked add rather than mfence""
Dimitry Ivanov [Wed, 16 Dec 2015 19:09:26 +0000 (19:09 +0000)]
Merge "Remove references to dlmalloc specific functions"
am:
1f312652e1
* commit '
1f312652e138e05328b9c4c738d3ecbab2d09ae9':
Remove references to dlmalloc specific functions
Aart Bik [Wed, 16 Dec 2015 19:06:17 +0000 (19:06 +0000)]
Revert "X86: Use locked add rather than mfence"
This reverts commit
7b3e4f99b25c31048a33a08688557b133ad345ab.
Reason: build error on sdk (linux) in git_mirror-aosp-master-with-vendor , please fix first
art/compiler/optimizing/code_generator_x86_64.cc:4032:7: error: use of
undeclared identifier 'codegen_'
codegen_->MemoryFence();
Change-Id: I91f8542cfd944b7425d1981c35872dcdcb901e18
Dimitry Ivanov [Wed, 16 Dec 2015 19:00:55 +0000 (19:00 +0000)]
Merge "Remove references to dlmalloc specific functions"
Aart Bik [Wed, 16 Dec 2015 18:56:49 +0000 (18:56 +0000)]
Merge "X86: Use locked add rather than mfence"
am:
c3ca1e6543
* commit '
c3ca1e6543ef5e717183c059e68ac34597be7022':
X86: Use locked add rather than mfence
Aart Bik [Wed, 16 Dec 2015 18:47:07 +0000 (18:47 +0000)]
Merge "X86: Use locked add rather than mfence"
Andreas Gampe [Wed, 16 Dec 2015 17:25:15 +0000 (17:25 +0000)]
Merge "Make the 008-exceptions test print everything to stdout"
am:
9ddcbf69cf
* commit '
9ddcbf69cfa807790e324f7f54e1931bc66d0f5c':
Make the 008-exceptions test print everything to stdout
Roland Levillain [Wed, 16 Dec 2015 17:25:04 +0000 (17:25 +0000)]
Merge "Remove spurious references to kEmitCompilerReadBarrier in MIPS."
am:
27f114df49
* commit '
27f114df49c5e99bb7712310f153eae089ae15a2':
Remove spurious references to kEmitCompilerReadBarrier in MIPS.
Andreas Gampe [Wed, 16 Dec 2015 17:08:53 +0000 (17:08 +0000)]
Merge "Make the 008-exceptions test print everything to stdout"
Roland Levillain [Wed, 16 Dec 2015 17:08:26 +0000 (17:08 +0000)]
Merge "Remove spurious references to kEmitCompilerReadBarrier in MIPS."
Roland Levillain [Wed, 16 Dec 2015 17:06:47 +0000 (17:06 +0000)]
Remove spurious references to kEmitCompilerReadBarrier in MIPS.
We do not support read barriers on MIPS code generators yet.
Also, wrap some long lines in the MIPS64 code generator.
Change-Id: Ia2755590afa60eb9c8fb547e059146ab6518372b
Roland Levillain [Wed, 16 Dec 2015 15:55:01 +0000 (15:55 +0000)]
Merge "MIPS32: Fuse long and FP compare & condition in Optimizing."
am:
cbf8af898e
* commit '
cbf8af898e758cef27687c20c8cf9ac75280026d':
MIPS32: Fuse long and FP compare & condition in Optimizing.
Roland Levillain [Wed, 16 Dec 2015 15:45:29 +0000 (15:45 +0000)]
Merge "MIPS32: Fuse long and FP compare & condition in Optimizing."
Roland Levillain [Wed, 16 Dec 2015 15:32:09 +0000 (15:32 +0000)]
Merge "Adjust tests blacklisted for heap poisoning and read barriers."
am:
1329b15f47
* commit '
1329b15f47751b764ba3162674b2bb997c2ddb90':
Adjust tests blacklisted for heap poisoning and read barriers.
Roland Levillain [Wed, 16 Dec 2015 15:28:36 +0000 (07:28 -0800)]
Merge "Disable LinkedTransferQueueTest tests failing on the CC."
am:
42d3ab3b2b
* commit '
42d3ab3b2bfce4f0e0b6e377dd3997ff0b5cc8da':
Disable LinkedTransferQueueTest tests failing on the CC.
Roland Levillain [Wed, 16 Dec 2015 15:28:27 +0000 (07:28 -0800)]
Merge "Revert "Revert "Introduce support for hardware simulators, starting with ARM64"""
am:
4741516396
* commit '
4741516396e9dbfb3afc2c1d8241a7e4e26a6302':
Revert "Revert "Introduce support for hardware simulators, starting with ARM64""
Roland Levillain [Wed, 16 Dec 2015 15:25:49 +0000 (15:25 +0000)]
Merge "Adjust tests blacklisted for heap poisoning and read barriers."
Roland Levillain [Wed, 16 Dec 2015 15:23:06 +0000 (15:23 +0000)]
Merge "Disable LinkedTransferQueueTest tests failing on the CC."
Roland Levillain [Wed, 16 Dec 2015 15:21:25 +0000 (15:21 +0000)]
Merge "Revert "Revert "Introduce support for hardware simulators, starting with ARM64"""
Roland Levillain [Wed, 16 Dec 2015 15:15:17 +0000 (15:15 +0000)]
Disable LinkedTransferQueueTest tests failing on the CC.
The following libcore tests randomly fail on the
concurrent collector (CC) configuration:
- jsr166.LinkedTransferQueueTest#testTransfer2
- jsr166.LinkedTransferQueueTest#testWaitingConsumer
It seems that it is due to
SR166TestCase.waitForThreadToEnterWaitState timing out.
Disable those tests while we investigate.
Bug:
25883050
Change-Id: I4f310c677869d9e2701738e9734a1f53b5939f18
Kevin Brodsky [Mon, 14 Dec 2015 10:15:04 +0000 (10:15 +0000)]
Make the 008-exceptions test print everything to stdout
Printing to different streams (stderr and stdout) may cause the
messages to be interleaved, making the test fail. Without this patch,
this kind of outcome has been observed:
--- expected.txt 2015-12-09 08:13:50.
583294910 +0000
+++ output.txt 2015-12-09 08:55:35.
635185771 +0000
@@ -1,15 +1,15 @@
Got an NPE: second throw
java.lang.NullPointerException: second throw
- at Main.catchAndRethrow(Main.java:77)
+Static Init
+BadError: This is bad by convention: BadInit
+java.lang.NoClassDefFoundError: BadInit at Main.catchAndRethrow(Main.java:77)
at Main.exceptions_007(Main.java:59)
at Main.main(Main.java:67)
Caused by: java.lang.NullPointerException: first throw
at Main.throwNullPointerException(Main.java:84)
at Main.catchAndRethrow(Main.java:74)
... 2 more
-Static Init
-BadError: This is bad by convention: BadInit
-java.lang.NoClassDefFoundError: BadInit
+
BadError: This is bad by convention: BadInit
Static BadInitNoStringInit
BadErrorNoStringInit: This is bad by convention
Change-Id: Iaabf5ed593d100abf157adf46c1761338227d2cf
Roland Levillain [Wed, 16 Dec 2015 14:21:33 +0000 (14:21 +0000)]
Adjust tests blacklisted for heap poisoning and read barriers.
Bug:
12687968
Change-Id: I7b504661c04d35d10f66a3893a33db8c9db128a1
Nicolas Geoffray [Wed, 16 Dec 2015 12:40:32 +0000 (04:40 -0800)]
Merge "Add test case for bad arm code generation."
am:
7f3b38cc23
* commit '
7f3b38cc23b638ab84ac01a94e90f0456da3b688':
Add test case for bad arm code generation.
Nicolas Geoffray [Wed, 16 Dec 2015 12:40:22 +0000 (04:40 -0800)]
Merge "Revert "ART: Reduce the instructions generated by packed switch.""
am:
d7d3538383
* commit '
d7d35383838c369a4a1ff5aa21e952f941718c48':
Revert "ART: Reduce the instructions generated by packed switch."
Nicolas Geoffray [Wed, 16 Dec 2015 12:31:26 +0000 (12:31 +0000)]
Merge "Add test case for bad arm code generation."
Nicolas Geoffray [Wed, 16 Dec 2015 12:31:14 +0000 (12:31 +0000)]
Merge "Revert "ART: Reduce the instructions generated by packed switch.""
Nicolas Geoffray [Wed, 16 Dec 2015 12:16:43 +0000 (12:16 +0000)]
Add test case for bad arm code generation.
Bug:
26121945
Change-Id: Ibaedeca24d4208a0bc6b650e549cb68619fd8f64
Nicolas Geoffray [Wed, 16 Dec 2015 12:06:39 +0000 (12:06 +0000)]
Revert "ART: Reduce the instructions generated by packed switch."
This reverts commit
59f054d98f519a3efa992b1c688eb97bdd8bbf55.
bug:
26121945
Change-Id: I8a5ad7ef1f1de8d44787c27528fa3f7f5c2e9cd3
Vladimir Marko [Wed, 16 Dec 2015 11:00:00 +0000 (11:00 +0000)]
Merge "ART: Compile run-tests with Java 7."
am:
6b75bc08e8
* commit '
6b75bc08e8e2e5516a23350418bacef2cf982bd9':
ART: Compile run-tests with Java 7.
Vladimir Marko [Wed, 16 Dec 2015 10:50:52 +0000 (10:50 +0000)]
Merge "ART: Compile run-tests with Java 7."
Vladimir Marko [Tue, 15 Dec 2015 16:36:24 +0000 (16:36 +0000)]
ART: Compile run-tests with Java 7.
This fixes run-tests with EXPERIMENTAL_USE_JAVA8=true.
Change-Id: I269664fc65a1d6c244c3f6191e332eb2751b5c0e
Nicolas Geoffray [Wed, 16 Dec 2015 09:42:47 +0000 (09:42 +0000)]
Merge "Revert "ART: Set RTI of Arm64IntermediateAddress""
am:
96f721dd41
* commit '
96f721dd41f81c967b187d81b6f3e1bcc2a9243c':
Revert "ART: Set RTI of Arm64IntermediateAddress"
Nicolas Geoffray [Wed, 16 Dec 2015 09:34:39 +0000 (09:34 +0000)]
Merge "Revert "ART: Set RTI of Arm64IntermediateAddress""
Nicolas Geoffray [Wed, 16 Dec 2015 09:34:21 +0000 (09:34 +0000)]
Revert "ART: Set RTI of Arm64IntermediateAddress"
This reverts commit
e36ae9435da21542891ceeebb3328f5066c8301e.
Change-Id: If675b02db04bee78cc95da4ed58e545da5085da1
Nicolas Geoffray [Wed, 16 Dec 2015 08:45:07 +0000 (08:45 +0000)]
Merge "Revert "ART: Refactor SsaBuilder for more precise typing info""
am:
b059c8a044
* commit '
b059c8a044ed3ede1a0eea4b1e92008ced90c013':
Revert "ART: Refactor SsaBuilder for more precise typing info"
Nicolas Geoffray [Wed, 16 Dec 2015 08:35:46 +0000 (08:35 +0000)]
Merge "Revert "ART: Refactor SsaBuilder for more precise typing info""
Alex Light [Wed, 16 Dec 2015 01:30:30 +0000 (17:30 -0800)]
Revert "ART: Refactor SsaBuilder for more precise typing info"
This reverts commit
d9510dfc32349eeb4f2145c801f7ba1d5bccfb12.
Bug:
26208284
Bug:
24252151
Bug:
24252100
Bug:
22538329
Bug:
25786318
Change-Id: I5f491becdf076ff51d437d490405ec4e1586c010
Alex Light [Wed, 16 Dec 2015 01:30:30 +0000 (01:30 +0000)]
Merge "Revert "Combine direct_methods_ and virtual_methods_ fields of mirror::Class""
am:
bc90a0538e
* commit '
bc90a0538e56f98b8e138cb622e6b9d834244ad9':
Revert "Combine direct_methods_ and virtual_methods_ fields of mirror::Class"
Alexey Frunze [Fri, 4 Dec 2015 00:46:38 +0000 (16:46 -0800)]
MIPS32: Fuse long and FP compare & condition in Optimizing.
This also does a minor clean-up in the assembler and
its test.
Bug:
25559148
Change-Id: I9bad3c500b592a09013b56745f70752eb284a842
Alex Light [Tue, 15 Dec 2015 22:17:21 +0000 (22:17 +0000)]
Merge "Revert "Combine direct_methods_ and virtual_methods_ fields of mirror::Class""
Alex Light [Tue, 15 Dec 2015 22:15:26 +0000 (22:15 +0000)]
Revert "Combine direct_methods_ and virtual_methods_ fields of mirror::Class"
This reverts commit
6286a97bea0f584342803a215550038852b24776.
Change-Id: I5b00f6d1350e9c587acd4b185367dc815ea707de
Aart Bik [Tue, 15 Dec 2015 21:10:45 +0000 (21:10 +0000)]
Merge "Various induction/range analysis improvements."
am:
0bbc1727c4
* commit '
0bbc1727c446ee5f4cc3c28e68127164ef379594':
Various induction/range analysis improvements.
Aart Bik [Tue, 15 Dec 2015 20:50:49 +0000 (20:50 +0000)]
Merge "Various induction/range analysis improvements."
Mark Mendell [Thu, 19 Nov 2015 19:08:40 +0000 (14:08 -0500)]
X86: Use locked add rather than mfence
Java semantics for memory ordering can be satisfied using
lock addl $0,0(SP)
rather than mfence. The locked add synchronizes the memory caches, but
doesn't affect device memory.
Timing on a micro benchmark with a mfence or lock add $0,0(sp) in a loop
with
600000000 iterations:
time ./mfence
real 0m5.411s
user 0m5.408s
sys 0m0.000s
time ./locked_add
real 0m3.552s
user 0m3.550s
sys 0m0.000s
Implement this as an instruction-set-feature lock_add. This is off by
default (uses mfence), and enabled for atom & silvermont variants.
Generation of mfence can be forced by a parameter to MemoryFence.
Change-Id: I5cb4fded61f4cbbd7b7db42a1b6902e43e458911
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Aart Bik [Wed, 9 Dec 2015 22:39:48 +0000 (14:39 -0800)]
Various induction/range analysis improvements.
Rationale: this change list improves analysis of triangular loops
both by changing loop order for induction analysis
(enabling range analysis in inner loops) and by
some symbolic improvements during range analysis;
also, a mul/div bug has been fixed (with pass/fail
unit tests); lastly this change list prepares some
follow up optimizations.
Change-Id: I84a03e848405009541c3fa8e3d3c2f430e100087
Alex Light [Tue, 15 Dec 2015 18:32:46 +0000 (18:32 +0000)]
Merge "Combine direct_methods_ and virtual_methods_ fields of mirror::Class"
am:
7d5a577c1f
* commit '
7d5a577c1f256a7703361afb071dcd4ecc7d275f':
Combine direct_methods_ and virtual_methods_ fields of mirror::Class
Alex Light [Tue, 15 Dec 2015 18:11:08 +0000 (18:11 +0000)]
Merge "Combine direct_methods_ and virtual_methods_ fields of mirror::Class"
Nicolas Geoffray [Tue, 15 Dec 2015 17:40:24 +0000 (17:40 +0000)]
Merge "Remove reference of deleted file."
am:
ad94d64719
* commit '
ad94d64719c2a82cdd312b318b8e50d80e2956c5':
Remove reference of deleted file.
Nicolas Geoffray [Tue, 15 Dec 2015 17:36:23 +0000 (17:36 +0000)]
Merge "Remove test given its flakiness."
am:
3e2d20636f
* commit '
3e2d20636f9eaee1226074b99017d759c6f3b7a0':
Remove test given its flakiness.
Nicolas Geoffray [Tue, 15 Dec 2015 17:04:50 +0000 (17:04 +0000)]
Merge "Remove reference of deleted file."
Nicolas Geoffray [Tue, 15 Dec 2015 17:04:05 +0000 (17:04 +0000)]
Remove reference of deleted file.
Change-Id: Ib6d03a8c57a746e738fc849deee800d28da82485
Nicolas Geoffray [Tue, 15 Dec 2015 16:45:34 +0000 (16:45 +0000)]
Merge "Remove test given its flakiness."
David Srbecky [Tue, 15 Dec 2015 16:06:18 +0000 (16:06 +0000)]
Merge "Refactor DexFile::DecodeDebugInfo."
am:
96c9de9510
* commit '
96c9de9510b33e2c8def669c4dfcb65db729e7d2':
Refactor DexFile::DecodeDebugInfo.
Roland Levillain [Tue, 15 Dec 2015 16:06:00 +0000 (16:06 +0000)]
Merge "x86-64 Baker\'s read barrier fast path implementation."
am:
74768fb830
* commit '
74768fb83073a2ae84c9173d4fc53654e3092b24':
x86-64 Baker's read barrier fast path implementation.
Roland Levillain [Tue, 15 Dec 2015 16:05:51 +0000 (16:05 +0000)]
Merge "x86 Baker\'s read barrier fast path implementation."
am:
089ff4886a
* commit '
089ff4886aa9b5e7cec04d2ef5cdeb9d68e5dc43':
x86 Baker's read barrier fast path implementation.
Calin Juravle [Tue, 15 Dec 2015 16:05:44 +0000 (16:05 +0000)]
Merge "Lower jitthreshold for jit profile test."
am:
bd00c8226e
* commit '
bd00c8226ebc28d2745ac4d0408b11c156771773':
Lower jitthreshold for jit profile test.
Nicolas Geoffray [Tue, 15 Dec 2015 16:05:37 +0000 (16:05 +0000)]
Merge "Fix --inline-max-code-units option."
am:
bf14c65108
* commit '
bf14c651080c31ae923ae1a75dbb82ace5adeee1':
Fix --inline-max-code-units option.
Nicolas Geoffray [Tue, 15 Dec 2015 16:05:30 +0000 (16:05 +0000)]
Merge "Revert "Make the JIT the default in ART.""
am:
3b0ec01718
* commit '
3b0ec017185a6d694f5041e79cc7a85d51943cff':
Revert "Make the JIT the default in ART."
Nicolas Geoffray [Tue, 15 Dec 2015 16:05:17 +0000 (16:05 +0000)]
Merge "Make the JIT the default in ART."
am:
7cd230c8f7
* commit '
7cd230c8f74a227ea04f1dd93c8d855aa81fc1fe':
Make the JIT the default in ART.
Shinichiro Hamaji [Tue, 15 Dec 2015 16:04:40 +0000 (16:04 +0000)]
Merge "Get DCHECK back to EncodedStaticFieldValueIterator"
am:
37fcf39935
* commit '
37fcf39935f24c1699cd6dacce47bbef70ca3b46':
Get DCHECK back to EncodedStaticFieldValueIterator
Nicolas Geoffray [Tue, 15 Dec 2015 16:03:48 +0000 (16:03 +0000)]
Remove test given its flakiness.
Change-Id: I7b746bd93cfd3f7eca71f1a7b9dcc799d30dd971
David Srbecky [Tue, 15 Dec 2015 15:29:17 +0000 (15:29 +0000)]
Merge "Refactor DexFile::DecodeDebugInfo."
David Srbecky [Thu, 10 Dec 2015 13:15:00 +0000 (13:15 +0000)]
Refactor DexFile::DecodeDebugInfo.
Split the method into two - one for locals and one for positions.
All uses of the method request only one of the two and it makes the
code slightly cleaner. The position variant requires fewer parameters.
Expose additional line table information which was previously ignored
by the decode method (prologue, epilogue, source file).
Change-Id: Idf8ba98fa58ea0d2103932b5cc0af81365885107
Roland Levillain [Tue, 15 Dec 2015 13:55:13 +0000 (13:55 +0000)]
Merge "x86-64 Baker's read barrier fast path implementation."
Roland Levillain [Tue, 15 Dec 2015 12:39:34 +0000 (12:39 +0000)]
Merge "x86 Baker's read barrier fast path implementation."
Calin Juravle [Tue, 15 Dec 2015 12:20:13 +0000 (12:20 +0000)]
Merge "Lower jitthreshold for jit profile test."
Nicolas Geoffray [Tue, 15 Dec 2015 12:14:14 +0000 (12:14 +0000)]
Merge "Fix --inline-max-code-units option."
Nicolas Geoffray [Tue, 15 Dec 2015 12:09:43 +0000 (12:09 +0000)]
Fix --inline-max-code-units option.
Change-Id: I73d99904a9eed69eb89efb6fb764db4a5d199f20
Calin Juravle [Tue, 15 Dec 2015 12:02:50 +0000 (12:02 +0000)]
Lower jitthreshold for jit profile test.
The test still proves to be flacky on the build bots. Lowering the
threshold will trigger compilation earlier.
Change-Id: Iacabf88d9fbd2a15fd3456f817402c9aaf3ec766
Nicolas Geoffray [Tue, 15 Dec 2015 11:51:51 +0000 (11:51 +0000)]
Merge "Revert "Make the JIT the default in ART.""
Nicolas Geoffray [Tue, 15 Dec 2015 11:51:37 +0000 (11:51 +0000)]
Revert "Make the JIT the default in ART."
Few tests failing: oat_file_assistant_test and jit run tests.
This reverts commit
0a9b6826bc6e71d799eb3fe8829981597b890dee.
Change-Id: Ibbf73c191d244ebb9517b6ae97971dd9a9d37d7c
Roland Levillain [Tue, 15 Dec 2015 10:54:19 +0000 (10:54 +0000)]
x86-64 Baker's read barrier fast path implementation.
Introduce an x86-64 fast path implementation in Optimizing
for Baker's read barriers (for both heap reference loads and
GC root loads). The marking phase of the read barrier is
performed by a slow path, invoking the runtime entry point
artReadBarrierMark.
Other read barrier algorithms continue to use the original
slow path based implementation, which has been renamed as
GenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.
Bug:
12687968
Change-Id: I9329293ddca7f9bcb512132bde6675aa202b98b2
Roland Levillain [Tue, 15 Dec 2015 10:55:36 +0000 (10:55 +0000)]
x86 Baker's read barrier fast path implementation.
Introduce an x86 fast path implementation in Optimizing for
Baker's read barriers (for both heap reference loads and GC
root loads). The marking phase of the read barrier is
performed by a slow path, invoking a new runtime entry point
(artReadBarrierMark).
Other read barrier algorithms continue to use the original
slow path based implementation, which has been renamed as
GenerateReadBarrierSlow/GenerateReadBarrierForRootSlow.
Bug:
12687968
Change-Id: Ie610c4befc19ff22378a8cba38b422dcacb54320
Nicolas Geoffray [Tue, 15 Dec 2015 09:38:55 +0000 (09:38 +0000)]
Merge "Make the JIT the default in ART."
Dimitry Ivanov [Tue, 15 Dec 2015 02:55:02 +0000 (18:55 -0800)]
Remove references to dlmalloc specific functions
Remove references to internal libc dlmalloc_* functions
so that we can hide them for lp64
Change-Id: I13977bea63d900e1819052140e3bd6bc1f2fc759
Shinichiro Hamaji [Tue, 15 Dec 2015 04:42:20 +0000 (04:42 +0000)]
Merge "Get DCHECK back to EncodedStaticFieldValueIterator"
Alex Light [Fri, 4 Dec 2015 01:38:56 +0000 (17:38 -0800)]
Combine direct_methods_ and virtual_methods_ fields of mirror::Class
This makes several parts of the overall runtime simpler and reduces
the size of a class object by 32-bits.
Bug:
24618811
Change-Id: I36129b52189e26898ea56fa2b7b45652e06af236
Dimitry Ivanov [Mon, 14 Dec 2015 18:11:23 +0000 (10:11 -0800)]
Merge "Temporary disable linker-namespaces"
am:
a8be6ae6fc
* commit '
a8be6ae6fcf1c58c0c2067739352e16b92972c41':
Temporary disable linker-namespaces
Calin Juravle [Mon, 14 Dec 2015 18:11:15 +0000 (10:11 -0800)]
Merge "Increase the sleep time in 554-jit-profile-file"
am:
395125122a
* commit '
395125122a57dd042a507fcf1520e123561d2043':
Increase the sleep time in 554-jit-profile-file
Dimitry Ivanov [Mon, 14 Dec 2015 18:04:02 +0000 (18:04 +0000)]
Merge "Temporary disable linker-namespaces"
Calin Juravle [Mon, 14 Dec 2015 18:03:55 +0000 (18:03 +0000)]
Merge "Increase the sleep time in 554-jit-profile-file"
Calin Juravle [Mon, 14 Dec 2015 18:01:21 +0000 (18:01 +0000)]
Increase the sleep time in 554-jit-profile-file
The previous sleep time wasn't enough. Some tests failed because not
all the methods managed to be compiled in time.
Change-Id: I4d63b6c3602c72dfa608f62c55e0f484bbfcf900
Dimitry Ivanov [Mon, 14 Dec 2015 17:57:56 +0000 (09:57 -0800)]
Temporary disable linker-namespaces
Bug: http://b/
26178910
Bug: http://b/
26165097
Change-Id: I858c70dc72ec164ea7a79ad625ddda91367dae06
Calin Juravle [Mon, 14 Dec 2015 17:15:11 +0000 (09:15 -0800)]
Merge "Disable 554-jit-profile-file for the READ_BARRIER mode."
am:
377cb3ba2e
* commit '
377cb3ba2e1cfe51967e5292268a9aae71ceca8c':
Disable 554-jit-profile-file for the READ_BARRIER mode.
Calin Juravle [Mon, 14 Dec 2015 16:48:10 +0000 (16:48 +0000)]
Merge "Disable 554-jit-profile-file for the READ_BARRIER mode."
Calin Juravle [Mon, 14 Dec 2015 16:29:06 +0000 (16:29 +0000)]
Disable 554-jit-profile-file for the READ_BARRIER mode.
Change-Id: I98f5c0aeb0d68b42a587b1f7261d3fe998ca7f8b
Calin Juravle [Mon, 14 Dec 2015 15:20:04 +0000 (07:20 -0800)]
Merge "Print more info on why the code_cache test fails in 115-native-bridge."
am:
b9d6996ed1
* commit '
b9d6996ed1efcfaa9582e9a217053aa53e8d1733':
Print more info on why the code_cache test fails in 115-native-bridge.
Calin Juravle [Mon, 14 Dec 2015 15:15:08 +0000 (15:15 +0000)]
Merge "Print more info on why the code_cache test fails in 115-native-bridge."
Calin Juravle [Mon, 14 Dec 2015 14:43:46 +0000 (06:43 -0800)]
Merge "Revert "Revert "Enable profiled guided compilation in dex2oat"""
am:
8cf97d7295
* commit '
8cf97d729592774afa495717626ac4e4525a499f':
Revert "Revert "Enable profiled guided compilation in dex2oat""
Calin Juravle [Mon, 14 Dec 2015 14:38:38 +0000 (14:38 +0000)]
Merge "Revert "Revert "Enable profiled guided compilation in dex2oat"""
Calin Juravle [Mon, 14 Dec 2015 14:35:17 +0000 (14:35 +0000)]
Print more info on why the code_cache test fails in 115-native-bridge.
Change-Id: Ib30893e53a5ed616ae4f6b6bc4d657b0fca846c8
David Brazdil [Mon, 14 Dec 2015 14:34:55 +0000 (06:34 -0800)]
Merge "ART: Set RTI of Arm64IntermediateAddress"
am:
84c3d48a6c
* commit '
84c3d48a6ce4d2c9396364973b3d7f43893ab468':
ART: Set RTI of Arm64IntermediateAddress
David Brazdil [Mon, 14 Dec 2015 14:28:32 +0000 (14:28 +0000)]
Merge "ART: Set RTI of Arm64IntermediateAddress"
David Brazdil [Mon, 14 Dec 2015 14:25:44 +0000 (14:25 +0000)]
ART: Set RTI of Arm64IntermediateAddress
Fixes the arm64 build after I7a3aee1ff66c82d64b4846611c547af17e91d260.
Change-Id: Ic2c72df59e0ddbdf2edc8519a6954d078a5ef596
David Brazdil [Mon, 14 Dec 2015 13:45:01 +0000 (05:45 -0800)]
Merge "ART: Refactor SsaBuilder for more precise typing info"
am:
795accfff0
* commit '
795accfff05abfb69f54003ee3f096ef3ff6f1e4':
ART: Refactor SsaBuilder for more precise typing info
David Brazdil [Mon, 14 Dec 2015 13:38:20 +0000 (13:38 +0000)]
Merge "ART: Refactor SsaBuilder for more precise typing info"
David Brazdil [Wed, 4 Nov 2015 23:30:22 +0000 (23:30 +0000)]
ART: Refactor SsaBuilder for more precise typing info
This patch refactors the SsaBuilder to do the following:
1) All phis are constructed live and marked dead if not used or proved
to be conflicting.
2) Primitive type propagation, now not a separate pass, identifies
conflicting types and marks corresponding phis dead.
3) When compiling --debuggable, DeadPhiHandling used to revive phis
which had only environmental uses but did not attempt to resolve
conflicts. This pass was removed as obsolete and is now superseded
by primitive type propagation (identifying conflicting phis) and
SsaDeadPhiEliminiation (keeping phis live if debuggable + env use).
4) Resolving conflicts requires correct primitive type information
on all instructions. This was not the case for ArrayGet instructions
which can have ambiguous types in the bytecode. To this end,
SsaBuilder now runs reference type propagation and types ArrayGets
from the type of the input array.
5) With RTP being run inside the SsaBuilder, it is not necessary to
run it as a separate optimization pass. Optimizations can now assume
that all instructions of type kPrimNot have reference type info after
SsaBuilder (with the exception of NullConstant).
6) Graph now contains a reference type to be assigned to NullConstant.
All reference type instructions therefore have RTI, as now enforced
by the SsaChecker.
Bug:
24252151
Bug:
24252100
Bug:
22538329
Bug:
25786318
Change-Id: I7a3aee1ff66c82d64b4846611c547af17e91d260
Vladimir Marko [Mon, 14 Dec 2015 11:59:54 +0000 (03:59 -0800)]
Merge "ART: Rename ROR test to a shorter name."
am:
ceec5a3c81
* commit '
ceec5a3c81925cf80a18954b2e585316450c575c':
ART: Rename ROR test to a shorter name.
Vladimir Marko [Mon, 14 Dec 2015 11:54:45 +0000 (11:54 +0000)]
Merge "ART: Rename ROR test to a shorter name."