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Brian Paul [Fri, 12 Sep 2014 12:29:04 +0000 (06:29 -0600)]
mesa: fix _mesa_free_pipeline_data() use-after-free bug
Unreference the ctx->_Shader object before we delete all the pipeline
objects in the hash table. Before, ctx->_Shader could point to freed
memory when _mesa_reference_pipeline_object(ctx, &ctx->_Shader, NULL)
was called.
Fixes crash when exiting the piglit rendezvous_by_location test on
Windows.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Connor Abbott [Sat, 6 Sep 2014 00:59:32 +0000 (20:59 -0400)]
ra: assert against unsigned underflow in q_total
q_total should never go below 0 (which is why it's defined as unsigned),
and if it does, then something is seriously wrong.
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Connor Abbott [Sat, 6 Sep 2014 00:59:31 +0000 (20:59 -0400)]
ra: note a restriction in the interfence graph API
As noted in the previous commit, this was introduced in
567e2769b81863b6dffdac3826a6b729ce6ea37c ("ra: make the p, q test more
efficient"), but I forgot to mention it.
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Connor Abbott [Sat, 6 Sep 2014 00:59:30 +0000 (20:59 -0400)]
r300g: set register classes before interferences
In commit
567e2769b81863b6dffdac3826a6b729ce6ea37c ("ra: make the p, q
test more efficient") I unknowingly introduced a new requirement to the
register allocator API: the user must set the register class of all
nodes before setting up their interferences, because
ra_add_conflict_list() now uses the classes of the two interfering
nodes. i965 already did this, but r300g was setting up register classes
interleaved with setting up the interference graph. This led to us
calculating the wrong q total, and in certain cases
e78a01d5e6f77e075fe667a0f0ccb10d89c0dd58 (" ra: optimistically color
only one node at a time") made it so that this bug caused a segfault. In
particular, the error occurred if the q total was decremented to 1 below
0 for the last node to be pushed onto the stack. Since q_total is an
unsigned integer, it overflowed to 0xffffffff, which is what
lowest_q_total happens to be initialzed to. This means that we would
fail the "new_q_total < lowest_q_total" check on line 476 of
register_allocate.c, and so the node would never be pushed onto the
stack, which led to segfaults in ra_select() when we failed to ever give
it a register.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82828
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Pavel Ondračka <pavel.ondracka@email.cz>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Andreas Boll [Fri, 12 Sep 2014 08:11:24 +0000 (10:11 +0200)]
gallium/util: add missing u_debug include
Needed for assert.
Fixes build on BE archs with -Werror=implicit-function-declaration.
In file included from
../../../../../src/gallium/auxiliary/draw/draw_fs.c:30:0:
../../../../../src/gallium/auxiliary/util/u_math.h: In function
'util_memcpy_cpu_to_le32':
../../../../../src/gallium/auxiliary/util/u_math.h:810:4: error:
implicit declaration of function 'assert'
[-Werror=implicit-function-declaration]
assert(n % 4 == 0);
^
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Chia-I Wu [Fri, 12 Sep 2014 06:37:40 +0000 (14:37 +0800)]
ilo: fix builder size checks for BLT buffer clear/copy
In buf_clear_region() and buf_copy_region(), max_cmd_size was set to 0. If
either of the functions is called and there is not enough space in the
builder, the next ilo_cp_flush() will fail silently in a release build.
Replace magic numbers by size defines in tex_clear_region()/tex_copy_region()
for consistency and readability.
Chia-I Wu [Fri, 12 Sep 2014 04:20:31 +0000 (12:20 +0800)]
ilo: reduce BLT function parameters
Intruduce gen6_blt_bo and gen6_blt_xy_bo to describe BOs. In the extreme case
of gen6_XY_SRC_COPY_BLT(), the number of parameters goes down from 18 to 8.
Chia-I Wu [Fri, 12 Sep 2014 03:54:36 +0000 (11:54 +0800)]
ilo: clean up BLT functions
Follow the changes for MI functions, but for BLT this time.
Chia-I Wu [Fri, 12 Sep 2014 03:20:55 +0000 (11:20 +0800)]
ilo: clean up MI functions
With ilo_builder in place, some conventions we had to build commands are no
longer needed.
Chia-I Wu [Fri, 12 Sep 2014 03:47:04 +0000 (11:47 +0800)]
ilo: move BLT functions to ilo_builder_blt.h
Follow the changes for MI functions, but for BLT this time.
Chia-I Wu [Fri, 12 Sep 2014 03:11:47 +0000 (11:11 +0800)]
ilo: move MI functions to ilo_builder_mi.h
Have a centralized place for MI functions, and remove the duplicated
gen6_MI_LOAD_REGISTER_IMM().
Chia-I Wu [Fri, 12 Sep 2014 03:06:39 +0000 (11:06 +0800)]
ilo: add ILO_DEV_ASSERT()
It replaces ILO_GPE_VALID_GEN().
Chia-I Wu [Fri, 12 Sep 2014 02:55:58 +0000 (10:55 +0800)]
ilo: use an accessor for dev->gen
It should enable us to do specialized builds by making the accessor return a
constant.
Chia-I Wu [Fri, 12 Sep 2014 02:08:31 +0000 (10:08 +0800)]
ilo: add GEN_EXTRACT() and GEN_SHIFT32()
They replace READ() and SET_FIELD() that we have been using.
Chia-I Wu [Fri, 12 Sep 2014 02:43:42 +0000 (10:43 +0800)]
ilo: remove ILO_GEN_GET_MAJOR()
The last user has gone away.
Chia-I Wu [Fri, 12 Sep 2014 08:53:48 +0000 (16:53 +0800)]
ilo: careful with empty fb state in ilo_gpe_set_fb()
We cannot pass 0 as the width or height to ilo_gpe_init_view_surface_null().
Ilia Mirkin [Thu, 21 Aug 2014 00:19:38 +0000 (20:19 -0400)]
nv50,nvc0: enable ARB_texture_view
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 20 Aug 2014 06:12:10 +0000 (02:12 -0400)]
mesa/st: add ARB_texture_view support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Ilia Mirkin [Wed, 20 Aug 2014 23:45:10 +0000 (19:45 -0400)]
gallium: add a texture target to sampler view and a CAP to use it
This allows a sampler view to have a different texture target than the
underlying resource. This will be used to implement the type casting
between 2d arrays and cube maps as specified in ARB_texture_view.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sat, 16 Aug 2014 16:48:09 +0000 (12:48 -0400)]
nouveau: only enable stencil func if the visual has stencil bits
The _Enabled property already has the relevant information.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Fri, 15 Aug 2014 05:25:06 +0000 (01:25 -0400)]
nouveau: only enable the depth test if there actually is a depth buffer
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Maarten Lankhorst [Wed, 10 Sep 2014 15:06:34 +0000 (17:06 +0200)]
nouveau: remove unneeded assert
No idea why it was added, but the code runs fine even on videos
where it triggers.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Maarten Lankhorst [Wed, 10 Sep 2014 11:20:53 +0000 (13:20 +0200)]
nouveau: rework reference frame handling
Fixes a regression from "nouveau/vdec: small fixes to h264 handling"
New picking order for frames:
1. Vidbuf pointer matches.
2. Take the first kicked ref.
3. If that fails, take a ref that has a different last_used.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Maarten Lankhorst [Wed, 10 Sep 2014 11:18:54 +0000 (13:18 +0200)]
nouveau: fix MPEG4 hw decoding
Reorder some fields to make I-frame decoding work correctly.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Maarten Lankhorst [Wed, 10 Sep 2014 11:17:13 +0000 (13:17 +0200)]
nouveau: re-allocate bo's on overflow
The BSP bo might be too small to contain all of the bsp data,
bump its size on overflow. Also bump inter_bo when this happens,
it might be too small otherwise.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Chia-I Wu [Fri, 12 Sep 2014 01:44:44 +0000 (09:44 +0800)]
ilo: fix a compile error with -Werror=format-security
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83777
Ian Romanick [Thu, 11 Sep 2014 00:57:54 +0000 (17:57 -0700)]
i965/vec4: Only examine virtual_grf_end for GRF sources
If the source is not a GRF, it could have a register >= virtual_grf_count.
Accessing virtual_grf_end with such a register would lead to
out-of-bounds access. Make sure the source is a GRF before accessing
virtual_grf_end.
Fixes Valgrind complaints while compiling some shaders.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Brian Paul [Tue, 9 Sep 2014 15:56:47 +0000 (09:56 -0600)]
st/mesa: handle failed context creation for core profile
If the glx/wgl state tracker requested a core profile but the gallium
driver did not support some feature of GL 3.1 or later, we were setting
ctx->Version=0 and then failing the assertion in
_mesa_initialize_exec_table().
With this change we check for ctx->Version=0 and tear down the context
and return NULL from st_create_context().
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Iago Toral Quiroga [Wed, 10 Sep 2014 08:16:13 +0000 (10:16 +0200)]
i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams.
So far we have been using CL_INVOCATION_COUNT to resolve this query but this
is no good with streams, as only stream 0 reaches the clipping stage.
From ARB_transform_feedback3:
"When a generated primitive query for a vertex stream is active, the
primitives-generated count is incremented every time a primitive emitted to
that stream reaches the Discarding Rasterization stage (see Section 3.x)
right before rasterization. This counter is incremented whether or not
transform feedback is active."
Unfortunately, we don't have any registers that provide the number of primitives
written to a specific stream other than the ones that track the number of
primitives written to transform feedback in the SOL stage, so we can't
implement this exactly as specified.
In the past we implemented this feature by activating the SOL unit even if
transform feeback was disabled, but making it so that all buffers were
disabled and it only recorded statistics, which gave us the right semantics
(see
3178d2474ae5bdd1102fb3d76a60d1d63c961ff5). Unfortunately, this came with
a significant performance impact and had to be reverted.
This new take does not intend to implement the exact semantics required by
the spec, but improves what we have now, since now we return the primitive
count for stream 0 in all cases. With this patch we use
GEN7_SO_PRIM_STORAGE_NEEDED to resolve GL_PRIMITIVES_GENERATED queries
for non-zero streams. This would return the number of primitives written
to transform feedback for each stream instead. Since non-zero streams are
only useful in combination with transform feedback this should not be too
bad, and the only case that I think we would not be supporting would be
the one in which we want to use both GL_PRIMITIVES_GENERATED and
GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN on the same non-zero stream to
detect buffer overflow.
This patch also fixes the following piglit test:
arb_gpu_shader5-xfb-streams-without-invocations
This test uses both GL_PRIMITIVES_GENERATED and
GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN queries on non-zero streams, but it
does never hit the overflow case, so both queries are always expected to return
the same value.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Christian König [Thu, 11 Sep 2014 07:50:00 +0000 (09:50 +0200)]
radeon/uvd: use PIPE_USAGE_STAGING for msg&fb buffers
That better matches the actual userspace use case, the
kernel will force it to VRAM if the hardware requires it.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Christian König [Thu, 11 Sep 2014 07:38:50 +0000 (09:38 +0200)]
radeon/video: use the hw to initial clear the buffers
Less CPU overhead and avoids contention over CPU accessible memory on startup.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Christian König [Thu, 11 Sep 2014 07:29:28 +0000 (09:29 +0200)]
radeon/video: use more of the common buffer code v2
In preparation to using buffers clears with the hw engine(s).
v2: split out flipping to using hw buffer clears.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
José Fonseca [Thu, 11 Sep 2014 10:43:04 +0000 (11:43 +0100)]
scons: add /dynamicbase and /nxcompat to MinGW linkflags
Just like
b26503b196d51dc46c815e241343e42ab30e8d66 for MSVC.
Brian Paul [Wed, 12 Feb 2014 16:05:13 +0000 (09:05 -0700)]
scons: add /dynamicbase and /nxcompat to MSVC linkflags
This builds the opengl DLLs with address layout space randomization
(ASLR) and data execution prevention (DEP) for better security.
Reviewed-by: Kurt Daverman <krd@vmware.com>
Chia-I Wu [Wed, 10 Sep 2014 02:34:04 +0000 (10:34 +0800)]
ilo: add a new disassembler
The old disassembler was modified from i965's. It is as much work as doing a
new one to keep it up-to-date, which also requires copying more headers over.
The outputs of this new disassembler should match i965's as closely as
possible.
Chia-I Wu [Wed, 10 Sep 2014 02:16:48 +0000 (10:16 +0800)]
ilo: update genhw headers
Add some new registers and some tweaks. The changes that affect ilo are
GEN6_REG_HS_INVOCATION_COUNT -> GEN7_REG_HS_INVOCATION_COUNT
GEN6_REG_DS_INVOCATION_COUNT -> GEN7_REG_DS_INVOCATION_COUNT
GEN6_COND_NORMAL -> GEN6_COND_NONE
Frank Henigman [Fri, 22 Aug 2014 21:23:04 +0000 (17:23 -0400)]
glsl: allow precision qualifier on sampler arrays
If a precision qualifer is allowed on type T, it should be allowed
on an array of T. Refactor the check to ensure this is the case.
(Fixes failures in WebGL conformance test 'gl-min-textures')
Signed-off-by: Frank Henigman <fjhenigman@google.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tapani Pälli [Tue, 9 Sep 2014 11:56:06 +0000 (14:56 +0300)]
glsl: mark variable as loop constant when it is set read only
Patch modifies is_loop_constant() to take advantage of 'read_only' bit
in ir_variable to detect a loop constant. Variables marked read-only
are loop constant like mentioned by a comment in the function.
v2: remove unnecessary comment (Francisco)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82537
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Michel Dänzer [Tue, 9 Sep 2014 07:23:43 +0000 (16:23 +0900)]
radeonsi: Simplify si_dma_copy_tile function
No functional change intended.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Wed, 10 Sep 2014 22:37:24 +0000 (16:37 -0600)]
u_vbuf: simple whitespace fix
Brian Paul [Wed, 10 Sep 2014 14:16:24 +0000 (08:16 -0600)]
mesa: fix UNCLAMPED_FLOAT_TO_UBYTE() macro for MSVC
MSVC replaces the "F" in "255.0F" with the macro argument which leads
to an error. s/F/FLT/ to avoid that.
It turns out we weren't using this macro at all on MSVC until the
recent "mesa: Drop USE_IEEE define." change.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Tue, 9 Sep 2014 14:40:28 +0000 (08:40 -0600)]
mesa: trim down some #includes
Vinson Lee [Sat, 6 Sep 2014 22:53:55 +0000 (15:53 -0700)]
pipe-loader: Include unistd.h in pipe_loader_drm.c for close function.
This patch fixes a build error on DragonFly.
CC libpipe_loader_la-pipe_loader_drm.lo
pipe_loader_drm.c: In function 'pipe_loader_drm_probe':
pipe_loader_drm.c:207:10: error: implicit declaration of function 'close' [-Werror=implicit-function-declaration]
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Kenneth Graunke [Tue, 26 Aug 2014 23:39:55 +0000 (16:39 -0700)]
i965: Disable guardband clipping in the smaller-than-viewport case.
Apparently guardband clipping doesn't work like we thought: objects
entirely outside fthe guardband are trivially rejected, regardless of
their relation to the viewport. Normally, the guardband is larger than
the viewport, so this is not a problem. However, when the viewport is
larger than the guardband, this means that we would discard primitives
which were wholly outside of the guardband, but still visible.
We always program the guardband to 8K x 8K to enforce the restriction
that the screenspace bounding box of a single triangle must be no more
than 8K x 8K. So, if the viewport is larger than that, we need to
disable guardband clipping.
Fixes ES3 conformance tests:
- framebuffer_blit_functionality_negative_height_blit
- framebuffer_blit_functionality_negative_width_blit
- framebuffer_blit_functionality_negative_dimensions_blit
- framebuffer_blit_functionality_magnifying_blit
- framebuffer_blit_functionality_multisampled_to_singlesampled_blit
v2: Mention the acronym expansion for TA/TR/MC in the comments.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ian Romanick [Fri, 20 Jun 2014 23:26:35 +0000 (16:26 -0700)]
i965: Request lowering gl_VertexID
Fixes the (new) piglit tests gles-3.0-drawarrays-vertexid,
gl-3.0-multidrawarrays-vertexid, and gl-3.2-basevertex-vertexid.
Fixes gles3conform failure in:
ES3-CTS.gtf.GL3Tests.transform_feedback.transform_feedback_vertex_id
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80247
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 8 Aug 2014 03:59:56 +0000 (20:59 -0700)]
i965: Expose gl_BaseVertex via a vertex attribute.
Now that we have the data available, we need to expose it to the
shaders. We can reuse the same vertex element that we use for
gl_VertexID, but we need to back it by an actual vertex buffer.
A hardware restriction requires that vertex attributes coming from a
buffer (STORE_SRC) must come before any other types (i.e. STORE_0).
So, we have to make gl_BaseVertex be the .x component of the vertex
attribute. This means moving gl_VertexID to a different component.
I chose to move gl_VertexID and gl_InstanceID to the .z and .w
components, respectively, to make room for gl_BaseInstance in the .y
component (which would also come from a buffer, and therefore be
STORE_SRC).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Aug 2014 03:49:08 +0000 (20:49 -0700)]
i965: Refactor Gen4-7 VERTEX_BUFFER_STATE emission into a helper.
We'll need to emit another VERTEX_BUFFER_STATE for gl_BaseVertex;
pulling this into a helper function will save us from having to deal
with cross-generation differences in that code.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Aug 2014 03:31:39 +0000 (20:31 -0700)]
i965: Make gl_BaseVertex available in a buffer object.
This will be used for GL_ARB_shader_draw_parameters, as well as fixing
gl_VertexID, which is supposed to include gl_BaseVertex's value.
For indirect draws, we simply point at the indirect buffer; for normal
draws, we upload the value via the upload buffer.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Aug 2014 03:07:25 +0000 (20:07 -0700)]
i965: Calculate start/base_vertex_location after preparing vertices.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ian Romanick [Thu, 19 Jun 2014 20:54:35 +0000 (13:54 -0700)]
i965: Handle SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 8 Aug 2014 05:42:55 +0000 (22:42 -0700)]
mesa: Fix glGetActiveAttribute for gl_VertexID when lowered.
The lower_vertex_id pass converts uses of the gl_VertexID system value
to the gl_BaseVertex and gl_VertexIDMESA system values. Since
gl_VertexID is no longer accessed, it would not be considered active.
Of course, it should be, since the shader uses gl_VertexID.
v2: Move the var->name dereference past the var != NULL check.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Aug 2014 05:38:50 +0000 (22:38 -0700)]
mesa: Replace string comparisons with SYSTEM_VALUE enum checks.
This is more efficient.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ian Romanick [Thu, 19 Jun 2014 19:06:42 +0000 (12:06 -0700)]
glsl: Add a lowering pass for gl_VertexID
Converts gl_VertexID to (gl_VertexIDMESA + gl_BaseVertex). gl_VertexIDMESA
is backed by SYSTEM_VALUE_VERTEX_ID_ZERO_BASE, and gl_BaseVertex is backed
by SYSTEM_VALUE_BASE_VERTEX.
v2: Put the enum in struct gl_constants and propoerly resolve the scope
in C++ code. Fix suggested by Marek.
v3: Reabase on Matt's foreach_in_list changes (was using foreach_list).
v4 (Ken): Use a systemvalue instead of a uniform because
STATE_BASE_VERTEX has been removed.
v5: Use a boolean to select lowering, and only allow one lowering
method. Suggested by Ken.
v6 (Ken): Replace strcmp against literal "gl_BaseVertex"/"gl_VertexID"
with SYSTEM_VALUE enum checks, for efficiency.
v7: Rebase on context constant initialization work.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Thu, 19 Jun 2014 19:05:20 +0000 (12:05 -0700)]
glsl/linker: Make get_main_function_signature public
The next patch will use this function in a different file.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Fri, 20 Jun 2014 23:11:50 +0000 (16:11 -0700)]
mesa: Add SYSTEM_VALUE_BASE_VERTEX
This system value represents the basevertex value passed to
glDrawElementsBaseVertex and related functions.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Thu, 19 Jun 2014 01:08:20 +0000 (18:08 -0700)]
mesa: Add SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
There exists hardware, such as i965, that does not implement the OpenGL
semantic for gl_VertexID. Instead, that hardware does not include the
value of basevertex in the gl_VertexID value.
SYSTEM_VALUE_VERTEX_ID_ZERO_BASE is the system value that represents
this semantic.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Wed, 18 Jun 2014 23:59:20 +0000 (16:59 -0700)]
mesa: Document SYSTEM_VALUE_VERTEX_ID and SYSTEM_VALUE_INSTANCE_ID
v2: Additions to the documentation for SYSTEM_VALUE_VERTEX_ID. Quote
the GL_ARB_shader_draw_parameters spec and mention DirectX SV_VertexID.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jonathan Gray [Wed, 10 Sep 2014 06:11:25 +0000 (16:11 +1000)]
configure.ac: unbreak the build with non gnu grep
181581280bd430d122d416e308c1de82db82da04 changed the way the
llvm-config version is read from sed to grep and introduced
a requirement for gnu grep extension that treats BREs as EREs.
Avoid this by calling egrep instead of grep which should be
able to handle EREs everywhere.
This allows Mesa to build on OpenBSD again.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Eric Anholt [Wed, 10 Sep 2014 00:03:52 +0000 (17:03 -0700)]
vc4: Add support for shadow samplers.
This doesn't quite make depth-tex-compare work, presumably because we're
not hitting equality with itof(sample) * 1.0/0xffffff in the 0xffffff
case. arb_fragment_program_shadow tests pass, though, as well as a bunch
of other shadow-related stuff.
Eric Anholt [Tue, 9 Sep 2014 23:18:05 +0000 (16:18 -0700)]
vc4: Add support for texture swizzles.
Fixes depth-tex-modes.
Eric Anholt [Tue, 9 Sep 2014 22:59:54 +0000 (15:59 -0700)]
vc4: Move the texture format into a struct.
I'm going to be putting some bitfields into the struct as well.
Eric Anholt [Sun, 7 Sep 2014 19:53:03 +0000 (12:53 -0700)]
vc4: Add support for depth texturing.
Eric Anholt [Sun, 7 Sep 2014 21:04:40 +0000 (14:04 -0700)]
vc4: Expose r4 to register allocation.
We potentially need to be careful that use of a value stored in r4 isn't
copy-propagated (or something) across another r4 write. That doesn't
appear to happen currently, and this makes the dataflow more obvious. It
also opens up not unpacking the r4 value, which will be useful for depth
textures.
Eric Anholt [Sun, 7 Sep 2014 21:08:09 +0000 (14:08 -0700)]
vc4: Drop pointless raddr conflict handling on SF.
SF doesn't have a src[1].
Eric Anholt [Sun, 7 Sep 2014 21:42:33 +0000 (14:42 -0700)]
vc4: The r4_count is supposed to be how many writes, not reads.
It's part of the key so that you can tell which r4 value is being read.
Michel Dänzer [Tue, 9 Sep 2014 00:55:07 +0000 (09:55 +0900)]
r600g,radeonsi: Set RADEON_GEM_NO_CPU_ACCESS flag for tiled BOs
This lets the kernel know that such BOs can be pinned outside of the CPU
accessible part of VRAM.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Tue, 9 Sep 2014 15:20:40 +0000 (11:20 -0400)]
freedreno/a3xx: enable hw primitive-restart
Since software primitive-restart emulation is going to be removed (and
anyways, mostly seemed to be crash prone in combination with
u_primconvert and oddball scenarios (like PIPE_PRIM_POLYGON with only a
single vertex), might as well do it in hardware (which fortunately
didn't turn out to be too hard to figure out).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 9 Sep 2014 15:11:24 +0000 (11:11 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 8 Sep 2014 17:42:54 +0000 (13:42 -0400)]
freedreno/ir3: fix potential segfault in RA
Triggered by shaders like:
FRAG
PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
DCL OUT[0], COLOR
DCL CONST[0]
DCL TEMP[0..2], LOCAL
0: IF CONST[0].xxxx :0
1: MOV TEMP[0], TEMP[1]
2: ELSE :0
3: MOV TEMP[0], TEMP[2]
4: ENDIF
5: MOV OUT[0], TEMP[0]
6: END
not really a sane shader, although driver segfaulting is probably
not the appropriate response.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 8 Sep 2014 15:18:01 +0000 (11:18 -0400)]
freedreno: don't overflow cmdstream buffer so much
We currently aren't too clever about dealing with running out of
cmdstream buffer space. Since we use a single buffer for both drawing
and tiling commands, we need to ensure there is enough space at the tail
of the cmdstream buffer to fit the tiling commands.
Until we get more clever, the easy solution is a threshold to trigger
flushing rendering even if the application does not trigger flush (swap,
changing render target, etc). This way we at least don't crash for apps
that do several thousand draw calls (like some piglit tests do).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 6 Sep 2014 16:45:17 +0000 (12:45 -0400)]
freedreno/ir3: add no-copy-propagate fallback step
Most of the things the new compiler still has trouble with basically
amount to cp stage removing too many copies. But without the cp stage,
the shaders the new compiler produces are still better (perf and
correctness) than the old compiler. So a simple thing to do until I
have more time to work on it is first trying falling back to new
compiler without cp, before finally falling back to old compiler.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Emil Velikov [Tue, 9 Sep 2014 21:17:39 +0000 (22:17 +0100)]
ilo: add ilo_builder.h to the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Kenneth Graunke [Mon, 8 Sep 2014 21:28:39 +0000 (14:28 -0700)]
ir_to_mesa: Stop converting uniform booleans.
Excess conversions considered harmful.
Recently Matt reworked the boolean uniform handling to use the value of
UniformBooleanTrue, rather than integer 1, when uploading uniforms:
mesa: Upload boolean uniforms using UniformBooleanTrue.
glsl: Use UniformBooleanTrue value for uniform initializers.
Marek then set the default to 1.0f for drivers without native integer
support:
mesa: set UniformBooleanTrue = 1.0f by default
However, ir_to_mesa was assuming a value of integer 1, and arranging for
it to be converted to 1.0f on upload. Since Marek's commit, we were
uploading 1.0f = 0x3f800000 which was being interpreted as the integer
value
1065353216 and converted to float as 1.
06535322E9, which broke
assumptions in ir_to_mesa that "true" was exactly 1.0f.
+13 Piglits on classic swrast (fs-bool-less-compare-true,
{vs,fs}-op-not-bool-using-if, glsl-1.20/execution/uniform-initializer).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83573
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jonathan Gray [Fri, 5 Sep 2014 15:44:41 +0000 (01:44 +1000)]
configure.ac: strip _GNU_SOURCE from llvm-config output
Mesa already defines _GNU_SOURCE for glibc based systems and defining
_GNU_SOURCE will break the Mesa build on other systems such as OpenBSD.
_GNU_SOURCE only seems to be included in llvm-config output when
LLVM is built via autoconf and not when it is built by cmake.
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Stefan Dirsch [Tue, 26 Aug 2014 20:47:51 +0000 (22:47 +0200)]
xmlconfig: suppress libGL warnings when LIBGL_DEBUG == "quiet"
Let's handle LIBGL_DEBUG env. variable in Mesa in a consistent way.
Fixes: https://bugzilla.novell.com/show_bug.cgi?id=895730
Signed-off-by: Stefan Dirsch <sndirsch@suse.de>
Reviewed-by: Courtney Goeltzenleuchter <courtney@lunarg.com>
Emil Velikov [Mon, 8 Sep 2014 22:52:47 +0000 (23:52 +0100)]
automake: remove obsolete NEED_GALLIUM_LOADER
Superseded by HAVE_LOADER_GALLIUM. The latter has a *DRM* brethren
making the whose easier on which one to keep.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Mon, 8 Sep 2014 22:52:46 +0000 (23:52 +0100)]
configure: enable the gallium loader only when needed
With the gallium megadrivers we've converted most ST to optionally
use either statically linked in or shared pipe-drivers.
The hardcoded switch forgot to conditionally enable the build of the
shared pipe-drivers which resulted in them being constantly build.
Cc: "10.3" <mesa-stable@lists.freedesktop.org>
Cc: James Ausmus <james.ausmus@intel.com>
Reported-by: James Ausmus <james.ausmus@intel.com>
Tested-by: James Ausmus <james.ausmus@intel.com>
Bugzilla: https://code.google.com/p/chromium/issues/detail?id=412089
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 5 Sep 2014 13:06:23 +0000 (14:06 +0100)]
configure: inform the user when we're building sw/kms-dri
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 5 Sep 2014 13:06:22 +0000 (14:06 +0100)]
configure: kill off NEED_WINSYS_WRAPPER
Just drop the conditional and simplify our build. This means that
it'll build every time, but it does not require any dependencies nor
does it take that long to compile 200 lines of boilerplate code.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 5 Sep 2014 13:06:21 +0000 (14:06 +0100)]
configure: kill off NEED_NONNULL_WINSYS
The variable was unused and gave false information. The need for nonnull
winsys currently does not relate as it used to. Nowadays one can mix and
match more freely with plenty of winsys' to make your head spin.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 5 Sep 2014 13:06:20 +0000 (14:06 +0100)]
configure: bail out if building svga without libdrm
With recent commit we removed the NEED_NONNULL_WINSYS checks when
selecting the hardware (inc svga) winsys. svga has only one winsys
that explicitly requires libdrm (via it's bundled version of
vmwgfx_drm.h) but configure.ac never really checks for it.
Add the check early to prevent people from shooting themselves when
they select the driver but lack libdrm.
$ ./autogen.sh --disable-dri --disable-egl --disable-gallium-llvm
--with-dri-drivers=swrast --with-gallium-drivers=svga,swrast
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82539
Cc: "10.2 10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Eric Anholt [Sun, 7 Sep 2014 19:29:41 +0000 (12:29 -0700)]
vc4: Fix segfaults when rendering with no color render target.
Eric Anholt [Fri, 5 Sep 2014 21:38:13 +0000 (14:38 -0700)]
vc4: Fill out the stencil clear field.
The rest of stencil handling isn't done yet, but it documents an extra
cl_u8(0) and helps make it obvious why we don't need to format clear_depth
the same way the depth/stencil buffer is formatted.
Eric Anholt [Fri, 5 Sep 2014 21:23:04 +0000 (14:23 -0700)]
vc4: Flip around the depth/stencil fields.
After implementing depth stores, it looks like this is the way things
actually are, according to hiz-depth-read-fbo-d24-s0's probes.
Eric Anholt [Fri, 22 Aug 2014 20:32:50 +0000 (13:32 -0700)]
vc4: Add support for loading/storing the depth buffer.
For now it still requires the color buffer to be present -- we're relying
on the store of color buffer contents to end the frame, and we have to do
something with color buffers in the rendering config packet.
Eric Anholt [Fri, 5 Sep 2014 20:16:25 +0000 (13:16 -0700)]
vc4: Don't forget to do initial tile clearing for depth/stencil.
Eric Anholt [Fri, 5 Sep 2014 20:11:05 +0000 (13:11 -0700)]
vc4: Ignore non-address bits of the offset for load/store.
These only get used for full buffer dumps, which we don't support yet
anyway.
Eric Anholt [Fri, 5 Sep 2014 21:17:27 +0000 (14:17 -0700)]
vc4: Add a debug flag for flushing after every draw.
It was useful on i965, but it's even more useful for debugging tiled
renderers.
Eric Anholt [Tue, 9 Sep 2014 14:28:12 +0000 (07:28 -0700)]
vc4: Add missing null terminator to the debug options list.
So far, apparently there's been some NULL laying at the address just after
the options anyway, but the next commit changed that.
Tom Stellard [Tue, 9 Sep 2014 11:04:20 +0000 (07:04 -0400)]
configure.ac: Fix build with git-svn llvm version string
Reviewed-and-tested-by: Jan Vesely <jan.vesely@rutgers.edu>
Kalyan Kondapally [Mon, 8 Sep 2014 08:10:42 +0000 (11:10 +0300)]
Linking fails when not writing gl_Position.
According to GLSL-ES Spec(i.e. 1.0, 3.0), gl_Position value is undefined
after the vertex processing stage if we don't write gl_Position. However,
GLSL 1.10 Spec mentions that writing to gl_Position is mandatory. In case
of GLSL-ES, it's not an error and atleast the linking should pass.
Currently, Mesa throws an linker error in case we dont write to gl_position
and Version is less then 140(GLSL) and 300(GLSL-ES). This patch changes
it so that we don't report an error in case of GLSL-ES.
Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83380
Chia-I Wu [Sun, 7 Sep 2014 19:37:54 +0000 (03:37 +0800)]
ilo: remove unused ilo_cp functions
Remove
ilo_cp_begin()
ilo_cp_steal()
ilo_cp_write()
ilo_cp_write_multi()
ilo_cp_write_bo()
ilo_cp_end()
ilo_cp_steal_ptr()
ilo_cp_assert_no_implicit_flush()
Chia-I Wu [Sun, 7 Sep 2014 15:45:03 +0000 (23:45 +0800)]
ilo: convert GPE GEN6 command functions to use ilo_builder
Similar to the changes to GEN7 command functions, but to GEN6 this time.
As every GPE function has been converted, remove
ilo_cp_assert_no_implicit_flush() calls.
Chia-I Wu [Sun, 7 Sep 2014 15:45:03 +0000 (23:45 +0800)]
ilo: convert GPE GEN7 command functions to use ilo_builder
Make these changes
ilo_cp_begin() -> ilo_builder_batch_pointer()
ilo_cp_write() -> direct memory set
ilo_cp_write_bo() -> ilo_builder_batch_reloc()
and use this chance to drop the "_emit_" infix.
Chia-I Wu [Sat, 6 Sep 2014 17:10:01 +0000 (01:10 +0800)]
ilo: convert GPE state functions to use ilo_builder
Make these changes
ilo_cp_steal_ptr() and memcpy() -> ilo_builder_state_write()
ilo_cp_steal_ptr() -> ilo_builder_state_pointer()
and use this chance to drop the "_emit_" infix.
Chia-I Wu [Sat, 6 Sep 2014 17:10:01 +0000 (01:10 +0800)]
ilo: convert GPE surface functions to use ilo_builder
Make these changes
ilo_cp_steal_ptr() and memcpy() -> ilo_builder_surface_write()
ilo_cp_steal() and ilo_cp_write() -> ilo_builder_surface_write()
ilo_cp_write_bo() -> ilo_builder_surface_reloc()
and use this chance to drop the "_emit_" infix.
Chia-I Wu [Sat, 6 Sep 2014 16:42:53 +0000 (00:42 +0800)]
ilo: convert BLT to use ilo_builder
Make these changes
ilo_cp_begin() -> ilo_builder_batch_pointer()
ilo_cp_write() -> direct memory set
ilo_cp_write_bo() -> ilo_builder_batch_reloc()
and make sure there is no implicit flush. Use this chance to drop the
"_emit_" infix.
Chia-I Wu [Sat, 6 Sep 2014 04:20:55 +0000 (12:20 +0800)]
ilo: use ilo_builder for kernels and STATE_BASE_ADDRESS
Remove instruction buffer management from ilo_3d and adapt ilo_shader_cache to
upload kernels to ilo_builder. To be able to do that, we also let ilo_builder
manage STATE_BASE_ADDRESS.
Chia-I Wu [Thu, 4 Sep 2014 05:56:32 +0000 (13:56 +0800)]
ilo: make ilo_cp based on ilo_builder
This makes ilo_cp use the builder to manage batch buffers, and use
ilo_builder_decode() to replace ilo_3d_pipeline_dump().
Chia-I Wu [Mon, 1 Sep 2014 04:25:53 +0000 (12:25 +0800)]
ilo: add a builder for building BOs for submission
Comparing to how we manage batch and instruction buffers, the new builder
- does not flush
- manages both types of buffers
- manages STATE_BASE_ADDRESS
- uploads kernels using unsynchronized mapping
- has its own decoder for the buffers
- provides more helpers