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Craig Topper [Thu, 8 Jun 2017 23:38:19 +0000 (23:38 +0000)]
[ExtractGV] Fix the doxygen comment on the constructor and the class to refer to global values instead of functions. While there fix an 80 column violation. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305030
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Galina Kistanova [Thu, 8 Jun 2017 23:35:52 +0000 (23:35 +0000)]
Fixed warning: dereferencing type-punned pointer will break strict-aliasing rules.
No need in reinterpret_cast<StringTableOffset &> here, as struct coff_symbol Name is a unin
with the member StringTableOffset Offset. This union member could be accessed directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305029
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Craig Topper [Thu, 8 Jun 2017 23:23:08 +0000 (23:23 +0000)]
[IR] Remove getNumSuccessorsV/getSuccessorV/setSuccessorV from the TerminatorInst subclasses as much as possible now that Value has been de-virtualized
These used to be virtual methods that would enable doing the right thing with only a TerminatorInst pointer. I believe they were also acting as vtable anchors in my cases. I think the fact that they had a separate name ending in V was to allow a version without V to be called without a virtual call in a pre-C++11 final keyword world.
Where possible the base methods in TerminatorInst dispatch directly to the public methods in the classes that have the same signature. For some classes this wasn't possible so I've left private method versions that match the name and signature of the version in TerminatorInst. All versions have been moved into the class definitions since we no longer need vtable anchors here.
Differential Revision: https://reviews.llvm.org/D34011
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305028
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Peter Collingbourne [Thu, 8 Jun 2017 23:01:49 +0000 (23:01 +0000)]
Write summaries for merged modules when splitting modules for ThinLTO.
This is to prepare to allow for dead stripping of globals in the
merged modules.
Differential Revision: https://reviews.llvm.org/D33921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305027
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Kostya Serebryany [Thu, 8 Jun 2017 22:58:19 +0000 (22:58 +0000)]
[sanitizer-coverage] one more flavor of coverage: -fsanitize-coverage=inline-8bit-counters. Experimental so far, not documenting yet. Reapplying revisions 304630, 304631, 304632, 304673, see PR33308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305026
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Peter Collingbourne [Thu, 8 Jun 2017 22:04:24 +0000 (22:04 +0000)]
Object: Move datalayout check into irsymtab::build. NFCI.
This check is a requirement of the irsymtab builder, not of any
particular caller.
Differential Revision: https://reviews.llvm.org/D33970
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305023
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Peter Collingbourne [Thu, 8 Jun 2017 22:00:24 +0000 (22:00 +0000)]
Bitcode: Introduce a BitcodeFileContents data type. NFCI.
This data type includes the contents of a bitcode file.
Right now a bitcode file can only contain modules, but
a later change will add a symbol table.
Differential Revision: https://reviews.llvm.org/D33969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305019
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Tom Stellard [Thu, 8 Jun 2017 21:31:59 +0000 (21:31 +0000)]
test-release.sh: Remove workaround for test-suite build
Summary: We aren't actually building the test suite, so this isn't needed.
Reviewers: rengolin, hansw
Reviewed By: rengolin
Subscribers: rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D29840
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305017
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Matthias Braun [Thu, 8 Jun 2017 21:30:54 +0000 (21:30 +0000)]
RegAllocPBQP: Do not assign reserved physical register
(0) RegAllocPBQP: Since getRawAllocationOrder() may return a collection that includes reserved physical registers, iterate to find an un-reserved physical register.
(1) VirtRegMap: Enforce the invariant: "no reserved physical registers" in assignVirt2Phys(). Previously, this was checked only after the fact in VirtRegRewriter::rewrite.
(2) MachineVerifier: updated the test per MatzeB's review.
(3) +testcase
Patch by Nick Johnson<Nicholas.Paul.Johnson@deshawresearch.com>!
Differential Revision: https://reviews.llvm.org/D33947
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305016
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Krzysztof Parzyszek [Thu, 8 Jun 2017 21:25:36 +0000 (21:25 +0000)]
[Hexagon] Re-enable machine verifier after codegen passes
Remove "false" from the arguments to "addPass" in Hexagon's target pass
config.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305015
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Krzysztof Parzyszek [Thu, 8 Jun 2017 20:56:36 +0000 (20:56 +0000)]
[Hexagon] Skip mux generation when predicate register is undefined
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305014
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Evgeniy Stepanov [Thu, 8 Jun 2017 20:49:03 +0000 (20:49 +0000)]
[MachO] Fix codegen of alias of alias.
Fixes PR33316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305012
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Sanjay Patel [Thu, 8 Jun 2017 20:40:39 +0000 (20:40 +0000)]
[CGP, x86] add tests for potential memcmp expansion; NFC
No IR tests were added with rL304313 ( https://reviews.llvm.org/D28637 ),
so I want these for extra coverage if we enable memcmp expansion for x86.
As shown, nothing is expanded for x86 in CGP yet.
Also fundamentally, we're doing an IR transform, so we should have IR tests
for just that part. If something goes wrong, we need to know if the bug is
in CGP or later lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305011
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Dehao Chen [Thu, 8 Jun 2017 20:11:57 +0000 (20:11 +0000)]
Do not early-inline recursive calls in sample profile loader.
Summary: Early-inlining of recursive call makes the code size bloat exponentially. We should not disable it.
Reviewers: davidxl, dnovillo, iteratee
Reviewed By: iteratee
Subscribers: iteratee, llvm-commits, sanjoy
Differential Revision: https://reviews.llvm.org/D34017
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305009
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Sanjay Patel [Thu, 8 Jun 2017 20:00:09 +0000 (20:00 +0000)]
fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305008
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Sanjay Patel [Thu, 8 Jun 2017 19:47:25 +0000 (19:47 +0000)]
[CGP] don't expand a memcmp with nobuiltin attribute
This matches the behavior used in the SDAG when expanding memcmp.
For reference, we're intentionally treating the earlier fortified call transforms differently after:
https://bugs.llvm.org/show_bug.cgi?id=23093
https://reviews.llvm.org/rL233776
One motivation for not transforming nobuiltin calls is that it can interfere with sanitizers:
https://reviews.llvm.org/D19781
https://reviews.llvm.org/D19801
Differential Revision: https://reviews.llvm.org/D34043
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305007
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Matt Arsenault [Thu, 8 Jun 2017 19:25:21 +0000 (19:25 +0000)]
AMDGPU: Work around build special casing .inc files
It complains because it assumes these were autogenerated files
in the source directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305005
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Matt Arsenault [Thu, 8 Jun 2017 19:03:20 +0000 (19:03 +0000)]
AMDGPU: Use correct register names in inline assembly
Fixes using physical registers in inline asm from clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305004
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Nirav Dave [Thu, 8 Jun 2017 18:49:25 +0000 (18:49 +0000)]
[Hexagon] Speedup NumNodesBlocking calculation. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305003
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Guozhi Wei [Thu, 8 Jun 2017 18:27:24 +0000 (18:27 +0000)]
[PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
In PPCBoolRetToInt bool value is changed to i32 type. On ppc64 it may introduce an extra zero extension for the return value. This patch changes the integer type to i64 to avoid the zero extension on ppc64.
This patch fixed PR32442.
Differential Revision: https://reviews.llvm.org/D31407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305001
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Mark Searles [Thu, 8 Jun 2017 18:21:19 +0000 (18:21 +0000)]
[AMDGPU] Force qsads instrs to use different dest register than source registers
The V_MQSAD_PK_U16_U8, V_QSAD_PK_U16_U8, and V_MQSAD_U32_U8 take more than 1 pass in hardware. For these three instructions, the destination registers must be different than all sources, so that the first pass does not overwrite sources for the following passes.
Differential Revision: https://reviews.llvm.org/D33783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304998
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Zachary Turner [Thu, 8 Jun 2017 17:47:22 +0000 (17:47 +0000)]
Update release notes for BinaryFormat library.
Differential Revision: https://reviews.llvm.org/D34001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304995
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Galina Kistanova [Thu, 8 Jun 2017 17:27:40 +0000 (17:27 +0000)]
Changed a comparison operator for std::stable_sort to implement strict weak ordering.
This is a temporarily fix which needs additional work, as it triggers a test3 failure.
test3 is commented out till then.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304993
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Zaara Syeda [Thu, 8 Jun 2017 17:14:36 +0000 (17:14 +0000)]
[Power9] Exploit vector integer extend instructions
This patch adds build vector patterns to exploit the vector integer
extend instructions:
vextsb2w - Vector Extend Sign Byte To Word
vextsb2d - Vector Extend Sign Byte To Doubleword
vextsh2w - Vector Extend Sign Halfword To Word
vextsh2d - Vector Extend Sign Halfword To Doubleword
vextsw2d - Vector Extend Sign Word To Doubleword
Differential Revision: https://reviews.llvm.org/D33510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304992
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Sanjay Patel [Thu, 8 Jun 2017 17:09:18 +0000 (17:09 +0000)]
[PowerPC] add memcmp test with nobuiltin attr; NFC
In SDAG, we don't expand libcalls with a nobuiltin attribute.
It's not clear if that's correct from the existing code comment:
"Don't do the check if marked as nobuiltin for some reason."
...adding a test here either way to show that there is currently
a different behavior implemented in the CGP-based expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304991
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Craig Topper [Thu, 8 Jun 2017 17:08:58 +0000 (17:08 +0000)]
[LazyValueInfo] Make LVILatticeVal intersect method take arguments by reference so we don't copy ConstantRanges unless we need to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304990
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Sanjay Patel [Thu, 8 Jun 2017 17:02:39 +0000 (17:02 +0000)]
[x86] remove unused param from tests; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304989
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Sanjay Patel [Thu, 8 Jun 2017 16:53:18 +0000 (16:53 +0000)]
[CGP / PowerPC] avoid multi-block overhead for simple memcmp expansion
The test diff for PowerPC shows we can better optimize if this case is one block.
For x86, there's would be a substantial difference if CGP expansion was enabled because branches are assumed
cheap and SDAG can't optimize across blocks.
Instead of this:
_cmp_eq8:
movq (%rdi), %rax
cmpq (%rsi), %rax
je LBB23_1
## BB#2: ## %res_block
movl $1, %ecx
jmp LBB23_3
LBB23_1:
xorl %ecx, %ecx
LBB23_3: ## %endblock
xorl %eax, %eax
testl %ecx, %ecx
sete %al
retq
We get this:
cmp_eq8:
movq (%rdi), %rcx
xorl %eax, %eax
cmpq (%rsi), %rcx
sete %al
retq
And that matches the optimal codegen that we get from the current expansion in SelectionDAGBuilder::visitMemCmpCall().
If this looks right, then I just need to confirm that vector-sized expansion will work from here, and we can enable
CGP memcmp() expansion for x86. Ie, we'll bypass the power-of-2 special cases currently optimized in SDAG because we
can lower the IR produced here optimally.
Differential Revision: https://reviews.llvm.org/D34005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304987
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Andrew V. Tischenko [Thu, 8 Jun 2017 16:44:13 +0000 (16:44 +0000)]
Add scheduler classes to integer/float horizontal operations.
This patch will close PR32801.
Differential Revision: https://reviews.llvm.org/D33203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304986
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Alexey Bataev [Thu, 8 Jun 2017 16:41:35 +0000 (16:41 +0000)]
[SLP] More comments fix, NFC.
Fixed spelling errors on function description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304985
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Zachary Turner [Thu, 8 Jun 2017 16:00:40 +0000 (16:00 +0000)]
[PDB] Don't crash on /debug:fastlink PDBs.
Apparently support for /debug:fastlink PDBs isn't part of the
DIA SDK (!), and it was causing llvm-pdbdump to crash because
we weren't checking for a null pointer return value. This
manifests when calling findChildren on the IDiaSymbol, and
it returns E_NOTIMPL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304982
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Sanjay Patel [Thu, 8 Jun 2017 15:01:29 +0000 (15:01 +0000)]
[x86] add tests for memcmp expansion; NFC
We already had a test to demonstrate PR33325:
https://bugs.llvm.org/show_bug.cgi?id=33325
I'm adding tests for general memcmp expansion (see D34005 / D33963) and:
https://bugs.llvm.org/show_bug.cgi?id=33329
...plus non-power-of-2 sizes, so we can see what that looks like currently or if expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304979
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Nirav Dave [Thu, 8 Jun 2017 13:20:55 +0000 (13:20 +0000)]
InferAddressSpaces: Avoid assertion failure with replacing identical
cloned constexpr
Have cloneConstantExprWithNewAddressSpaces return nullptr when
returning initial ConstantExpr.
Reviewers: arsenm
Subscribers: jholewinski, wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D33995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304975
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Simon Pilgrim [Thu, 8 Jun 2017 10:24:49 +0000 (10:24 +0000)]
Regenerate test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304973
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Andrew V. Tischenko [Thu, 8 Jun 2017 10:20:13 +0000 (10:20 +0000)]
This patch closes PR28513: an optimization of multiplication by different constants.
The initial patch was rejected: I fixed the issue and re-apply it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304972
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Diana Picus [Thu, 8 Jun 2017 09:47:30 +0000 (09:47 +0000)]
[ARM] GlobalISel: Add more tests. NFC
Add a couple of tests to increase coverage for the TableGen'erated code,
in particular for rules where 2 generic instructions may be combined
into a single machine instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304971
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John Brawn [Thu, 8 Jun 2017 09:44:40 +0000 (09:44 +0000)]
[BPI] Don't assume that strcmp returning >0 is more likely than <0
The zero heuristic assumes that integers are more likely positive than negative,
but this also has the effect of assuming that strcmp return values are more
likely positive than negative. Given that for nonzero strcmp return values it's
the ordering of arguments that determines the sign of the result there's no
reason to assume that's true.
Fix this by inspecting the LHS of the compare and using TargetLibraryInfo to
decide if it's strcmp-like, and if so only assume that nonzero is more likely
than zero i.e. strings are more often different than the same. This causes a
slight code generation change in the spec2006 benchmark 403.gcc, but with no
noticeable performance impact. The intent of this patch is to allow better
optimisation of dhrystone on Cortex-M cpus, but currently it won't as there are
also some changes that need to be made to if-conversion.
Differential Revision: https://reviews.llvm.org/D33934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304970
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Andrew Wilkins [Thu, 8 Jun 2017 07:32:29 +0000 (07:32 +0000)]
[Go] Subtypes function
This patch adds LLVMGetSubtypes to Go API (as Type.Subtypes), tests included.
Patch by Ekaterina Vaartis!
Differential Revision: https://reviews.llvm.org/D33901
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304968
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Tony Tye [Thu, 8 Jun 2017 01:47:25 +0000 (01:47 +0000)]
Correct AMDGPU Hawaii and Kabini target names
The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate.
Differential Revision: https://reviews.llvm.org/D34016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304959
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Peter Collingbourne [Thu, 8 Jun 2017 01:26:14 +0000 (01:26 +0000)]
Object: Factor out the code for creating the irsymtab for an arbitrary bitcode file.
This code now lives in lib/Object. The idea is that it can now be reused by
IRObjectFile among other things.
Differential Revision: https://reviews.llvm.org/D31921
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304958
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Eugene Zelenko [Wed, 7 Jun 2017 23:53:32 +0000 (23:53 +0000)]
[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304954
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David Blaikie [Wed, 7 Jun 2017 21:37:39 +0000 (21:37 +0000)]
GlobalsModRef: Ensure optnone+readonly/readnone attributes are respected
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304945
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Alexey Bataev [Wed, 7 Jun 2017 20:37:24 +0000 (20:37 +0000)]
[SLP] Comment fix, NFC.
Fixed comment in function description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304940
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Sanjay Patel [Wed, 7 Jun 2017 20:32:08 +0000 (20:32 +0000)]
[InstCombine] fold lshr (sext X), C1 --> zext (lshr X, C2)
This was discussed in D33338. We have larger pattern-matching ending in a truncate that
we can reduce or remove by handling these smaller patterns first. Further motivation is
that narrower shift ops are easier for value tracking and zext is better than sext.
http://rise4fun.com/Alive/rhh
Name: boolshift
%sext = sext i1 %x to i8
%r = lshr i8 %sext, 7
=>
%r = zext i1 %x to i8
Name: noboolshift
%sext = sext i3 %x to i8
%r = lshr i8 %sext, 7
=>
%sh = lshr i3 %x, 2
%r = zext i3 %sh to i8
Differential Revision: https://reviews.llvm.org/D33879
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304939
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Alexey Bataev [Wed, 7 Jun 2017 20:27:41 +0000 (20:27 +0000)]
[SLP] Comment fix, NFC.
Added a description of getReductionCost() function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304938
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Krzysztof Parzyszek [Wed, 7 Jun 2017 20:04:33 +0000 (20:04 +0000)]
[Hexagon] Generate 'inbounds' GEPs in HexagonCommonGEP
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304937
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Nirav Dave [Wed, 7 Jun 2017 18:51:56 +0000 (18:51 +0000)]
[DAG] Improve Store Merge candidate pruning. NFC.
When considering merging stores values are the results of loads only
consider stores whose values come from loads from the same base.
This fixes much of the longer compile times in PR33330.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304934
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Xinliang David Li [Wed, 7 Jun 2017 18:32:24 +0000 (18:32 +0000)]
Fix builin_expect lowering bug
PR33346
Skip cases when expected value is not constant int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304933
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Eric Fiselier [Wed, 7 Jun 2017 17:16:25 +0000 (17:16 +0000)]
Add BinaryFormat module definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304928
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Alina Sbirlea [Wed, 7 Jun 2017 16:46:53 +0000 (16:46 +0000)]
[mssa] Fix case when there is no definition in a block prior to an inserted use.
Summary:
Check that the first access before one being tested is valid.
Before this patch, if there was no definition prior to the Use being tested,
the first time Iter was deferenced, it hit the sentinel.
Reviewers: dberlin, gbiv
Subscribers: sanjoy, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D33950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304926
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Sanjay Patel [Wed, 7 Jun 2017 16:16:45 +0000 (16:16 +0000)]
[CGP] avoid zext/trunc of a memcmp expansion compare
This could be viewed as another shortcoming of the DAGCombiner:
when both operands of a compare are zexted from the same source
type, we should be able to compare the original types.
The effect on PowerPC perf is likely unnoticeable, but there's a
visible regression for x86 if we feed the suboptimal IR for memcmp
expansion to the DAG:
_cmp_eq4_zexted_to_i64:
movl (%rdi), %ecx
movl (%rsi), %edx
xorl %eax, %eax
cmpq %rdx, %rcx
sete %al
_cmp_eq4_better:
movl (%rdi), %ecx
xorl %eax, %eax
cmpl (%rsi), %ecx
sete %al
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304923
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Dmitry Preobrazhensky [Wed, 7 Jun 2017 16:08:02 +0000 (16:08 +0000)]
[AMDGPU][MC] Corrected error message for s_waitcnt helpers
See Bug 32711: https://bugs.llvm.org//show_bug.cgi?id=32711
Reviewers: artem.tamazov
Differential Revision: https://reviews.llvm.org/D33781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304922
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Peter Collingbourne [Wed, 7 Jun 2017 15:49:14 +0000 (15:49 +0000)]
LowerTypeTests: Generate simpler IR for br(llvm.type.test, then, else).
This makes it so that the code quality for CFI checks when compiling
with -O2 and linking with --lto-O0 is similar to that of the rest of
the code.
Reduces the size of a chrome binary built with -O2/--lto-O0 by
about 750KB.
Differential Revision: https://reviews.llvm.org/D33925
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304921
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Sanjay Patel [Wed, 7 Jun 2017 15:05:13 +0000 (15:05 +0000)]
[CGP] pass size as param in MemCmpExpansion; NFCI
Avoid extracting the constant int twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304920
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Filipe Cabecinhas [Wed, 7 Jun 2017 14:57:20 +0000 (14:57 +0000)]
PR33331 - opt-viewer.py produces broken output for directories with spaces
Fix: Properly quote href attributes.
Patch by Simon Whittaker!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304919
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Petar Jovanovic [Wed, 7 Jun 2017 14:48:46 +0000 (14:48 +0000)]
[mips][dsp] Modify repl.ph to accept signed immediate values
Changed immediate type for repl.ph from uimm10 to simm10 as per the specs.
Repl.qb still accepts uimm8. Both instructions now mimic the behaviour of
GNU as.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D33594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304918
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Sanjay Patel [Wed, 7 Jun 2017 14:45:49 +0000 (14:45 +0000)]
[CGP] pass size as param in MemCmpExpansion; NFCI
Avoid extracting the constant int twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304917
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Sanjay Patel [Wed, 7 Jun 2017 14:29:52 +0000 (14:29 +0000)]
[CGP] getParent()->getParent() --> getFunction(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304916
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Guy Blank [Wed, 7 Jun 2017 14:29:10 +0000 (14:29 +0000)]
[X86] Add test to demonstrate inefficient lowering of v48i8 shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304915
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Jonas Paulsson [Wed, 7 Jun 2017 14:08:34 +0000 (14:08 +0000)]
[SystemZ] Propagate MachineMemOperands
In emitCondStore() and emitMemMemWrapper().
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304913
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Simon Pilgrim [Wed, 7 Jun 2017 14:05:04 +0000 (14:05 +0000)]
[DAG] Move SelectionDAG::isCommutativeBinOp to TargetLowering.
This will allow commutation of target-specific DAG nodes in future patches
Differential Revision: https://reviews.llvm.org/D33882
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304911
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Tom Stellard [Wed, 7 Jun 2017 13:54:51 +0000 (13:54 +0000)]
AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D33949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304910
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Sanjay Patel [Wed, 7 Jun 2017 13:46:34 +0000 (13:46 +0000)]
[x86] avoid flipping sign bits for vector icmp by using known bits
If we know that both operands of an unsigned integer vector comparison are non-negative,
then it's safe to directly use a signed-compare-greater-than instruction (the only non-equality
integer vector compare predicate provided by SSE/AVX).
We're intentionally not changing the condition code to signed in order to preserve the
existing transforms that use min/max/psubus below here.
This should solve PR33276:
https://bugs.llvm.org/show_bug.cgi?id=33276
Differential Revision: https://reviews.llvm.org/D33862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304909
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Sanjay Patel [Wed, 7 Jun 2017 13:33:00 +0000 (13:33 +0000)]
[CGP] add helper function for generating compare of load pairs; NFCI
In the special (but also the likely common) case, we can avoid
the multi-block complexity of the general algorithm, so moving
this part off on its own will make it re-usable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304908
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Nemanja Ivanovic [Wed, 7 Jun 2017 13:18:06 +0000 (13:18 +0000)]
[PowerPC] Eliminate integer compare instructions - vol. 5
Adds handling for i64 SETNE comparison (both sign and zero extended).
Differential Revision: https://reviews.llvm.org/D33720
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304907
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Petar Jovanovic [Wed, 7 Jun 2017 12:59:53 +0000 (12:59 +0000)]
[mips] do not use FastISel when -mxgot is present
The clang compiler by default uses FastISel when invoked with -O0, which
is also the default. In that case, passing of -mxgot does not get honored,
i.e. the code path that is to deal with large got is not taken.
Clang produces same output regardless of -mxgot being present or not.
This change checks whether -mxgot is passed as an option, and turns off
FastISel if it is.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D33593
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304906
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Florian Hahn [Wed, 7 Jun 2017 12:58:08 +0000 (12:58 +0000)]
[ARM] Use FixupKind variable in processFixupValue (cleanup, NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304905
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Sanjay Patel [Wed, 7 Jun 2017 12:44:36 +0000 (12:44 +0000)]
[CGP] fix formatting in MemCmpExpansion; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304903
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Diana Picus [Wed, 7 Jun 2017 12:35:05 +0000 (12:35 +0000)]
[ARM] GlobalISel: Purge G_SEQUENCE
According to the commit message from r296921, G_MERGE_VALUES and
G_INSERT are to be preferred over G_SEQUENCE. Therefore, stop generating
G_SEQUENCE in the ARM backend and remove the code dealing with it.
This boils down to the code breaking up double values for the soft float
calling convention. Use G_MERGE_VALUES + G_UNMERGE_VALUES instead of
G_SEQUENCE + G_EXTRACT for it. This maps very nicely to VMOVDRR +
VMOVRRD and simplifies the code in the instruction selector.
There's one occurence of G_SEQUENCE left in arm-irtranslator.ll, but
that is part of the target-independent code for translating constant
structs. Therefore, it is beyond the scope of this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304902
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Nemanja Ivanovic [Wed, 7 Jun 2017 12:23:41 +0000 (12:23 +0000)]
[PowerPC] Eliminate integer compare instructions - vol. 3
Adds handling for i32 SETNE comparison (both sign and zero extended).
Differential Revision: https://reviews.llvm.org/D33718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304901
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Benjamin Kramer [Wed, 7 Jun 2017 12:06:45 +0000 (12:06 +0000)]
[FileCheck] Don't scan past the closing CHECK-DAG for CHECK-NOT inside CHECK-DAG
If there's enough data in fron of it the skipped region would just
become arbitrarily large, and we scan for the CHECK-NOT everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304900
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Diana Picus [Wed, 7 Jun 2017 11:57:30 +0000 (11:57 +0000)]
[ARM] GlobalISel: Support G_XOR
Same as the other binary operators:
- legalize to 32 bits
- map to GPRs
- select to EORrr via TableGen'erated code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304898
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Simon Dardis [Wed, 7 Jun 2017 11:21:37 +0000 (11:21 +0000)]
evert "[mips] Fix test mips64fpldst.ll with machine verifier enabled"
This reverts commit r301394. It broke some internal buildbots, reverting
while the issue is being investigated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304896
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Simon Pilgrim [Wed, 7 Jun 2017 10:30:35 +0000 (10:30 +0000)]
[X86][SSE] Fix an issue with PEXTRW/PEXTRB indices during shuffle combining
We were checking that the index was in range of the destination vector type, not the (larger) source vector type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304894
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Diana Picus [Wed, 7 Jun 2017 10:14:23 +0000 (10:14 +0000)]
[ARM] GlobalISel: Support G_OR
Same as the other binary operators:
- legalize to 32 bits
- map to GPRs
- select ORRrr thanks to TableGen'erated code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304890
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Florian Hahn [Wed, 7 Jun 2017 09:59:22 +0000 (09:59 +0000)]
[Linker] Remove llc usage from link-arm-and-thumb.ll test case.
This fixes a buildbot failure when the ARM target is not built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304888
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Diana Picus [Wed, 7 Jun 2017 09:17:41 +0000 (09:17 +0000)]
[ARM] GlobalISel: Support G_AND
This is identical to the support for the other binary operators:
- widen to s32
- map into GPR
- select ANDrr (via TableGen'erated code)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304885
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Florian Hahn [Wed, 7 Jun 2017 09:17:01 +0000 (09:17 +0000)]
[Linker] Remove warning when linking ARM and Thumb IR modules.
Summary:
This patch updates Triple::isCompatibleWith to make armxx and thumbxx
triples compatible, as long as the subarch, vendor, os, envorionment and
object format match. Thumb/ARM code generation should be controlled
using the thumb-mode per-function target feature rather than by the
triple to allow mixing Thumb and ARM functions.
D33448 updates Clang's codegen to add thumb-mode for all functions with
armxx or thumbxx triples.
Reviewers: echristo, t.p.northover, rafael, kristof.beyls, rengolin, tejohnson
Reviewed By: tejohnson
Subscribers: rinon, eugenis, pcc, srhines, aemerson, mehdi_amini, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33287
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304884
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Florian Hahn [Wed, 7 Jun 2017 08:54:47 +0000 (08:54 +0000)]
[ARM] Create relocations for unconditional branches.
Summary:
Relocations are required for unconditional branches to function symbols with
different execution mode. Without this patch, incorrect branches are
generated for tail calls between functions with different execution
mode.
Reviewers: peter.smith, rafael, echristo, kristof.beyls
Reviewed By: peter.smith
Subscribers: aemerson, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304882
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Eric Fiselier [Wed, 7 Jun 2017 08:05:31 +0000 (08:05 +0000)]
Adjust module.modulemap after r304864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304878
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Craig Topper [Wed, 7 Jun 2017 07:40:43 +0000 (07:40 +0000)]
[APInt] Fix the documentation for isOneValue. NFC
I copy and pasted from isNullValue and forgot to update it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304877
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Craig Topper [Wed, 7 Jun 2017 07:40:37 +0000 (07:40 +0000)]
[InstCombine][InstSimplify] Use APInt::isNullValue/isOneValue to reduce compiled code for comparing APInts with 0 and 1. NFC
These methods are specifically optimized to only counting leading zeros without an additional uint64_t compare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304876
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Craig Topper [Wed, 7 Jun 2017 07:40:29 +0000 (07:40 +0000)]
[InstCombine] Fix two asserts that were accidentally checking that an APInt pointer is non-zero instead of checking that the APInt self is non-zero.
I believe this code used to use APInt references which would have worked. But then they were changed to pointers to allow m_APInt to be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304875
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Galina Kistanova [Wed, 7 Jun 2017 06:30:27 +0000 (06:30 +0000)]
Disable all warning for AlignOfTest.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304871
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NAKAMURA Takumi [Wed, 7 Jun 2017 04:48:49 +0000 (04:48 +0000)]
Update libdeps to add BinaryFormat, introduced in r304864.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304869
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NAKAMURA Takumi [Wed, 7 Jun 2017 04:48:45 +0000 (04:48 +0000)]
Reorder and reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304868
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Zachary Turner [Wed, 7 Jun 2017 04:39:50 +0000 (04:39 +0000)]
Add dependency from LibDriver to BinaryFormat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304867
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Zachary Turner [Wed, 7 Jun 2017 04:24:33 +0000 (04:24 +0000)]
Add dependency from AsmParser to BinaryFormat.
This breaks the MinGW build, but not other builds for some reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304866
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Zachary Turner [Wed, 7 Jun 2017 03:55:31 +0000 (03:55 +0000)]
Add #include <system_error>
Hopefully this unbreaks the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304865
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Zachary Turner [Wed, 7 Jun 2017 03:48:56 +0000 (03:48 +0000)]
Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.
Differential Revision: https://reviews.llvm.org/D33843
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304864
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Craig Topper [Wed, 7 Jun 2017 00:58:09 +0000 (00:58 +0000)]
[LazyValueInfo] Remove redundant calls to ConstantRange::contains. The same exact call was made in the if above and we already know it returned true. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304857
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Craig Topper [Wed, 7 Jun 2017 00:58:05 +0000 (00:58 +0000)]
[Constants] Use isUIntN/isIntN from MathExtras instead of reimplementing the same code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304856
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Craig Topper [Wed, 7 Jun 2017 00:58:02 +0000 (00:58 +0000)]
[Constants] Use APInt::isNullValue/isOneValue/uge to simplify some code and take advantage of APInt optimizations. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304855
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Craig Topper [Wed, 7 Jun 2017 00:57:57 +0000 (00:57 +0000)]
[APInt] Add a isOneValue method that can determine if a number is 1 by only using getActiveBits/countLeadingZeros
Previously you would have to use operator==(uint64_t) which does the getActiveBits call and a uint64_t comparison. But we can get all we need to know from the getActiveBits call.
This method will be used in another commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304854
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Tony Tye [Wed, 7 Jun 2017 00:46:08 +0000 (00:46 +0000)]
Try to work around possible bugs in version of Shpinx on buildserver.
Builds sucessfully with Sphinx v1.5.5
Differential Revision: https://reviews.llvm.org/D33736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304853
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NAKAMURA Takumi [Wed, 7 Jun 2017 00:22:52 +0000 (00:22 +0000)]
Introduce the new feature "abi-breaking-checks" to satisfy -reverse-iterate in llvm/test/Transforms/Util/PredicateInfo/
A few tests in llvm/test/Transforms/Util/PredicateInfo/ are using -reverse-iterate.
The option -reverse-iterate is enabled with +Asserts in usual cases, but it can be turned on/off regardless of LLVM_ENABLE_ASSERTIONS.
I wonder if this were incompatible to https://reviews.llvm.org/D33908 (r304757).
Differential Revision: https://reviews.llvm.org/D33854
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304851
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Quentin Colombet [Wed, 7 Jun 2017 00:22:07 +0000 (00:22 +0000)]
[InlineSpiller] Only account for real spills in the hoisting logic
Spills of undef values shouldn't impact the placement of the relevant
spills. Drive by review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304850
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Sanjay Patel [Wed, 7 Jun 2017 00:17:08 +0000 (00:17 +0000)]
[CGP / PowerPC] use direct compares if there's only one load per block in memcmp() expansion
I'd like to enable CGP memcmp expansion for x86, but the output from CGP would regress the
special cases (memcmp(x,y,N) != 0 for N=1,2,4,8,16,32 bytes) that we already handle.
I'm not sure if we'll actually be able to produce the optimal code given the block-at-a-time
limitation in the DAG. We might have to just avoid those special-cases here in CGP. But
regardless of that, I think this is a win for the more general cases.
http://rise4fun.com/Alive/cbQ
Differential Revision: https://reviews.llvm.org/D33963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304849
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Tony Tye [Wed, 7 Jun 2017 00:08:35 +0000 (00:08 +0000)]
Add documentation for various aspects of the AMDGPU backend.
Remove extra tabs.
Builds sucessfully with Sphinx v1.5.5
Differential Revision: https://reviews.llvm.org/D33736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304848
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Zachary Turner [Tue, 6 Jun 2017 23:54:23 +0000 (23:54 +0000)]
Fix uninitialized read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304846
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