OSDN Git Service
Owen Anderson [Wed, 10 Aug 2011 17:36:48 +0000 (17:36 +0000)]
Cleanups based on Nick Lewycky's feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137224
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Wed, 10 Aug 2011 17:21:20 +0000 (17:21 +0000)]
Rewrite some ARM InstrInfo functions to be most accepting of arbitrary register subclasses. Hopefully this fixes some buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137223
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 10 Aug 2011 16:26:42 +0000 (16:26 +0000)]
Add support for the R and Q constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217
91177308-0d34-0410-b5e6-
96231b3b80d8
Bob Wilson [Wed, 10 Aug 2011 05:02:22 +0000 (05:02 +0000)]
Clarify a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137204
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 04:29:49 +0000 (04:29 +0000)]
Invoke SimplifyIndVar when we partially unroll a loop. Fixes PR10534.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137203
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 04:22:26 +0000 (04:22 +0000)]
Cleanup. Make ScalarEvolution an explicit argument of the
SimplifyIndVar utility since it is required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137202
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 04:01:31 +0000 (04:01 +0000)]
SimplifyIndVar: make foldIVUser iterative to fold a chain of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137199
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Wed, 10 Aug 2011 03:51:58 +0000 (03:51 +0000)]
Update CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137198
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 03:46:27 +0000 (03:46 +0000)]
Added a SimplifyIndVar utility to simplify induction variable users
based on ScalarEvolution without changing the induction variable phis.
This utility is the main tool of IndVarSimplifyPass, but the pass also
restructures induction variables in strange ways that are sensitive to
pass ordering. This provides a way for other loop passes to simplify
new uses of induction variables created during transformation. The
utility may be used by any pass that preserves ScalarEvolution. Soon
LoopUnroll will use it.
The net effect in this checkin is to cleanup the IndVarSimplify pass
by factoring out the SimplifyIndVar algorithm into a standalone utility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137197
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 01:59:05 +0000 (01:59 +0000)]
Cleanup. Added LoopBlocksDFS::perform for simple clients.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137195
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Wed, 10 Aug 2011 01:54:17 +0000 (01:54 +0000)]
Fix a bug in vpermilps mask checking. Fix PR10560
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137194
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 10 Aug 2011 01:10:17 +0000 (01:10 +0000)]
Remove the build_unwind function from the OCaml bindings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137193
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Wed, 10 Aug 2011 01:10:08 +0000 (01:10 +0000)]
Preserve the name for this variant of IRBuilder::CreateCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137192
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 00:49:12 +0000 (00:49 +0000)]
Cleanup. Avoid relying on specialization of std::distance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137191
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 10 Aug 2011 00:28:10 +0000 (00:28 +0000)]
Fix the LoopUnroller to handle nontrivial loops and partial unrolling.
These are not individual bug fixes. I had to rewrite a good chunk of
the unroller to make it sane. I think it was getting lucky on trivial
completely unrolled loops with no early exits. I included some fairly
simple unit tests for partial unrolling. I didn't do much stress
testing, so it may not be perfect, but should be usable now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137190
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Wed, 10 Aug 2011 00:03:03 +0000 (00:03 +0000)]
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Wed, 10 Aug 2011 00:02:39 +0000 (00:02 +0000)]
Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137188
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Tue, 9 Aug 2011 23:59:05 +0000 (23:59 +0000)]
clang is the new black.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137187
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 23:49:21 +0000 (23:49 +0000)]
Trim an unneeded header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137184
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 23:41:44 +0000 (23:41 +0000)]
Promote VMOVS to VMOVD when possible.
On Cortex-A8, we use the NEON v2f32 instructions for f32 arithmetic. For
better latency, we also send D-register copies down the NEON pipeline by
translating them to vorr instructions.
This patch promotes even S-register copies to D-register copies when
possible so they can also go down the NEON pipeline. Example:
vldr.32 s0, LCPI0_0
loop:
vorr d1, d0, d0
loop2:
...
vadd.f32 d1, d1, d16
The vorr instruction looked like this after regalloc:
%S2<def> = COPY %S0, %D1<imp-def>
Copies involving odd S-registers, and copies that don't define the full
D-register are left alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137182
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 23:33:27 +0000 (23:33 +0000)]
Tighten operand checking of register-shifted-register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137180
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 23:27:13 +0000 (23:27 +0000)]
Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137179
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Tue, 9 Aug 2011 23:26:12 +0000 (23:26 +0000)]
Fix minor typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137177
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 23:25:42 +0000 (23:25 +0000)]
Tighten operand checking on memory barrier instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137176
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Tue, 9 Aug 2011 23:13:05 +0000 (23:13 +0000)]
VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a non-PHInode Instruction in successors.
Frontends(eg. clang) might pass incomplete form of IR, to step off the way beyond iterator end. In the case I had met, it took infinite loop due to meeting bogus PHInode.
Thanks to Jay Foad and John McCall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137175
91177308-0d34-0410-b5e6-
96231b3b80d8
NAKAMURA Takumi [Tue, 9 Aug 2011 23:12:56 +0000 (23:12 +0000)]
Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137174
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 23:05:39 +0000 (23:05 +0000)]
Tighten operand checking on CPS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137172
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 23:05:23 +0000 (23:05 +0000)]
Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly checking the success result of custom decoder hooks on singleton decodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137171
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Tue, 9 Aug 2011 23:02:53 +0000 (23:02 +0000)]
Representation of 'atomic load' and 'atomic store' in IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137170
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 22:48:45 +0000 (22:48 +0000)]
Create a new register class for the set of all GPRs except the PC. Use it to tighten our decoding of BFI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137168
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 22:39:53 +0000 (22:39 +0000)]
Add v16i16 and v32i8 store patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137166
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Tue, 9 Aug 2011 22:23:40 +0000 (22:23 +0000)]
Fix 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137163
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Tue, 9 Aug 2011 22:19:52 +0000 (22:19 +0000)]
Add missing file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137162
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 22:18:37 +0000 (22:18 +0000)]
Use fp unpack instructions to unpack int types. Until we have AVX2, this
is the best we can do for these patterns. This fix PR10554.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137161
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Tue, 9 Aug 2011 22:17:39 +0000 (22:17 +0000)]
Fix a couple ridiculous copy-paste errors. rdar://
9914773 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137160
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Tue, 9 Aug 2011 22:17:34 +0000 (22:17 +0000)]
Add a C interface to PassManagerBuilder. It is missing the addExtension
functionality since in the C api a pass is created and added to a pass
manager in a single call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137159
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Tue, 9 Aug 2011 22:12:37 +0000 (22:12 +0000)]
Don't truncate MachO addresses.
Assigned symbol addresses get truncated to 32-bits, even on 64-bit platforms.
That's obviously bogus.
For example,
.globl _foo
.equ _foo, 0x987654321ULL
rdar://
9922863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137158
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Tue, 9 Aug 2011 22:02:50 +0000 (22:02 +0000)]
ARM Disassembler: sign extend branch immediates.
Not sure about BLXi, but this is what the old disassembler did.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137156
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 21:38:14 +0000 (21:38 +0000)]
Silence an false-positive warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137154
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 21:36:11 +0000 (21:36 +0000)]
Don't generate the old-style disassembler in CMake builds either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137153
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Tue, 9 Aug 2011 21:34:19 +0000 (21:34 +0000)]
The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137151
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 21:30:29 +0000 (21:30 +0000)]
Don't continue generating the old-style decoder file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137150
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Tue, 9 Aug 2011 21:22:41 +0000 (21:22 +0000)]
ARM fix typo in pre-indexed store lowering.
rdar://
9915869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137148
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 21:09:59 +0000 (21:09 +0000)]
Attempt to fix CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137147
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 21:07:45 +0000 (21:07 +0000)]
Tighten Thumb1 branch predicate decoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137146
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Tue, 9 Aug 2011 21:07:10 +0000 (21:07 +0000)]
First draft of the practical guide to atomics.
This is mostly descriptive of the intended state once atomic load and store have landed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137145
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Tue, 9 Aug 2011 20:55:18 +0000 (20:55 +0000)]
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144
91177308-0d34-0410-b5e6-
96231b3b80d8
Bob Wilson [Tue, 9 Aug 2011 19:54:32 +0000 (19:54 +0000)]
Put Darwin-specific code inside an __APPLE__ ifdef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137137
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 9 Aug 2011 18:56:35 +0000 (18:56 +0000)]
Revert r137134. It breaks some code as Eli pointed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137135
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 9 Aug 2011 18:31:50 +0000 (18:31 +0000)]
Print out the variable declaration only if it is a declaration. Otherwise, a
'static' variable will be emitted twice.
PR10081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137134
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 18:19:41 +0000 (18:19 +0000)]
Inflate register classes after coalescing.
Coalescing can remove copy-like instructions with sub-register operands
that constrained the register class. Examples are:
x86: GR32_ABCD:sub_8bit_hi -> GR32
arm: DPR_VFP2:ssub0 -> DPR
Recompute the register class of any virtual registers that are used by
less instructions after coalescing.
This affects code generation for the Cortex-A8 where we use NEON
instructions for f32 operations, c.f. fp_convert.ll:
vadd.f32 d16, d1, d0
vcvt.s32.f32 d0, d16
The register allocator is now free to use d16 for the temporary, and
that comes first in the allocation order because it doesn't interfere
with any s-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137133
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 17:39:13 +0000 (17:39 +0000)]
Reapply a more appropriate solution than in r137114. AVX supports
v4f64 = sitofp v4i32. This fix PR10559.
Also add support for v4i32 = fptosi v4f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137128
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 17:39:01 +0000 (17:39 +0000)]
Revert r137114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137127
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Holewinski [Tue, 9 Aug 2011 17:36:31 +0000 (17:36 +0000)]
PTX: Add initial support for device function calls
- Calls are supported on SM 2.0+ for function with no return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137125
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 16:46:27 +0000 (16:46 +0000)]
Move CalculateRegClass to MRI::recomputeRegClass.
This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Tue, 9 Aug 2011 09:50:10 +0000 (09:50 +0000)]
Emitting ARM build attributes and values as ULEB, rather than char.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137115
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 05:48:01 +0000 (05:48 +0000)]
Handle sitofp between v4f64 <- v4i32. Fix PR10559
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137114
91177308-0d34-0410-b5e6-
96231b3b80d8
Bob Wilson [Tue, 9 Aug 2011 05:13:36 +0000 (05:13 +0000)]
Recognize the UNAME_RELEASE environment variable to match Darwin's uname.
When this variable is set, "uname -r" will return its value instead of the
real OS version. Make this affect LLVM's triple for consistency.
<rdar://problem/
9919167>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137111
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Tue, 9 Aug 2011 03:11:29 +0000 (03:11 +0000)]
LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137106
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 03:04:29 +0000 (03:04 +0000)]
Add support for avx vector fextend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137105
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 03:04:25 +0000 (03:04 +0000)]
Add AVX versions of 128-bit sitofp and fptosi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137104
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 03:04:23 +0000 (03:04 +0000)]
Rename and tidy up tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137103
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 01:43:09 +0000 (01:43 +0000)]
Add two patterns to match special vmovss and vmovsd cases. Also fix
the patterns already there to be more strict regarding the predicate.
This fixes PR10558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137100
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 9 Aug 2011 01:17:10 +0000 (01:17 +0000)]
There is only one instance of this placeholder being created. Just use that
instead of a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137099
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 9 Aug 2011 01:09:21 +0000 (01:09 +0000)]
Remove an instance where the 'unwind' instruction was created.
The 'unwind' instruction was acting essentially as a placeholder, because it
would be replaced at the end of this function by a branch to the "unwind
handler". The 'unwind' instruction is going away, so use 'unreachable' instead,
which serves the same purpose as a placeholder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137098
91177308-0d34-0410-b5e6-
96231b3b80d8
Devang Patel [Tue, 9 Aug 2011 01:03:35 +0000 (01:03 +0000)]
Print variable's inline location in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137096
91177308-0d34-0410-b5e6-
96231b3b80d8
Devang Patel [Tue, 9 Aug 2011 01:03:14 +0000 (01:03 +0000)]
Provide method to print variable's extended name which includes inline location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137095
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 01:01:27 +0000 (01:01 +0000)]
Rename member variables to follow coding standards.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137094
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 9 Aug 2011 00:47:30 +0000 (00:47 +0000)]
Add missing attributes to the C++ backend's output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137091
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Tue, 9 Aug 2011 00:46:57 +0000 (00:46 +0000)]
Make LowerVSETCC aware of AVX types and add patterns to match them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137090
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 00:43:37 +0000 (00:43 +0000)]
Move the RegisterCoalescer private to its implementation file.
RegisterCoalescer.h still has the CoalescerPair class interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137088
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Tue, 9 Aug 2011 00:33:11 +0000 (00:33 +0000)]
Tidy up these testcases to look more like real code does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137085
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 9 Aug 2011 00:29:53 +0000 (00:29 +0000)]
Refer to the RegisterCoalescer pass by ID.
A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Mon, 8 Aug 2011 23:28:47 +0000 (23:28 +0000)]
ARM parsing and encoding for LDRBT instruction.
Fix the instruction representation to correctly only allow post-indexed form.
Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137074
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Mon, 8 Aug 2011 23:25:22 +0000 (23:25 +0000)]
Thumb1 BL instructions encoding 22 bits of displacement, not 21.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137073
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 8 Aug 2011 23:01:10 +0000 (23:01 +0000)]
Indicate that there are changes if runOfFunction returns saying that there are.
Patch by Jingyue!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137072
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Mon, 8 Aug 2011 22:37:06 +0000 (22:37 +0000)]
ARM parsing and encoding for LDRB instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137071
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Mon, 8 Aug 2011 22:11:33 +0000 (22:11 +0000)]
Add FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137070
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 8 Aug 2011 21:45:32 +0000 (21:45 +0000)]
Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM.
They improve the verbose assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137069
91177308-0d34-0410-b5e6-
96231b3b80d8
Bruno Cardoso Lopes [Mon, 8 Aug 2011 21:31:08 +0000 (21:31 +0000)]
Add support for several vector shifts operations while in AVX mode. Fix PR10581
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137067
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Mon, 8 Aug 2011 20:59:31 +0000 (20:59 +0000)]
ARM load/store label parsing.
Allow labels for load/store instructions when parsing. There's encoding
issues, still, so this doesn't work all the way through, yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137064
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 8 Aug 2011 20:53:24 +0000 (20:53 +0000)]
Hoist hasLoadFromStackSlot and hasStoreToStackSlot.
These the methods are target-independent since they simply scan the
memory operands. They can live in TargetInstrInfoImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137063
91177308-0d34-0410-b5e6-
96231b3b80d8
Owen Anderson [Mon, 8 Aug 2011 20:42:17 +0000 (20:42 +0000)]
Fix encodings for Thumb ASR and LSR immediate operands. They encode the range 1-32, with 32 encoded as 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137062
91177308-0d34-0410-b5e6-
96231b3b80d8
Eli Friedman [Mon, 8 Aug 2011 19:49:37 +0000 (19:49 +0000)]
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137061
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 8 Aug 2011 19:09:02 +0000 (19:09 +0000)]
Pacify virtual dtor warnings and cmake buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137060
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 8 Aug 2011 18:56:44 +0000 (18:56 +0000)]
Add MCInstrAnalysis class. This allows the targets to specify own versions of MCInstrDescs functions.
- Add overrides for ARM.
- Teach llvm-objdump to use this instead of plain MCInstrDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137059
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 8 Aug 2011 18:41:34 +0000 (18:41 +0000)]
llvm-objdump: disassembly enhancements
- Indent simple loops
- Print unreachable blocks as .byte directives
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137058
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 8 Aug 2011 18:32:12 +0000 (18:32 +0000)]
llvm-objdump: Use help of CFG to print assembly when --cfg is passed.
This way we can avoid printing unreachable code (data).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137057
91177308-0d34-0410-b5e6-
96231b3b80d8
Devang Patel [Mon, 8 Aug 2011 18:22:10 +0000 (18:22 +0000)]
Simplify by creating parent first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137056
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 8 Aug 2011 17:15:43 +0000 (17:15 +0000)]
Don't clobber pending ST regs when FP regs are killed.
X86FloatingPoint keeps track of pending ST registers for an upcoming
inline asm instruction with fixed stack register constraints. It does
this by remembering which FP register holds the value that should appear
at a fixed stack position for the inline asm.
When that FP register is killed before the inline asm, make sure to
duplicate it to a scratch register, so the ST register still has a live
FP reference.
This could happen when the same FP register was copied to two ST
registers, or when a spill instruction is inserted between the ST copy
and the inline asm.
This fixes PR10602.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137050
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 8 Aug 2011 08:06:05 +0000 (08:06 +0000)]
Clean up the grammar for the landingpad instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137042
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 8 Aug 2011 08:02:48 +0000 (08:02 +0000)]
Remove unnecessary space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137041
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 8 Aug 2011 07:58:58 +0000 (07:58 +0000)]
Fix typo found by John.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137040
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Sun, 7 Aug 2011 04:18:48 +0000 (04:18 +0000)]
strengthen up an assertion: you can't create a constant struct
with an opaque struct type, it doesn't make sense. This should
resolve PR10473.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137028
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Sat, 6 Aug 2011 18:20:24 +0000 (18:20 +0000)]
Fix typo. Thanks, Andy!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137023
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Sat, 6 Aug 2011 07:00:37 +0000 (07:00 +0000)]
Made SCEV's UDiv expressions more canonical. When dividing a
recurrence, the initial values low bits can sometimes be ignored.
To take advantage of this, added FoldIVUser to IndVarSimplify to fold
an IV operand into a udiv/lshr if the operator doesn't affect the
result.
-indvars -disable-iv-rewrite now transforms
i = phi i4
i1 = i0 + 1
idx = i1 >> (2 or more)
i4 = i + 4
into
i = phi i4
idx = i0 >> ...
i4 = i + 4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137013
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:50:33 +0000 (23:50 +0000)]
Reject RS_Spill ranges from local splitting as well.
All new local ranges are marked as RS_New now, so there is no need to
attempt splitting of RS_Spill ranges any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137002
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:50:31 +0000 (23:50 +0000)]
Only mark remainder intervals as RS_Spill after per-block splitting.
The local ranges created get to stay in the RS_New stage, just like for
local and region splitting.
This gives tryLocalSplit a bit more freedom the first time it sees one
of these new local ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137001
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:10:40 +0000 (23:10 +0000)]
Remember to update LiveDebugVariables after per-block splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136996
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:04:18 +0000 (23:04 +0000)]
Extract per-block splitting into its own method.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136994
91177308-0d34-0410-b5e6-
96231b3b80d8