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5 years ago[WebAssembly] Change indices types to unsined int (NFC)
Heejin Ahn [Fri, 2 Nov 2018 19:25:09 +0000 (19:25 +0000)]
[WebAssembly] Change indices types to unsined int (NFC)

Summary:
This changes int types to unsigned int in a few places: function indices
and `wasm::Valtype` (which is unsigend int enum).  Currently these
values cannot have negative values anyway, so this should not be a
functional change for now.

Reviewers: sbc100

Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D54044

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346031 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fix bugs in rethrow depth counting and InstPrinter
Heejin Ahn [Fri, 2 Nov 2018 18:38:52 +0000 (18:38 +0000)]
[WebAssembly] Fix bugs in rethrow depth counting and InstPrinter

Summary:
EH stack depth is incremented at `try` and decremented at `catch`. When
there are more than two catch instructions for a try instruction, we
shouldn't count non-first catches when calculating EH stack depths.

This patch fixes two bugs:
- CFGStackify: Exclude `catch_all` in the terminate catch pad when
  calculating EH pad stack, because when we have multiple catches for a
  try we should count only the first catch instruction when calculating
  EH pad stack.
- InstPrinter: The initial intention was also to exclude non-first
  catches, but it didn't account nested try-catches, so it failed on
  this case:
```
try
  try
  catch
  end
catch    <-- (1)
end
```
In the example, when we are at the catch (1), the last seen EH
instruction is not `try` but `end_try`, violating the wrong assumption.

We don't need these after we switch to the second proposal because there
is gonna be only one `catch` instruction. But anyway before then these
bugfixes are necessary for keep trunk in working state.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346029 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo][InstMerge] Fix -debugify for phi node created by -mldst-motion
Jordan Rupprecht [Fri, 2 Nov 2018 18:25:41 +0000 (18:25 +0000)]
[DebugInfo][InstMerge] Fix -debugify for phi node created by -mldst-motion

Summary:
-mldst-motion creates a new phi node without any debug info. Use the merged debug location from the incoming stores to fix this.

Fixes PR38177. The test case here is (somewhat) simplified from:

```
struct S {
  int foo;
  void fn(int bar);
};
void S::fn(int bar) {
  if (bar)
    foo = 1;
  else
    foo = 0;
}
```

Reviewers: dblaikie, gbedwell, aprantl, vsk

Reviewed By: vsk

Subscribers: vsk, JDevlieghere, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D54019

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346027 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoARMExpandPseudoInsts: Fix CMP_SWAP expansion adding a kill flag to a def
Matthias Braun [Fri, 2 Nov 2018 18:22:15 +0000 (18:22 +0000)]
ARMExpandPseudoInsts: Fix CMP_SWAP expansion adding a kill flag to a def

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346026 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ValueTracking] add test for non-canonical shuffle; NFC
Sanjay Patel [Fri, 2 Nov 2018 18:14:24 +0000 (18:14 +0000)]
[ValueTracking] add test for non-canonical shuffle; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346025 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix a few small issues in llvm-pdbutil
Leonard Mosescu [Fri, 2 Nov 2018 18:00:37 +0000 (18:00 +0000)]
Fix a few small issues in llvm-pdbutil

Running "llvm-pdbutil dump -all" on linux (using the native PDB reader),
over a few PDBs pulled from the Microsoft public symbol store uncovered
a few small issues:

- stripped PDBs might not have the strings stream (/names)
- stripped PDBs might not have the "module info" stream

Differential Revision: https://reviews.llvm.org/D54006

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346010 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SystemZ::TTI] Improve cost handling of uint/sint to fp conversions.
Jonas Paulsson [Fri, 2 Nov 2018 17:53:31 +0000 (17:53 +0000)]
[SystemZ::TTI]  Improve cost handling of uint/sint to fp conversions.

Let i8/i16 uint/sint to fp conversions cost 1 if operand is a load.

Since the load already does the extension, there is no extra cost (previously
returned 2).

Review: Ulrich Weigand
https://reviews.llvm.org/D54028

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346009 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRefactor the lit configuration files
Zachary Turner [Fri, 2 Nov 2018 17:49:01 +0000 (17:49 +0000)]
Refactor the lit configuration files

A year or so ago, I re-wrote most of the lit infrastructure in LLVM so
that it wasn't so boilerplate-y. I added lots of common helper type
stuff, simplifed usage patterns, and made the code more elegant and
maintainable.

We migrated to this in LLVM, clang, and lld's lit files, but not in
LLDBs. This started to bite me recently, as the 4 most recent times I
tried to run the lit test suite in LLDB on a fresh checkout the first
thing that would happen is that python would just start crashing with
unhelpful backtraces and I would have to spend time investigating.

You can reproduce this today by doing a fresh cmake generation, doing
ninja lldb and then python bin/llvm-lit.py -sv ~/lldb/lit/SymbolFile at
which point you'll get a segfault that tells you nothing about what your
problem is.

I started trying to fix the issues with bandaids, but it became clear
that the proper solution was to just bring in the work I did in the rest
of the projects. The side benefit of this is that the lit configuration
files become much cleaner and more understandable as a result.

Differential Revision: https://reviews.llvm.org/D54009

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346008 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ProfileSummary] Add options to override hot and cold count thresholds.
Easwaran Raman [Fri, 2 Nov 2018 17:39:31 +0000 (17:39 +0000)]
[ProfileSummary] Add options to override hot and cold count thresholds.

Summary:
The hot and cold count thresholds are derived from the summary, but for
debugging purposes it is convenient to provide the actual thresholds.

Reviewers: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D54040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346005 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFixed inclusion of M_PI fow MinGW-w64
Sylvestre Ledru [Fri, 2 Nov 2018 17:25:40 +0000 (17:25 +0000)]
Fixed inclusion of M_PI fow MinGW-w64

Patch by KOLANICH

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346000 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SystemZ] Rework getInterleavedMemoryOpCost()
Jonas Paulsson [Fri, 2 Nov 2018 17:15:36 +0000 (17:15 +0000)]
[SystemZ] Rework getInterleavedMemoryOpCost()

Model this function more closely after the BasicTTIImpl version, with
separate handling of loads and stores. For loads, the set of actually loaded
vectors is checked.

This makes it more readable and just slightly more accurate generally.

Review: Ulrich Weigand
https://reviews.llvm.org/D53071

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345998 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineSink][DebugInfo] Correctly sink DBG_VALUEs
Jeremy Morse [Fri, 2 Nov 2018 16:52:48 +0000 (16:52 +0000)]
[MachineSink][DebugInfo] Correctly sink DBG_VALUEs

As reported in PR38952, postra-machine-sink relies on DBG_VALUE insns being
adjacent to the def of the register that they reference. This is not always
true, leading to register copies being sunk but not the associated DBG_VALUEs,
which gives the debugger a bad variable location.

This patch collects DBG_VALUEs as we walk through a BB looking for copies to
sink, then passes them down to performSink. Compile-time impact should be
negligable.

Differential Revision: https://reviews.llvm.org/D53992

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345996 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ValueTracking] allow non-canonical shuffles when computing signbits
Sanjay Patel [Fri, 2 Nov 2018 15:51:47 +0000 (15:51 +0000)]
[ValueTracking] allow non-canonical shuffles when computing signbits

This possibility is noted in D53987 for a different case,
so we need to adjust the existing code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345988 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Remove some extra characters from docs/LangRef.rst
Cameron McInally [Fri, 2 Nov 2018 15:51:43 +0000 (15:51 +0000)]
[NFC] Remove some extra characters from docs/LangRef.rst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345987 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Do not reduce load size for globals in small-data
Krzysztof Parzyszek [Fri, 2 Nov 2018 14:17:47 +0000 (14:17 +0000)]
[Hexagon] Do not reduce load size for globals in small-data

Small-data (i.e. GP-relative) loads and stores allow 16-bit scaled
offset. For a load of a value of type T, the small-data area is
equivalent to an array "T sdata[65536]". This implies that objects
of smaller sizes need to be closer to the beginning of sdata,
while larger objects may be farther away, or otherwise the offset
may be insufficient to reach it. Similarly, an object of a larger
size should not be accessed via a load of a smaller size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345975 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DEBUGINFO, NVPTX]DO not emit ',debug' option if no debug info or only debug directiv...
Alexey Bataev [Fri, 2 Nov 2018 13:47:47 +0000 (13:47 +0000)]
[DEBUGINFO, NVPTX]DO not emit ',debug' option if no debug info or only debug directives are requested.

Summary:
If the output of debug directives only is requested, we should drop
emission of ',debug' option from the target directive. Required for
supporting of nvprof profiler.

Reviewers: probinson, echristo, dblaikie

Subscribers: Hahnfeld, jholewinski, llvm-commits, JDevlieghere, aprantl

Differential Revision: https://reviews.llvm.org/D46061

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345972 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAllow null-valued function operands in getCalledFunction()
David Stenberg [Fri, 2 Nov 2018 11:46:24 +0000 (11:46 +0000)]
Allow null-valued function operands in getCalledFunction()

Summary:
Change the dynamic cast in CallBase::getCalledFunction() to allow
null-valued function operands.

This patch fixes a crash that occurred when a funtion operand of a
call instruction was dropped, and later on a metadata-carrying
instruction was printed out. When allocating the metadata slot numbers,
getCalledFunction() would be invoked on the call with the dropped
operand, resulting in a failed non-null assertion in isa<>.

This fixes PR38924, in which a printout in DBCE crashed due to this.

This aligns getCalledFunction() with getCalledValue(), as the latter
allows the operand to be null.

Reviewers: vsk, dexonsmith, hfinkel

Reviewed By: dexonsmith

Subscribers: hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D52537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345966 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec and rely on the vectorize...
Simon Pilgrim [Fri, 2 Nov 2018 11:06:18 +0000 (11:06 +0000)]
[DAGCombiner] Remove reduceBuildVecConvertToConvertBuildVec and rely on the vectorizers instead (PR35732)

reduceBuildVecConvertToConvertBuildVec vectorizes int2float in the DAGCombiner, which means that even if the LV/SLP has decided to keep scalar code using the cost models, this will override this.

While there are cases where vectorization is necessary in the DAG (mainly due to legalization artefacts), I don't think this is the case here, we should assume that the vectorizers know what they are doing.

Differential Revision: https://reviews.llvm.org/D53712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345964 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] UBSan bug fix for r345710
Neil Henning [Fri, 2 Nov 2018 10:24:57 +0000 (10:24 +0000)]
[AMDGPU] UBSan bug fix for r345710

UBSan detected an error in our ISelLowering that is exposed only when
you have a dmask == 0x1. Fix this by adding in an explicit check to
ensure we don't do the UBSan detected shl << 32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345962 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix a typo in a function name
Alex Denisov [Fri, 2 Nov 2018 09:57:24 +0000 (09:57 +0000)]
Fix a typo in a function name

Declaration and definition have slightly different names with a typo in the
declaration, which leads to a link error.
See the following bug report for more details: https://bugs.llvm.org/show_bug.cgi?id=39523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345960 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LV] Avoid vectorizing loops under opt for size that involve SCEV checks
Ayal Zaks [Fri, 2 Nov 2018 09:16:12 +0000 (09:16 +0000)]
[LV] Avoid vectorizing loops under opt for size that involve SCEV checks

Fix PR39417, PR39497

The loop vectorizer may generate runtime SCEV checks for overflow and stride==1
cases, leading to execution of original scalar loop. The latter is forbidden
when optimizing for size. An assert introduced in r344743 triggered the above
PR's showing it does happen. This patch fixes this behavior by preventing
vectorization in such cases.

Differential Revision: https://reviews.llvm.org/D53612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345959 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Fix tests with updated fdr-dump
Dean Michael Berris [Fri, 2 Nov 2018 08:35:46 +0000 (08:35 +0000)]
[XRay] Fix tests with updated fdr-dump

Follow-up to D54022.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345955 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Update delta computations in runtime
Dean Michael Berris [Fri, 2 Nov 2018 08:07:38 +0000 (08:07 +0000)]
[XRay] Update delta computations in runtime

Summary:
Fix some issues discovered from mostly manual inspection of outputs from
the `llvm-xray fdr-dump` tool.

It turns out we haven't been writing the deltas properly, and have been
writing down zeros for deltas of some records. This change fixes this
oversight born by the recent refactoring.

Reviewers: mboerger

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D54022

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345954 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix assertion with bitcast from i64 constant to v4i16
Matt Arsenault [Fri, 2 Nov 2018 02:43:55 +0000 (02:43 +0000)]
AMDGPU: Fix assertion with bitcast from i64 constant to v4i16

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345922 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agotest/DebugInfo: Convert some tests to MIR
Matthias Braun [Fri, 2 Nov 2018 01:31:52 +0000 (01:31 +0000)]
test/DebugInfo: Convert some tests to MIR

These tests are meant to test dwarf emission (or prolog/epilogue
generation) so we can convert them to .mir and only run the relevant
part of the pipeline.
This way they become independent of changes in earlier passes such as my
planned changes to RegAllocFast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345919 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLLVMTargetMachine/TargetPassConfig: Simplify handling of start/stop options; NFC
Matthias Braun [Fri, 2 Nov 2018 01:31:50 +0000 (01:31 +0000)]
LLVMTargetMachine/TargetPassConfig: Simplify handling of start/stop options; NFC

- Make some TargetPassConfig methods that just check whether options have
  been set static.
- Shuffle code in LLVMTargetMachine around so addPassesToGenerateCode
  only deals with TargetPassConfig now (but not with MCContext or the
  creation of MachineModuleInfo)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345918 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Added a .globaltype directive to .s output.
Wouter van Oortmerssen [Fri, 2 Nov 2018 00:45:00 +0000 (00:45 +0000)]
[WebAssembly] Added a .globaltype directive to .s output.

Summary:
Assembly output can use globals like __stack_pointer implicitly,
but has no way of indicating the type of such a global, which makes
it hard for tools processing it (such as the MC Assembler) to
reconstruct this information.

The improved assembler directives parsing (in progress in
https://reviews.llvm.org/D53842) will make use of this information.

Also deleted code for the .import_global directive which was unused.

New test case in userstack.ll

Reviewers: dschuff, sbc100

Subscribers: jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D54012

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345917 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] General vector shift lowering
Thomas Lively [Fri, 2 Nov 2018 00:39:57 +0000 (00:39 +0000)]
[WebAssembly] General vector shift lowering

Summary: Adds support for lowering non-splat shifts.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53625

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345916 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][LICM] Factor out instruction erasing logic
Max Kazantsev [Fri, 2 Nov 2018 00:21:45 +0000 (00:21 +0000)]
[NFC][LICM] Factor out instruction erasing logic

This patch factors out a function that makes all required updates
whenever an instruction gets erased.

Differential Revision: https://reviews.llvm.org/D54011
Reviewed By: apilipenko

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345914 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Expand inserts and extracts with variable indices
Thomas Lively [Fri, 2 Nov 2018 00:06:56 +0000 (00:06 +0000)]
[WebAssembly] Expand inserts and extracts with variable indices

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345913 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AliasSetTracker] Misc cleanup (NFCI)
Alina Sbirlea [Thu, 1 Nov 2018 23:37:51 +0000 (23:37 +0000)]
[AliasSetTracker] Misc cleanup (NFCI)

Summary: Remove two redundant checks, add one in the unit test. Remove an unused method. Fix computation of TotalMayAliasSetSize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345911 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gold-plugin] Fix a bunch of build warnings
Mandeep Singh Grang [Thu, 1 Nov 2018 23:34:12 +0000 (23:34 +0000)]
[gold-plugin] Fix a bunch of build warnings

Phabricator: https://reviews.llvm.org/D53997

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345910 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Mandeep Singh Grang [Thu, 1 Nov 2018 23:22:25 +0000 (23:22 +0000)]
[COFF, ARM64] Implement Intrinsic.sponentry for AArch64

Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Patch by: Yin Ma (yinma@codeaurora.org)

Reviewers: mgrang, ssijaric, eli.friedman, TomTan, mstorsjo, rnk, compnerd, efriedma

Reviewed By: efriedma

Subscribers: efriedma, javed.absar, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D53996

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345909 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Make the isTruncateOf call from visitZERO_EXTEND work for vectors....
Craig Topper [Thu, 1 Nov 2018 23:21:45 +0000 (23:21 +0000)]
[DAGCombiner] Make the isTruncateOf call from visitZERO_EXTEND work for vectors. Remove FIXME.

I'm having trouble creating a test case for the ISD::TRUNCATE part of this that shows any codegen differences. But I was able to test the setcc path which is what the test changes here cover.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345908 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add test cases for adding vector support to isTruncateOf in DAGCombiner::visitZ...
Craig Topper [Thu, 1 Nov 2018 23:21:42 +0000 (23:21 +0000)]
[X86] Add test cases for adding vector support to isTruncateOf in DAGCombiner::visitZERO_EXTEND

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345907 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineOutliner][NFC] Remember when you map something illegal across MBBs
Jessica Paquette [Thu, 1 Nov 2018 23:09:06 +0000 (23:09 +0000)]
[MachineOutliner][NFC] Remember when you map something illegal across MBBs

Instruction mapping in the outliner uses "illegal numbers" to signify that
something can't ever be part of an outlining candidate. This means that the
number is unique and can't be part of any repeated substring.

Because each of these is unique, we can use a single unique number to represent
a range of things we can't outline.

The outliner tries to leverage this using a flag which is set in an MBB when
the previous instruction we tried to map was "illegal". This patch improves
that logic to work across MBBs. As a bonus, this also simplifies the mapping
logic somewhat.

This also updates the machine-outliner-remarks test, which was impacted by the
order of Candidates on an OutlinedFunction changing. This order isn't
guaranteed, so I added a FIXME to fix that in a follow-up. The order of
Candidates on an OutlinedFunction isn't important, so this still is NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345906 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Fix TSC and atomic custom/typed event accounting
Dean Michael Berris [Thu, 1 Nov 2018 22:57:50 +0000 (22:57 +0000)]
[XRay] Fix TSC and atomic custom/typed event accounting

Summary:
This is a follow-on change to D53858 which turns out to have had a TSC
accounting bug when writing out function exit records in FDR mode.

This change adds a number of tests to ensure that:

- We are handling the delta between the exit TSC and the last TSC we've
  seen.

- We are writing the custom event and typed event records as a single
  update to the buffer extents.

- We are able to catch boundary conditions when loading FDR logs.

We introduce a TSC matcher to the test helpers, which we use in the
testing/verification of the TSC accounting change.

Reviewers: mboerger

Subscribers: mgorny, hiraditya, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D53967

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345905 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR] remove fake binop query for fneg
Sanjay Patel [Thu, 1 Nov 2018 22:56:15 +0000 (22:56 +0000)]
[IR] remove fake binop query for fneg

We want to remove this fneg API because it would silently fail
if we add an actual fneg instruction to IR (as proposed in
D53877 ).

We have a newer 'match' API that makes checking for
these patterns simpler. It also works with vectors
that may include undef elements in constants.

If any out-of-tree users need updating, they can model
their code changes on this commit:
https://reviews.llvm.org/rL345295

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345904 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Handle the idot8 pattern generated by FE.
Farhana Aleen [Thu, 1 Nov 2018 22:48:19 +0000 (22:48 +0000)]
[AMDGPU] Handle the idot8 pattern generated by FE.

Summary: Different variants of idot8 codegen dag patterns are not generated by llvm-tablegen due to a huge
         increase in the compile time. Support the pattern that clang FE generates after reordering the
         additions in integer-dot8 source language pattern.

Author: FarhanaAleen

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D53937

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345902 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy/strip] [NFC] Clean up tablegen opts (clang-format + reorganizing things).
Jordan Rupprecht [Thu, 1 Nov 2018 21:38:14 +0000 (21:38 +0000)]
[llvm-objcopy/strip] [NFC] Clean up tablegen opts (clang-format + reorganizing things).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345896 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSilence -Wimplicit-fallthrough in gold plugin
Reid Kleckner [Thu, 1 Nov 2018 21:24:33 +0000 (21:24 +0000)]
Silence -Wimplicit-fallthrough in gold plugin

Fatal errors are likely fatal, but in case they aren't, return instead
of printing a second warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345894 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[COFF, ARM64] Implement llvm.addressofreturnaddress intrinsic
Mandeep Singh Grang [Thu, 1 Nov 2018 21:23:47 +0000 (21:23 +0000)]
[COFF, ARM64] Implement llvm.addressofreturnaddress intrinsic

Reviewers: rnk, mstorsjo, efriedma, TomTan

Reviewed By: efriedma

Subscribers: javed.absar, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D53962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345892 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fix signature parsing for 'try' in AsmParser
Heejin Ahn [Thu, 1 Nov 2018 20:32:15 +0000 (20:32 +0000)]
[WebAssembly] Fix signature parsing for 'try' in AsmParser

Summary:
Like `block` or `loop`, `try` can take an optional signature which can
be omitted. This patch allows `try`'s signature to be omitted. Also
added some tests for EH instructions.

Reviewers: aardappel

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345888 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoEnable -Wimplicit-fallthrough for clang as well as GCC
Reid Kleckner [Thu, 1 Nov 2018 20:31:44 +0000 (20:31 +0000)]
Enable -Wimplicit-fallthrough for clang as well as GCC

All instances of this warning should already be fixed across all LLVM
subprojects, at least on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345887 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Remove unintended fallthrough from MC duplex code
Reid Kleckner [Thu, 1 Nov 2018 19:59:27 +0000 (19:59 +0000)]
[Hexagon] Remove unintended fallthrough from MC duplex code

I added these annotations in r345878 because I wasn't sure if the
fallthrough was intended. Krzysztof Parzyszek confirmed that they should
be breaks, so that's what this patch does.

Reviewers: kparzysz

Differential Revision: https://reviews.llvm.org/D53991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345883 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix clang -Wimplicit-fallthrough warnings across llvm, NFC
Reid Kleckner [Thu, 1 Nov 2018 19:54:45 +0000 (19:54 +0000)]
Fix clang -Wimplicit-fallthrough warnings across llvm, NFC

This patch should not introduce any behavior changes. It consists of
mostly one of two changes:
1. Replacing fall through comments with the LLVM_FALLTHROUGH macro
2. Inserting 'break' before falling through into a case block consisting
   of only 'break'.

We were already using this warning with GCC, but its warning behaves
slightly differently. In this patch, the following differences are
relevant:
1. GCC recognizes comments that say "fall through" as annotations, clang
   doesn't
2. GCC doesn't warn on "case N: foo(); default: break;", clang does
3. GCC doesn't warn when the case contains a switch, but falls through
   the outer case.

I will enable the warning separately in a follow-up patch so that it can
be cleanly reverted if necessary.

Reviewers: alexfh, rsmith, lattner, rtrieu, EricWF, bollu

Differential Revision: https://reviews.llvm.org/D53950

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345882 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopInterchange] Fix unused variables in release build
Florian Hahn [Thu, 1 Nov 2018 19:51:13 +0000 (19:51 +0000)]
[LoopInterchange] Fix unused variables in release build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345881 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fixup `main` signature by default
Sam Clegg [Thu, 1 Nov 2018 19:38:44 +0000 (19:38 +0000)]
[WebAssembly] Fixup `main` signature by default

Differential Revision: https://reviews.llvm.org/D53396

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345880 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[codeview] Add breaks to fix -Wimplicit-fallthrough
Reid Kleckner [Thu, 1 Nov 2018 19:36:29 +0000 (19:36 +0000)]
[codeview] Add breaks to fix -Wimplicit-fallthrough

This is a minor bug fix. Previously, if you tried to encode the RSP
register on the x86 platform, that might have succeeded and been encoded
incorrectly. However, no existing producer or consumer passes the x86_64
registers when targeting x86_32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345879 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAnnotate possibly unintended fallthroughs in Hexagon MC code, NFC
Reid Kleckner [Thu, 1 Nov 2018 19:32:04 +0000 (19:32 +0000)]
Annotate possibly unintended fallthroughs in Hexagon MC code, NFC

Clang's -Wimplicit-fallthrough check fires on these switch cases. GCC
does not warn when a case body that ends in a switch falls through to a
case label of an outer switch.

It's not clear if these fall throughs are truly intended.  The Hexagon
tests pass regardless of whether these case blocks fall through or
break.

For now, I have applied the intended fallthrough annotation macro with a
FIXME comment to unblock enabling the warning. I will send a follow-up
patch that converts them to breaks to the Hexagon maintainers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345878 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopInterchange] Remove support for inner-only reductions.
Florian Hahn [Thu, 1 Nov 2018 19:25:00 +0000 (19:25 +0000)]
[LoopInterchange] Remove support for inner-only reductions.

Inner-loop only reductions require additional checks to make sure they
form a load-phi-store cycle across inner and outer loop. Otherwise the
reduction value is not properly preserved. This patch disables
interchanging such loops for now, as it causes miscompiles in some
cases and it seems to apply only for a tiny amount of loops. Across the
test-suite, SPEC2000 and SPEC2006, 61 instead of 62 loops are
interchange with inner loop reduction support disabled. With
-loop-interchange-threshold=-1000, 3256 instead of 3267.

See the discussion and history of D53027 for an outline of how such legality
checks could look like.

Reviewers: efriedma, mcrosier, davide

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D53027

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345877 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove unnecessary fallthrough annotation after unreachable
Reid Kleckner [Thu, 1 Nov 2018 19:11:05 +0000 (19:11 +0000)]
Remove unnecessary fallthrough annotation after unreachable

Clang's -Wimplicit-fallthrough implementation warns on this. I built
clang with GCC 7.3 in +asserts and -asserts mode, and GCC doesn't warn
on this in either configuration. I think it is unnecessary. I separated
it from the large mechanical patch (https://reviews.llvm.org/D53950) in
case I am wrong and it has to be reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345876 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElements
Volkan Keles [Thu, 1 Nov 2018 19:01:53 +0000 (19:01 +0000)]
[GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElements

Summary:
This function was causing a crash when `MaxElements == 1` because
it was trying to create a single element vector type.

Reviewers: dsanders, aemerson, aditya_nandakumar

Reviewed By: dsanders

Subscribers: rovka, kristof.beyls, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D53734

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345875 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LegalizeDAG] Add generic vector CTPOP expansion (PR32655)
Simon Pilgrim [Thu, 1 Nov 2018 18:22:11 +0000 (18:22 +0000)]
[LegalizeDAG] Add generic vector CTPOP expansion (PR32655)

This patch adds support for expanding vector CTPOP instructions and removes the x86 'bitmath' lowering which replicates the same expansion.

Differential Revision: https://reviews.llvm.org/D53258

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345869 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Fix MO_JumpTable const extender conversion
Reid Kleckner [Thu, 1 Nov 2018 18:14:45 +0000 (18:14 +0000)]
[Hexagon] Fix MO_JumpTable const extender conversion

Previously this case fell through to unreachable, so it is clearly not
covered by any test case in LLVM. It may be dynamically unreachable, in
fact. However, if it were to run, this is what it would logically do.
The assert suggests that the intended behavior was not to allow folding
offsets from jump table indices, which makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345868 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-mca] Add extra counters for move elimination in view RegisterFileStatistics.
Andrea Di Biagio [Thu, 1 Nov 2018 18:04:39 +0000 (18:04 +0000)]
[llvm-mca] Add extra counters for move elimination in view RegisterFileStatistics.

This patch teaches view RegisterFileStatistics how to report events for
optimizable register moves.

For each processor register file, view RegisterFileStatistics reports the
following extra information:
 - Number of optimizable register moves
 - Number of register moves eliminated
 - Number of zero moves (i.e. register moves that propagate a zero)
 - Max Number of moves eliminated per cycle.

Differential Revision: https://reviews.llvm.org/D53976

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345865 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Fix unintended fallthrough and strengthen cast
Reid Kleckner [Thu, 1 Nov 2018 18:02:27 +0000 (18:02 +0000)]
[AArch64] Fix unintended fallthrough and strengthen cast

This was added in r330630. GCC's -Wimplicit-fallthrough seems to not
fire when the previous case contains a switch itself.

This fallthrough was bening because the helper function implementing the
case used dyn_cast to re-check the type of the node in question. After
fixing the fallthrough, we can strengthen the cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345864 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64"
Mandeep Singh Grang [Thu, 1 Nov 2018 17:53:57 +0000 (17:53 +0000)]
Revert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64"

This reverts commit 585b6667b4712e3c7f32401e929855b3313b4ff2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345863 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-strip] Support --keep and --strip-all-gnu from llvm-objcopy
Jordan Rupprecht [Thu, 1 Nov 2018 17:48:46 +0000 (17:48 +0000)]
[llvm-strip] Support --keep and --strip-all-gnu from llvm-objcopy

Summary: Add --keep and --strip-all-gnu from llvm-objcopy into llvm-strip.

Reviewers: jakehehrlich, jhenderson, alexshap

Reviewed By: jhenderson, alexshap

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53954

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345861 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Support --{enable,disable}-deterministic-archives
Jordan Rupprecht [Thu, 1 Nov 2018 17:36:37 +0000 (17:36 +0000)]
[llvm-objcopy] Support --{enable,disable}-deterministic-archives

Summary: ar and objcopy/strip all support configuring whether archives are written deterministically (timestamps/UIDs/GIDs/etc zero'd). This has been ported to llvm-ar (the U/D modifiers) but not yet to llvm-objcopy/strip.

Reviewers: jakehehrlich, jhenderson, alexshap

Reviewed By: jhenderson

Subscribers: ruiu, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D53913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345859 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Don't apply --localize flags to common symbols
Jordan Rupprecht [Thu, 1 Nov 2018 17:26:36 +0000 (17:26 +0000)]
[llvm-objcopy] Don't apply --localize flags to common symbols

Summary:
--localize-symbol and --localize-hidden will currently localize common symbols. GNU objcopy will not localize these symbols even when explicitly requested, which seems reasonable; common symbols should always be global so they can be merged during linking.

See PR39461

Reviewers: jakehehrlich, jhenderson, alexshap, MaskRay, espindola

Reviewed By: jakehehrlich, jhenderson, alexshap, MaskRay

Subscribers: emaste, arichardson, alexshap, MaskRay, llvm-commits

Differential Revision: https://reviews.llvm.org/D53782

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345856 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] For multiclass Eq, associate help text with --name= , not with --name
Fangrui Song [Thu, 1 Nov 2018 17:20:40 +0000 (17:20 +0000)]
[llvm-objcopy] For multiclass Eq, associate help text with --name= , not with --name

Summary:
Before:
% llvm-objcopy -help
...
 --weaken-symbol=symbol  Mark <symbol> as weak
 --weaken-symbol symbol  Mark <symbol> as weak

After:
% llvm-objcopy -help
...
 --weaken-symbol=symbol  Mark <symbol> as weak

Reviewers: jhenderson, rupprecht, alexshap, jakehehrlich

Reviewed By: jhenderson

Subscribers: llvm-commits, kristina

Differential Revision: https://reviews.llvm.org/D53983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345855 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add test for ComputeNumSignBits on 2-input shuffle; NFC
Sanjay Patel [Thu, 1 Nov 2018 16:57:54 +0000 (16:57 +0000)]
[InstCombine] add test for ComputeNumSignBits on 2-input shuffle; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345852 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix whitespace in test/Assembler/fast-math-flags.ll
Cameron McInally [Thu, 1 Nov 2018 16:57:52 +0000 (16:57 +0000)]
Fix whitespace in test/Assembler/fast-math-flags.ll

Differential Revision: https://reviews.llvm.org/D53981

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345851 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Attempt to fix ppc64be buildbot
Sam Parker [Thu, 1 Nov 2018 16:44:45 +0000 (16:44 +0000)]
[ARM] Attempt to fix ppc64be buildbot

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345850 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NativePDB] Get LLDB types from PDB function types.
Zachary Turner [Thu, 1 Nov 2018 16:37:29 +0000 (16:37 +0000)]
[NativePDB] Get LLDB types from PDB function types.

This adds basic support for getting function signature types
into LLDB's type system, including into clang's AST.  There are
a few edge cases which are not correctly handled, mostly dealing
with nested classes, but this isn't specific to functions and
apply equally to variable types.  Note that no attempt has been
made yet to deal with member function types, which will happen
in subsequent patches.

Differential Revision: https://reviews.llvm.org/D53951

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345848 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Use proper cases
Fangrui Song [Thu, 1 Nov 2018 16:02:12 +0000 (16:02 +0000)]
[llvm-objcopy] Use proper cases

Reviewers: jhenderson, alexshap, jakehehrlich, espindola, rupprecht

Reviewed By: jhenderson, rupprecht

Subscribers: emaste, arichardson, rupprecht, llvm-commits

Differential Revision: https://reviews.llvm.org/D53971

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345845 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] make sure we have a whole-number extract before trying to narrow a...
Sanjay Patel [Thu, 1 Nov 2018 15:41:12 +0000 (15:41 +0000)]
[DAGCombiner] make sure we have a whole-number extract before trying to narrow a vector op (PR39511)

The test causes a crash because we were trying to extract v4f32 to v3f32, and the
narrowing factor was then 4/3 = 1 producing a bogus narrow type.

This should fix:
https://bugs.llvm.org/show_bug.cgi?id=39511

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345842 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MC] Implement EmitRawText in MCNullStreamer
Daniel Sanders [Thu, 1 Nov 2018 15:41:11 +0000 (15:41 +0000)]
[MC] Implement EmitRawText in MCNullStreamer

Summary:
This adds dummy implementation of `EmitRawText` in `MCNullStreamer`.

This fixes the behavior of `AsmPrinter` with `MCNullStreamer` on targets
on which no integrated assembler is used. An attempt to emit inline asm
on such a target would previously lead to a crash, since `AsmPrinter` does not
check for `hasRawTextSupport` in `EmitInlineAsm` and calls `EmitRawText`
anyway if integrated assembler is disabled (the behavior has changed
in D2686).

Error message printed by MCStreamer:

> EmitRawText called on an MCStreamer that doesn't support it, something
> must not be fully mc'ized

Patch by Eugene Sharygin

Reviewers: dsanders, echristo

Reviewed By: dsanders

Subscribers: eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D53938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345841 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM][CGP] Negative constant operand handling
Sam Parker [Thu, 1 Nov 2018 15:23:42 +0000 (15:23 +0000)]
[ARM][CGP] Negative constant operand handling

While mutating instructions, we sign extended negative constant
operands for binary operators that can safely overflow. This was to
allow instructions, such as add nuw i8 %a, -2, to still be able to
perform a subtraction. However, the code to handle constants doesn't
take into consideration that instructions, such as sub nuw i8 -2, %a,
require the i8 -2 to be converted into i32 254.

This is a relatively simple fix, but I've taken the time to
reorganise the code a bit - mainly that instructions that can be
promoted are cached and splitting up the Mutate function.

Differential Revision: https://reviews.llvm.org/D53972

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345840 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Expose the Demangler AST publicly.
Zachary Turner [Thu, 1 Nov 2018 15:07:32 +0000 (15:07 +0000)]
[MS Demangler] Expose the Demangler AST publicly.

LLDB would like to use this in order to build a clang AST from
a mangled name.

This is NFC otherwise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345837 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][X86FixupLEA] Rename processInstructionForSLM to processInstructionForSlowLEA...
Simon Pilgrim [Thu, 1 Nov 2018 14:57:07 +0000 (14:57 +0000)]
[X86][X86FixupLEA] Rename processInstructionForSLM to processInstructionForSlowLEA (NFCI)

The function isn't SLM specific (its driven by the FeatureSlowLEA flag).

Minor tidyup prior to PR38225.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345836 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] fold icmp based on range of abs/nabs (2nd try)
Sanjay Patel [Thu, 1 Nov 2018 14:07:39 +0000 (14:07 +0000)]
[InstSimplify] fold icmp based on range of abs/nabs (2nd try)

This is retrying the fold from rL345717
(reverted at rL347780)
...with a fix for the miscompile
demonstrated by PR39510:
https://bugs.llvm.org/show_bug.cgi?id=39510

Original commit message:

This is a fix for PR39475:
https://bugs.llvm.org/show_bug.cgi?id=39475

We managed to get some of these patterns using computeKnownBits in https://reviews.llvm.org/D47041, but that
can't be used for nabs(). Instead, put in some range-based logic, so we can fold
both abs/nabs with icmp with a constant value.

Alive proofs:
https://rise4fun.com/Alive/21r

Name: abs_nsw_is_positive

  %cmp = icmp slt i32 %x, 0
  %negx = sub nsw i32 0, %x
  %abs = select i1 %cmp, i32 %negx, i32 %x
  %r = icmp sgt i32 %abs, -1
    =>
  %r = i1 true

Name: abs_nsw_is_not_negative

  %cmp = icmp slt i32 %x, 0
  %negx = sub nsw i32 0, %x
  %abs = select i1 %cmp, i32 %negx, i32 %x
  %r = icmp slt i32 %abs, 0
    =>
  %r = i1 false

Name: nabs_is_negative_or_0

  %cmp = icmp slt i32 %x, 0
  %negx = sub i32 0, %x
  %nabs = select i1 %cmp, i32 %x, i32 %negx
  %r = icmp slt i32 %nabs, 1
    =>
  %r = i1 true

Name: nabs_is_not_over_0

  %cmp = icmp slt i32 %x, 0
  %negx = sub i32 0, %x
  %nabs = select i1 %cmp, i32 %x, i32 %negx
  %r = icmp sgt i32 %nabs, 0
    =>
  %r = i1 false

Differential Revision: https://reviews.llvm.org/D53844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345832 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] add tests for icmp fold bug (PR39510); NFC
Sanjay Patel [Thu, 1 Nov 2018 14:03:22 +0000 (14:03 +0000)]
[InstSimplify] add tests for icmp fold bug (PR39510); NFC

Verify that set intersection/subset are not confused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345831 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[mips][micromips] Fix JmpLink to TargetExternalSymbol
Aleksandar Beserminji [Thu, 1 Nov 2018 13:57:54 +0000 (13:57 +0000)]
[mips][micromips] Fix JmpLink to TargetExternalSymbol

When matching MipsISD::JmpLink t9, TargetExternalSymbol:i32'...',
wrong JALR16_MM is selected. This patch adds missing pattern for
JmpLink, so that JAL instruction is selected.

Differential Revision: https://reviews.llvm.org/D53366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345830 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ADT] Clean up SparseBitVector copying and make it moveable
Benjamin Kramer [Thu, 1 Nov 2018 13:55:59 +0000 (13:55 +0000)]
[ADT] Clean up SparseBitVector copying and make it moveable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345829 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Add support for ARMv8.4 in Saphira.
Chad Rosier [Thu, 1 Nov 2018 13:45:16 +0000 (13:45 +0000)]
[AArch64] Add support for ARMv8.4 in Saphira.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345827 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Move 2-input limit up from getFauxShuffleMask to resolveTargetShuffleInput...
Simon Pilgrim [Thu, 1 Nov 2018 11:52:09 +0000 (11:52 +0000)]
[X86][SSE] Move 2-input limit up from getFauxShuffleMask to resolveTargetShuffleInputs (reapplied)

Reapplying an updated version of rL345395 (reverted in rL345451), now the issues noticed in PR39483 have been fixed.

This patch allows resolveTargetShuffleInputs to remove UNDEF inputs from cases where we have more than 2 inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345824 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Specialize public API of ICFLoopSafetyInfo for insertions and removals
Max Kazantsev [Thu, 1 Nov 2018 10:16:06 +0000 (10:16 +0000)]
[NFC] Specialize public API of ICFLoopSafetyInfo for insertions and removals

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345822 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Mips] Conditionally remove successor block
Stefan Maksimovic [Thu, 1 Nov 2018 10:10:42 +0000 (10:10 +0000)]
[Mips] Conditionally remove successor block

In MipsBranchExpansion::splitMBB, upon splitting
a block with two direct branches, remove the successor
of the newly created block (which inherits successors from
the original block) which is pointed to by the last
branch in the original block only if the targets of two
branches differ.

This is to fix the failing test when ran with
-verify-machineinstrs enabled.

Differential Revision: https://reviews.llvm.org/D53756

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345821 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Reorganize code to prepare it for more transforms
Max Kazantsev [Thu, 1 Nov 2018 09:42:50 +0000 (09:42 +0000)]
[NFC] Reorganize code to prepare it for more transforms

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345820 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SystemZ::TTI] Recognize the higher cost of scalar i1 -> fp conversion
Jonas Paulsson [Thu, 1 Nov 2018 09:05:32 +0000 (09:05 +0000)]
[SystemZ::TTI]  Recognize the higher cost of scalar i1 -> fp conversion

Scalar i1 to fp conversions are done with a branch sequence, so it should
have a higher cost.

Review: Ulrich Weigand
https://reviews.llvm.org/D53924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345818 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SystemZ::TTI] Accurate costs for i1->double vector conversions
Jonas Paulsson [Thu, 1 Nov 2018 09:01:51 +0000 (09:01 +0000)]
[SystemZ::TTI]  Accurate costs for i1->double vector conversions

This factors out a new method getBoolVecToIntConversionCost() containing the
code for vector sext/zext of i1, in order to reuse it for i1 to double vector
conversions.

Review: Ulrich Weigand
https://reviews.llvm.org/D53923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345817 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IndVars] Smart hard uses detection
Max Kazantsev [Thu, 1 Nov 2018 06:47:01 +0000 (06:47 +0000)]
[IndVars] Smart hard uses detection

When rewriting loop exit values, IndVars considers this transform not profitable if
the loop instruction has a loop user which it believes cannot be optimized away.
In current implementation only calls that immediately use the instruction are considered
as such.

This patch extends the definition of "hard" users to any side-effecting instructions
(which usually cannot be optimized away from the loop) and also allows handling
of not just immediate users, but use chains.

Differentlai Revision: https://reviews.llvm.org/D51584
Reviewed By: etherzhhb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345814 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Avoid redundant computations when doing AddRec merge
Max Kazantsev [Thu, 1 Nov 2018 06:18:27 +0000 (06:18 +0000)]
[SCEV] Avoid redundant computations when doing AddRec merge

When we calculate a product of 2 AddRecs, we end up making quite massive
computations to deduce the operands of resulting AddRec. This process can
be optimized by computing all args of intermediate sum and then calling
`getAddExpr` once rather than calling `getAddExpr` with intermediate
result every time a new argument is computed.

Differential Revision: https://reviews.llvm.org/D53189
Reviewed By: rtereshin

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345813 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CodeView] Emit the correct TypeIndex for std::nullptr_t.
Zachary Turner [Thu, 1 Nov 2018 04:02:41 +0000 (04:02 +0000)]
[CodeView] Emit the correct TypeIndex for std::nullptr_t.

The TypeIndex used by cl.exe is 0x103, which indicates a SimpleTypeMode
of NearPointer (note the absence of the bitness, normally pointers use a
mode of NearPointer32 or NearPointer64) and a SimpleTypeKind of void.
So this is basically a void*, but without a specified size, which makes
sense given how std::nullptr_t is defined.

clang-cl was actually not emitting *anything* for this. Instead, when we
encountered std::nullptr_t in a DIType, we would actually just emit a
TypeIndex of 0, which is obviously wrong.

std::nullptr_t in DWARF is represented as a DW_TAG_unspecified_type with
a name of "decltype(nullptr)", so we add that logic along with a test,
as well as an update to the dumping code so that we no longer print
void* when dumping 0x103 (which would previously treat Void/NearPointer
no differently than Void/NearPointer64).

Differential Revision: https://reviews.llvm.org/D53957

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345811 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] Support constraint 'wi' in asm
Li Jia He [Thu, 1 Nov 2018 02:35:17 +0000 (02:35 +0000)]
[PowerPC] Support constraint 'wi' in asm
  From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D53265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345810 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoX86: Consistently declare pass initializers in X86.h; NFC
Matthias Braun [Thu, 1 Nov 2018 00:38:01 +0000 (00:38 +0000)]
X86: Consistently declare pass initializers in X86.h; NFC

This avoids declaring them twice: in X86TargetMachine.cpp and the file
implementing the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345801 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Add CPU ID in Custom Event FDR Records
Dean Michael Berris [Thu, 1 Nov 2018 00:18:52 +0000 (00:18 +0000)]
[XRay] Add CPU ID in Custom Event FDR Records

Summary:
This change cuts across compiler-rt and llvm, to increment the FDR log
version number to 4, and include the CPU ID in the custom event records.

This is a step towards allowing us to change the `llvm::xray::Trace`
object to start representing both custom and typed events in the stream
of records. Follow-on changes will allow us to change the kinds of
records we're presenting in the stream of traces, to incorporate the
data in custom/typed events.

A follow-on change will handle the typed event case, where it may not
fit within the 15-byte buffer for metadata records.

This work is part of the larger effort to enable writing analysis and
processing tools using a common in-memory representation of the events
found in traces. The work will focus on porting existing tools in LLVM
to use the common representation and informing the design of a
library/framework for expressing trace event analysis as C++ programs.

Reviewers: mboerger, eizan

Subscribers: hiraditya, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D53920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345798 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Lower vselect
Thomas Lively [Thu, 1 Nov 2018 00:01:02 +0000 (00:01 +0000)]
[WebAssembly] Lower vselect

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345797 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Process p2align operands for SIMD loads and stores
Thomas Lively [Wed, 31 Oct 2018 23:58:20 +0000 (23:58 +0000)]
[WebAssembly] Process p2align operands for SIMD loads and stores

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53886

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345795 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Handle vector IMPLICIT_DEFs.
Thomas Lively [Wed, 31 Oct 2018 23:50:53 +0000 (23:50 +0000)]
[WebAssembly] Handle vector IMPLICIT_DEFs.

Summary:
Also reduce the test case for implicit defs and test it with all
register classes.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53855

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345794 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[VFS] Add support for "no_push" to VFS recursive iterators.
Jonas Devlieghere [Wed, 31 Oct 2018 23:36:10 +0000 (23:36 +0000)]
[VFS] Add support for "no_push" to VFS recursive iterators.

The "regular" file system has a useful feature that makes it possible to
stop recursing when using the recursive directory iterators. This
functionality was missing for the VFS recursive iterator and this patch
adds that.

Differential revision: https://reviews.llvm.org/D53465

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345793 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Mandeep Singh Grang [Wed, 31 Oct 2018 23:16:20 +0000 (23:16 +0000)]
[COFF, ARM64] Implement Intrinsic.sponentry for AArch64

Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Reviewers: mgrang, TomTan, rnk, compnerd, mstorsjo, efriedma

Reviewed By: efriedma

Subscribers: majnemer, chrib, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53673

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345791 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IR] Allow increasing the alignment of dso-local globals.
Eli Friedman [Wed, 31 Oct 2018 23:03:58 +0000 (23:03 +0000)]
[IR] Allow increasing the alignment of dso-local globals.

I think this is the actual important property; the previous visibility
check was an approximation.

Differential Revision: https://reviews.llvm.org/D53852

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345790 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InlineCost] Remove a dead constant; NFC
George Burgess IV [Wed, 31 Oct 2018 22:45:31 +0000 (22:45 +0000)]
[InlineCost] Remove a dead constant; NFC

My `grep`-fu indicates that this hasn't been used for years. It also no
longer makes much sense to have this flavor of penalty in general, since
a call to a noreturn should mean that we're in a BB that's terminated by
`unreachable`. That case is accounted for by
CallAnalyzer::allowSizeGrowth.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345789 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Sort switch cases (NFC)
Evandro Menezes [Wed, 31 Oct 2018 21:56:49 +0000 (21:56 +0000)]
[AArch64] Sort switch cases (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345786 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"
Craig Topper [Wed, 31 Oct 2018 21:53:24 +0000 (21:53 +0000)]
Revert r345165 "[X86] Bring back the MOV64r0 pseudo instruction"

Google is reporting regressions on some benchmarks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345785 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add missing pseudo-instruction for Thumb1 RSBS.
Eli Friedman [Wed, 31 Oct 2018 21:45:48 +0000 (21:45 +0000)]
[ARM] Add missing pseudo-instruction for Thumb1 RSBS.

Shows up rarely for 64-bit arithmetic, more frequently for the compare
patterns added in r325323.

Differential Revision: https://reviews.llvm.org/D53848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345782 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agorevert rL345717 : [InstSimplify] fold icmp based on range of abs/nabs
Sanjay Patel [Wed, 31 Oct 2018 21:37:40 +0000 (21:37 +0000)]
revert rL345717 : [InstSimplify] fold icmp based on range of abs/nabs

This can miscompile as shown in PR39510:
https://bugs.llvm.org/show_bug.cgi?id=39510

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345780 91177308-0d34-0410-b5e6-96231b3b80d8