OSDN Git Service
Dean Michael Berris [Wed, 26 Apr 2017 03:49:49 +0000 (03:49 +0000)]
[XRay][tools] Remove wayward semicolon (NFC)
Follow-up to D29320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301378
91177308-0d34-0410-b5e6-
96231b3b80d8
Dean Michael Berris [Wed, 26 Apr 2017 01:35:23 +0000 (01:35 +0000)]
[XRay][tools] Fixup definition for stat division.
Copy-pasta error.
Follow-up to D29320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301376
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Wed, 26 Apr 2017 01:00:52 +0000 (01:00 +0000)]
[AMDGPU] Garbage collect dead code. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301375
91177308-0d34-0410-b5e6-
96231b3b80d8
Ahmed Bougacha [Wed, 26 Apr 2017 00:48:28 +0000 (00:48 +0000)]
[Support] Avoid UB in sys::fs::perms::operator~. NFC.
This was exposed in r297945 and r301220: the intermediate complement
is a 32-bit value, and casting it to 'perms' invokes UB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301373
91177308-0d34-0410-b5e6-
96231b3b80d8
Vadzim Dambrouski [Wed, 26 Apr 2017 00:33:59 +0000 (00:33 +0000)]
[MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.
If Select pseudo instruction doesn't have use SR, then
CMP instructions are being marked as dead and later can be
removed by MachineCSE pass. This leads to incorrect code
generation.
Differential Revision: https://reviews.llvm.org/D32473
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301372
91177308-0d34-0410-b5e6-
96231b3b80d8
Vedant Kumar [Wed, 26 Apr 2017 00:16:10 +0000 (00:16 +0000)]
[gcov] Sort file info before printing it
The order in which GCOV file info is printed depends on the string hash
function. This makes some GCOV tests brittle, because the tests must be
updated whenever the hash function changes.
Sort the filenames before printing out the file info to solve the
problem. This should be relatively cheap.
Differential Revision: https://reviews.llvm.org/D32512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301371
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Wed, 26 Apr 2017 00:02:39 +0000 (00:02 +0000)]
revert debugging
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301370
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Wed, 26 Apr 2017 00:02:31 +0000 (00:02 +0000)]
[WebAssembly] Allow for signed relocation addends
Summary:
Addends are used as offsets to addresses of globals
and can be both positive and negative. This change
prints libObject in line with the spec and the MC
layer.
Subscribers: jfb, dschuff
Differential Revision: https://reviews.llvm.org/D32507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301369
91177308-0d34-0410-b5e6-
96231b3b80d8
Dylan McKay [Tue, 25 Apr 2017 23:58:20 +0000 (23:58 +0000)]
[AVR] Do not kill the dest register for a pseudo instruction
It caused the register to later be dead, which would trigger a verifier
error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301368
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 25 Apr 2017 23:40:57 +0000 (23:40 +0000)]
AMDGPU: Shift down reserved SP register like scratch wave offset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301367
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 25 Apr 2017 23:33:28 +0000 (23:33 +0000)]
[DAG] fix formatting of isConstantSplat(); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301366
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Tue, 25 Apr 2017 21:17:38 +0000 (21:17 +0000)]
AMDGPU: Clean up VOP3NoMods pattern
There is no need to copy the operands or inspect the sources.
Also remove some unnecessary clamp/omod usage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301363
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 25 Apr 2017 20:56:14 +0000 (20:56 +0000)]
[x86] add more tests for potential change in bool math folding; NFC
Also, use AVX2 to show a potential difference for 256-bit vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301362
91177308-0d34-0410-b5e6-
96231b3b80d8
Konstantin Zhuravlyov [Tue, 25 Apr 2017 20:38:26 +0000 (20:38 +0000)]
AMDGPU: Fix ValueKind code object metadata for images
Differential Revision: https://reviews.llvm.org/D32504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301360
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Tue, 25 Apr 2017 20:30:08 +0000 (20:30 +0000)]
[x86] regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301359
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Tue, 25 Apr 2017 20:22:29 +0000 (20:22 +0000)]
[llvm-pdbdump] Allow sorting / filtering by immediate padding
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301358
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Tue, 25 Apr 2017 20:22:02 +0000 (20:22 +0000)]
[llvm-pdbdump] Dump File / Line Info to YAML.
We were already parsing and dumping this to the human readable
format, but not to the YAML format. This does so, in preparation
for reading it in and reconstructing the line information from
YAML.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301357
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Tue, 25 Apr 2017 20:21:35 +0000 (20:21 +0000)]
[StringExtras] Add a fromHex to complement toHex.
We already have a function toHex that will convert a string like
"\xFF\xFF" to the string "FFFF", but we do not have one that goes
the other way - i.e. to convert a textual string representing a
sequence of hexadecimal characters into the corresponding actual
bytes. This patch adds such a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301356
91177308-0d34-0410-b5e6-
96231b3b80d8
Matthias Braun [Tue, 25 Apr 2017 19:44:25 +0000 (19:44 +0000)]
SimplifyLibCalls: Fix crash on memset(notmalloc())
rdar://
31520787
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301352
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Tue, 25 Apr 2017 19:40:53 +0000 (19:40 +0000)]
Fix an assertion when skipping stack values in DWARF2 mode.
The fix consists of resetting LocationKind when addMachineRegExpression fails.
rdar://problem/
31803010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301351
91177308-0d34-0410-b5e6-
96231b3b80d8
Petr Hosek [Tue, 25 Apr 2017 18:56:33 +0000 (18:56 +0000)]
[llvm-objdump] Don't attempt to print lines beyond the end of file
This may trigger a segfault in llvm-objdump when the line number stored
in debug infromation points beyond the end of file; lines in LineBuffer
are stored in std::vector which is allocated in chunks, so even if the
debug info points beyond the end of the file, this doesn't necessarily
trigger the segfault unless the line number points beyond the allocated
space.
Differential Revision: https://reviews.llvm.org/D32466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301347
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Tue, 25 Apr 2017 18:56:14 +0000 (18:56 +0000)]
[Hexagon] Only increment debug counters if debug option is present
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301346
91177308-0d34-0410-b5e6-
96231b3b80d8
Gil Rapaport [Tue, 25 Apr 2017 18:14:24 +0000 (18:14 +0000)]
[LV] Make LIT test insensitive to basic block numbering
This patch is part of D28975's breakdown.
induction.ll encodes the specific (and rather arbitrary) numbers given to
predicated basic blocks by the unique naming mechanism, which makes it
sensitive to changes in LV's instruction generation order. This patch replaces
those specific numbers with a numeric pattern.
Differential Revision: https://reviews.llvm.org/D32404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301345
91177308-0d34-0410-b5e6-
96231b3b80d8
Stanislav Mekhanoshin [Tue, 25 Apr 2017 18:00:08 +0000 (18:00 +0000)]
Skip bitcasts while looking for GEP in LoadStoreVectorizer
Differential Revisison: https://reviews.llvm.org/D32101
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301343
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 18:00:04 +0000 (18:00 +0000)]
[X86][AVX2] Add shuffle test for PR27320 showing current codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301342
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 17:54:12 +0000 (17:54 +0000)]
[InstCombine] Remove redundant code from SimplifyUsingDistributiveLaws
The code I've removed here exists in ExpandBinOp in InstSimplify which we call into before SimplifyUsingDistributiveLaws. The code in InstSimplify looks to have been copied from here.
I verified this code doesn't fire on any lit tests. Not that that proves its definitely dead.
Differential Revision: https://reviews.llvm.org/D32472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301341
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 17:46:30 +0000 (17:46 +0000)]
[APInt] Use isSubsetOf, intersects, and bit counting methods to reduce temporary APInts
This patch uses various APInt methods to reduce temporary APInt creation.
This should be all of the unrelated cleanups that got buried in D32376(creating a KnownBits struct) as well as some pointed out by Simon during the review of that. Plus a few improvements to use counting instead of masking.
I've left out any places where we do something like (KnownZero & KnownOne) != 0 as I plan to add a helper method to KnownBits to ask that question and didn't want to thrash that code an additional time.
Differential Revision: https://reviews.llvm.org/D32495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301338
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 17:40:58 +0000 (17:40 +0000)]
[InstCombine] Fix CHECK-LABEL in two tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301337
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 17:22:34 +0000 (17:22 +0000)]
[X86][SSE] Add tests for PR14657 showing current codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301334
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Tue, 25 Apr 2017 17:22:09 +0000 (17:22 +0000)]
Print complete DIExpressions in the assembler output DEBUG_VALUE comments.
The previous code was complex, incorrect, and couldn't print everything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301333
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Tue, 25 Apr 2017 17:13:23 +0000 (17:13 +0000)]
[WebAssembly] Fix relocation count in wasm binaries with call_indirect
Subscribers: jfb, dschuff
Differential Revision: https://reviews.llvm.org/D32459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301331
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Tue, 25 Apr 2017 17:11:56 +0000 (17:11 +0000)]
[WebAssembly] Read global index in init expression as LEB
Subscribers: jfb, dschuff
Differential Revision: https://reviews.llvm.org/D32462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301330
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 17:01:32 +0000 (17:01 +0000)]
[InstSimplify] Handle (~A & ~B) | (~A ^ B) -> ~A ^ B
The code Sanjay Patel moved over from InstCombine doesn't work properly if the 'and' has both inputs as nots because we used a commuted op matcher on the 'and' first. But this will bind to the first 'not' on 'and' when there could be two 'not's. InstCombine could rely on DeMorgan to ensure the 'and' wouldn't have two 'not's eventually, but InstSimplify can't rely on that.
This patch matches the xor first then checks for the ands and allows a not of either operand of the xor.
Differential Revision: https://reviews.llvm.org/D32458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301329
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 25 Apr 2017 16:54:45 +0000 (16:54 +0000)]
[PM] Run IndirectCallPromotion only when PGO is enabled.
Differential Revision: https://reviews.llvm.org/D32465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301327
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 16:48:19 +0000 (16:48 +0000)]
[InstCombine] Remove superfluous curly braces around a single line if body. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301326
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 16:48:14 +0000 (16:48 +0000)]
[ValueTracking] Use APInt::operator|=(uint64_t) instead of creating a temporary APInt. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301325
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 16:48:09 +0000 (16:48 +0000)]
[ValueTracking] Use APInt instead of auto. NFC
This is a pre-commit for a patch I'm working on to turn KnownZero/One into a struct. Once I do that the type here will be less obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301324
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 16:48:03 +0000 (16:48 +0000)]
[ValueTracking] Use BitWidth local variable instead of re-reading it from KnownZero. NFC
This is a pre-commit for a patch that I'm working on to merge KnownZero/KnownOne into a KnownBits struct which would have had to touch this line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301323
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 16:41:28 +0000 (16:41 +0000)]
[SelectionDAG] Added getBuildVector(ArrayRef<SDUse>) helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301322
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 16:16:03 +0000 (16:16 +0000)]
[DAGCombiner] Refactor to make it easy to add support for vectors in a future patch. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301320
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Ng [Tue, 25 Apr 2017 15:39:57 +0000 (15:39 +0000)]
Resubmit r301309: [DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch reapplies r301309 with the fix to the MIR test to fix the assertion
triggered by r301309. Had trimmed a little bit too much from the MIR!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301317
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 15:19:04 +0000 (15:19 +0000)]
[InstCombine] Add missing commute handling to (A | B) & (B ^ (~A)) -> (A & B)
The matching here wasn't able to handle all the possible commutes. It always assumed the not would be on the left of the xor, but that's not guaranteed.
Differential Revision: https://reviews.llvm.org/D32474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301316
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 15:10:47 +0000 (15:10 +0000)]
[SelectionDAG] Use getBuildVector helper where possible. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301314
91177308-0d34-0410-b5e6-
96231b3b80d8
Dylan McKay [Tue, 25 Apr 2017 15:09:04 +0000 (15:09 +0000)]
[AVR] Support the LDWRdPtr instruction with the same Src+Dst register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301313
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Ng [Tue, 25 Apr 2017 14:36:01 +0000 (14:36 +0000)]
Revert "[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler."
This reverts commit r301309 which is causing buildbot assertion failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301312
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Sanders [Tue, 25 Apr 2017 14:27:27 +0000 (14:27 +0000)]
Bring back the ability opt out of padding zero-byte functions by not providing a nop instruction.
Summary: No test case since I'm not aware of an in-tree target that needs this.
Reviewers: hans
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301311
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Ng [Tue, 25 Apr 2017 13:39:49 +0000 (13:39 +0000)]
[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch fixes a bug with the updating of DBG_VALUE's in
BreakAntiDependencies. Previously, it would only attempt to update the first
DBG_VALUE following the instruction whose register is being changed,
potentially leaving DBG_VALUE's referring to the wrong register. Now the code
will update all DBG_VALUE's that immediately follow the instruction.
This issue was detected as a result of an optimized codegen difference with
"-g" where an X86 byte/word fixup was not performed due to a DBG_VALUE
referencing the wrong register.
Differential Revision: https://reviews.llvm.org/D31755
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301309
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 13:39:07 +0000 (13:39 +0000)]
[SelectionDAG] Pull out repeated getValueType calls. NFCI.
Noticed in D32391.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301308
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 12:40:45 +0000 (12:40 +0000)]
[DAGCombiner] Add vector support for (srl (trunc (srl x, c1)), c2) combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301305
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Ng [Tue, 25 Apr 2017 12:36:14 +0000 (12:36 +0000)]
[SimplifyLibCalls] Fix infinite loop with fast-math optimization.
One of the fast-math optimizations is to replace calls to standard double
functions with their float equivalents, e.g. exp -> expf. However, this can
cause infinite loops for the following:
float expf(float val) { return (float) exp((double) val); }
A similar inline declaration exists in the MinGW-w64 math.h header file which
when compiled with -O2/3 and fast-math generates infinite loops.
So this fix checks that the calling function to the standard double function
that is being replaced does not match the float equivalent.
Differential Revision: https://reviews.llvm.org/D31806
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301304
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 12:29:07 +0000 (12:29 +0000)]
[SelectionDAG] Recognise splat vector isKnownToBeAPowerOfTwo one/sign bit shift cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301303
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Tue, 25 Apr 2017 10:47:35 +0000 (10:47 +0000)]
[DAGCombiner] Use SDValue::getConstantOperandVal helper where possible. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301300
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 25 Apr 2017 06:53:25 +0000 (06:53 +0000)]
[IVUsers] Don't bail out of normalizing non-affine add recs
Summary:
In a previous change I changed SCEV's normalization / denormalization
to work with non-affine add recs. So the bailout in IVUsers can be
removed.
Reviewers: atrick, efriedma
Reviewed By: atrick
Subscribers: davide, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D32105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301298
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 06:47:49 +0000 (06:47 +0000)]
[InstCombine] Add test cases for missing commute handling in ((A ^ C) ^ B) & (B ^ A) -> (B ^ A) & ~C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301297
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 06:22:17 +0000 (06:22 +0000)]
[InstCombine] Add test cases showing failures to handle commuted patterns after tricking the operand complexity sorting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301296
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Tue, 25 Apr 2017 06:02:11 +0000 (06:02 +0000)]
[InstCombine] Use commutable matchers to reduce some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301294
91177308-0d34-0410-b5e6-
96231b3b80d8
Gil Rapaport [Tue, 25 Apr 2017 05:57:22 +0000 (05:57 +0000)]
[LV] Remove redundant basic block split
This patch is part of D28975's breakdown.
Genreating the control-flow to guard predicated instructions modified to
only use SplitBlockAndInsertIfThen() for producing the if-then construct.
Differential Revision: https://reviews.llvm.org/D32224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301293
91177308-0d34-0410-b5e6-
96231b3b80d8
Serge Guelton [Tue, 25 Apr 2017 05:45:37 +0000 (05:45 +0000)]
Update doc of the variadic version of getOrInsertFunction
It no longer needs a null terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301292
91177308-0d34-0410-b5e6-
96231b3b80d8
Xinliang David Li [Tue, 25 Apr 2017 04:51:19 +0000 (04:51 +0000)]
[CodeExtractor]: Fixup use refs of the old phi.
Differential Revision: http://reviews.llvm.org/D32468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301291
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Tue, 25 Apr 2017 04:06:35 +0000 (04:06 +0000)]
[ObjCARC] Do not sink an objc_retain past a clang.arc.use.
We need to do this to prevent a miscompile which sinks an objc_retain
past an objc_release that releases the object objc_retain retains. This
happens because the top-down and bottom-up traversals each determines
the insert point for retain or release individually without knowing
where the other instruction is moved.
For example, when the following IR is fed to the ARC optimizer, the
top-down traversal decides to insert objc_retain right before
objc_release and the bottom-up traversal decides to insert objc_release
right after clang.arc.use.
(IR before ARC optimizer)
%11 = call i8* @objc_retain(i8* %10)
call void (...) @clang.arc.use(%0* %5)
call void @llvm.dbg.value(...)
call void @objc_release(i8* %6)
This reverses the order of objc_release and objc_retain, which causes
the object to be destructed prematurely.
(IR after ARC optimizer)
call void (...) @clang.arc.use(%0* %5)
call void @objc_release(i8* %6)
call void @llvm.dbg.value(...)
%11 = call i8* @objc_retain(i8* %10)
rdar://problem/
30530580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301289
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Tue, 25 Apr 2017 03:48:47 +0000 (03:48 +0000)]
[SimplifyLibCalls] Remove a cl::opt that's been `true` for a long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301288
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Tue, 25 Apr 2017 00:09:19 +0000 (00:09 +0000)]
Teach SCEV normalization to de/normalize non-affine add recs
Summary:
Before this change, SCEV Normalization would incorrectly normalize
non-affine add recurrences. To work around this there was (still is)
a check in place to make sure we only tried to normalize affine add
recurrences.
We recently found a bug in aforementioned check to bail out of
normalizing non-affine add recurrences. However, instead of fixing
the bailout, I have decided to teach SCEV normalization to work
correctly with non-affine add recurrences, making the bailout
unnecessary (I'll remove it in a subsequent change).
I've also added some unit tests (which would have failed before this
change).
Reviewers: atrick, sunfish, efriedma
Reviewed By: atrick
Subscribers: mcrosier, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32104
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301281
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 24 Apr 2017 23:42:41 +0000 (23:42 +0000)]
InferAddressSpaces: Use reference arguments instead of pointers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301276
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Zelenko [Mon, 24 Apr 2017 23:21:38 +0000 (23:21 +0000)]
[Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301275
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 24 Apr 2017 23:02:57 +0000 (23:02 +0000)]
InferAddressSpaces: Remove redundant assert
This is just asserting all the operations are handled in the
switch, which the unreachable already handles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301270
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 24 Apr 2017 22:42:34 +0000 (22:42 +0000)]
[ARM, x86] add more vector tests for bool math; NFC
I'm proposing a fold for increment-of-sexted-bool in:
https://reviews.llvm.org/D31944
...so we need to know what happens in more cases like these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301269
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Mon, 24 Apr 2017 22:26:46 +0000 (22:26 +0000)]
[git-llvm] Remove CR from middle of svn propget output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301268
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Mon, 24 Apr 2017 22:25:02 +0000 (22:25 +0000)]
Make getSlotAttributes return an AttributeSet instead of a wrapper list
Remove the temporary, poorly named getSlotSet method which did the same
thing. Also remove getSlotNode, which is a hold-over from when we were
dealing with AttributeSetNode* instead of AttributeSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301267
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Mon, 24 Apr 2017 22:09:08 +0000 (22:09 +0000)]
[git-llvm] Make `push` work on CRLF files with svn:eol-style=native
Summary:
`git apply` on Windows doesn't work for files that SVN checks out as
CRLF. There is no way to force SVN to check everything out with Unix
line endings on Windows. Files with svn:eol-style=native will always
come out with CRLF, breaking `git apply`, which wants Unix line endings.
My workaround is to list all files with this property set in the change,
and run `dos2unix` on them. SVN doesn't commit a massive line ending
change because the svn:eol-style property indicates that these are text
files.
Tested on r301245.
Reviewers: zturner, jlebar
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301262
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 24 Apr 2017 21:52:39 +0000 (21:52 +0000)]
[InstSimplify] use ConstantRange to simplify more and-of-icmps
We can simplify (and (icmp X, C1), (icmp X, C2)) to one of the icmps in many cases.
I had to check some of these with Alive to prove to myself it's right, but everything
seems to check out. Eg, the code in instcombine was completely ignoring predicates with
mismatched signedness.
Handling or-of-icmps would be a follow-up step.
Differential Revision: https://reviews.llvm.org/D32143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301260
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 24 Apr 2017 21:43:21 +0000 (21:43 +0000)]
[DAGCombiner] Use APInt::intersects to avoid tmp variable. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301258
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 24 Apr 2017 21:08:32 +0000 (21:08 +0000)]
AMDGPU: Slightly simplify prolog reserved register handling
Rely on MachineRegisterInfo's knowledge of used physical
registers.
Move flat_scratch initialization earlier, so the uses are visible
when making these decisions.
This will make it easier to add another reserved register
at the end for the stack pointer rather than handling another
special case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301254
91177308-0d34-0410-b5e6-
96231b3b80d8
Galina Kistanova [Mon, 24 Apr 2017 21:06:29 +0000 (21:06 +0000)]
Cosmetic change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301253
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Mon, 24 Apr 2017 21:05:05 +0000 (21:05 +0000)]
ProfileData: clean up some stale declarations (NFC)
These were removed in SVN r300381. Remove the declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301252
91177308-0d34-0410-b5e6-
96231b3b80d8
Galina Kistanova [Mon, 24 Apr 2017 20:48:40 +0000 (20:48 +0000)]
Small addition on how to add a builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301248
91177308-0d34-0410-b5e6-
96231b3b80d8
Artem Tamazov [Mon, 24 Apr 2017 20:42:27 +0000 (20:42 +0000)]
[AMDGPU][mc][tests][NFC] Bulk ISA tests: update for Gfx7/Gfx8, add for Gfx9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301247
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Mon, 24 Apr 2017 20:38:30 +0000 (20:38 +0000)]
[Bitcode] Refactor attribute group writing to avoid getSlotAttributes
Summary:
That API creates a temporary AttributeList to carry an index and a
single AttributeSet. We need to carry the index in addition to the set,
because that is how attribute groups are currently encoded.
NFC
Reviewers: pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301245
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Mon, 24 Apr 2017 20:30:42 +0000 (20:30 +0000)]
Update profile during memory instrinsic optimization
Summary:
Ensure that the new merge BB (which contains the rest of the original BB
after the mem op being optimized) gets a profile frequency, in case
there are additional mem ops later in the BB. Otherwise they get skipped
as the merge BB looks cold.
Reviewers: davidxl, xur
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32447
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301244
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 24 Apr 2017 20:25:01 +0000 (20:25 +0000)]
Revert "StructurizeCFG: Directly invert cmp instructions"
This reverts commit r300732. This breaks a few tests.
I think the problem is related to adding more uses of
the condition that don't yet exist at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301242
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Mon, 24 Apr 2017 20:17:38 +0000 (20:17 +0000)]
[LoopUnroll] Remove spurious newline.
Eli pointed out in the review, but I didn't squash the two commits
correctly. Pointy-hat to me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301241
91177308-0d34-0410-b5e6-
96231b3b80d8
Frederich Munch [Mon, 24 Apr 2017 20:16:01 +0000 (20:16 +0000)]
Revert "Refactor DynamicLibrary so searching for a symbol will have a defined order"
The i686-mingw32-RA-on-linux bot is still having errors.
This reverts commit r301236.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301240
91177308-0d34-0410-b5e6-
96231b3b80d8
Davide Italiano [Mon, 24 Apr 2017 20:14:11 +0000 (20:14 +0000)]
[LoopUnroll] Don't try to unroll non canonical loops.
The current Loop Unroll implementation works with loops having a
single latch that contains a conditional branch to a block outside
the loop (the other successor is, by defition of latch, the header).
If this precondition doesn't hold, avoid unrolling the loop as
the code is not ready to handle such circumstances.
Differential Revision: https://reviews.llvm.org/D32261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301239
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjoy Das [Mon, 24 Apr 2017 20:12:10 +0000 (20:12 +0000)]
[LIR] Obey non-integral pointer semantics
Summary: See http://llvm.org/docs/LangRef.html#non-integral-pointer-type
Reviewers: haicheng
Reviewed By: haicheng
Subscribers: mcrosier, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301238
91177308-0d34-0410-b5e6-
96231b3b80d8
Saleem Abdulrasool [Mon, 24 Apr 2017 20:01:03 +0000 (20:01 +0000)]
Avoid unnecessary copies in some for loops
Use constant references rather than `const auto` which will cause the
copy constructor. These particular cases cause issues for the swift
compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301237
91177308-0d34-0410-b5e6-
96231b3b80d8
Frederich Munch [Mon, 24 Apr 2017 19:55:16 +0000 (19:55 +0000)]
Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.
Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:
JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv
Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.
Reviewers: chapuni, v.g.vassilev, lhames
Reviewed By: lhames
Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits
Differential Revision: https://reviews.llvm.org/D30107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301236
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 24 Apr 2017 19:51:12 +0000 (19:51 +0000)]
Move value type list from TargetRegisterClass to TargetRegisterInfo
Differential Revision: https://reviews.llvm.org/D31937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301234
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 24 Apr 2017 19:48:51 +0000 (19:48 +0000)]
Revert r301231: Accidentally committed stale files
I forgot to commit local changes before commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301232
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 24 Apr 2017 19:43:45 +0000 (19:43 +0000)]
Move value type list from TargetRegisterClass to TargetRegisterInfo
Differential Revision: https://reviews.llvm.org/D31937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301231
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 24 Apr 2017 19:40:59 +0000 (19:40 +0000)]
AMDGPU: Select scratch mubuf offsets when pointer is a constant
In call sequence setups, there may not be a frame index base
and the pointer is a constant offset from the frame
pointer / scratch wave offset register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301230
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 24 Apr 2017 19:40:51 +0000 (19:40 +0000)]
AMDGPU: Set StackGrowsUp in MCAsmInfo
Not sure what this does though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301229
91177308-0d34-0410-b5e6-
96231b3b80d8
Stanislav Mekhanoshin [Mon, 24 Apr 2017 19:37:54 +0000 (19:37 +0000)]
[AMDGPU] Merge M0 initializations
Merges equivalent initializations of M0 and hoists them into a common
dominator block. Technically the same code can be used with any
register, physical or virtual.
Differential Revision: https://reviews.llvm.org/D32279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301228
91177308-0d34-0410-b5e6-
96231b3b80d8
Piotr Padlewski [Mon, 24 Apr 2017 19:37:17 +0000 (19:37 +0000)]
Handle invariant.group.barrier in BasicAA
Summary:
llvm.invariant.group.barrier returns pointer that mustalias
pointer it takes. It can't be marked with `returned` attribute,
because it would be remove easily. The other reason is that
only Alias Analysis can know about this, because if any other
pass would know it, then the result would be replaced with it's
argument, which would be invalid.
We can think about returned pointer as something that mustalias, but
it doesn't have to be bitwise the same as the argument.
Reviewers: dberlin, chandlerc, hfinkel, sanjoy
Subscribers: reames, nlewycky, rsmith, anna, amharc
Differential Revision: https://reviews.llvm.org/D31585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301227
91177308-0d34-0410-b5e6-
96231b3b80d8
Evgeniy Stepanov [Mon, 24 Apr 2017 19:34:13 +0000 (19:34 +0000)]
[asan] Let the frontend disable gc-sections optimization for asan globals.
Also extend -asan-globals-live-support flag to all binary formats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301226
91177308-0d34-0410-b5e6-
96231b3b80d8
Mandeep Singh Grang [Mon, 24 Apr 2017 19:20:45 +0000 (19:20 +0000)]
[SimplifyCFG] Fix for non-determinism in codegen
Summary: This patch fixes issues in codegen uncovered due to https://reviews.llvm.org/D26718
Reviewers: majnemer, chenli, davide
Reviewed By: davide
Subscribers: davide, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D26726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301222
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 24 Apr 2017 18:55:33 +0000 (18:55 +0000)]
Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
- TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
- TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
- TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;
This will allow making those values depend on subtarget features in the
future.
Differential Revision: https://reviews.llvm.org/D31783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301221
91177308-0d34-0410-b5e6-
96231b3b80d8
Dimitry Andric [Mon, 24 Apr 2017 18:54:48 +0000 (18:54 +0000)]
Don't test setting sticky bits on files for modern BSDs
Summary: In rL297945, jhenderson added methods for setting permissions
to sys::fs, but some of the unittests that attempt to set sticky bits
(01000) on files fail on modern BSDs, such as FreeBSD, NetBSD and
OpenBSD. This is because those systems do not allow regular users to
set sticky bits on files, only on directories. Fix it by disabling
these particular tests on modern BSDs.
Reviewers: emaste, brad, jhenderson
Reviewed By: jhenderson
Subscribers: joerg, krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D32120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301220
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Mon, 24 Apr 2017 18:45:59 +0000 (18:45 +0000)]
Don't emit CFI instructions at the end of a function
When functions are terminated by unreachable instructions, the last
instruction might trigger a CFI instruction to be generated. However,
emitting it would be be illegal since the function (and thus the FDE
the CFI is in) has already ended with the previous instruction.
Darwin's dwarfdump --verify --eh-frame complains about this and the
specification supports this.
Relevant bits from the DWARF 5 standard (6.4 Call Frame Information):
"[The] address_range [field in an FDE]: The number of bytes of
program instructions described by this entry."
"Row creation instructions: [...]
The new location value is always greater than the current one."
The first quotation implies that a CFI cannot describe a target
address outside of the enclosing FDE's range.
rdar://problem/
26244988
Differential Revision: https://reviews.llvm.org/D32246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301219
91177308-0d34-0410-b5e6-
96231b3b80d8
George Karpenkov [Mon, 24 Apr 2017 18:39:52 +0000 (18:39 +0000)]
Updates documentation for a syntax sugar libfuzzer flag,
as implemented in https://reviews.llvm.org/D32193
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301217
91177308-0d34-0410-b5e6-
96231b3b80d8
Yaxun Liu [Mon, 24 Apr 2017 18:26:27 +0000 (18:26 +0000)]
CodeGen: Add a hook for getFenceOperandTy
Currently the operand type for ATOMIC_FENCE assumes value type of a pointer in address space 0.
This is fine for most targets. However for amdgcn target, the size of pointer in address space 0
depends on triple environment. For amdgiz environment, it is 64 bit but for other environment it is
32 bit. On the other hand, amdgcn target expects 32 bit fence operands independent of the target
triple environment. Therefore a hook is need in target lowering for getting the fence operand type.
This patch has no effect on targets other than amdgcn.
Differential Revision: https://reviews.llvm.org/D32186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301215
91177308-0d34-0410-b5e6-
96231b3b80d8
Evgeniy Stepanov [Mon, 24 Apr 2017 18:25:07 +0000 (18:25 +0000)]
Revert "Compute safety information in a much finer granularity."
Use-after-free in llvm::isGuaranteedToExecute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301214
91177308-0d34-0410-b5e6-
96231b3b80d8