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Hans Wennborg [Fri, 15 Sep 2017 18:40:26 +0000 (18:40 +0000)]
Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs."
This caused PR34629: asserts firing when building Chromium. It also broke some
buildbots building test-suite as reported on the commit thread.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet
>
> Reviewed By: lsaba
>
> Subscribers: spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313376
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Adrian Prantl [Fri, 15 Sep 2017 18:35:37 +0000 (18:35 +0000)]
Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313375
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Eric Beckmann [Fri, 15 Sep 2017 18:20:28 +0000 (18:20 +0000)]
Fix Bug 30978 by emitting cv file checksums.
Summary:
The checksums had already been placed in the IR, this patch allows
MCCodeView to actually write it out to an MCStreamer.
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D37157
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313374
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Craig Topper [Fri, 15 Sep 2017 18:11:13 +0000 (18:11 +0000)]
[X86] Prefer VPERMQ over VPERM2F128 for any unary shuffle, not just the ones that can be done with a insertf128
The early out for AVX2 in lowerV2X128VectorShuffle is positioned in a weird spot below some shuffle mask equivalency checks.
But I think we want to allow VPERMQ for any unary shuffle.
Differential Revision: https://reviews.llvm.org/D37893
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313373
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Adrian Prantl [Fri, 15 Sep 2017 17:39:50 +0000 (17:39 +0000)]
llvm-dwarfdump: Factor out the printing of the section header (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313370
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Simon Pilgrim [Fri, 15 Sep 2017 17:28:07 +0000 (17:28 +0000)]
Fix typo in vector reduction costs comment. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313368
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Craig Topper [Fri, 15 Sep 2017 17:09:05 +0000 (17:09 +0000)]
[X86] Use SDNode::ops() instead of makeArrayRef and op_begin(). NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313367
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Craig Topper [Fri, 15 Sep 2017 17:09:03 +0000 (17:09 +0000)]
[X86] Don't create i64 constants on 32-bit targets when lowering v64i1 constant build vectors
When handling a v64i1 build vector of constants on 32-bit targets we were creating an illegal i64 constant that we then bitcasted back to v64i1. We need to instead create two 32-bit constants, bitcast them to v32i1 and concat the result. We should also take care to handle the halves being all zeros/ones after the split.
This patch splits the build vector and then recursively lowers the two pieces. This allows us to handle the all ones and all zeros cases with minimal effort. Ideally we'd just do the split and concat, and let lowering get called again on the new nodes, but getNode has special handling for CONCAT_VECTORS that reassembles the pieces back into a single BUILD_VECTOR. Hopefully the two temporary BUILD_VECTORS we had to create to do this that don't get returned don't cause any issues.
Fixes PR34605.
Differential Revision: https://reviews.llvm.org/D37858
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313366
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Craig Topper [Fri, 15 Sep 2017 17:09:00 +0000 (17:09 +0000)]
[X86] Add isel pattern infrastructure to begin recognizing when we're inserting 0s into the upper portions of a vector register and the producing instruction as already produced the zeros.
Currently if we're inserting 0s into the upper elements of a vector register we insert an explicit move of the smaller register to implicitly zero the upper bits. But if we can prove that they are already zero we can skip that. This is based on a similar idea of what we do to avoid emitting explicit zero extends for GR32->GR64.
Unfortunately, this is harder for vector registers because there are several opcodes that don't have VEX equivalent instructions, but can write to XMM registers. Among these are SHA instructions and a MMX->XMM move. Bitcasts can also get in the way.
So for now I'm starting with explicitly allowing only VPMADDWD because we emit zeros in combineLoopMAddPattern. So that is placing extra instruction into the reduction loop.
I'd like to allow PSADBW as well after D37453, but that's currently blocked by a bitcast. We either need to peek through bitcasts or canonicalize insert_subvectors with zeros to remove bitcasts on the value being inserted.
Longer term we should probably have a cleanup pass that removes superfluous zeroing moves even when the producer is in another basic block which is something these isel tricks can't do. See PR32544.
Differential Revision: https://reviews.llvm.org/D37653
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313365
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Anna Thomas [Fri, 15 Sep 2017 15:56:05 +0000 (15:56 +0000)]
[RuntimeUnroll] Add heuristic for unrolling multi-exit loop
Add a profitability heuristic to enable runtime unrolling of multi-exit
loop: There can be atmost two unique exit blocks for the loop and the
second exit block should be a deoptimizing block. Also, there can be one
other exiting block other than the latch exiting block. The reason for
the latter is so that we limit the number of branches in the unrolled
code to being at most the unroll factor. Deoptimizing blocks are rarely
taken so these additional number of branches created due to the
unrolling are predictable, since one of their target is the deopt block.
Reviewers: apilipenko, reames, evstupac, mkuper
Subscribers: llvm-commits
Reviewed by: reames
Differential Revision: https://reviews.llvm.org/D35380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313363
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Krzysztof Parzyszek [Fri, 15 Sep 2017 15:46:05 +0000 (15:46 +0000)]
[Hexagon] Switch to parameterized register classes for HVX
This removes the duplicate HVX instruction set for the 128-byte mode.
Single instruction set now works for both modes (64- and 128-byte).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313362
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Ilya Biryukov [Fri, 15 Sep 2017 13:35:54 +0000 (13:35 +0000)]
Added optional validation of svn sources to Dockerfiles.
Summary: This commit also adds a script to compute sha256 hashes of llvm checkouts.
Reviewers: klimek, mehdi_amini
Reviewed By: klimek
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37099
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313359
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Anna Thomas [Fri, 15 Sep 2017 13:29:33 +0000 (13:29 +0000)]
[RuntimeUnrolling] Populate the VMap entry correctly when default generated through lookup
During runtime unrolling on loops with multiple exits, we update the
exit blocks with the correct phi values from both original and remainder
loop.
In this process, we lookup the VMap for the mapped incoming phi values,
but did not update the VMap if a default entry was generated in the VMap
during the lookup. This default value is generated when constants or
values outside the current loop are looked up.
This patch fixes the assertion failure when null entries are present in
the VMap because of this lookup. Added a testcase that showcases the
problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313358
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Alexander Kornienko [Fri, 15 Sep 2017 11:45:57 +0000 (11:45 +0000)]
Remove unneeded forward declaration. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313357
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Alexander Kornienko [Fri, 15 Sep 2017 11:45:30 +0000 (11:45 +0000)]
Add a ReleaseNotes blurb for Execute.*Wait API change
... in r313155, r313156.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313356
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Simon Pilgrim [Fri, 15 Sep 2017 11:17:42 +0000 (11:17 +0000)]
[X86][SSE] Add test cases vector for integer multiplies
Mainly inspired by PR34474 / D37896
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313353
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Ilya Biryukov [Fri, 15 Sep 2017 10:15:00 +0000 (10:15 +0000)]
Revert "[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops."
This reverts commit r313348.
Reason: it caused buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313352
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Sjoerd Meijer [Fri, 15 Sep 2017 09:24:48 +0000 (09:24 +0000)]
[AArch64] allow v8f16 types when FullFP16 is supported
This adds support for allowing v8f16 vector types, thus avoiding conversions
from/to single precision for these types. This is a follow up patch of
commits r311154 and r312104, which added support for scalars and v4f16
types, respectively.
Differential Revision: https://reviews.llvm.org/D37802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313351
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Jonas Paulsson [Fri, 15 Sep 2017 07:47:38 +0000 (07:47 +0000)]
Recommit "[RegAlloc] Make sure live-ranges reflect the state of the IR when
removing them"
This was temporarily reverted, but now that the fix has been commited (r313197)
it should be put back in place.
https://bugs.llvm.org/show_bug.cgi?id=34502
This reverts commit
9ef93d9dc4c51568e858cf8203cd2c5ce8dca796.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313349
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Dinar Temirbulatov [Fri, 15 Sep 2017 06:56:39 +0000 (06:56 +0000)]
[SLPVectorizer] Failure to beneficially vectorize 'copyable' elements in integer binary ops.
Patch tries to improve vectorization of the following code:
void add1(int * __restrict dst, const int * __restrict src) {
*dst++ = *src++;
*dst++ = *src++ + 1;
*dst++ = *src++ + 2;
*dst++ = *src++ + 3;
}
Allows to vectorize even if the very first operation is not a binary add, but just a load.
Reviewers: spatel, mzolotukhin, mkuper, hfinkel, RKSimon, filcab, ABataev, davide
Subscribers: llvm-commits, RKSimon
Differential Revision: https://reviews.llvm.org/D28907
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313348
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Lang Hames [Fri, 15 Sep 2017 06:50:19 +0000 (06:50 +0000)]
[ORC] Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313346
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Jatin Bhateja [Fri, 15 Sep 2017 05:29:51 +0000 (05:29 +0000)]
[X86] PR32755 : Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been
extended, such that it promotes Scale to accommodate similar operand
appearing in the DAG.
e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will no look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
so that if there is an opportunity then complex LEAs (having 3 operands)
could be factored out.
e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
thus avoiding creation of any complex LEAs within a loop.
Reviewers: lsaba, RKSimon, craig.topper, qcolombet
Reviewed By: lsaba
Subscribers: spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313343
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Dinar Temirbulatov [Fri, 15 Sep 2017 04:31:54 +0000 (04:31 +0000)]
[SLPVectorizer] Remove duplicated functionality code in initScheduleData function, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313341
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Martin Pelikan [Fri, 15 Sep 2017 04:22:16 +0000 (04:22 +0000)]
[XRay] fix and clarify comments in the log file decoder
Summary:
For readers unfamiliar with the XRay code base, reference the compiler-rt
implementation even though we're not allowed to share any code and explain
our little-endian views more clearly.
For code clarity either get rid of obvious comments or explain their
intentions, fix typos, correct coding style according to LLVM's standards
and manually CSE long expressions to point out it is the same expression.
Reviewers: dberris
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313340
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Petr Hosek [Fri, 15 Sep 2017 02:59:55 +0000 (02:59 +0000)]
[Object] Fix missing arguments to getType and getSymbol in Elf_Rel_Impl
Somehow this was compiling without these methods having their arguments
passed to them. I used these methods in some code I wrote and it raised
an error on me. It appears no one else has used these methods let (LLD
uses setSymbolAndType however). This change resolves the issue.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D35100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313336
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Zachary Turner [Fri, 15 Sep 2017 02:56:40 +0000 (02:56 +0000)]
Revert "[lit] Force site configs to run before source-tree configs"
This patch is still breaking several multi-stage compiler-rt bots.
I already know what the fix is, but I want to get the bots green
for now and then try re-applying in the morning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313335
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Tom Stellard [Fri, 15 Sep 2017 02:25:22 +0000 (02:25 +0000)]
merge-request.sh: Update to use new "Fixed by Commit(s)" field
Summary:
This will be used instead of the url field to track which commits need
to be merged.
This patch also drops support for version 1.x of the bugzilla CLI tool.
Reviewers: hansw, hans
Reviewed By: hans
Subscribers: hans, llvm-commits
Differential Revision: https://reviews.llvm.org/D37786
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313334
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Reid Kleckner [Fri, 15 Sep 2017 01:18:46 +0000 (01:18 +0000)]
[cmake] Fix a variable shadowing bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313331
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Reid Kleckner [Fri, 15 Sep 2017 00:59:07 +0000 (00:59 +0000)]
[codeview] Use a type index of zero for static method "this" types
Otherwise VS won't show anything in the autos or watch window of static
methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313329
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Zachary Turner [Fri, 15 Sep 2017 00:56:08 +0000 (00:56 +0000)]
[lit] Revert "Add a lit.llvm module that all llvm projects can use"
This is breaking due to some changes I forgot to merge in, so I'm
temporarily reverting them until I can re-test that this works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313328
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Zachary Turner [Fri, 15 Sep 2017 00:43:38 +0000 (00:43 +0000)]
[lit] Remove some code that I forgot to remove.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313326
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Zachary Turner [Fri, 15 Sep 2017 00:34:00 +0000 (00:34 +0000)]
[lit] Add a lit.llvm module that all test suites can use.
To further reduce duplicate code, this patch introduces a module
that configs can simply import and get access to a lot of useful
functionality such as setting up paths, adding features that are
useful across all projects, and other utility-type functions.
For now this only updates llvm's suite to use this new library,
but subsequent patches will update other projects.
Differential Revision: https://reviews.llvm.org/D37778
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313325
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Alina Sbirlea [Fri, 15 Sep 2017 00:04:16 +0000 (00:04 +0000)]
Refactor collectChildrenInLoop to LoopUtils [NFC]
Summary: Move to LoopUtils method that collects all children of a node inside a loop.
Reviewers: majnemer, sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37870
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313322
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Sam Clegg [Thu, 14 Sep 2017 23:07:53 +0000 (23:07 +0000)]
[WebAssembly] Use a separate wasm data segment for each global symbol
This is stepping stone towards honoring -fdata-sections
and letting the assembler decide how many wasm data
segments to create.
Differential Revision: https://reviews.llvm.org/D37834
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313313
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Eric Beckmann [Thu, 14 Sep 2017 23:01:13 +0000 (23:01 +0000)]
Fix bug 34608 by moving private header out of public header.
WindowsManifestMerger.h should not include llvm/Config/config.h, since it is private. The include has been moved to the source instead.
Summary:
The checksums had already been placed in the IR, this patch allows
MCCodeView to actually write it out to an MCStreamer.
Move private config.h header dependency out of public header file.
Addresses Bug 34608
Subscribers: javed.absar, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D37863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313312
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Craig Topper [Thu, 14 Sep 2017 22:47:59 +0000 (22:47 +0000)]
[X86] Remove an unnecessary SmallVector from LowerBUILD_VECTOR.
I think this may have existed to convert from SDUse to SDValue, but it doesn't look like its needed now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313311
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Jan Sjodin [Thu, 14 Sep 2017 21:49:52 +0000 (21:49 +0000)]
Fix warnings in r313297.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313302
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Zachary Turner [Thu, 14 Sep 2017 21:32:13 +0000 (21:32 +0000)]
[lit] Fix some windows line endings that snuck in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313301
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Matt Arsenault [Thu, 14 Sep 2017 20:54:29 +0000 (20:54 +0000)]
AMDGPU: Fix violating constant bus restriction
You can't use madmk/madmk if it already uses an SGPR input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313298
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Jan Sjodin [Thu, 14 Sep 2017 20:53:51 +0000 (20:53 +0000)]
Add AddresSpace to PseudoSourceValue.
Differential Revision: https://reviews.llvm.org/D35089
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313297
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Krzysztof Parzyszek [Thu, 14 Sep 2017 20:44:20 +0000 (20:44 +0000)]
Subtarget support for parameterized register class information
Implement "checkFeatures" and emitting HW mode check code.
Differential Revision: https://reviews.llvm.org/D31959
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313295
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Guozhi Wei [Thu, 14 Sep 2017 19:20:02 +0000 (19:20 +0000)]
[TargetTransformInfo] Detect 0 latency instructions
For instructions that unlikely generate machine instructions, they should also have 0 latency.
Differential Revision: https://reviews.llvm.org/D37833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313288
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Benjamin Kramer [Thu, 14 Sep 2017 18:33:25 +0000 (18:33 +0000)]
Remove usages of deprecated std::unary_function and std::binary_function.
These are removed in C++17. We still have some users of
unary_function::argument_type, so just spell that typedef out. No
functionality change intended.
Note that many of the argument types are actually wrong :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313287
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Matt Arsenault [Thu, 14 Sep 2017 18:02:29 +0000 (18:02 +0000)]
AMDGPU: Fix assert on alloca of array of struct
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313282
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Simon Dardis [Thu, 14 Sep 2017 17:55:50 +0000 (17:55 +0000)]
[bpf] Fix test to always use little endian.
r313055 broke the big endian buildbots as the CHECK lines contained little
endian data but -triple bpf uses the host endian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313281
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Jonas Devlieghere [Thu, 14 Sep 2017 17:46:23 +0000 (17:46 +0000)]
[test] Fix TestDWARFDieRangeInfoIntersects
Fixes heap buffer overflow triggered in DWARF verifier, detected by ASAN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313280
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Matt Arsenault [Thu, 14 Sep 2017 17:37:40 +0000 (17:37 +0000)]
AMDGPU: Stop modifying SP in call sequences
Because the stack growth direction and addressing is done
in the same direction, modifying SP at the beginning of the
call sequence was incorrect. If we had a stack passed argument,
we would end up skipping that number of bytes before pushing
arguments, leaving unused/inconsistent space.
The callee creates fixed stack objects in its frame, so
the space necessary for these is already logically allocated
in the callee, so we just let the callee increment SP if
it really requires it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313279
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Dehao Chen [Thu, 14 Sep 2017 17:29:56 +0000 (17:29 +0000)]
Invoke GetInlineCost for legality check before inline functions in SampleProfileLoader.
Summary: SampleProfileLoader inlines hot functions if it is inlined in the profiled binary. However, the inline needs to be guarded by legality check, otherwise it could lead to correctness issues.
Reviewers: eraman, davidxl
Reviewed By: eraman
Subscribers: vitalybuka, sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D37779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313277
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Simon Dardis [Thu, 14 Sep 2017 17:27:53 +0000 (17:27 +0000)]
[mips] Implement the 'dext' aliases and it's disassembly alias.
The other members of the dext family of instructions (dextm, dextu) are
traditionally handled by the assembler selecting the right variant of
'dext' depending on the values of the position and size operands.
When these instructions are disassembled, rather than reporting the
actual instruction, an equivalent aliased form of 'dext' is generated
and is reported. This is to mimic the behaviour of binutils.
Reviewers: slthakur, nitesh.jain, atanasyan
Differential Revision: https://reviews.llvm.org/D34887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313276
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Adrian Prantl [Thu, 14 Sep 2017 17:27:03 +0000 (17:27 +0000)]
Adapt more testcases for llvm-dwarfdump changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313275
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Matt Arsenault [Thu, 14 Sep 2017 17:14:57 +0000 (17:14 +0000)]
AMDGPU: Make frame register caller preserved
Using SplitCSR for the frame register was very broken. Often
the copies in the prolog and epilog were optimized out, in addition
to them being inserted after the true prolog where the FP
was clobbered.
I have a hacky solution which works that continues to use
split CSR, but for now this is simpler and will get to working
programs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313274
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Krzysztof Parzyszek [Thu, 14 Sep 2017 17:08:26 +0000 (17:08 +0000)]
Silence warning about unused variable in release build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313273
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Adrian Prantl [Thu, 14 Sep 2017 17:01:53 +0000 (17:01 +0000)]
llvm-dwarfdump: support dumping static archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313272
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Krzysztof Parzyszek [Thu, 14 Sep 2017 16:56:21 +0000 (16:56 +0000)]
TableGen support for parameterized register class information
This replaces TableGen's type inference to operate on parameterized
types instead of MVTs, and as a consequence, some interfaces have
changed:
- Uses of MVTs are replaced by ValueTypeByHwMode.
- EEVT::TypeSet is replaced by TypeSetByHwMode.
This affects the way that types and type sets are printed, and the
tests relying on that have been updated.
There are certain users of the inferred types outside of TableGen
itself, namely FastISel and GlobalISel. For those users, the way
that the types are accessed have changed. For typical scenarios,
these replacements can be used:
- TreePatternNode::getType(ResNo) -> getSimpleType(ResNo)
- TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo)
- TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false)
For more information, please refer to the review page.
Differential Revision: https://reviews.llvm.org/D31951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313271
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Zachary Turner [Thu, 14 Sep 2017 16:47:58 +0000 (16:47 +0000)]
[lit] Force site configs to be run before source-tree configs
This patch simplifies LLVM's lit infrastructure by enforcing an ordering
that a site config is always run before a source-tree config.
A significant amount of the complexity from lit config files arises from
the fact that inside of a source-tree config file, we don't yet know if
the site config has been run. However it is *always* required to run
a site config first, because it passes various variables down through
CMake that the main config depends on. As a result, every config
file has to do a bunch of magic to try to reverse-engineer the location
of the site config file if they detect (heuristically) that the site
config file has not yet been run.
This patch solves the problem by emitting a mapping from source tree
config file to binary tree site config file in llvm-lit.py. Then, during
discovery when we find a config file, we check to see if we have a
target mapping for it, and if so we use that instead.
This mechanism is generic enough that it does not affect external users
of lit. They will just not have a config mapping defined, and everything
will work as normal.
On the other hand, for us it allows us to make many simplifications:
* We are guaranteed that a site config will be executed first
* Inside of a main config, we no longer have to assume that attributes
might not be present and use getattr everywhere.
* We no longer have to pass parameters such as --param llvm_site_config=<path>
on the command line.
* It is future-proof, meaning you don't have to edit llvm-lit.in to add
support for new projects.
* All of the duplicated logic of trying various fallback mechanisms of
finding a site config from the main config are now gone.
One potentially noteworthy thing that was required to implement this
change is that whereas the ninja check targets previously used the first
method to spawn lit, they now use the second. In particular, you can no
longer run lit.py against the source tree while specifying the various
`foo_site_config=<path>` parameters. Instead, you need to run
llvm-lit.py.
Differential Revision: https://reviews.llvm.org/D37756
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313270
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Benjamin Kramer [Thu, 14 Sep 2017 16:30:31 +0000 (16:30 +0000)]
[tblgen] Remove uses of std::ptr_fun, it's removed in C++17.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313269
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Krzysztof Parzyszek [Thu, 14 Sep 2017 15:53:11 +0000 (15:53 +0000)]
[IfConversion] More simple, correct dead/kill liveness handling
Patch by Jesper Antonsson.
Differential Revision: https://reviews.llvm.org/D37611
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313268
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Simon Dardis [Thu, 14 Sep 2017 15:17:50 +0000 (15:17 +0000)]
[mips] Implement the 'dins' aliases.
Traditionally GAS has provided automatic selection between dins, dinsm and
dinsu. Binutils also disassembles all instructions in that family as 'dins'
rather than the actual instruction.
Reviewers: slthakur
Differential Revision: https://reviews.llvm.org/D34877
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313267
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Sanjay Patel [Thu, 14 Sep 2017 14:59:07 +0000 (14:59 +0000)]
[InstSimplify] fold sdiv/srem based on compare of dividend and divisor
This should bring signed div/rem analysis up to the same level as unsigned.
We use icmp simplification to determine when the divisor is known greater than the dividend.
Each positive test is followed by a negative test to show that we're not overstepping the boundaries of the known bits.
There are extra tests for the signed-min-value special cases.
Alive proofs:
http://rise4fun.com/Alive/WI5
Differential Revision: https://reviews.llvm.org/D37713
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313264
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Chad Rosier [Thu, 14 Sep 2017 14:48:59 +0000 (14:48 +0000)]
Add newline to end of test file. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313263
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Aleksandar Beserminji [Thu, 14 Sep 2017 14:34:04 +0000 (14:34 +0000)]
Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313262
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Sanjay Patel [Thu, 14 Sep 2017 14:09:11 +0000 (14:09 +0000)]
[InstSimplify] clean up div/rem handling; NFCI
The idea to make an 'isDivZero' helper was suggested for the signed case in D37713:
https://reviews.llvm.org/D37713
This clean-up makes it clear that D37713 is just filling the gap for signed div/rem,
removes unnecessary code, and allows us to remove a bit of duplicated code from the
planned improvement in D37713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313261
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Simon Pilgrim [Thu, 14 Sep 2017 13:00:27 +0000 (13:00 +0000)]
[X86] Regenerate test. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313259
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Simon Pilgrim [Thu, 14 Sep 2017 12:41:19 +0000 (12:41 +0000)]
Regenerate test (broadcast comment). NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313258
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Krzysztof Parzyszek [Thu, 14 Sep 2017 12:06:40 +0000 (12:06 +0000)]
[Hexagon] Make getMemAccessSize return size in bytes
It used to return the actual field value from the instruction descriptor.
There is no reason for that, that value is not interesting in any way and
the specifics of its encoding in the descriptor should not be exposed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313257
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Ayman Musa [Thu, 14 Sep 2017 12:06:38 +0000 (12:06 +0000)]
[X86] When applying the shuffle-to-zero-extend transformation on floating point, bitcast to integer first.
Fix issue described in PR34577.
Differential Revision: https://reviews.llvm.org/D37803
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313256
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Jonas Devlieghere [Thu, 14 Sep 2017 11:33:42 +0000 (11:33 +0000)]
[dwarfdump] Add DWARF verifiers for address ranges
This patch started as an attempt to rebase Greg's differential (D32821).
The result is both quite similar and different at the same time. It adds
the following checks:
- Verify that all address ranges in a DIE are valid.
- Verify that no ranges within the DIE overlap.
- Verify that no ranges overlap with the ranges of a sibling.
- Verify that children are completely contained in its (direct)
parent's address range. (unless both are subprograms)
Differential revision: https://reviews.llvm.org/D37696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313255
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Simon Dardis [Thu, 14 Sep 2017 10:58:00 +0000 (10:58 +0000)]
[mips] Pick the right variant of DINS upfront and enable target instruction verification
This patch complements D16810 "[mips] Make isel select the correct DEXT variant
up front.". Now ISel picks the right variant of DINS, so now there is no need
to replace DINS with the appropriate variant during
MipsMCCodeEmitter::encodeInstruction().
This patch also enables target specific instruction verification for ins, dins,
dinsm, dinsu, ext, dext, dextm, dextu. These instructions have constraints that
are checked when generating MipsISD::Ins and MipsISD::Ext nodes, but these
constraints are not checked during instruction selection. Adding machine
verification should catch outstanding cases.
Finally, correct a bug that instruction verification uncovered, where the
position operand of a DINSU generated during lowering was being silently
and accidently corrected to the correct value.
Reviewers: slthakur
Differential Revision: https://reviews.llvm.org/D34809
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313254
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Jonas Devlieghere [Thu, 14 Sep 2017 10:49:15 +0000 (10:49 +0000)]
Revert "[dwarfdump] Add DWARF verifiers for address ranges"
This reverts commit r313250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313253
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Simon Pilgrim [Thu, 14 Sep 2017 10:38:30 +0000 (10:38 +0000)]
[DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)
We already have a combine for this pattern when the input to shl is add, so we just need to enable the transformation when the input is or.
Original patch by @tstellar
Differential Revision: https://reviews.llvm.org/D19325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313251
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Jonas Devlieghere [Thu, 14 Sep 2017 10:38:18 +0000 (10:38 +0000)]
[dwarfdump] Add DWARF verifiers for address ranges
This patch started as an attempt to rebase Greg's differential (D32821).
The result is both quite similar and different at the same time. It adds
the following checks:
- Verify that all address ranges in a DIE are valid.
- Verify that no ranges within the DIE overlap.
- Verify that no ranges overlap with the ranges of a sibling.
- Verify that children are completely contained in its (direct)
parent's address range. (unless both are subprograms)
Differential revision: https://reviews.llvm.org/D37696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313250
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Simon Pilgrim [Thu, 14 Sep 2017 10:30:54 +0000 (10:30 +0000)]
Fix line endings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313247
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Simon Pilgrim [Thu, 14 Sep 2017 10:30:22 +0000 (10:30 +0000)]
Fix line endings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313246
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Simon Pilgrim [Thu, 14 Sep 2017 10:28:01 +0000 (10:28 +0000)]
[SelectionDAG] ComputeNumSignBits - cleanup ROTL/ROTR wrapping to match DAGCombine etc.
Use RotAmt.urem(VTBits) instead of AND(RotAmt, VTBits - 1)
TBH I don't expect non-power-of-2 types to be created, but it makes the logic clearer and matches what we do in other rotation combines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313245
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Dean Michael Berris [Thu, 14 Sep 2017 09:58:25 +0000 (09:58 +0000)]
[XRay][DebugInfo] Update the test to use a specific target
Follow-up to D37791.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313243
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Chandler Carruth [Thu, 14 Sep 2017 08:33:57 +0000 (08:33 +0000)]
[PM/CGSCC] Teach the CGSCC pass manager components to gracefully handle
invalidated SCCs even when we do not have an updated SCC to redirect
towards.
This comes up in a fairly subtle and surprising circumstance: we need to
have a connected but internal node in the call graph which later becomes
a disconnected island, and then gets deleted. All of this needs to
happen mid-CGSCC walk. Because it is disconnected, we have no way of
computing a new "current" SCC when it gets deleted. Instead, we need to
explicitly check for a deleted "current" SCC and bail out of the current
CGSCC step. This will bubble all the way up to the post-order walk and
then resume correctly.
I've included minimal tests for this bug. The specific behavior
matches something we've seen in the wild with the new PM combined with
ThinLTO and sample PGO, but I've not yet confirmed whether this is the
only issue there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313242
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Dean Michael Berris [Thu, 14 Sep 2017 07:54:54 +0000 (07:54 +0000)]
[XRay][DebugInfo] Remove -debug-compile from test invocation of llc
This breaks bootstrap builds, and is actually unnecessary. Tested
locally and it seems we can remove -debug-comile just fine.
Follow-up to D37791.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313238
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Alon Kom [Thu, 14 Sep 2017 07:40:02 +0000 (07:40 +0000)]
[LV] Fix maximum legal VF calculation
This patch fixes pr34283, which exposed that the computation of
maximum legal width for vectorization was wrong, because it relied
on MaxInterleaveFactor to obtain the maximum stride used in the loop,
however not all strided accesses in the loop have an interleave-group
associated with them.
Instead of recording the maximum stride in the loop, which can be over
conservative (e.g. if the access with the maximum stride is not involved
in the dependence limitation), this patch tracks the actual maximum legal
width imposed by accesses that are involved in dependencies.
Differential Revision: https://reviews.llvm.org/D37507
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313237
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George Rimar [Thu, 14 Sep 2017 07:32:52 +0000 (07:32 +0000)]
Recommit r313234 "[llvm-readobj] - Refactor printGroupSections methods."
With fix in formatting for GNU style output.
Original commit message:
This refactors GNUStyle<ELFT>::printGroupSections and
LLVMStyle<ELFT>::printGroupSections to split out all
duplicated code.
After the change these methods just prints the data provided
by introduced getGroups in a corresponding LLVM/GNU format.
Differential revision: https://reviews.llvm.org/D37621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313236
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George Rimar [Thu, 14 Sep 2017 07:26:14 +0000 (07:26 +0000)]
Revert r313234 "[llvm-readobj] - Refactor printGroupSections methods."
It broke BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313235
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George Rimar [Thu, 14 Sep 2017 07:17:04 +0000 (07:17 +0000)]
[llvm-readobj] - Refactor printGroupSections methods.
This refactors GNUStyle<ELFT>::printGroupSections and
LLVMStyle<ELFT>::printGroupSections to split out all
duplicated code.
After the change these methods just prints the data provided
by introduced getGroups in a corresponding LLVM/GNU format.
Differential revision: https://reviews.llvm.org/D37621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313234
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Dean Michael Berris [Thu, 14 Sep 2017 07:08:23 +0000 (07:08 +0000)]
[XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map
Summary:
XRay had been assuming that the previous section is the "text" section
of the function when lowering the instrumentation map. Unfortunately
this is not a safe assumption, because we may be coming from lowering
debug type information for the function being lowered.
This fixes an issue with combining -gsplit-dwarf, -generate-type-units,
-debug-compile and -fxray-instrument for sole member functions. When the
split dwarf section is stripped, we're left with references from the
xray_instr_map to the debug section. The change now uses the function's
symbol instead of the previous section's start symbol.
We found the bug while attempting to strip the split debug sections off
an XRay-instrumented object file, which had a peculiar edge-case for
single-function classes where the single function is being lowered.
Because XRay had assocaited the instrumentation map for a function to
the debug types section instead of the function's section, the objcopy
call will fail due to the misplaced reference from the xray_instr_map
section.
Reviewers: pcc, dblaikie, echristo
Subscribers: llvm-commits, aprantl
Differential Revision: https://reviews.llvm.org/D37791
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313233
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Simon Atanasyan [Thu, 14 Sep 2017 06:50:05 +0000 (06:50 +0000)]
[mips] Recognise the triple used by Debian for MIPS n32 ABI
Triples like mips64-linux-gnuabin32 are documented in this article:
https://wiki.debian.org/Multiarch/Tuples
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313231
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Vitaly Buka [Thu, 14 Sep 2017 05:40:33 +0000 (05:40 +0000)]
Revert "Invoke GetInlineCost for legality check before inline functions in SampleProfileLoader."
Patch introduced uninitialized value.
This reverts commit r313195.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313230
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Peter Collingbourne [Thu, 14 Sep 2017 05:02:59 +0000 (05:02 +0000)]
Reland r313157, "ThinLTO: Correctly follow aliasee references when dead stripping." which was reverted in r313222.
This reland includes a fix for the LowerTypeTests pass so that it
looks past aliases when determining which type identifiers are live.
Differential Revision: https://reviews.llvm.org/D37842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313229
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Dinar Temirbulatov [Thu, 14 Sep 2017 04:28:35 +0000 (04:28 +0000)]
[SLPVectorizer] Prefer auto over explicit type for VL0, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313228
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Hans Wennborg [Thu, 14 Sep 2017 00:40:14 +0000 (00:40 +0000)]
Revert r313157 "ThinLTO: Correctly follow aliasee references when dead stripping."
This broke Chromium's CFI build; see crbug.com/765004.
> We were previously handling aliases during dead stripping by adding
> the aliased global's "original name" GUID to the worklist. This will
> lead to incorrect behaviour if the global has local linkage because
> the original name GUID will not correspond to the global's GUID in
> the summary.
>
> Because an alias is just another name for the global that it
> references, there is no need to mark the referenced global as used,
> or to follow references from any other copies of the global. So all
> we need to do is to follow references from the aliasee's summary
> instead of the alias.
>
> Differential Revision: https://reviews.llvm.org/D37789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313222
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Hiroshi Yamauchi [Thu, 14 Sep 2017 00:20:25 +0000 (00:20 +0000)]
Add optional profile counts to block frequency dump.
Summary:
Print profile counts as the third value in addition to the existing 'float' and
the 'int' values in the textual block frequency dump, if available.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D37835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313220
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NAKAMURA Takumi [Thu, 14 Sep 2017 00:03:23 +0000 (00:03 +0000)]
Move llvm/test/CodeGen/X86/clear-liverange-spillreg.mir to SystemZ. It was in wrong place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313218
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Matt Arsenault [Wed, 13 Sep 2017 23:47:01 +0000 (23:47 +0000)]
AMDGPU: Don't spill SP reg like a normal CSR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313217
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Reid Kleckner [Wed, 13 Sep 2017 23:30:01 +0000 (23:30 +0000)]
[codeview] Fold FIXME into comment, there's nothing to do. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313214
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Hans Wennborg [Wed, 13 Sep 2017 23:23:09 +0000 (23:23 +0000)]
Revert r312719 "[MachineCombiner] Update instruction depths incrementally for large BBs."
This caused PR34596.
> [MachineCombiner] Update instruction depths incrementally for large BBs.
>
> Summary:
> For large basic blocks with lots of combinable instructions, the
> MachineTraceMetrics computations in MachineCombiner can dominate the compile
> time, as computing the trace information is quadratic in the number of
> instructions in a BB and it's relevant successors/predecessors.
>
> In most cases, knowing the instruction depth should be enough to make
> combination decisions. As we already iterate over all instructions in a basic
> block, the instruction depth can be computed incrementally. This reduces the
> cost of machine-combine drastically in cases where lots of instructions
> are combined. The major drawback is that AFAIK, computing the critical path
> length cannot be done incrementally. Therefore we only compute
> instruction depths incrementally, for basic blocks with more
> instructions than inc_threshold. The -machine-combiner-inc-threshold
> option can be used to set the threshold and allows for easier
> experimenting and checking if using incremental updates for all basic
> blocks has any impact on the performance.
>
> Reviewers: sanjoy, Gerolf, MatzeB, efriedma, fhahn
>
> Reviewed By: fhahn
>
> Subscribers: kiranchandramohan, javed.absar, efriedma, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D36619
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313213
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Adrian Prantl [Wed, 13 Sep 2017 23:16:13 +0000 (23:16 +0000)]
Use MemoryBufferRef. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313212
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Adrian Prantl [Wed, 13 Sep 2017 23:07:24 +0000 (23:07 +0000)]
Factor out duplicate code from llvm-dwarfdump (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313211
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Adrian Prantl [Wed, 13 Sep 2017 22:30:43 +0000 (22:30 +0000)]
Update testcase that was XFAILed on Darwin for llvm-dwarfdump change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313209
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Stanislav Mekhanoshin [Wed, 13 Sep 2017 22:20:47 +0000 (22:20 +0000)]
Allow target to decide when to cluster loads/stores in misched
MachineScheduler when clustering loads or stores checks if base
pointers point to the same memory. This check is done through
comparison of base registers of two memory instructions. This
works fine when instructions have separate offset operand. If
they require a full calculated pointer such instructions can
never be clustered according to such logic.
Changed shouldClusterMemOps to accept base registers as well and
let it decide what to do about it.
Differential Revision: https://reviews.llvm.org/D37698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313208
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Adrian Prantl [Wed, 13 Sep 2017 22:09:01 +0000 (22:09 +0000)]
llvm-dwarfdump: automatically dump both regular and .dwo variant of sections
Since users typically don't really care about the .dwo / non.dwo
distinction, this patch makes it so dwarfdump --debug-<info,...> dumps
.debug_info and (if available) also .debug_info.dwo. This simplifies
the command line interface (I've removed all dwo-specific dump
options) and makes the tool friendlier to use.
Differential Revision: https://reviews.llvm.org/D37771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313207
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Matt Arsenault [Wed, 13 Sep 2017 21:55:52 +0000 (21:55 +0000)]
AMDGPU: Handle coldcc in more places
Missed in r312936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313205
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Reid Kleckner [Wed, 13 Sep 2017 21:54:20 +0000 (21:54 +0000)]
[codeview] VLAs and unsized arrays should use a size of zero
Previously we used a size of '1' for VLAs because we weren't sure what
MSVC did. However, MSVC does support declaring an array without a size,
for which it emits an array type with a size of zero. Clang emits the
same DI metadata for VLAs and arrays without bound, so we would describe
arrays without bound as having one element. This lead to Microsoft
debuggers only printing a single element.
Emitting a size of zero appears to cause these debuggers to search the
symbol information to find a definition of the variable with accurate
array bounds.
Fixes http://crbug.com/763580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313203
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Dehao Chen [Wed, 13 Sep 2017 21:49:36 +0000 (21:49 +0000)]
Update the early_inline test to explicitly add attribute for all functions. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313202
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