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Alina Sbirlea [Fri, 12 Apr 2019 21:58:52 +0000 (21:58 +0000)]
[MemorySSA] Add previous def to cache when found, even if trivial.
Summary:
When inserting a new Def, MemorySSA may be have non-minimal number of Phis.
While inserting, the walk to find the previous definition may cleanup minimal Phis.
When the last definition is trivial to obtain, we do not cache it.
It is possible while getting the previous definition for a Def to get two different answers:
- one that was straight-forward to find when walking the first path (a trivial phi in this case), and
- another that follows a cleanup of the trivial phi, it determines it may need additional Phi nodes, it inserts them and returns a new phi in the same position as the former trivial one.
While the Phis added for the second path are all redundant, they are not complete (the walk is only done upwards), and they are not properly cleaned up afterwards.
A way to fix this problem is to cache the straight-forward answer we got on the first walk.
The caching is only kept for the duration of a getPreviousDef call, and for Phis we use TrackingVH, so removing the trivial phi will lead to replacing it with the next dominating phi in the cache.
Resolves PR40749.
Reviewers: george.burgess.iv
Subscribers: jlebar, Prazek, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60634
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358313
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Amara Emerson [Fri, 12 Apr 2019 21:31:21 +0000 (21:31 +0000)]
[AArch64][GlobalISel] Fix a crash when selecting shufflevectors with an undef mask element.
If a shufflevector's mask vector has an element with "undef" then the generic
instruction defining that element register is a G_IMPLICT_DEF instead of G_CONSTANT.
This fixes the selector to handle this case, and for now assumes that undef just means
zero. In future we'll optimize this case properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358312
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Thomas Lively [Fri, 12 Apr 2019 20:39:53 +0000 (20:39 +0000)]
[WebAssembly] Add mutable-globals to bleeding-edge CPU
Summary: This brings the backend in line with Clang.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358310
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Nikita Popov [Fri, 12 Apr 2019 19:36:47 +0000 (19:36 +0000)]
[ConstantRange] Clarify makeGuaranteedNoWrapRegion() guarantees; NFC
makeGuaranteedNoWrapRegion() is actually makeExactNoWrapRegion() as
long as only one of NUW or NSW is specified. This is not obvious from
the current documentation, and some code seems to think that it is
only exact for single-element ranges. Clarify docs and add tests to
be more confident this really holds.
There are currently no users of makeGuaranteedNoWrapRegion() that
pass both NUW and NSW. I think it would be best to drop support for
this entirely and then rename the function to makeExactNoWrapRegion().
Knowing that the no-wrap region is exact is useful, because we can
backwards-constrain values. What I have in mind in particular is
that LVI should be able to constrain values on edges where the
with.overflow overflow flag is false.
Differential Revision: https://reviews.llvm.org/D60598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358305
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Alina Sbirlea [Fri, 12 Apr 2019 19:16:07 +0000 (19:16 +0000)]
[SCEV] Add option to forget everything in SCEV.
Summary:
Create a method to forget everything in SCEV.
Add a cl::opt and PassManagerBuilder option to use this in LoopUnroll.
Motivation: Certain Halide applications spend a very long time compiling in forgetLoop, and prefer to forget everything and rebuild SCEV from scratch.
Sample difference in compile time reduction: 21.04 to 14.78 using current ToT release build.
Testcase showcasing this cannot be opensourced and is fairly large.
The option disabled by default, but it may be desirable to enable by
default. Evidence in favor (two difference runs on different days/ToT state):
File Before (s) After (s)
clang-9.bc 7267.91 6639.14
llvm-as.bc 194.12 194.12
llvm-dis.bc 62.50 62.50
opt.bc 1855.85 1857.53
File Before (s) After (s)
clang-9.bc 8588.70 7812.83
llvm-as.bc 196.20 194.78
llvm-dis.bc 61.55 61.97
opt.bc 1739.78 1886.26
Reviewers: sanjoy
Subscribers: mehdi_amini, jlebar, zzheng, javed.absar, dmgreen, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60144
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358304
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Alina Sbirlea [Fri, 12 Apr 2019 18:48:46 +0000 (18:48 +0000)]
[MemorySSA] Small fix for the clobber limit.
Summary:
After introducing the limit for clobber walking, `walkToPhiOrClobber` would assert that the limit is at least 1 on entry.
The test included triggered that assert.
The callsite in `tryOptimizePhi` making the calls to `walkToPhiOrClobber` is structured like this:
```
while (true) {
if (getBlockingAccess()) { // calls walkToPhiOrClobber
}
for (...) {
walkToPhiOrClobber();
}
}
```
The cleanest fix is to check if the limit was reached inside `walkToPhiOrClobber`, and give an allowence of 1.
This approach not make any alias() calls (no calls to instructionClobbersQuery), so the performance condition is enforced.
The limit is set back to 0 if not used, as this provides info on the fact that we stopped before reaching a true clobber.
Reviewers: george.burgess.iv
Subscribers: jlebar, Prazek, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60479
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358303
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Philip Reames [Fri, 12 Apr 2019 18:26:56 +0000 (18:26 +0000)]
[InstCombine] Fix a nasty miscompile introduced w/masked.gather demanded elts
This fixes a miscompile which was introduced in r356510 (https://reviews.llvm.org/D57372).
The problem is that the original patch removed pointer operands where the load results we're demanded, but without considering the legality of the load itself. If the masked.gather had active, but undemanded, lanes, then we could end up creating a load which loaded from an undef address. The result could be a segfault, or, in theory, an arbitrary read from a random memory location into an used register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358299
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Nikita Popov [Fri, 12 Apr 2019 18:18:17 +0000 (18:18 +0000)]
[CVP] Set NSW/NUW flags when simplifying with.overflow
When CVP determines that a with.overflow intrinsic cannot overflow,
it currently inserts a simple add/sub. As we already determined that
there can be no overflow, we should add the appropriate NUW/NSW flag.
Differential Revision: https://reviews.llvm.org/D60585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358298
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Nikita Popov [Fri, 12 Apr 2019 18:18:08 +0000 (18:18 +0000)]
[KnownBits] Add computeForAddCarry()
This is for D60460. computeForAddSub() essentially already supports
carries because it has to deal with subtractions. This revision
extracts a lower-level computeForAddCarry() function, which allows
computing the known bits for add (carry known zero), sub (carry known
one) and addcarry (carry unknown).
As we don't seem to have any yet, I've added a unit test file for
KnownBits and exhaustive tests for the new computeForAddCarry()
functionality, as well the existing computeForAddSub() function.
Differential Revision: https://reviews.llvm.org/D60522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358297
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Philip Reames [Fri, 12 Apr 2019 18:11:58 +0000 (18:11 +0000)]
[Tests] Checkin a test demonstrating a miscompile so that patch which fixes it shows a clear diff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358296
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Lang Hames [Fri, 12 Apr 2019 18:07:28 +0000 (18:07 +0000)]
Simplify decoupling between RuntimeDyld/RuntimeDyldChecker, add 'got_addr' util.
This patch reduces the number of functions in the interface between RuntimeDyld
and RuntimeDyldChecker by combining "GetXAddress" and "GetXContent" functions
into "GetXInfo" functions that return a struct describing both the address and
content. The GetStubOffset function is also replaced with a pair of utilities,
GetStubInfo and GetGOTInfo, that fit the new scheme. For RuntimeDyld both of
these functions will return the same result, but for the new JITLink linker
(https://reviews.llvm.org/D58704) these will provide the addresses of PLT stubs
and GOT entries respectively.
For JITLink's use, a 'got_addr' utility has been added to the rtdyld-check
language, and the syntax of 'got_addr' and 'stub_addr' has been changed: both
functions now take two arguments, a 'stub container name' and a target symbol
name. For llvm-rtdyld/RuntimeDyld the stub container name is the object file
name and section name, separated by a slash. E.g.:
rtdyld-check: *{8}(stub_addr(foo.o/__text, y)) = y
For the upcoming llvm-jitlink utility, which creates stubs on a per-file basis
rather than a per-section basis, the container name is just the file name. E.g.:
jitlink-check: *{8}(got_addr(foo.o, y)) = y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358295
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Brendon Cahoon [Fri, 12 Apr 2019 16:37:12 +0000 (16:37 +0000)]
[Hexagon] Fix reuse bug in Vector Loop Carried Reuse pass
The Hexagon Vector Loop Carried Reuse pass was allowing reuse between
two shufflevectors with different masks. The reason is that the masks
are not instruction objects, so the code that checks each operand
just skipped over the operands.
This patch fixes the bug by checking if the operands are the same
when they are not instruction objects. If the objects are not the
same, then the code assumes that reuse cannot occur.
Differential Revision: https://reviews.llvm.org/D60019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358292
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Sanjay Patel [Fri, 12 Apr 2019 16:31:56 +0000 (16:31 +0000)]
[DAGCombiner] narrow shuffle of concatenated vectors
// shuffle (concat X, undef), (concat Y, undef), Mask -->
// concat (shuffle X, Y, Mask0), (shuffle X, Y, Mask1)
The ARM changes with 'vtrn' and narrowed 'vuzp' are improvements.
The x86 changes look neutral or better. There's one test with an
extra instruction, but that could be reversed for a subtarget with
the right attributes. But by default, we want to avoid the 256-bit
op when possible (in my motivating benchmark, a handful of ymm ops
sprinkled into a sequence of xmm ops are triggering frequency
throttling on Haswell resulting in significantly worse perf).
Differential Revision: https://reviews.llvm.org/D60545
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358291
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Zachary Turner [Fri, 12 Apr 2019 15:51:40 +0000 (15:51 +0000)]
[PDB Docs] Add some prose describing public and global symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358289
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Hiroshi Yamauchi [Fri, 12 Apr 2019 15:05:46 +0000 (15:05 +0000)]
Add options for MaxLoadsPerMemcmp(OptSize).
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358287
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Simon Pilgrim [Fri, 12 Apr 2019 14:22:57 +0000 (14:22 +0000)]
[X86][SSE] Recognise vXi1 boolean anyof/allof reduction patterns
Currently combineHorizontalPredicateResult only handles anyof/allof reduction patterns of legal types, which can be tricky to match as type legalization of bools can introduce bitcasts/truncs/extensions.
This patch extends combineHorizontalPredicateResult to recognise vXi1 bool reductions as well and uses the existing combineBitcastvxi1 helper to create the MOVMSK necessary to then compare the signmask result.
This ensures the accuracy of the reduction costs added in D60403 which assume the MOVMSK generation.
Differential Revision: https://reviews.llvm.org/D60610
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358286
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Hans Wennborg [Fri, 12 Apr 2019 12:54:52 +0000 (12:54 +0000)]
Revert r358268 "[DebugInfo] DW_OP_deref_size in PrologEpilogInserter."
It causes clang to crash while building Chromium. See https://crbug.com/952230
for reproducer.
> The PrologEpilogInserter need to insert a DW_OP_deref_size before
> prepending a memory location expression to an already implicit
> expression to avoid having the existing expression act on the memory
> address instead of the value behind it.
>
> The reason for using DW_OP_deref_size and not plain DW_OP_deref is that
> big-endian targets need to read the right size as simply truncating a
> larger read would yield the wrong result (LSB bytes are not at the lower
> address).
>
> Differential Revision: https://reviews.llvm.org/D59687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358281
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Eugene Leviant [Fri, 12 Apr 2019 11:59:30 +0000 (11:59 +0000)]
[llvm-objcopy] Fill .symtab_shndx section correctly
Differential revision: https://reviews.llvm.org/D60555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358278
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Fangrui Song [Fri, 12 Apr 2019 11:31:16 +0000 (11:31 +0000)]
Use llvm::upper_bound. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358277
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Kang Zhang [Fri, 12 Apr 2019 09:59:40 +0000 (09:59 +0000)]
[PowerPC] Add initialization for some ppc passes
Summary:
Some llc debug options need pass-name as the parameters.
But if we use the pass-name ppc-early-ret, we will get below error:
llc test.ll -stop-after ppc-early-ret
LLVM ERROR: "ppc-early-ret" pass is not registered.
Below pass-names have the pass is not registered error:
ppc-ctr-loops
ppc-ctr-loops-verify
ppc-loop-preinc-prep
ppc-toc-reg-deps
ppc-vsx-copy
ppc-early-ret
ppc-vsx-fma-mutate
ppc-vsx-swaps
ppc-reduce-cr-ops
ppc-qpx-load-splat
ppc-branch-coalescing
ppc-branch-select
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D60248
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358271
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Jeremy Morse [Fri, 12 Apr 2019 09:47:35 +0000 (09:47 +0000)]
[DebugInfo] Fix pr41175 Dead Store Elimination missing debug loc
Bug: https://bugs.llvm.org/show_bug.cgi?id=41175
In the bug test case the DSE pass is shortening the range of memory that a
memset is working on. A getelementptr is generated so that the new
starting address can be passed to memset. This instruction was not given
a DebugLoc.
To fix the bug, copy the DebugLoc from the memset instruction.
Patch by Orlando Cazalet-Hyams!
Differential Revision: https://reviews.llvm.org/D60556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358270
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Markus Lavin [Fri, 12 Apr 2019 08:23:55 +0000 (08:23 +0000)]
[DebugInfo] DW_OP_deref_size in PrologEpilogInserter.
The PrologEpilogInserter need to insert a DW_OP_deref_size before
prepending a memory location expression to an already implicit
expression to avoid having the existing expression act on the memory
address instead of the value behind it.
The reason for using DW_OP_deref_size and not plain DW_OP_deref is that
big-endian targets need to read the right size as simply truncating a
larger read would yield the wrong result (LSB bytes are not at the lower
address).
Differential Revision: https://reviews.llvm.org/D59687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358268
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Hans Wennborg [Fri, 12 Apr 2019 08:23:28 +0000 (08:23 +0000)]
Fix missing arguments in tutorial
In tutorial "8. Kaleidoscope: Compiling to Object Code" a call to
TargetMachine->addPassesToEmitFile(pass, dest, FileType) is missing
nullptr as its 3rd value.
Patch by Sajjad Heydari!
Differential revision: https://reviews.llvm.org/D60369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358267
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Eric Christopher [Fri, 12 Apr 2019 07:42:35 +0000 (07:42 +0000)]
Move getNumFrameInfos and getDwarfFrameInfos out of line and remove
the MCDwarf.h include.
This removes 50 transitive dependencies for a modification of
MCDwarf.h in a build of llc for a pair of out of line functions
and reduces the build overhead of 'touch MCDwarf.h" by 15% without
impacting test time of check-llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358264
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Eric Christopher [Fri, 12 Apr 2019 07:40:01 +0000 (07:40 +0000)]
Add explicit dependencies on MCSection.h and MCDwarf.h to the .cpp
files rather than rely on transitive includes from MCStreamer.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358263
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Fangrui Song [Fri, 12 Apr 2019 07:34:30 +0000 (07:34 +0000)]
[ConstantFold] Don't evaluate FP or FP vector casts or truncations when simplifying icmp
Fix PR41476
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358262
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Eric Christopher [Fri, 12 Apr 2019 07:16:58 +0000 (07:16 +0000)]
Revert "[PowerPC] Add initialization for some ppc passes"
This reverts commit
6f8f98ce8de7c0e4ebd7fa2e1fd9507fe8d1c317 as it
is breaking nearly every bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358260
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Xing GUO [Fri, 12 Apr 2019 07:09:41 +0000 (07:09 +0000)]
[llvm-readobj] Change variables' name to match LLVM-style. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358259
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Eric Christopher [Fri, 12 Apr 2019 06:57:45 +0000 (06:57 +0000)]
Move addInitialFrameState out of line and remove the MCDwarf.h include.
This removes 50 transitive dependencies for a modification of
MCDwarf.h in a build of llc for a single out of line function
and reduces the build overhead by 20% without impacting test
time of check-llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358258
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Craig Topper [Fri, 12 Apr 2019 06:49:28 +0000 (06:49 +0000)]
[TargetLowering][X86] Teach SimplifyDemandedBits to use ShrinkDemandedOp on ISD::SHL nodes.
If the upper bits of the SHL result aren't used, we might be able to use a narrower shift. For example, on X86 this can turn a 64-bit into 32-bit enabling a smaller encoding.
Differential Revision: https://reviews.llvm.org/D60358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358257
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Kang Zhang [Fri, 12 Apr 2019 06:35:15 +0000 (06:35 +0000)]
[PowerPC] Add initialization for some ppc passes
Summary:
Some llc debug options need pass-name as the parameters.
But if we use the pass-name ppc-early-ret, we will get below error:
llc test.ll -stop-after ppc-early-ret
LLVM ERROR: "ppc-early-ret" pass is not registered.
Below pass-names have the pass is not registered error:
ppc-ctr-loops
ppc-ctr-loops-verify
ppc-loop-preinc-prep
ppc-toc-reg-deps
ppc-vsx-copy
ppc-early-ret
ppc-vsx-fma-mutate
ppc-vsx-swaps
ppc-reduce-cr-ops
ppc-qpx-load-splat
ppc-branch-coalescing
ppc-branch-select
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D60248
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358256
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Eric Christopher [Fri, 12 Apr 2019 06:31:59 +0000 (06:31 +0000)]
Move addFrameInst out of line and remove the MCDwarf.h include.
This removes 500 transitive dependencies for a modification of
MCDwarf.h in a build of llc for a single out of line function
and reduces the build overhead by more than half without impacting
test time of check-llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358255
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Eric Christopher [Fri, 12 Apr 2019 06:16:33 +0000 (06:16 +0000)]
Include what's used in a few cpp files - these were getting transitive
includes from MCDwarf.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358254
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Zi Xuan Wu [Fri, 12 Apr 2019 05:21:31 +0000 (05:21 +0000)]
[PowerPC] More precise exploitation of P9 maddld instruction when operands are constant
There are 3 operands of maddld, (add (mul %1, %2), %3) and sometimes
they are constant. If there is constant operand, it takes extra li to
materialize the operand, and one more extra register too. So it's not
profitable to use maddld to optimize mul-add pattern.
Differential Revision: https://reviews.llvm.org/D60181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358253
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Fangrui Song [Fri, 12 Apr 2019 04:55:10 +0000 (04:55 +0000)]
MCDwarfLineTableheader::tryGetFile : replace a loop with llvm::find
Note, `DirIndex++` below is incorrect for DWARF 5, but it can be fixed
later after the file index is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358251
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Eric Christopher [Fri, 12 Apr 2019 03:49:13 +0000 (03:49 +0000)]
Move a couple of optional references to just optional to make the
forwarding APIs look similar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358250
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Fangrui Song [Fri, 12 Apr 2019 02:16:15 +0000 (02:16 +0000)]
[MC] Fix typo: .symtab_shndxr -> .symtab_shndx
This special section is named .symtab_shndx, according to gABI Chapter 4
Sections, and the name is used by some other tools. Though the section
type SHT_SYMTAB_SHNDX is what really matters, let's fix the typo
introduced in rL204769 :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358247
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Fangrui Song [Fri, 12 Apr 2019 02:02:06 +0000 (02:02 +0000)]
Use llvm::lower_bound. NFC
This reapplies rL358161. That commit inadvertently reverted an exegesis file to an old version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358246
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Eric Christopher [Fri, 12 Apr 2019 01:02:02 +0000 (01:02 +0000)]
Remove a parameter that was being passed around that we had at the
local callsite.
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358244
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Nico Weber [Thu, 11 Apr 2019 23:23:00 +0000 (23:23 +0000)]
llvm-undname: Use UNREACHABLE after exhaustive switch returning everywhere
No behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358241
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Nico Weber [Thu, 11 Apr 2019 23:20:18 +0000 (23:20 +0000)]
llvm-undname: Name a bool param, no behavior change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358240
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Nico Weber [Thu, 11 Apr 2019 23:11:33 +0000 (23:11 +0000)]
llvm-undname: Fix out-of-bounds read on invalid intrinsic function code
Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358239
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Nico Weber [Thu, 11 Apr 2019 22:59:25 +0000 (22:59 +0000)]
llvm-undname: Don't crash on incomplete enum tag manglings
Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358238
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Nico Weber [Thu, 11 Apr 2019 22:47:18 +0000 (22:47 +0000)]
llvm-undname: Fix crash on incomplete virtual this adjusts
Found by oss-fuzz.
Also remove an else-after-return, this part has no behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358237
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Nick Desaulniers [Thu, 11 Apr 2019 22:47:13 +0000 (22:47 +0000)]
[X86AsmPrinter] refactor static functions into private methods. NFC
Summary:
A lot of the code for printing special cases of operands in this
translation unit are static functions. While I too have suffered many
years of abuse at the hands of C, we should prefer private methods,
particularly when you start passing around *this as your first argument,
which is a code smell.
This will help make generic vs arch specific asm printing easier, as it
brings X86AsmPrinter more in line with other arch's derived AsmPrinters.
We will then be able to more easily move architecture generic code to
the base class, and architecture specific code to the derived classes.
Some other small refactorings while we're here:
- the parameter Op is now consistently OpNo
- add spaces around binary expressions. I know we're not millionaires
but c'mon.
Reviewers: echristo
Reviewed By: echristo
Subscribers: smeenai, hiraditya, llvm-commits, srhines, craig.topper
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60577
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358236
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Nico Weber [Thu, 11 Apr 2019 22:23:35 +0000 (22:23 +0000)]
llvm-undname: Fix crash on invalid name in a template parameter pointer to member arg
Found by oss-fuzz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358234
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Brendon Cahoon [Thu, 11 Apr 2019 21:57:51 +0000 (21:57 +0000)]
[Pipeliner] Fix incorrect loop carried dependence calculation
The isLoopCarriedDep function does not correctly compute loop
carried dependences when the array index offset is negative
or the stride is smallar than the access size.
Patch by Denis Antrushin.
Differential Revision: https://reviews.llvm.org/D60135
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358233
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Nikita Popov [Thu, 11 Apr 2019 21:10:39 +0000 (21:10 +0000)]
[CVP] Generate full test checks for overflows.ll; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358229
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Nikita Popov [Thu, 11 Apr 2019 21:10:33 +0000 (21:10 +0000)]
[ConstantRange] Add unsignedMulMayOverflow()
Same as the other ConstantRange overflow checking methods, but for
unsigned mul. In this case there is no cheap overflow criterion, so
using umul_ov for the implementation.
Differential Revision: https://reviews.llvm.org/D60574
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358228
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Nikita Popov [Thu, 11 Apr 2019 21:10:19 +0000 (21:10 +0000)]
[ConstantRangeTest] Fix typos in test names; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358227
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Pengxuan Zheng [Thu, 11 Apr 2019 21:05:15 +0000 (21:05 +0000)]
[cmake] Fix dependency issue in TableGen
Summary:
There is a bug in add_tablegen which causes cmake to fail with the following
error message if LLVM_TABLEGEN is set.
CMake Error at cmake/modules/TableGen.cmake:147 (add_dependencies):
The dependency target "LLVM-tablegen-host" of target "CLANG-tablegen-host"
does not exist.
Call Stack (most recent call first):
tools/clang/utils/TableGen/CMakeLists.txt:3 (add_tablegen)
The issue happens because setting LLVM_TABLEGEN causes cmake to skip generating
the LLVM-tablegen-host target. As a result, a non-existent target was added for
CLANG-tablegen-host causing cmake to fail.
In order to fix this issue, this patch adds a guard to check the validity of the
dependency target before adding it as a dependency.
Reviewers: aganea, smeenai
Reviewed By: aganea
Subscribers: mgorny, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358226
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Rong Xu [Thu, 11 Apr 2019 20:54:17 +0000 (20:54 +0000)]
[PGO] Better handling of profile hash mismatch
We currently assume profile hash conflicts will be caught by an upfront
check and we assert for the cases that escape the check. The assumption
is not always true as there are chances of conflict. This patch prints
a warning and skips annotating the function for the escaped cases,.
Differential Revision: https://reviews.llvm.org/D60154
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358225
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Amara Emerson [Thu, 11 Apr 2019 20:40:01 +0000 (20:40 +0000)]
[AArch64][GlobalISel] Flesh out vector load/store support for more types.
Some of these were legalizing into smaller vector types unnecessarily,
others were simply not supported yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358223
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Amara Emerson [Thu, 11 Apr 2019 20:32:24 +0000 (20:32 +0000)]
[AArch64][GlobalISel] Legalization and ISel support for load/stores of vectors of pointers.
Loads and store of values with type like <2 x p0> currently don't get imported
because SelectionDAG has no knowledge of pointer types. To leverage the existing
support for vector load/stores, we can bitcast the value to have s64 element
types instead. We do this as a custom legalization.
This patch also adds support for general loads of <2 x s64>, and relaxes some
type conditions on selecting G_BITCAST.
Differential Revision: https://reviews.llvm.org/D60534
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358221
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Aaron Smith [Thu, 11 Apr 2019 20:25:10 +0000 (20:25 +0000)]
[DebugInfo] Combine Trivial and NonTrivial flags
Summary:
Companion to https://reviews.llvm.org/D59347
Reviewers: rnk, zturner, probinson, dblaikie, deadalnix
Subscribers: aprantl, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358220
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Craig Topper [Thu, 11 Apr 2019 19:57:44 +0000 (19:57 +0000)]
[X86] Restrict vselect handling in scalarizeExtEltFP to only case to pre type legalization where the setcc result type is vXi1.
If the vector setcc has been legalized then we will need to convert a vector boolean of 0 or -1 to a scalar boolean of 0 or 1.
The added test case previously crashed in 32-bit mode by creating a setcc with an i64 condition that type legalization couldn't expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358218
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Craig Topper [Thu, 11 Apr 2019 19:57:24 +0000 (19:57 +0000)]
[X86] Add 32-bit command line to extractelement-fp.ll so I can add a test case for a 32-bit only crasher. NFC
This is a bit ugly for ABI reasons about how floats/doubles are returned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358217
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Craig Topper [Thu, 11 Apr 2019 19:19:52 +0000 (19:19 +0000)]
[X86] Add patterns for using movss/movsd for atomic load/store of f32/64. Remove atomic fadd pseudos use isel patterns instead.
This patch adds patterns for turning bitcasted atomic load/store into movss/sd.
It also removes the pseudo instructions for atomic RMW fadd. Instead just adding isel patterns for folding an atomic load into addss/sd. And relying on the new movss/sd store pattern to handle the write part.
This also makes the fadd patterns use VEX and EVEX instructions when AVX or AVX512F are enabled.
Differential Revision: https://reviews.llvm.org/D60394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358215
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Craig Topper [Thu, 11 Apr 2019 19:19:42 +0000 (19:19 +0000)]
Recommit r358211 "[X86] Use FILD/FIST to implement i64 atomic load on 32-bit targets with X87, but no SSE2"
With correct test checks this time.
If we have X87, but not SSE2 we can atomicaly load an i64 value into the significand of an 80-bit extended precision x87 register using fild. We can then use a fist instruction to convert it back to an i64 integ
This matches what gcc and icc do for this case and removes an existing FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358214
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Craig Topper [Thu, 11 Apr 2019 19:04:38 +0000 (19:04 +0000)]
Revert r358211 "[X86] Use FILD/FIST to implement i64 atomic load on 32-bit targets with X87, but no SSE2"
I seem to have messed up the test checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358212
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Craig Topper [Thu, 11 Apr 2019 18:40:21 +0000 (18:40 +0000)]
[X86] Use FILD/FIST to implement i64 atomic load on 32-bit targets with X87, but no SSE2
If we have X87, but not SSE2 we can atomicaly load an i64 value into the significand of an 80-bit extended precision x87 register using fild. We can then use a fist instruction to convert it back to an i64 integer and store it to a stack temporary. From there we can do two 32-bit loads to get the value into integer registers without worrying about atomicness.
This matches what gcc and icc do for this case and removes an existing FIXME.
Differential Revision: https://reviews.llvm.org/D60156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358211
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Craig Topper [Thu, 11 Apr 2019 18:40:08 +0000 (18:40 +0000)]
[X86] Pre-commit i64 volatile test case for D60156. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358210
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Ali Tamur [Thu, 11 Apr 2019 17:35:20 +0000 (17:35 +0000)]
Revert "Use llvm::lower_bound. NFC"
This reverts commit rL358161.
This patch have broken the test:
llvm/test/tools/llvm-exegesis/X86/uops-CMOV16rm-noreg.s
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358199
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Zachary Turner [Thu, 11 Apr 2019 17:30:03 +0000 (17:30 +0000)]
Fix sphinx documentation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358198
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Zachary Turner [Thu, 11 Apr 2019 17:29:48 +0000 (17:29 +0000)]
[PDB Docs] Add skeleton of documentation for CodeView symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358197
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Kevin P. Neal [Thu, 11 Apr 2019 17:16:03 +0000 (17:16 +0000)]
New document skeleton describing how to add a constrained floating-point
intrinsic.
Reviewed by: andrew.w.kaylor, cameron.mcinally
Differential Revision: https://reviews.llvm.org/D59833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358194
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Simon Pilgrim [Thu, 11 Apr 2019 16:39:31 +0000 (16:39 +0000)]
[ConstantFold] ExtractConstantBytes - handle shifts on large integer types
Use APInt instead of getZExtValue from the ConstantInt until we can confirm that the shift amount is in range.
Reduced from OSS-Fuzz #14169 - https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=14169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358192
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Sanjay Patel [Thu, 11 Apr 2019 15:59:47 +0000 (15:59 +0000)]
[DAGCombiner] refactor narrowing of extracted vector binop; NFC
There's a TODO comment about handling patterns with insert_subvector,
and we do want to match that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358187
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Simon Pilgrim [Thu, 11 Apr 2019 15:29:15 +0000 (15:29 +0000)]
[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask support
Completes SimplifyDemandedVectorElts's basic variable shuffle mask support which should help D60512 + D60562
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358186
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Serge Guelton [Thu, 11 Apr 2019 15:22:48 +0000 (15:22 +0000)]
Make llvm-nm -help great again
Only display help from the llvm-nm category instead of all llvm options, which make it much more usable.
There's still an issue with -s, which is probably a bug in llvm::cl and worth another commit.
Differential Revision: https://reviews.llvm.org/D60411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358185
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Roger Ferrer Ibanez [Thu, 11 Apr 2019 15:13:12 +0000 (15:13 +0000)]
[RISCV] Diagnose invalid second input register operand when using %tprel_add
RISCVMCCodeEmitter::expandAddTPRel asserts that the second operand must be
x4/tp. As we are not currently checking this in the RISCVAsmParser, the assert
is easy to trigger due to wrong assembly input.
This patch does a late check of this constraint.
An alternative could be using a singleton register class for x4/tp similar to
the current one for sp. Unfortunately it does not result in a good diagnostic.
Because add is an overloaded mnemonic, if no matching is possible, the
diagnostic of the first failing alternative seems to be used as the diagnostic
itself. This means that this case the %tprel_add is diagnosed as an invalid
operand (because the real add instruction only has 3 operands).
Differential Revision: https://reviews.llvm.org/D60528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358183
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Simon Pilgrim [Thu, 11 Apr 2019 15:09:03 +0000 (15:09 +0000)]
[X86][AVX] Tweak X86ISD::VPERMV3 demandedelts test
Original test was too dependent on the order of the combines that could cause the inserted element being demanded after all
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358182
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Luo, Yuanke [Thu, 11 Apr 2019 15:01:03 +0000 (15:01 +0000)]
[X86] Add MM register mapping from CodeView to MC register id
Differential Revision: https://reviews.llvm.org/D60437
Change-Id: I2183a6d825d0284b22705d423b88882992b236c5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358179
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Michal Gorny [Thu, 11 Apr 2019 14:58:39 +0000 (14:58 +0000)]
[llvm] [lit] Add target-x86* features
Add a 'target-x86' and 'target-x86_64' feature sthat indicates that
the default target is 32-bit or 64-bit x86, appropriately. Combined
with 'native' feature, we're going to use this to control x86-specific
LLDB native process tests.
Differential Revision: https://reviews.llvm.org/D60474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358177
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Pavel Labath [Thu, 11 Apr 2019 14:57:34 +0000 (14:57 +0000)]
YAMLIO: Fix serialization of strings with embedded nuls
Summary:
A bug/typo in Output::scalarString caused us to round-trip a StringRef
through a const char *. This meant that any strings with embedded nuls
were unintentionally cut short at the first such character. (It also
could have caused accidental buffer overruns, but it seems that all
StringRefs coming into this functions were formed from null-terminated
strings.)
This patch fixes the bug and adds an appropriate test.
Reviewers: sammccall, jhenderson
Subscribers: kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358176
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Simon Pilgrim [Thu, 11 Apr 2019 14:48:46 +0000 (14:48 +0000)]
[X86][AVX] Add X86ISD::VPERMV3 demandedelts test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358175
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Simon Pilgrim [Thu, 11 Apr 2019 14:35:45 +0000 (14:35 +0000)]
[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV mask support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358174
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Simon Pilgrim [Thu, 11 Apr 2019 14:26:32 +0000 (14:26 +0000)]
[X86][AVX] Add X86ISD::VPERMV demandedelts test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358173
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Sanjay Patel [Thu, 11 Apr 2019 14:21:57 +0000 (14:21 +0000)]
[DAGCombiner][x86] scalarize inserted vector FP ops
// bo (build_vec ...undef, x, undef...), (build_vec ...undef, y, undef...) -->
// build_vec ...undef, (bo x, y), undef...
The lifetime of the nodes in these examples is different for variables versus constants,
but they are all build vectors briefly, so I'm proposing to catch them in this form to
handle all of the leading examples in the motivating test file.
Before we have build vectors, we might have insert_vector_element. After that, we might
have scalar_to_vector and constant pool loads.
It's going to take more work to ensure that FP vector operands are getting simplified
with undef elements, so this transform can apply more widely. In a non-loose FP environment,
we are likely simplifying FP elements to NaN values rather than undefs.
We also need to allow more opcodes down this path. Eg, we don't handle FP min/max flavors
yet.
Differential Revision: https://reviews.llvm.org/D60514
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358172
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Diogo N. Sampaio [Thu, 11 Apr 2019 14:19:43 +0000 (14:19 +0000)]
[AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
Summary: Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
Reviewers: pbarrio, DavidSpickett, LukeGeeson
Reviewed By: LukeGeeson
Subscribers: javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358171
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Simon Pilgrim [Thu, 11 Apr 2019 14:15:01 +0000 (14:15 +0000)]
[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMILPV mask support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358170
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Simon Pilgrim [Thu, 11 Apr 2019 14:09:35 +0000 (14:09 +0000)]
[X86][AVX] Add X86ISD::VPERMILPV demandedelts tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358168
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Simon Pilgrim [Thu, 11 Apr 2019 14:04:19 +0000 (14:04 +0000)]
[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMIL2 mask support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358167
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Simon Pilgrim [Thu, 11 Apr 2019 13:52:43 +0000 (13:52 +0000)]
[X86][XOP] Add X86ISD::VPERMIL2 demandedelts test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358166
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Simon Pilgrim [Thu, 11 Apr 2019 13:30:38 +0000 (13:30 +0000)]
[X86] SimplifyDemandedVectorElts - add VPPERM support
We need to add support for all variable shuffle mask ops, but VPPERM is the only one that already has test coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358165
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Sander de Smalen [Thu, 11 Apr 2019 13:02:19 +0000 (13:02 +0000)]
[ValueTracking] Change if-else chain into switch in computeKnownBitsFromAssume
This is a follow-up patch to D60504 to further improve
performance issues in computeKnownBitsFromAssume.
The patch is NFC, but may improve compile-time performance
if the compiler isn't clever enough to do the optimization
itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358163
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Oliver Stannard [Thu, 11 Apr 2019 12:53:33 +0000 (12:53 +0000)]
Test commit access
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358162
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Fangrui Song [Thu, 11 Apr 2019 10:25:41 +0000 (10:25 +0000)]
Use llvm::lower_bound. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358161
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Andrea Di Biagio [Thu, 11 Apr 2019 10:15:04 +0000 (10:15 +0000)]
[MCA] Remove wrong comments from a test. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358160
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Ilya Biryukov [Thu, 11 Apr 2019 09:00:36 +0000 (09:00 +0000)]
[ADT] Fix template parameter names of llvm::{upper|lower}_bound
Summary:
Rename template parameter for a search value from 'ForwardIt' to 'T'.
While here, also use perfect forwarding to pass the value to STL algos.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60510
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358158
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Hans Wennborg [Thu, 11 Apr 2019 07:46:25 +0000 (07:46 +0000)]
try to fix the sphinx build some more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358156
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Hans Wennborg [Thu, 11 Apr 2019 07:30:56 +0000 (07:30 +0000)]
Try to fix the shpinx build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358154
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Roman Lebedev [Thu, 11 Apr 2019 07:20:50 +0000 (07:20 +0000)]
[llvm-exegesis] Fix serialization/deserialization of special NoRegister register (PR41448)
Summary:
A *lot* of instructions have this special register.
It seems this never really worked, but i finally noticed it only
because it happened to break for `CMOV16rm` instruction.
We serialized that register as "" (empty string), which is naturally
'ignored' during deserialization, so we re-create a `MCInst` with
too few operands.
And when we then happened to try to resolve variant sched class
for this mis-serialized instruction, and the variant predicate
tried to read an operand that was out of bounds since we got less operands,
we crashed.
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=41448 | PR41448 ]].
Reviewers: craig.topper, courbet
Reviewed By: courbet
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60517
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358153
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Shiva Chen [Thu, 11 Apr 2019 04:59:13 +0000 (04:59 +0000)]
[RISCV] Put data smaller than eight bytes to small data section
Because of gp = sdata_start_address + 0x800, gp with signed twelve-bit offset
could covert most of the small data section. Linker relaxation could transfer
the multiple data accessing instructions to a gp base with signed twelve-bit
offset instruction.
Differential Revision: https://reviews.llvm.org/D57493
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358150
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Fangrui Song [Thu, 11 Apr 2019 02:02:44 +0000 (02:02 +0000)]
[DWARF] Set discriminator to 0 for DW_LNS_copy
Summary:
Make DW_LNS_copy set the discriminator register to 0, to conform to
DWARF 4 & 5: "Then it sets the discriminator register to 0, and sets the
basic_block, prologue_end and epilogue_begin registers to false."
Because all of DW_LNE_end_sequence, DN_LNS_copy, and special opcodes reset
discriminator to 0, we can move discriminator=0 to appendRowToMatrix.
Also, make DW_LNS_copy print before appending the row, as it is similar
to a address+=0,line+=0 special opcode, which prints before appending
the row.
Reviewers: dblaikie, probinson, aprantl
Reviewed By: dblaikie
Subscribers: danielcdh, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358148
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Erik Pilkington [Wed, 10 Apr 2019 23:42:11 +0000 (23:42 +0000)]
Fix a hang when lowering __builtin_dynamic_object_size
If the ObjectSizeOffsetEvaluator fails to fold the object size call, then it may
litter some unused instructions in the function. When done repeatably in
InstCombine, this results in an infinite loop. Fix this by tracking the set of
instructions that were inserted, then removing them on failure.
rdar://
49172227
Differential revision: https://reviews.llvm.org/D60298
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358146
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Amara Emerson [Wed, 10 Apr 2019 23:06:14 +0000 (23:06 +0000)]
[AArch64][GlobalISel] Make <2 x p0> = G_BUILD_VECTOR legal.
The existing isel support already works for p0 once the legalizer accepts it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358144
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Amara Emerson [Wed, 10 Apr 2019 23:06:11 +0000 (23:06 +0000)]
[AArch64][GlobalISel] Add legalizer support for <8 x s16> and <16 x s8> G_ADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358143
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Amara Emerson [Wed, 10 Apr 2019 23:06:08 +0000 (23:06 +0000)]
[AArch64][GlobalISel] Scalarize vector SDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358142
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Craig Topper [Wed, 10 Apr 2019 22:35:32 +0000 (22:35 +0000)]
[X86] Add SSE1 command line to atomic-fp.ll and atomic-non-integer.ll. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358141
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