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Craig Topper [Sat, 10 Feb 2018 17:58:56 +0000 (17:58 +0000)]
[X86] Remove some check-prefixes from avx512-cvt.ll to prepare for an upcoming patch.
The update script sometimes has trouble when there are check-prefixes representing every possible combination of feature flags. I have a patch where the update script was generating something that didn't pass lit.
This patch just removes some check-prefixes and expands out some of the checks to workaround this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324819
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Sanjay Patel [Sat, 10 Feb 2018 15:36:23 +0000 (15:36 +0000)]
[x86] preserve test intent by removing undef
D43141 proposes to correct undef folding in the DAG,
and this test would not survive that change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324817
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Sanjay Patel [Sat, 10 Feb 2018 15:28:08 +0000 (15:28 +0000)]
[x86] preserve test intent by removing undef
D43141 proposes to correct undef folding in the DAG,
and this test would not survive that change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324816
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Simon Pilgrim [Sat, 10 Feb 2018 15:14:00 +0000 (15:14 +0000)]
Fix Wdocumentation warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324815
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Sanjay Patel [Sat, 10 Feb 2018 15:14:00 +0000 (15:14 +0000)]
[ARM] preserve test intent by removing undef
D43141 proposes to correct undef folding in the DAG,
and this test would not survive that change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324814
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Simon Pilgrim [Sat, 10 Feb 2018 15:02:07 +0000 (15:02 +0000)]
Fix Wdocumentation warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324813
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Simon Pilgrim [Sat, 10 Feb 2018 14:45:58 +0000 (14:45 +0000)]
[X86][SSE] Regenerate old sitofp v2i32 test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324812
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Craig Topper [Sat, 10 Feb 2018 08:39:31 +0000 (08:39 +0000)]
[X86] Custom legalize (v2i1 (fp_to_uint/fp_to_sint v2f64)) without AVX512VL.
Strangely the code was already present, just the setOperationAction wasn't being called without VLX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324806
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Craig Topper [Sat, 10 Feb 2018 08:06:52 +0000 (08:06 +0000)]
[X86] Legalize zero extends from vXi1 to vXi16/vXi32/vXi64 using a sign extend and a shift.
This avoids a constant pool load to create 1.
The int->float are showing converts to mask and back. We probably need to widen inputs to sint_to_fp/uint_to_fp before type legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324805
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Craig Topper [Sat, 10 Feb 2018 08:06:49 +0000 (08:06 +0000)]
[X86] Teach combineExtSetcc to handle ZERO_EXTEND by widening the setcc and then masking. A later DAG combine will convert to a shift.
This helps to avoid a constant pool load needed to zero extend from the mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324804
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Fangrui Song [Sat, 10 Feb 2018 05:01:33 +0000 (05:01 +0000)]
[utils] Refactor utils/update_{,llc_}test_checks.py to share more code
Summary:
This revision refactors 1. parser 2. CHECK line adder of utils/update_{,llc_}test_checks.py
so that thir functionality can be re-used by other utility scripts (e.g. D42712)
Reviewers: asb, craig.topper, RKSimon, echristo
Subscribers: llvm-commits, spatel
Differential Revision: https://reviews.llvm.org/D42805
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324803
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Nirav Dave [Sat, 10 Feb 2018 02:41:22 +0000 (02:41 +0000)]
[DAG] Make early exit hasPredecessorHelper return true. NFCI.
All uses conservatively assume in early exit case that it will be a
predecessor. Changing default removes checking code in all uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324797
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Craig Topper [Sat, 10 Feb 2018 01:00:41 +0000 (01:00 +0000)]
[X86] Teach combineInsertSubvector how to combine some k-register insert_subvectors and extract_subvector sequences to remove extra zeroing.wq
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324791
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George Karpenkov [Sat, 10 Feb 2018 00:38:21 +0000 (00:38 +0000)]
Make LLVM timer reprintable: that is, make more than one print action on the same timer feasible
Currently, each LLVM timer can be only printed once, as the act of
printing clears the timer.
Moreover, the current printing mechanism implicitly assumes that the
timer is stopped -- and prints zero otherwise.
This patch relaxes this assumption and makes printing statistics
multiple time a possibility.
Differential Revision: https://reviews.llvm.org/D43136
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324788
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David Blaikie [Sat, 10 Feb 2018 00:14:54 +0000 (00:14 +0000)]
REQUIRES: shell a couple of tests that require the shell
One test uses diff, the other tries to change the PATH which doesn't
seem to work well ('not' is no longer accessible/found after the PATH is
changed - I think $PATH isn't expanded when setting PATH).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324787
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Mircea Trofin [Sat, 10 Feb 2018 00:07:45 +0000 (00:07 +0000)]
[LV] Fix analyzeInterleaving when -pass-remarks enabled
Summary:
If -pass-remarks=loop-vectorize, atomic ops will be seen by
analyzeInterleaving(), even though canVectorizeMemory() == false. This
is because we are requesting extra analysis instead of bailing out.
In such a case, we end up with a Group in both Load- and StoreGroups,
and then we'll try to access freed memory when traversing LoadGroups after having had released the Group when iterating over StoreGroups.
The fix is to include mayWriteToMemory() when validating that two
instructions are the same kind of memory operation.
Reviewers: mssimpso, davidxl
Reviewed By: davidxl
Subscribers: hsaito, fhahn, llvm-commits
Differential Revision: https://reviews.llvm.org/D43064
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324786
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Daniel Neilson [Fri, 9 Feb 2018 23:33:35 +0000 (23:33 +0000)]
[Hexagon] Update uses of deprecated IRBuilder CreateMemCpy/Move calls
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
Hexagon LoopIdiom pass to cease using the old IRBuilder createMemCpy/createMemMove
single-alignment APIs in favour of the new API that allows setting source and
destination alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774,
rL324781 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324784
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Alexander Shaposhnikov [Fri, 9 Feb 2018 23:33:31 +0000 (23:33 +0000)]
[llvm-objcopy] Make modifications in-place if output is not specified
If the output file is not specified make the modifications in-place
(like binutils objcopy does). In particular, this fixes
the behavior of Clang -gsplit-dwarf (if Clang is configured to use llvm-objcopy),
previously it was creating .dwo files, but still leaving *dwo* sections in
the original binary.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D42873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324783
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Craig Topper [Fri, 9 Feb 2018 23:32:27 +0000 (23:32 +0000)]
[X86] Teach lower1BitVectorShuffle to recognize shuffles that are just filling upper elements with zero. Replace with insert_subvector.
There's still some extra kshifts in one of the modified test cases here, but hopefully that's only a DAG combine away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324782
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Daniel Neilson [Fri, 9 Feb 2018 23:31:37 +0000 (23:31 +0000)]
[ARMFastISel] Replace deprecated calls to MemoryIntrinsic::getAlignment() (NFCI)
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes
ARMFastISel to cease using the old getAlignment() API of MemoryIntrinsic in favour of getting
source & dest specific alignments through the new API.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773, rL324774 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324781
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Justin Bogner [Fri, 9 Feb 2018 23:25:23 +0000 (23:25 +0000)]
CMake: Allow specifying arbitrary CCACHE parameters
Introduces the LLVM_CCACHE_PARAMS cmake variable, which can be used to
pass arbitrary parameters to ccache invocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324779
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Dan Gohman [Fri, 9 Feb 2018 23:13:22 +0000 (23:13 +0000)]
[WebAssembly] Add mechanisms for specifying an explicit import module name.
This adds a wasm-import-module function attribute and a .import_module
assembler directive, for specifying module import names for WebAssembly.
Currently these may only be used for function symbols; global variables
may be considered in the future.
WebAssembly has a two-level namespace scheme for symbols, and it's
normally the linker's job to assign the module name, which is the
first-level name. The attributes here allow users to specify their
own module names explicitly, which is useful for tools generating
bindings to modules defined in other languages.
This feature is not fully usable yet. It will evolve along with the
ongoing symbol table and lld changes.
Differential Revision: https://reviews.llvm.org/D42520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324778
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Dan Gohman [Fri, 9 Feb 2018 22:59:01 +0000 (22:59 +0000)]
[WebAssembly] Add an LLVM_FALLTHROUGH to address a warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324777
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Daniel Neilson [Fri, 9 Feb 2018 21:56:15 +0000 (21:56 +0000)]
[AMDGPUPromoteAlloca] Replace deprecated memory intrinsic APIs (NFCI)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
AMDGPUPromoteAlloca pass to cease using:
1) The old getAlignment() API of MemoryIntrinsic in favour of getting source & dest specific
alignments through the new API.
2) The old IRBuilder createMemCpy/createMemMove single-alignment APIs in favour of the new
API that allows setting source and destination alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, r323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654, rL324773 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324774
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Daniel Neilson [Fri, 9 Feb 2018 21:49:29 +0000 (21:49 +0000)]
[AArch64FastISel] Replace deprecated calls to MemoryIntrinsic::getAlignment() (NFCI)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes
AArch64FastISel to cease using the old getAlignment() API of MemoryIntrinsic in favour of getting
source & dest specific alignments through the new API.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, r323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653, rL324654 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324773
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Francis Visoiu Mistrih [Fri, 9 Feb 2018 21:47:07 +0000 (21:47 +0000)]
[X86][MC] Fix assembling rip-relative addressing + immediate displacements
In the rare case where the input contains rip-relative addressing with
immediate displacements, *and* the instruction ends with an immediate,
we encode the instruction in the wrong way:
movl $
12345678, 0x400(%rdi) // all good, no rip-relative addr
movl %eax, 0x400(%rip) // all good, no immediate at the end of the instruction
movl $
12345678, 0x400(%rip) // fails, encodes address as 0x3fc(%rip)
Offset is a label:
movl $
12345678, foo(%rip)
we want to account for the size of the immediate (in this case,
$
12345678, 4 bytes).
Offset is an immediate:
movl $
12345678, 0x400(%rip)
we should not account for the size of the immediate, assuming the
immediate offset is what the user wanted.
Differential Revision: https://reviews.llvm.org/D43050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324772
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Matt Davis [Fri, 9 Feb 2018 21:34:34 +0000 (21:34 +0000)]
[CodeGen] Add lifetime markers to the list of meta-instructions.
Summary:
Since the lifetime markers are metadata instructions, they should probably be treated as such by the isMetaInstruction predicate.
There was no issue that provoked this change, I just ran across it while investigating another issue.
Reviewers: aprantl, MatzeB
Reviewed By: aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43111
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324771
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Sam Clegg [Fri, 9 Feb 2018 20:21:50 +0000 (20:21 +0000)]
[WebAssebmly] Report undefined symbols correctly in objdump
Peviously we were reporting undefined symbol as being defined
by the IMPORT sections.
This change reports undefined symbols in the same that other
formats do, and also removes the need to store the section
with each symbol (since it can be derived from the symbol
type).
Differential Revision: https://reviews.llvm.org/D43101
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324770
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Francis Visoiu Mistrih [Fri, 9 Feb 2018 19:46:02 +0000 (19:46 +0000)]
[CodeGen] Print predecessors as MIR comments in -debug output
Make -debug MBB headers more copy-pastable into mir files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324769
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Kevin Enderby [Fri, 9 Feb 2018 19:31:27 +0000 (19:31 +0000)]
llvm-objdump when printing the Objective-C meta data also prints the Swift ABI
from the value stored in swift_version bits in the flags field in the
objc_image_info struct. ABI version 3 thru 6 were previously added but this
code was not updated to print the Swift version.
rdar://
35624067
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324767
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Evandro Menezes [Fri, 9 Feb 2018 19:26:11 +0000 (19:26 +0000)]
[AArch64] Adjust the cost model for Exynos M3
Fix the modeling of transfers between a generic register and a partial ASIMD
one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324766
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Vedant Kumar [Fri, 9 Feb 2018 19:19:55 +0000 (19:19 +0000)]
[Utils] Salvage debug info from dead 'or' instructions
Extend salvageDebugInfo to preserve the debug info from a dead 'or'
with a constant.
Patch by Ismail Badawi!
Differential Revision: https://reviews.llvm.org/D43129
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324764
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Krzysztof Parzyszek [Fri, 9 Feb 2018 19:10:46 +0000 (19:10 +0000)]
[Hexagon] Add code to select QTRUE and QFALSE
Fixes http://llvm.org/PR36320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324763
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Matt Arsenault [Fri, 9 Feb 2018 18:41:42 +0000 (18:41 +0000)]
Declare PostDominatorTree as a class
Before it was declared at a struct, which differs from
DominatorTree. Make it a class so both can be declared
the same way without hitting the warning about mismatched
struct vs. class declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324760
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Artem Belevich [Fri, 9 Feb 2018 18:37:55 +0000 (18:37 +0000)]
[tablegen] Fixed few !foreach evaluation issues.
* !foreach on lists didn't evaluate operands of the RHS operator.
This made nested operators silently fail.
* A typo in the code could result in a wrong value substituted
for an operation which produced a false '!foreach requires an operator' error.
* Keep recursion over the DAG within ForeachHelper. This simplifies
things a bit as we no longer need to pass the Type around in order
to prevent recursion.
Differential Revision: https://reviews.llvm.org/D43083
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324758
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Steven Wu [Fri, 9 Feb 2018 18:34:08 +0000 (18:34 +0000)]
[ThinLTO] Teach ThinLTO about auto hide symbols
Summary:
For symbols that has linkonce_odr linkage and unnamed_addr, it can be
auto hide by linker to avoid weak external symbols. Teach ThinLTO to
perform auto hide so it can safely promote linkonce_odr to weak symbols
without breaking this nice property.
Reviewers: tejohnson, mehdi_amini
Reviewed By: tejohnson
Subscribers: inglorion, eraman, rnk, pcc, llvm-commits
Differential Revision: https://reviews.llvm.org/D43130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324757
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Sanjay Patel [Fri, 9 Feb 2018 17:46:38 +0000 (17:46 +0000)]
[x86] remove duplicate undef tests; NFC
These are incomplete and were made redundant with the consolidation in:
https://reviews.llvm.org/rL324678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324754
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Simon Pilgrim [Fri, 9 Feb 2018 17:45:45 +0000 (17:45 +0000)]
[InstCombine] Add vector xor tests
This doesn't cover everything in InstCombiner.visitXor yet, but increases coverage for a lot of tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324753
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Matt Arsenault [Fri, 9 Feb 2018 17:18:38 +0000 (17:18 +0000)]
AMDGPU: Remove tied operand from si_else
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324751
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Rafael Espindola [Fri, 9 Feb 2018 17:13:37 +0000 (17:13 +0000)]
Emit smaller exception tables for non-SJLJ mode.
* Use uleb128 for code offsets in the LSDA call site table.
* Omit the TTBase offset if the type table is empty.
This change can reduce the size of the DWARF/Itanium LSDA by about half.
Patch by Ryan Prichard!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324750
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Rafael Espindola [Fri, 9 Feb 2018 17:00:25 +0000 (17:00 +0000)]
Use assembler expressions to lay out the EH LSDA.
Rely on the assembler to finalize the layout of the DWARF/Itanium
exception-handling LSDA. Rather than calculate the exact size of each
thing in the LSDA, use assembler directives:
To emit the offset to the TTBase label:
.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
To emit the size of the call site table:
.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
... call site table entries ...
.Lcst_end0:
To align the type info table:
... action table ...
.balign 4
.long _ZTIi
.long _ZTIl
.Lttbase0:
Using assembler directives simplifies the compiler and allows switching
the encoding of offsets in the call site table from udata4 to uleb128 for
a large code size savings. (This commit does not change the encoding.)
The combination of the uleb128 followed by a balign creates an unfortunate
dependency cycle that the assembler must sometimes resolve either by
padding an LEB or by inserting zero padding before the type table. See
PR35809 or GNU as bug 4029.
Patch by Ryan Prichard!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324749
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Matt Arsenault [Fri, 9 Feb 2018 16:57:57 +0000 (16:57 +0000)]
Reapply "AMDGPU: Add 32-bit constant address space"
This reverts r324494 and reapplies r324487.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324747
91177308-0d34-0410-b5e6-
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Matt Arsenault [Fri, 9 Feb 2018 16:57:48 +0000 (16:57 +0000)]
AMDGPU: Fix layering issue
Move utility function that depends on codegen.
Fixes build with r324487 reapplied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324746
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Evandro Menezes [Fri, 9 Feb 2018 16:14:41 +0000 (16:14 +0000)]
[AArch64] Refactor stand alone methods (NFC)
Make stand alone methods in AArch64InstrInfo static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324745
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David Blaikie [Fri, 9 Feb 2018 15:39:04 +0000 (15:39 +0000)]
Pre-emptively fix test case for windows path separators
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324740
91177308-0d34-0410-b5e6-
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David Blaikie [Fri, 9 Feb 2018 15:33:39 +0000 (15:33 +0000)]
Remove some unnecessary REQUIRES: shell from a couple of llvm-symbolizer tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324738
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Krzysztof Parzyszek [Fri, 9 Feb 2018 15:30:02 +0000 (15:30 +0000)]
[Hexagon] Express calling conventions via .td file instead of hand-coding
Additionally, simplify the rest of the argument/parameter lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324737
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Stefan Maksimovic [Fri, 9 Feb 2018 14:03:26 +0000 (14:03 +0000)]
[DebugInfo] Don't insert DEBUG_VALUE after terminators
r314974 introduced insertion of DEBUG_VALUEs after
each redefinition of debug value register in the slot index range.
In case the instruction redefining the debug value register
was a terminator, machine verifier would complain since it
enforces the rule of no non-terminator instructions
following the first terminator.
Differential Revision: https://reviews.llvm.org/D42801
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324734
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Stefan Maksimovic [Fri, 9 Feb 2018 13:55:25 +0000 (13:55 +0000)]
[SelectionDAG] Provide adequate register class for RegisterSDNode
When adding operands to machine instructions in case of
RegisterSDNodes, generate a COPY node in case the register class
does not match the one in the instruction definition.
Differental Revision: https://reviews.llvm.org/D35561
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324733
91177308-0d34-0410-b5e6-
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Oliver Stannard [Fri, 9 Feb 2018 13:34:39 +0000 (13:34 +0000)]
[ELF] Print the .type assembly directive correctly for STT_NOTYPE
The llvm assembly parser and gas both accept "@notype" in the .type
assembly directive, but we were printing it as "@no_type", which isn't
accepted by either assembler.
Differential revision: https://reviews.llvm.org/D43116
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324731
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Simon Dardis [Fri, 9 Feb 2018 10:46:16 +0000 (10:46 +0000)]
[mips] UnXFAIL gprestore.ll test.
Repurpose this previously XFAIL'd test to check that jalr uses $25
as per ABI requirements for PIC code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324729
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Simon Pilgrim [Fri, 9 Feb 2018 10:43:59 +0000 (10:43 +0000)]
[InstCombine] Add constant vector support for X udiv C, where C >= signbit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324728
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Clement Courbet [Fri, 9 Feb 2018 10:28:46 +0000 (10:28 +0000)]
[TargetSchedule] Fix r324582.
Increment was using the wrong NumUnits (the one from the ProcResGroup
and not the subunit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324727
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Pavel Labath [Fri, 9 Feb 2018 10:06:56 +0000 (10:06 +0000)]
[CodeGen] Optimize AccelTable
Summary:
The class contained arrays of two structures (DataArray and HashData).
These structures were in 1:1 correspondence, and one of them contained
pointers to the other (and *both* contained a "Name" field). By merging
these two structures into one, we can save a bit of space without
negatively impacting much of anything.
Reviewers: JDevlieghere, aprantl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324724
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Jonas Paulsson [Fri, 9 Feb 2018 09:22:20 +0000 (09:22 +0000)]
[AArch64] Return true in enableMultipleCopyHints().
Enable multiple COPY hints to eliminate more COPYs during register allocation.
Note that this is something all targets should do, see
https://reviews.llvm.org/D38128.
Review: Martin Storsjö
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324720
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Serguei Katkov [Fri, 9 Feb 2018 07:59:07 +0000 (07:59 +0000)]
Rename and move utility function getLatchPredicateForGuard. NFC.
Rename getLatchPredicateForGuard to more common name
getFlippedStrictnessPredicate and move it to ICmpInst class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324717
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Vedant Kumar [Fri, 9 Feb 2018 06:09:15 +0000 (06:09 +0000)]
[bugpoint] Report non-existent opt binary
Bugpoint will keep going even if the opt binary it's given doesn't
exist. It should at least alert the user, so it's clear why reductions
are failing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324713
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Stanislav Mekhanoshin [Fri, 9 Feb 2018 06:05:33 +0000 (06:05 +0000)]
[AMDGPU] More descriptive names in the memory legalizer
NFC.
Differential Revision: https://reviews.llvm.org/D43054
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324712
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Peter Collingbourne [Fri, 9 Feb 2018 05:58:55 +0000 (05:58 +0000)]
LTO: Include live bit in ThinLTO cache key.
As of r323633, this bit started controlling whether symbol definitions
appear in object files, and it also became sensitive to the prevailing
bit, so it needs to be included in the key.
Differential Revision: https://reviews.llvm.org/D43109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324711
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Craig Topper [Fri, 9 Feb 2018 05:54:36 +0000 (05:54 +0000)]
[X86] Simplify some code in lowerV4X128VectorShuffle and lowerV2X128VectorShuffle
Previously we extracted two subvectors and concatenate. But the concatenate will be lowered to two insert subvectors. Then DAG combine will merge once of the inserts and one of the extracts back into the original vector. We might as well just directly use one extract and one insert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324710
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Craig Topper [Fri, 9 Feb 2018 05:54:34 +0000 (05:54 +0000)]
[X86] Teach shuffle lowering to recognize 128/256 bit insertions into a zero vector.
This regresses a couple cases in the shuffle combining test. But those cases use intrinsics that InstCombine knows how to turn into a generic shuffle earlier. This should give opportunities to fold this earlier in InstCombine or DAG combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324709
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Craig Topper [Fri, 9 Feb 2018 05:54:31 +0000 (05:54 +0000)]
[X86] Add 512-bit shuffle test cases for concatenating 128/256-bits with zeros in the upper portion.
We should recognize this and just use a mov that will zero the upper bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324708
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Victor Leschuk [Fri, 9 Feb 2018 05:28:38 +0000 (05:28 +0000)]
[lit] Pass CLANG env var to testing configuration
Allow CLANG environment variable be copied into the testing configuration
and proper support testing with a custom path to the clang executable.
Signed-off-by: Vladimir Vereschaka <vvereschaka@accesssoftek.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324706
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Vedant Kumar [Fri, 9 Feb 2018 05:09:50 +0000 (05:09 +0000)]
[bugpoint] Simplify reducers which can fail verification, NFC
More unique_ptr-ification, ranged for loops, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324705
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Vedant Kumar [Fri, 9 Feb 2018 05:09:49 +0000 (05:09 +0000)]
[bugpoint] Delete a dead cl::opt (-child-output)
This option isn't used anywhere, as far as I can tell.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324704
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Vedant Kumar [Fri, 9 Feb 2018 05:09:48 +0000 (05:09 +0000)]
[bugpoint] Avoid noisy errors by passing a valid opt to tests
If the tests don't use the in-tree opt, we're liable to see some silly
error messages due to the version mismatch (missing flags, etc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324703
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David Blaikie [Fri, 9 Feb 2018 03:34:32 +0000 (03:34 +0000)]
DebugInfo/llvm-symbolizer: Test symbolizing Split DWARF without addresses in the skeleton CU
Identified in an llvm-dev discussion around
DWARFUnit::collectAddressRanges
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324702
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Lang Hames [Fri, 9 Feb 2018 02:30:40 +0000 (02:30 +0000)]
[ORC] Remove Layer handles from the layer concept.
Handles were returned by addModule and used as keys for removeModule,
findSymbolIn, and emitAndFinalize. Their job is now subsumed by VModuleKeys,
which simplify resource management by providing a consistent handle across all
layers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324700
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Douglas Yung [Fri, 9 Feb 2018 02:13:15 +0000 (02:13 +0000)]
Make test changes added in r324584 more robust by using a regex instead of hard coded MCInst numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324699
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Aditya Nandakumar [Fri, 9 Feb 2018 01:27:23 +0000 (01:27 +0000)]
[GISel]: Verify COPIES involving generic registers.
Add verification for copies involving generic registers if they are
compatible - ie if it is a generic copy, then the types are the
same, and if a COPY b/w generic and target virtual register, then
the sizes should be the same. Only checks if there are no sub registers
involved for now.
https://reviews.llvm.org/D37775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324696
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Francis Visoiu Mistrih [Fri, 9 Feb 2018 01:14:44 +0000 (01:14 +0000)]
[CodeGen] Unify the syntax of MBB liveins in MIR and -debug output
Instead of:
Live Ins: %r0 %r1
print:
liveins: %r0, %r1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324694
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Craig Topper [Fri, 9 Feb 2018 01:14:17 +0000 (01:14 +0000)]
[x86] Add test cases to demonstrate some dumb mask->gpr->mask transition sequences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324693
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Evgeniy Stepanov [Fri, 9 Feb 2018 00:59:10 +0000 (00:59 +0000)]
[hwasan] Fix kernel instrumentation of stack.
Summary:
Kernel addresses have 0xFF in the most significant byte.
A tag can not be pushed there with OR (tag << 56);
use AND ((tag << 56) | 0x00FF..FF) instead.
Reviewers: kcc, andreyknvl
Subscribers: srhines, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D42941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324691
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Francis Visoiu Mistrih [Fri, 9 Feb 2018 00:40:57 +0000 (00:40 +0000)]
[CodeGen] Don't compute BranchProbability for MBB::print
Avoid re-computing BP only to print successor probabilities in -debug
printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324690
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Francis Visoiu Mistrih [Fri, 9 Feb 2018 00:12:53 +0000 (00:12 +0000)]
[CodeGen] Only print successors when the list is not empty
Follow-up of r324685.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324686
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Francis Visoiu Mistrih [Fri, 9 Feb 2018 00:10:31 +0000 (00:10 +0000)]
[CodeGen] Unify the syntax of MBB successors in MIR and -debug output
Instead of:
Successors according to CFG: %bb.6(0x12492492 / 0x80000000 = 14.29%)
print:
successors: %bb.6(0x12492492); %bb.6(14.29%)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324685
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Francis Visoiu Mistrih [Thu, 8 Feb 2018 23:42:27 +0000 (23:42 +0000)]
[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::print
MBB.print wasn't printing it, but the MIRPrinter is printing it. The
goal is to unify that as much as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324681
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Jacques Pienaar [Thu, 8 Feb 2018 23:25:05 +0000 (23:25 +0000)]
[Lanai] Code model dictates section selection.
Always use the small section when the small code model is specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324679
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Sanjay Patel [Thu, 8 Feb 2018 23:21:44 +0000 (23:21 +0000)]
[x86] consolidate and add tests for undef binop folds; NFC
As was already shown in the div/rem tests and noted in PR36305,
the behavior is inconsistent, but it's not limited to div/rem only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324678
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Adrian Prantl [Thu, 8 Feb 2018 23:21:15 +0000 (23:21 +0000)]
Use a stable topological sort in DwarfCompileUnit::createScopeChildrenDIE()
This addresses review feedback for D42940. The topological sort is
slightly more expensive but it can now also detect cycles in the
dependencies and actually works correctly.
rdar://problem/
37217988
Differential Review: https://reviews.llvm.org/D43036
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324677
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Dmitry Mikulin [Thu, 8 Feb 2018 23:10:07 +0000 (23:10 +0000)]
Minor tweak to test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324670
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Paul Robinson [Thu, 8 Feb 2018 23:08:02 +0000 (23:08 +0000)]
[DWARFv5] Fix dumper to show the file table starts at index 0.
Emitting the correct (root of compilation) file at index 0 will be
posted for review later; I wanted to get this minor change out of the
way first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324669
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Matt Arsenault [Thu, 8 Feb 2018 22:46:41 +0000 (22:46 +0000)]
AMDGPU: Process SDWA block at a time
Right now this loops over the entire function every time there
is a change, which is not very efficient. There's no practical
reason to track this so globally, since the code motion optimization
passes should be sinking instructions with single uses and
the pass currently will not fold with multiple uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324667
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Matt Arsenault [Thu, 8 Feb 2018 22:46:38 +0000 (22:46 +0000)]
AMDGPU: Minor cleanups
Column limit, typo, unnecessary reference
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324666
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Alexander Ivchenko [Thu, 8 Feb 2018 22:41:47 +0000 (22:41 +0000)]
[GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775
The patch essentially makes sure that X86CallLowering adds proper
G_COPY/G_TRUNC and G_ANYEXT/G_COPY when we are doing lowering of
arguments/returns for floating point values passed on registers.
Tests are updated accordingly
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D42287
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324665
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Alexander Ivchenko [Thu, 8 Feb 2018 22:40:31 +0000 (22:40 +0000)]
[GlobalIsel][X86] Making {G_IMPLICIT_DEF, s128} legal
The patch is a split from D42287 and is related to
fixing failures after https://reviews.llvm.org/D37775
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D42287
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324664
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Craig Topper [Thu, 8 Feb 2018 22:26:39 +0000 (22:26 +0000)]
[X86] Improve combineCastedMaskArithmetic to fold (bitcast (vXi1 (and/or/xor X, C)))->(vXi1 (and/or/xor (bitcast X), (bitcast C)) where C is a constant build_vector.
Most vxi1 constant build vectors have to be implemented in the scalar domain anyway so we'll probably end up with a cast there later. But by then its too late to do the combine to get rid of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324662
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Craig Topper [Thu, 8 Feb 2018 22:26:36 +0000 (22:26 +0000)]
[X86] Add DAG combine to constant fold a bitcast of a vXi1 constant build_vector into a scalar integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324661
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Justin Bogner [Thu, 8 Feb 2018 22:19:00 +0000 (22:19 +0000)]
CMake: Explicitly #undef LLVM_REVISION rather than using a blank file
Including a blank file is confusing and makes it look like something
went wrong. Rather than requiring people know why this is blank, let's
just make it explicitly #undef the macro that it would define if it
weren't empty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324659
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Dmitry Mikulin [Thu, 8 Feb 2018 22:14:56 +0000 (22:14 +0000)]
[ThinLTO] Skip BlockAddresses while replacing uses in function import.
Differential Revision: https://reviews.llvm.org/D43027
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324658
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Paul Robinson [Thu, 8 Feb 2018 22:09:17 +0000 (22:09 +0000)]
Parameterize a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324657
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Daniel Neilson [Thu, 8 Feb 2018 21:28:26 +0000 (21:28 +0000)]
[DSan] Update uses of memory intrinsic get/setAlignment to new API (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
DataFlowSanitizer pass to cease using the old get/setAlignment() API of MemoryIntrinsic
in favour of getting source & dest specific alignments through the new API.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642, rL324653 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324654
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Daniel Neilson [Thu, 8 Feb 2018 21:26:12 +0000 (21:26 +0000)]
[ASan] Update uses of IRBuilder::CreateMemCpy to new API (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
AddressSanitizer pass to cease using The old IRBuilder CreateMemCpy single-alignment API
in favour of the new API that allows setting source and destination alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626, rL324642 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324653
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Vedant Kumar [Thu, 8 Feb 2018 20:27:35 +0000 (20:27 +0000)]
Revert "WIP: [DAGCombiner] Assert that debug info is preserved"
This reverts commit r324648. It was committed accidentally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324650
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Vedant Kumar [Thu, 8 Feb 2018 20:27:09 +0000 (20:27 +0000)]
[bugpoint] Simplify the global initializer reducer, NFC
Fix the comments, use early exits, use unique_ptr, and use ranged for
loops.
This is in preparation for a global *variable* reducer, which, with any
luck will help us clean up test cases.
Differential Revision: https://reviews.llvm.org/D43084
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324649
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Vedant Kumar [Thu, 8 Feb 2018 20:27:09 +0000 (20:27 +0000)]
WIP: [DAGCombiner] Assert that debug info is preserved
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324648
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Craig Topper [Thu, 8 Feb 2018 20:16:06 +0000 (20:16 +0000)]
[X86] Remove kortest intrinsics and replace with native IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324646
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David Woodhouse [Thu, 8 Feb 2018 20:06:05 +0000 (20:06 +0000)]
[X86] Support 'V' register operand modifier
This allows the register name to be printed without the leading '%'.
This can be used for emitting calls to the retpoline thunks from inline
asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324645
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David Blaikie [Thu, 8 Feb 2018 19:57:05 +0000 (19:57 +0000)]
Fix missing field initializer warning in TableGen SubtargetEmitter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324643
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Daniel Neilson [Thu, 8 Feb 2018 19:46:12 +0000 (19:46 +0000)]
[MSan] Update uses of IRBuilder::CreateMemCpy to new API (NFC)
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
MemorySanitizer pass to cease using the old IRBuilder CreateMemCpy single-alignment APIs
in favour of the new API that allows setting source and destination alignments independently.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886, rL323891, rL324148, rL324273, rL324278,
rL324384, rL324395, rL324402, rL324626 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324642
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