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Johan Hovold [Thu, 10 Nov 2022 10:35:57 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp-x13s: enable modem
Enable the modem connected to the PCIe3a M.2 connector.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-9-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:56 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD
Enable the NVMe SSD connected to PCIe2.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-8-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:55 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp-crd: enable WiFi controller
Enable the Qualcomm QCNFA765 Wireless Network Adapter connected to
PCIe4.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-7-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:54 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem
Enable the SDX55 modem connected to PCIe3.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-6-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:53 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD
Enable the NVMe SSD connected to PCIe2.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-5-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:52 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators
Rename the backlight and misc regulators according to the net names.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-4-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:51 +0000 (11:35 +0100)]
arm64: dts: qcom: sa8295p-adp: enable PCIe
The SA8295P-ADP has up to four PCIe interfaces implemented by three or
four controllers: PCIe2A, PCIe3A/PCIe3B and PCIe4.
PCIe2 is used in x4 mode, while PCIe3 can be used in either x2 or x4
mode. Enable both PCIe3A and PCI3B in x2 mode for now.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-3-johan+linaro@kernel.org
Johan Hovold [Thu, 10 Nov 2022 10:35:50 +0000 (11:35 +0100)]
arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes
The SC8280XP platform has seven PCIe controllers:
PCIe0 USB4
PCIe1 USB4
PCIe2A 4-lane
PCIe2B 2-lane
PCIe3A 4-lane
PCIe3B 2-lane
PCIe4 1-lane
while SA8540P only has five (PCIe2-4).
Add devicetree nodes for the PCIe2-4 controllers and their PHYs.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110103558.12690-2-johan+linaro@kernel.org
Richard Acayan [Fri, 11 Nov 2022 00:18:19 +0000 (19:18 -0500)]
arm64: dts: qcom: add sdm670 and pixel 3a device trees
The Qualcomm Snapdragon 670 has been out for a while. Add a device tree
for it and the Google Pixel 3a as the first device.
The Pixel 3a has the same bootloader issue as the Pixel 3 and will not work
on Android 10 bootloaders or later until it gets fixed for the Pixel 3.
SoC Initial Features:
- power management
- clocks
- pinctrl
- eMMC
- USB 2.0
- GENI I2C
- IOMMU
- RPMh
- interrupts
Device-Specific Initial Features:
- side buttons (keys)
- regulators
- touchscreen
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111001818.124901-5-mailingradian@gmail.com
Sibi Sankar [Thu, 10 Nov 2022 07:08:13 +0000 (12:38 +0530)]
arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment
The Google Herobrine WIFI SKU can save 256M by not having modem/mba/rmtfs
memory regions defined. Add the dts fragment and mark all the board files
appropriately.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110070813.1777-2-quic_sibis@quicinc.com
Sibi Sankar [Thu, 10 Nov 2022 07:08:12 +0000 (12:38 +0530)]
arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE
When the modem node was re-located to a separate LTE source file
"sc7280-herobrine-lte-sku.dtsi", some of the previous LTE users
weren't marked appropriately. Fix this by marking all Qualcomm
reference devices as LTE.
Suggested-by: Douglas Anderson <dianders@chromium.org>
Fixes:
d42fae738f3a ("arm64: dts: qcom: Add LTE SKUs for sc7280-villager family")
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110070813.1777-1-quic_sibis@quicinc.com
Luca Weiss [Thu, 10 Nov 2022 15:15:06 +0000 (16:15 +0100)]
arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card
Fairphone 4 uses sdhc_2 for the SD card, configure the pins for it and
enable it.
The regulators which are exclusively used for SDHCI have their maximum
voltage decreased to what downstream sets on the consumer side, like on
many other platforms and allowed to set the load.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110151507.53650-1-luca.weiss@fairphone.com
Krzysztof Kozlowski [Thu, 10 Nov 2022 15:27:41 +0000 (16:27 +0100)]
arm64: dts: qcom: sm8450: drop incorrect spi-max-frequency
spi-max-frequency is a property of SPI device, not the controller:
qcom/sm8450-hdk.dtb: geniqup@8c0000: spi@880000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221110152741.542024-1-krzysztof.kozlowski@linaro.org
Bjorn Andersson [Sat, 30 Jul 2022 19:36:17 +0000 (12:36 -0700)]
arm64: dts: qcom: sc8280xp-x13s: Add LID switch
Add gpio-keys for exposing the LID switch state.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220730193617.1688563-1-bjorn.andersson@linaro.org
Krzysztof Kozlowski [Tue, 8 Nov 2022 14:23:57 +0000 (15:23 +0100)]
arm64: dts: qcom: ipq8074: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221108142357.67202-2-krzysztof.kozlowski@linaro.org
Srinivasa Rao Mandadapu [Tue, 8 Nov 2022 14:46:02 +0000 (20:16 +0530)]
arm64: dts: qcom: sc7280: Remove redundant soundwire property
Remove redundant and undocumented property qcom,port-offset in
soundwire controller nodes.
This patch is required to avoid dtbs_check errors with
qcom,soundwire.yaml
Fixes:
12ef689f09ab ("arm64: dts: qcom: sc7280: Add nodes for soundwire and va tx rx digital macro codecs")
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-4-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Tue, 8 Nov 2022 14:46:01 +0000 (20:16 +0530)]
arm64: dts: qcom: sm8250: Remove redundant soundwire property
Remove redundant and undocumented property qcom,port-offset in
soundwire controller nodes.
This patch is required to avoid dtbs_check errors with
qcom,soundwire.yaml
Fixes:
24f52ef0c4bf ("arm64: dts: qcom: sm8250: Add nodes for tx and rx macros with soundwire masters")
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-3-git-send-email-quic_srivasam@quicinc.com
Srinivasa Rao Mandadapu [Tue, 8 Nov 2022 14:46:00 +0000 (20:16 +0530)]
arm64: dts: qcom: Update soundwire secondary node names
Update soundwire secondary nodes of WSA speaker to match with
dt-bindings pattern properties regular expression.
This modification is required to avoid dtbs-check errors
occurred with qcom,soundwire.yaml.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Signed-off-by: Ratna Deepthi Kudaravalli <quic_rkudarav@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1667918763-32445-2-git-send-email-quic_srivasam@quicinc.com
Alex Elder [Tue, 8 Nov 2022 20:16:25 +0000 (14:16 -0600)]
arm64: dts: qcom: sc7280-idp: don't modify &ipa twice
In "sc7280-idp.dts", the IPA node is modified after being defined.
However that file includes "sc7280-idp.dtsi", which also modifies
the IPA node (in the same way). This only needs to be done in
"sc7280-idp.dtsi".
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221108201625.1220919-1-elder@linaro.org
Maulik Shah [Tue, 18 Oct 2022 15:28:34 +0000 (17:28 +0200)]
arm64: dts: qcom: Add power-domains property for apps_rsc
Add power-domains property which allows apps_rsc device to attach
to cluster power domain on sm8150, sm8250, sm8350 and sm8450.
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # SM8450
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018152837.619426-4-ulf.hansson@linaro.org
Dmitry Baryshkov [Wed, 2 Nov 2022 18:44:10 +0000 (21:44 +0300)]
arm64: dts: qcom: msm8996: change order of SMMU clocks on this platform
Change order of SMMU clocks to match the schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102184420.534094-2-dmitry.baryshkov@linaro.org
Job Noorman [Mon, 7 Nov 2022 10:56:04 +0000 (11:56 +0100)]
arm64: dts: qcom: sdm632: fairphone-fp3: add touchscreen
Add Himax hx83112b touchscreen to the FP3 DT.
Signed-off-by: Job Noorman <job@noorman.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107105604.26541-4-job@noorman.info
Konrad Dybcio [Mon, 7 Nov 2022 12:09:19 +0000 (13:09 +0100)]
arm64: dts: qcom: Add device tree for Sony Xperia 10 IV
Add support for Sony Xperia 10 IV, a.k.a PDX225. This device is a part
of the SoMC SM6375 Murray platform and currently it is the only
device based on that board, so no -common DTSI is created until (if?)
other Murray devices appear.
This commit brings support for:
* USB (only USB2 for now)
* Display via simplefb
To create a working boot image, you need to run:
cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm6375-sony-xperia-\
murray-pdx225.dtb > .Image.gz-dtb
mkbootimg \
--kernel .Image.gz-dtb \
--ramdisk some_initrd.img \
--pagesize 4096 \
--base 0x0 \
--kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 \
--tags_offset 0x100 \
--cmdline "SOME_CMDLINE" \
--dtb_offset 0x1f00000 \
--header_version 1 \
--os_version 12 \
--os_patch_level 2022-04 \ # or newer
-o boot.img-sony-xperia-pdx225
Then, you need to flash it on the device and get rid of all the
vendor_boot/dtbo mess:
First, you need to get rid of vendor_boot. However, the bootloader
is utterly retarded and it will not let you neither flash nor erase it.
There are a couple ways to handle this: you can either dd /dev/zero to
it from Android (if you have root) or a custom recovery or from fastbootd
(fastboot/adb reboot fastboot). You will not be able to boot Android
images on your phone unless you lock the bootloader (fastboot oem lock)
and restore the factory image with Xperia Companion
Windows-and-macOS-only software.
The best way so far is probably to use the second (_b) slot and flash
mainline there. This will however require you to flash some partitions
manually, as they are not populated from factory:
(boot_b, dtbo_b, vendor_boot_b, vbmeta_b, vbmeta_system_b) - these we
don't really care about as we nuke/replace them
(dsp_b, imagefv_b, modem_b, oem_b, rdimage_b) - these you NEED to populate
to get a successful boot on slot B, otherwise you will have limited / no
functionality.
To switch slots, simply run:
fastboot --set-active=a //or =b
The rest assumes you are on slot A.
// You have to either pull vbmeta{"","_system"} from
// /dev/block/bootdevice/by-name/ or build one as a part of AOSP
fastboot --disable-verity --disable-verification flash vbmeta_b vbmeta.img
fastboot --disable-verity --disable-verification flash vbmeta_system_b \
vbmeta_system.img
fastboot flash boot_b boot.img-sony-xperia-pdx225
fastboot reboot fastboot // entering fastbootd
fastboot flash vendor_boot_b emptything.img
fastboot flash dtbo_b emptything.img
fastboot reboot bootloader // entering bootloader fastboot
fastboot --set-active=b
fastboot reboot // mainline time!
Where emptything.img is a tiny file that consists of 2 bytes (all zeroes),
doing a "fastboot erase" won't cut it, the bootloader will go crazy and
things will fall apart when it tries to overlay random bytes from an empty
partition onto a perfectly good appended DTB.
From there on you can flash new mainline builds by simply flashing
boot.img that you create after each kernel rebuild.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107120920.12593-4-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 12:09:18 +0000 (13:09 +0100)]
arm64: dts: qcom: Add initial device tree for SM6375
Add an initial device tree for the SM6375 (SD695) SoC.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107120920.12593-3-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 12:09:16 +0000 (13:09 +0100)]
dt-bindings: arm: cpus: Add Kryo 660 CPUs
Add a compatible for Kryo 660 CPUs found in at least Qualcomm SM6375.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107120920.12593-1-konrad.dybcio@linaro.org
Stephen Boyd [Mon, 7 Nov 2022 19:15:35 +0000 (11:15 -0800)]
arm64: dts: qcom: sc7180: Fully describe fingerprint node on Trogdor
Update the fingerprint node on Trogdor to match the fingerprint DT
binding. This will allow us to drive the reset and boot gpios from the
driver when it is re-attached after flashing. We'll also be able to boot
the fingerprint processor if the BIOS isn't doing it for us.
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107191535.624371-3-swboyd@chromium.org
Stephen Boyd [Mon, 7 Nov 2022 19:15:34 +0000 (11:15 -0800)]
arm64: dts: qcom: sc7280: Fully describe fingerprint node on Herobrine
Update the fingerprint node on Herobrine to match the fingerprint DT
binding. This will allow us to drive the reset and boot gpios from the
driver when it is re-attached after flashing. We'll also be able to boot
the fingerprint processor if the BIOS isn't doing it for us.
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107191535.624371-2-swboyd@chromium.org
Marijn Suijten [Mon, 7 Nov 2022 21:47:01 +0000 (22:47 +0100)]
arm64: dts: qcom: sm6125: Enable Command Queue Engine (CQE) for SDHCI 1
Downstream sources confirm sm6125 supports CQE, and after fixing the
reg name for this range [1] this feature probes and enables correctly:
[ 0.391950] sdhci_msm
4744000.mmc: mmc0: CQE init: success
[1]: https://lore.kernel.org/all/
20221026163646.37433-1-krzysztof.kozlowski@linaro.org/
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107214702.311271-1-marijn.suijten@somainline.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 16:36:46 +0000 (12:36 -0400)]
arm64: dts: qcom: sm6125: fix SDHCI CQE reg names
SM6125 comes with SDCC (SDHCI controller) v5, so the second range of
registers is cqhci, not core.
Fixes:
cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Sony Xperia 10 II
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026163646.37433-1-krzysztof.kozlowski@linaro.org
Luca Weiss [Mon, 31 Oct 2022 17:51:18 +0000 (18:51 +0100)]
arm64: dts: qcom: pm8998: adjust coincell node name to bindings
The spmi-pmic bindings say that pm8941-coincell should be called
'charger'.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221031175119.939860-3-luca@z3ntu.xyz
Konrad Dybcio [Mon, 7 Nov 2022 14:55:21 +0000 (15:55 +0100)]
arm64: dts: qcom: pm6150/l/pm7325/pms405: Fix up comments
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-12-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:20 +0000 (15:55 +0100)]
arm64: dts: qcom: qcs404-*: Fix up comments
Switch '//' comments to C-style /* */.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-11-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:19 +0000 (15:55 +0100)]
arm64: dts: qcom: msm8994-*: Fix up comments
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-10-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:18 +0000 (15:55 +0100)]
arm64: dts: qcom: msm8992-*: Fix up comments
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Also, trim off downstream regulator properties from comments to prevent
them from accidentally landing into mainline one day..
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-9-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:17 +0000 (15:55 +0100)]
arm64: dts: qcom: ipq8074-*: Fix up comments
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Also, fix up some whitespace within comments.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-8-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:16 +0000 (15:55 +0100)]
arm64: dts: qcom: sdm845-*: Fix up comments
Switch '//' comments to C-style /* */.
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-7-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:15 +0000 (15:55 +0100)]
arm64: dts: qcom: sc8280xp-x13s: Fix up comments
Switch '//' comments to C-style /* */.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-6-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:14 +0000 (15:55 +0100)]
arm64: dts: qcom: msm8998-*: Fix up comments
Switch '//' comments to C-style /* */ and fix up the contents of some.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-5-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:13 +0000 (15:55 +0100)]
arm64: dts: qcom: msm8953: Fix up comments
Switch '//' comments to C-style /* */ and fix up the contents of some.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-4-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:12 +0000 (15:55 +0100)]
arm64: dts: qcom: msm/apq8x96-*: Fix up comments
Switch '//' comments to C-style /* */ and fix up the contents of some.
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Also, fix up a single raw '2' to PM8994_GPIO_S4 while at it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-3-konrad.dybcio@linaro.org
Konrad Dybcio [Mon, 7 Nov 2022 14:55:11 +0000 (15:55 +0100)]
arm64: dts: qcom: msm/apq8x16-*: Fix up comments
Switch '//' comments to C-style /* */ and fix up the contents of some.
Make sure all multiline C-style commends begin with just '/*' with
the comment text starting on a new line.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107145522.6706-2-konrad.dybcio@linaro.org
Krzysztof Kozlowski [Fri, 4 Nov 2022 16:11:30 +0000 (12:11 -0400)]
arm64: dts: qcom: qcs404: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104161131.57719-1-krzysztof.kozlowski@linaro.org
Robert Marko [Mon, 7 Nov 2022 09:29:30 +0000 (10:29 +0100)]
arm64: dts: qcom: hk01: use GPIO flags for tlmm
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of
harcoding the cell value.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107092930.33325-3-robimarko@gmail.com
Robert Marko [Mon, 7 Nov 2022 09:29:29 +0000 (10:29 +0100)]
arm64: dts: qcom: hk10: use GPIO flags for tlmm
Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of
harcoding the cell value.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107092930.33325-2-robimarko@gmail.com
Robert Marko [Mon, 7 Nov 2022 09:29:28 +0000 (10:29 +0100)]
arm64: dts: qcom: hk10: use "okay" instead of "ok"
Use "okay" instead of "ok" in USB nodes as "ok" is deprecated.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107092930.33325-1-robimarko@gmail.com
Konrad Dybcio [Mon, 7 Nov 2022 09:22:07 +0000 (10:22 +0100)]
MAINTAINERS: Update Konrad Dybcio's email address
Use my new Linaro address in place of my SoMainline one.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107092207.5832-1-konrad.dybcio@linaro.org
Johan Hovold [Mon, 7 Nov 2022 08:17:05 +0000 (09:17 +0100)]
arm64: dts: qcom: sc8280xp: fix USB MP QMP PHY nodes
Update the USB MP QMP PHY nodes to match the new binding which
specifically includes the missing register regions (e.g. PCS_USB).
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107081705.18446-1-johan+linaro@kernel.org
Sheng-Liang Pan [Mon, 7 Nov 2022 09:43:45 +0000 (17:43 +0800)]
arm64: dts: qcom: sc7280: sort out the "Status" to last property with sc7280-herobrine-audio-rt5682.dtsi
To keep diffs clean, sort out "Status" to last property.
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107173954.v11.5.I4c6d97e6f3cf8cdc691d2d4519883c3018dd4372@changeid
Sheng-Liang Pan [Mon, 7 Nov 2022 09:43:44 +0000 (17:43 +0800)]
arm64: dts: qcom: sc7280: add sc7280-herobrine-audio-rt5682-3mic3.dtsi for evoker
add specific 3mic setting as sc7280-herobrine-audio-rt5682-3mic.dtsi,
so we can include sc7280-herobrine-audio-rt5682-3mic.dtsi for evoker
as it uses rt5682 with 3 mics.
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107173954.v11.4.I9718ac3622fa550e432209ae5c95c87b873a0f87@changeid
Sheng-Liang Pan [Mon, 7 Nov 2022 09:43:43 +0000 (17:43 +0800)]
arm64: dts: qcom: sc7280: Add touchscreen and touchpad support for evoker
Change touchpad and touchscreen node for evoker
Touchpad: SA461D-1011
Touchscreen: GT7986U
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107173954.v11.3.I3ac715e729f6f9b5a3e3001b155df4f9d14e6186@changeid
Sheng-Liang Pan [Mon, 7 Nov 2022 09:43:42 +0000 (17:43 +0800)]
arm64: dts: qcom: sc7280: Add LTE SKU for sc7280-evoker family
evoker have wifi/lte sku, add different dts for each sku.
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107173954.v11.2.If03e9e85e63ece4b1599db841c90ed785c47a4be@changeid
Luca Weiss [Mon, 31 Oct 2022 17:39:33 +0000 (18:39 +0100)]
arm64: dts: qcom: pm8150b: change vbus-regulator node name
Use the node name as now defined in the spmi-pmic bindings.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221031173933.936147-3-luca@z3ntu.xyz
Robert Marko [Sun, 30 Oct 2022 17:57:03 +0000 (18:57 +0100)]
arm64: dts: qcom: ipq8074: pass XO and sleep clocks to GCC
Pass XO and sleep clocks to the GCC controller so it does not have to
find them by matching globaly by name.
If not passed directly, driver maintains backwards compatibility by then
falling back to global lookup.
Since we are here, set cell numbers in decimal instead of hex.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030175703.1103224-3-robimarko@gmail.com
Dmitry Baryshkov [Sun, 30 Oct 2022 16:16:12 +0000 (19:16 +0300)]
arm64: dts: qcom: msm8996: use dsi1_phy for the MMCC's dsi1 clocks
Link dsi1_phy as a clock provider of "dsi1pll" and "dsi1pllbyte" clocks
to the MMCC.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030161612.95471-2-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Sun, 30 Oct 2022 16:16:11 +0000 (19:16 +0300)]
arm64: dts: qcom: msm8996: use hdmi_phy for the MMCC's hdmipll clock
Link hdmi_phy as a clock provider of "hdmipll" clock to the MMCC.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030161612.95471-1-dmitry.baryshkov@linaro.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:32 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350: Add apps_smmu with streamID to SDHCI 1/2 nodes
When enabling the APPS SMMU the mainline driver reconfigures the SMMU
from its bootloader configuration, losing the stream mapping for (among
which) the SDHCI hardware and breaking its ADMA feature. This feature
can be disabled with:
sdhci.debug_quirks=0x40
But it is of course desired to have this feature enabled and working
through the SMMU.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-11-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:31 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350-lena: Configure Samsung touchscreen
Use the generic samsung,s6sy761 touchscreen driver for this device,
together with a few pins and regulators to power it up correctly.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-10-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:30 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350-lena: Enable QUP and GPI DMA
Enable QUP and GPI DMA hardware to be able to add functioning I2C nodes
later.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-9-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:29 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350-lena: Provide power to SDHCI 2 (SDCard slot)
Without power the SDCard slot / hardware remains dormant.
Like many other platforms these regulators are used exclusively by
SDHCI, and have their maximum voltage decreased to what downstream sets
on the consumer side. Additionally the SDHCI driver supports setting a
load, for which the regulator definition is extended much the same.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-8-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:28 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350-lena: Define pm6350 and pm6150l regulators
This regulator configuration was adopted from downstream, and is
identical to the sm7225 FairPhone 4 configuration bar pm6350_l8a.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-7-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:27 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350-lena: Include pm6350 and configure buttons
Include pm6350 to inherit its GPIO and button configuration, and
configure "resin" to serve as volume up, and gpio2 as volume down.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-6-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:26 +0000 (08:32 +0100)]
arm64: dts: qcom: pm6350: Include header for KEY_POWER
Make pm6350.dtsi self-contained by including input.h, needed for the
KEY_POWER constant used to define the power key.
Fixes:
d8a3c775d7cd ("arm64: dts: qcom: Add PM6350 PMIC")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-5-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:25 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350-lena: Add SD Card Detect to sdc2 on/off pinctrl
In addition to the sdc2 pins, set the SD Card Detect pin in a sane state
to be used as an interrupt when an SD Card is slotted in or removed.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-4-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:24 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350: Add pinctrl for SDHCI 2
Use the generic pin functions specifically for sdc2.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-3-marijn.suijten@somainline.org
Marijn Suijten [Sun, 30 Oct 2022 07:32:23 +0000 (08:32 +0100)]
arm64: dts: qcom: sm6350: Add resets for SDHCI 1/2
Make sure the SDHCI hardware is properly reset before interacting with
it, to protect against any possibly indeterminate state left by the
bootloader.
Suggested-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Tested-by: Luca Weiss <luca.weiss@fairphone.com> # sm7225-fairphone-fp4
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221030073232.22726-2-marijn.suijten@somainline.org
Luca Weiss [Fri, 28 Oct 2022 07:54:05 +0000 (09:54 +0200)]
arm64: dts: qcom: pm6150l: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values, except for trip2 where 125°C is used instead of 145°C
due to limitations without a configured ADC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221028075405.124809-2-luca.weiss@fairphone.com
Luca Weiss [Fri, 28 Oct 2022 07:54:04 +0000 (09:54 +0200)]
arm64: dts: qcom: pm6350: add temp sensor and thermal zone config
Add temp-alarm device tree node and a default configuration for the
corresponding thermal zone for this PMIC. Temperatures are based on
downstream values, except for trip2 where 125°C is used instead of 145°C
due to limitations without a configured ADC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221028075405.124809-1-luca.weiss@fairphone.com
Douglas Anderson [Tue, 25 Oct 2022 23:52:39 +0000 (16:52 -0700)]
arm64: dts: qcom: sc7280: Villager doesn't have NVME
The sc7280-herobrine-villager derivative doesn't have NVME enabled so
we shouldn't mark the PCIe nodes as "okay" since they're just for
boards that have NVME.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221025164915.1.I38e2545eda2b3bd3fef6b41c98f451e32851ae70@changeid
Stephen Boyd [Tue, 25 Oct 2022 18:07:03 +0000 (11:07 -0700)]
arm64: dts: qcom: Remove fingerprint node from herobrine-r1
It turns out that only a few people have the fingerprint sensor hooked
up on their board. Leaving this enabled is slowing down boot for
everyone else because the driver slowly fails to probe while trying to
communicate with a sensor that isn't there. Remove the node to speed up
boot, developers with the board can manually enable it themselves.
Reported-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221025180703.1806234-1-swboyd@chromium.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 15:54:49 +0000 (11:54 -0400)]
arm64: dts: qcom: msm8994: Align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Order the "function" and "pins" property to match other DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018155450.39816-2-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 18 Oct 2022 15:54:48 +0000 (11:54 -0400)]
arm64: dts: qcom: msm8994: Correct SPI10 CS pin
The GPIO55 is part of SPI10 pins, not its chip-select. Probably the
intention was to use one of dedicated chip-select GPIOs: 47 or 67.
GPIO47 is used for UART2, so choose GPIO67.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221018155450.39816-1-krzysztof.kozlowski@linaro.org
Manikanta Pubbisetty [Mon, 17 Oct 2022 12:53:46 +0000 (18:23 +0530)]
arm64: dts: qcom: sc7280: Add nodes to support WoW on WCN6750
Add DT nodes to support WoW (Wake on Wireless) feature on WCN6750
WiFi hardware on SC7280 SoC.
Signed-off-by: Manikanta Pubbisetty <quic_mpubbise@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221017125346.3691-3-quic_mpubbise@quicinc.com
Johan Hovold [Wed, 26 Oct 2022 15:25:11 +0000 (17:25 +0200)]
arm64: dts: qcom: sm6350: drop bogus DP PHY clock
The QMP pipe clock is used by the USB part of the PHY so drop the
corresponding properties from the DP child node.
Fixes:
23737b9557fe ("arm64: dts: qcom: sm6350: Add USB1 nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026152511.9661-3-johan+linaro@kernel.org
Johan Hovold [Wed, 26 Oct 2022 15:25:10 +0000 (17:25 +0200)]
arm64: dts: qcom: sm8250: drop bogus DP PHY clock
The QMP pipe clock is used by the USB part of the PHY so drop the
corresponding properties from the DP child node.
Fixes:
5aa0d1becd5b ("arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026152511.9661-2-johan+linaro@kernel.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:10 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add thermal zone support
Add thermal zone support by making use of the thermistor SYS_THERM6.
Based on experiments, this thermistor seems to reflect the actual
surface temperature of the laptop.
For the cooling device, all BIG CPU cores are throttled down to keep the
temperature at a sane level.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-13-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:09 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels
Add ADC_TM5 channels of PM8280_{1/2} for monitoring the temperature from
external thermistors connected to AMUX pins. The temperature measurements
are collected from the PMK8280's VADC channels that expose the
measurements from secondary PMICs PM8280_{1/2}.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-12-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:08 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel
Add VADC channel of PMR735A for measuring the on-chip die temperature.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-11-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:07 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels
Add VADC channels of PM8280_{1/2} PMICs for measuring the on-chip die
temperature and external thermistors connected to the AMUX pins.
The measurements are collected by the primary PMIC PMK8280 from the
secondary PMICs PM8280_{1/2} and exposed over the PMK8280's VADC channels.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-10-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:06 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels
Add VADC channels for measuring the on-chip die temperature and external
crystal osciallator temperature of PMK8280.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-9-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:05 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-x13s: Enable PMK8280 RESIN input
Enable resetting the PMK8280 through RESIN block in SC8280XP X13s.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-8-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:04 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add support for TM5 block in PMK8280
Thermal Monitoring block ADC5 (TM5) in PMK8280 can be used to monitor the
temperature from secondary PMICs like PM8280.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-7-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:03 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add PMK8280 ADC7 block
Add support for ADC7 block available in PMK8280 for reading the
temperature via the AMUX pins.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-6-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:02 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add support for PMK8280 RESIN input
The RESIN input can be used to reset the PMK8280 PMIC. Enabling the
RESIN block allows the PMK8280 to detect reset input via RESIN_N pin.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-5-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:01 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add thermal zones for PM8280_{1/2} PMICs
Add thermal zones for the PM8280_{1/2} PMICs by using the temperature
alarm blocks as the thermal sensors. Temperature trip points are
inherited from PM8350 PMIC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-4-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:58:00 +0000 (15:28 +0530)]
arm64: dts: qcom: sc8280xp-pmics: Add temp alarm for PM8280_{1/2} PMICs
Add support for temperature alarm feature in the PM8280_{1/2} PMICs.
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-3-manivannan.sadhasivam@linaro.org
Manivannan Sadhasivam [Thu, 3 Nov 2022 09:57:59 +0000 (15:27 +0530)]
dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
has the static Slave ID (SID) assigned by default. The primary PMIC
PMK8350 is responsible for collecting the temperature/voltage data from
the slave PMICs and exposing them via it's registers.
For getting the measurements from the slave PMICs, PMK8350 uses the
channel ID encoded with the SID of the relevant PMIC. So far, the
dt-binding for the slave PMIC PM8350 assumed that there will be only
one PM8350 in a system. So it harcoded SID 1 with channel IDs.
But this got changed in platforms such as Lenovo X13s where there are a
couple of PM8350 PMICs available. So to address multiple PM8350s, change
the binding to accept the SID specified by the user and use it for
encoding the channel ID.
It should be noted that, even though the SID is static it is not
globally unique. Only the primary PMIC has the unique SID id 0.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-2-manivannan.sadhasivam@linaro.org
Dmitry Baryshkov [Fri, 4 Nov 2022 13:23:16 +0000 (16:23 +0300)]
dt-bindings: qcom: add another exception to the device naming rule
The 'qcom,dsi-ctrl-6g-qcm2290' compatibility string was added in the
commit
ee1f09678f14 ("drm/msm/dsi: Add support for qcm2290 dsi
controller") in February 2022, but was not properly documented in the
bindings. Adding this compatibility string to
display/msm/dsi-controller-main.yaml caused a warning from
qcom-soc.yaml. Fix the warning by adding an exception to the mentioned
file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132316.1028137-1-dmitry.baryshkov@linaro.org
Vincent Knecht [Fri, 4 Nov 2022 13:24:00 +0000 (14:24 +0100)]
arm64: dts: qcom: msm8916-alcatel-idol347: add LED indicator
Add si-en,sn3190 LED controller to enable white LED indicator.
This requires adding the additional "enable" gpio that the OEM
choose to use, despite it not being mentioned in si-en,sn3190
datasheet nor supported by the driver.
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132400.1763218-4-vincent.knecht@mailoo.org
Vincent Knecht [Fri, 4 Nov 2022 13:23:59 +0000 (14:23 +0100)]
arm64: dts: qcom: msm8916-alcatel-idol347: add GPIO torch LED
Add support for torch LED on GPIO 32.
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104132400.1763218-3-vincent.knecht@mailoo.org
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:51 +0000 (00:46 -0700)]
arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 1.0/2.0
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes:
f8b4eb64f200 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 1.0/2.0 and IDP boards")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-5-dmitry.torokhov@gmail.com
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:50 +0000 (00:46 -0700)]
arm64: dts: qcom: sc7280: fix codec reset line polarity for CRD 3.0/3.1
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes:
0a3a56a93fd9 ("arm64: dts: qcom: sc7280: Add wcd9385 codec node for CRD 3.0/3.1")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-4-dmitry.torokhov@gmail.com
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:49 +0000 (00:46 -0700)]
arm64: dts: qcom: sm8250-mtp: fix reset line polarity
The driver for the codec, when resetting the chip, first drives the line
low, and then high. This means that the line is active low. Change the
annotation in the DTS accordingly.
Fixes:
36c9d012f193 ("arm64: dts: qcom: use GPIO flags for tlmm")
Fixes:
5a263cf629a8 ("arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-3-dmitry.torokhov@gmail.com
Dmitry Torokhov [Thu, 27 Oct 2022 07:46:47 +0000 (00:46 -0700)]
arm64: dts: qcom: msm8996: fix sound card reset line polarity
When resetting the block, the reset line is being driven low and then
high, which means that the line in DTS should be annotated as "active
low". It will become important when wcd9335 driver will be converted
to gpiod API that respects declared line polarities.
Fixes:
f3eb39a55a1f ("arm64: dts: db820c: Add sound card support")
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221027074652.1044235-1-dmitry.torokhov@gmail.com
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:57 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450-qrd: add SDHCI for microSD
Based on downstream DTS, it seems that SM8450 QRD has microSD card slot.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-5-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:56 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450-hdk: add SDHCI for microSD
The HDK8450 has microSD card slot.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-4-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:55 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450: disable SDHCI SDR104/SDR50 on all boards
SDHCI on SM8450 HDK also has problems with SDR104/SDR50:
mmc0: card never left busy state
mmc0: error -110 whilst initialising SD card
so I think it is safe to assume this issue affects all SM8450 boards.
Move the quirk disallowing these modes to the SoC DTSI, to spare people
working on other boards the misery of debugging this issue.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-3-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Wed, 26 Oct 2022 20:03:54 +0000 (16:03 -0400)]
arm64: dts: qcom: sm8450: move SDHCI pin configuration to DTSI
The SDHCI pin configuration/mux nodes are actually common to all
upstreamed boards, so define them in SoC DTSI to reduce code
duplication.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026200357.391635-2-krzysztof.kozlowski@linaro.org
Johan Hovold [Mon, 24 Oct 2022 09:15:07 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8450: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-5-johan+linaro@kernel.org
Johan Hovold [Mon, 24 Oct 2022 09:15:06 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8350: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-4-johan+linaro@kernel.org
Johan Hovold [Mon, 24 Oct 2022 09:15:05 +0000 (11:15 +0200)]
arm64: dts: qcom: sm8250: fix UFS PHY registers
The sizes of the UFS PHY register regions are too small and does
specifically not cover all registers used by the Linux driver.
As Linux maps these regions as full pages this is currently not an issue
on Linux, but let's update the sizes to match the vendor driver.
Fixes:
b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221024091507.20342-3-johan+linaro@kernel.org