OSDN Git Service

android-x86/external-llvm.git
5 years ago[InstCombine] add more tests for add narrowing folds; NFC
Sanjay Patel [Fri, 14 Sep 2018 20:33:40 +0000 (20:33 +0000)]
[InstCombine] add more tests for add narrowing folds; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342274 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly][NFC] Fix unconventional test names
Thomas Lively [Fri, 14 Sep 2018 20:22:45 +0000 (20:22 +0000)]
[WebAssembly][NFC] Fix unconventional test names

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52110

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342273 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove unused DIASession field
Reid Kleckner [Fri, 14 Sep 2018 20:16:31 +0000 (20:16 +0000)]
Remove unused DIASession field

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342272 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Clear the bits before they are being set in program resource registers
Konstantin Zhuravlyov [Fri, 14 Sep 2018 20:00:36 +0000 (20:00 +0000)]
AMDGPU: Clear the bits before they are being set in program resource registers

Change by Tony Tye

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342270 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix lit/example/many-tests pickling issue
Alex Langford [Fri, 14 Sep 2018 19:44:09 +0000 (19:44 +0000)]
Fix lit/example/many-tests pickling issue

Summary:
The multiprocess module uses pickling to transfer
information between processes and does not know how to pickle
the class created in the lit.cfg file and thus the example
fails.

Implement ManyTests in a separate file and import for the
example test passes

Patch by Nathan Lanza <nathan@lanza.io>

Differential Revision: https://reviews.llvm.org/D51328

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342269 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTest commit access
Lion Yang [Fri, 14 Sep 2018 19:43:11 +0000 (19:43 +0000)]
Test commit access

Remove trailing spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342268 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvecto...
Reid Kleckner [Fri, 14 Sep 2018 19:39:40 +0000 (19:39 +0000)]
Revert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index."

Causes 'isVector() && "Invalid vector type!"' assertion when building
Skia in Chrome.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342265 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix debug info for SelectionDAG legalization of DAG nodes with two results.
Adrian Prantl [Fri, 14 Sep 2018 19:38:45 +0000 (19:38 +0000)]
Fix debug info for SelectionDAG legalization of DAG nodes with two results.

This patch fixes the debug info handling for SelectionDAG legalization
of DAG nodes with two results. When an replaced SDNode has more than
one result, transferDbgValues was always copying the SDDbgValue from
the first result and attaching them to all members. In reality
SelectionDAG::ReplaceAllUsesWith() is given an array of SDNodes
(though the type signature doesn't make this obvious (cf. the call
site code in ReplaceNode()).

rdar://problem/44162227

Differential Revision: https://reviews.llvm.org/D52112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342264 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTOCodeGenerator] Avoid Rehash StringMap in ThreadPool
Steven Wu [Fri, 14 Sep 2018 19:38:21 +0000 (19:38 +0000)]
[ThinLTOCodeGenerator] Avoid Rehash StringMap in ThreadPool

Summary:
During threaded thinLTO, it is possible that the entry for current
module doesn't exist in StringMaps (like ExportLists, ResolvedODR,
etc.). Using operator[] might trigger a rehash for the StringMap, which
might happen on multiple threads at the same time.

rdar://problem/43846199

Reviewers: tejohnson, mehdi_amini, kromanova, pcc

Reviewed By: tejohnson

Subscribers: dang, inglorion, eraman, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D52049

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342263 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r342210 "[ARM] bottom-top mul support in ARMParallelDSP"
Reid Kleckner [Fri, 14 Sep 2018 18:44:37 +0000 (18:44 +0000)]
Revert r342210 "[ARM] bottom-top mul support in ARMParallelDSP"

It causes assertion failures while building Skia for Android in
Chromium:
https://ci.chromium.org/buildbot/chromium.clang/ToTAndroid/4550

Reduction forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342260 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert a line-endings change that somehow got included with rL342257
Simon Pilgrim [Fri, 14 Sep 2018 18:35:21 +0000 (18:35 +0000)]
Revert a line-endings change that somehow got included with rL342257

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342258 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)
Simon Pilgrim [Fri, 14 Sep 2018 18:33:31 +0000 (18:33 +0000)]
[X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)

Attempt to lower a shuffle as an unpack of elements from two inputs followed by a single-input (wider) permutation.

As long as the permutation is wider this is a win - there may be some circumstances where same size permutations would also be useful but I've left that for future work.

Differential Revision: https://reviews.llvm.org/D52043

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342257 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Re-generate test checks using current version of the script. NFC
Craig Topper [Fri, 14 Sep 2018 18:27:09 +0000 (18:27 +0000)]
[X86] Re-generate test checks using current version of the script. NFC

The regular expression used for stack accesses is different today.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342256 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] rename test file to better describe the fold; NFC
Sanjay Patel [Fri, 14 Sep 2018 18:12:30 +0000 (18:12 +0000)]
[InstCombine] rename test file to better describe the fold; NFC

The folds are not limited to zext, and the real goal is width
reduction of a math op. D52075 is proposing to extend this to
subtracts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342254 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] remove unnecessary target constraints for tests; NFC
Sanjay Patel [Fri, 14 Sep 2018 18:06:36 +0000 (18:06 +0000)]
[InstCombine] remove unnecessary target constraints for tests; NFC

These are universal folds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342253 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] move test next to related tests; NFC
Sanjay Patel [Fri, 14 Sep 2018 18:05:14 +0000 (18:05 +0000)]
[InstCombine] move test next to related tests; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342251 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] remove stall comment from test file; NFC
Sanjay Patel [Fri, 14 Sep 2018 18:02:17 +0000 (18:02 +0000)]
[InstCombine] remove stall comment from test file; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342250 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] regenerate test checks; NFC
Sanjay Patel [Fri, 14 Sep 2018 17:53:44 +0000 (17:53 +0000)]
[InstCombine] regenerate test checks; NFC

There was a bug in a check line regex that could cause the test to fail
with a naming difference. The auto-gen script seems to work as expected now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342249 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoIntroduce explicit add_unittest_with_input_files target for tests that use llvm:...
Nico Weber [Fri, 14 Sep 2018 17:34:46 +0000 (17:34 +0000)]
Introduce explicit add_unittest_with_input_files target for tests that use llvm::getInputFileDirectory()

Using llvm::getInputFileDirectory() in unit tests is discouraged, so require an explicit opt-in.
This way, cmake also writes ~60 fewer unused files to disk.

Differential Revision: https://reviews.llvm.org/D52095

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342248 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agofix noasserts build
Adrian Prantl [Fri, 14 Sep 2018 17:32:52 +0000 (17:32 +0000)]
fix noasserts build

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342247 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSelectionDAG: Add compact SDDbgValue representation to -dag-dump-verbose output
Adrian Prantl [Fri, 14 Sep 2018 17:08:02 +0000 (17:08 +0000)]
SelectionDAG: Add compact SDDbgValue representation to -dag-dump-verbose output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342245 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r342233.
James Henderson [Fri, 14 Sep 2018 16:48:47 +0000 (16:48 +0000)]
Revert r342233.

This caused LLD test failures, which I've been unable to reproduce.

Reverting to allow for further investigation next week.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342244 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agofix typos
Adrian Prantl [Fri, 14 Sep 2018 16:12:14 +0000 (16:12 +0000)]
fix typos

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342241 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add more tests for x86 blendv (PR38814); NFC
Sanjay Patel [Fri, 14 Sep 2018 13:47:33 +0000 (13:47 +0000)]
[InstCombine] add more tests for x86 blendv (PR38814); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342237 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][BMI1] Fix BLSI/BLSMSK/BLSR BMI1 scheduling on btver2
Simon Pilgrim [Fri, 14 Sep 2018 13:31:14 +0000 (13:31 +0000)]
[X86][BMI1] Fix BLSI/BLSMSK/BLSR BMI1 scheduling on btver2

These have the same behaviour as tzcnt on btver2 - confirmed with AMD 16h SOG, Agner and instlatx64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342235 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][BMI1] Add scheduler class for BLSI/BLSMSK/BLSR BMI1 instructions
Simon Pilgrim [Fri, 14 Sep 2018 13:09:56 +0000 (13:09 +0000)]
[X86][BMI1] Add scheduler class for BLSI/BLSMSK/BLSR BMI1 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342234 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO]Allow setting of maximum cache size with 64-bit number
James Henderson [Fri, 14 Sep 2018 12:51:19 +0000 (12:51 +0000)]
[ThinLTO]Allow setting of maximum cache size with 64-bit number

Also added a C-interface function for large values, and updated
llvm-lto's --thinlto-cache-max-size-bytes switch to take a type larger
than int.

The maximum cache size in terms of bytes is a 64-bit number. However,
the methods to set it only took unsigned previously, which meant that
the maximum cache size could not be specified above 4GB. That's quite
small compared to the output of some projects, so it makes sense to
provide the ability to set larger values in that field.

We also needed a C-interface function that provides a greater range
than the existing thinlto_codegen_set_cache_size_bytes, which also only
takes an unsigned, so this change also adds
hinlto_codegen_set_cache_size_megabytes.

Reviewed by: mehdi_amini, tejohnson, steven_wu

Differential Revision: https://reviews.llvm.org/D52023

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342233 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Ensure trig range reduction only used for subtargets that require it
David Stuttard [Fri, 14 Sep 2018 10:27:19 +0000 (10:27 +0000)]
[AMDGPU] Ensure trig range reduction only used for subtargets that require it

Summary:
GFX9 and above support sin/cos instructions with a greater range and thus don't
require a fract instruction prior to invocation.

Added a subtarget feature to reflect this and added code to take advantage of
expanded range on GFX9+

Also updated the tests to check correct behaviour

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D51933

Change-Id: I1c1f1d3726a5ae32116646ca5cfa1ab4ef69e5b0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342222 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DWARF] reposting r342048, which was reverted in r342056 due to buildbot
Wolfgang Pieb [Fri, 14 Sep 2018 09:14:10 +0000 (09:14 +0000)]
[DWARF] reposting r342048, which was reverted in r342056 due to buildbot
errors.
Adjusted 2 test cases for ARM and darwin and fixed a bug with the original
change in dsymutil.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342218 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] bottom-top mul support in ARMParallelDSP
Sam Parker [Fri, 14 Sep 2018 08:09:09 +0000 (08:09 +0000)]
[ARM] bottom-top mul support in ARMParallelDSP

On failing to find sequences that can be converted into dual macs,
try to find sequential 16-bit loads that are used by muls which we
can then use smultb, smulbt, smultt with a wide load.

Differential Revision: https://reviews.llvm.org/D51983

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342210 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopInterchange] Preserve ScalarEvolution, by forgetting about interchanged loops.
Florian Hahn [Fri, 14 Sep 2018 07:50:20 +0000 (07:50 +0000)]
[LoopInterchange] Preserve ScalarEvolution, by forgetting about interchanged loops.

As preparation for LoopInterchange becoming a loop pass, it needs to
preserve ScalarEvolution. Even though interchanging should not change
the trip count of the loop, it modifies loop entry, latch and exit
blocks.

I added -verify-scev to some loop interchange tests, but the verification does
not catch problems caused by missing invalidation of SE in loop interchange, as
the trip counts themselves do not change. So there might be potential to
make the SE verification covering more stuff in the future.

Reviewers: mkazantsev, efriedma, karthikthecool

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D52026

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342209 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SystemZ] Adjust cost functions for subtargets that use LI + LOC instead of IPM
Jonas Paulsson [Fri, 14 Sep 2018 06:46:55 +0000 (06:46 +0000)]
[SystemZ] Adjust cost functions for subtargets that use LI + LOC instead of IPM

After recent improvements which makes better use of LOC instead of IPM, the
TTI cost functions also needs to be updated to reflect this.

This involves sext, zext and xor of i1.

The tests were updated so that for z13 the new costs are expected, while the
old costs are still checked for on zEC12.

Review: Ulrich Weigand
https://reviews.llvm.org/D51339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342207 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] Treat null bytes as separator in windows command line strings
Martin Storsjo [Fri, 14 Sep 2018 06:08:01 +0000 (06:08 +0000)]
[Support] Treat null bytes as separator in windows command line strings

When reading directives from a .drectve section, the directives are
tokenized as a normal windows command line. However in these cases,
link.exe allows the directives to be separated by null bytes, not only by
spaces.

A test case for this change will be added in the lld repo.

Differential Revision: https://reviews.llvm.org/D52014

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342204 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Add some test cases for (add (sext x), (sext y)) --> (sext (add int...
Craig Topper [Fri, 14 Sep 2018 05:16:58 +0000 (05:16 +0000)]
[InstCombine] Add some test cases for (add (sext x), (sext y)) --> (sext (add int x, y)) and (mul (sext x), (sext y)) --> (sext (mul x, y)). NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342203 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Remove meaningless code from GVN
Max Kazantsev [Fri, 14 Sep 2018 04:50:38 +0000 (04:50 +0000)]
[NFC] Remove meaningless code from GVN

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342202 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix for the buildbot failure http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux...
Hideki Saito [Fri, 14 Sep 2018 02:02:57 +0000 (02:02 +0000)]
Fix for the buildbot failure lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/23635
from the commit (r342197) of https://reviews.llvm.org/D50820.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342201 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[VPlan] Implement initial vector code generation support for simple outer loops.
Hideki Saito [Fri, 14 Sep 2018 00:36:00 +0000 (00:36 +0000)]
[VPlan] Implement initial vector code generation support for simple outer loops.

Summary:
[VPlan] Implement vector code generation support for simple outer loops.

Context: Patch Series #1 for outer loop vectorization support in LV  using VPlan. (RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).

This patch introduces vector code generation support for simple outer loops that are currently supported in the VPlanNativePath. Changes here essentially do the following:

  - force vector code generation using explicit vectorize_width

  - add conservative early returns in cost model and other places for VPlanNativePath

  - add code for setting up outer loop inductions

  - support for widening non-induction PHIs that can result from inner loops and uniform conditional branches

  - support for generating uniform inner branches

We plan to add a handful C outer loop executable tests once the initial code generation support is committed. This patch is expected to be NFC for the inner loop vectorizer path. Since we are moving in the direction of supporting outer loop vectorization in LV, it may also be time to rename classes such as InnerLoopVectorizer.

Reviewers: fhahn, rengolin, hsaito, dcaballe, mkuper, hfinkel, Ayal

Reviewed By: fhahn, hsaito

Subscribers: dmgreen, bollu, tschuett, rkruppe, rogfer01, llvm-commits

Differential Revision: https://reviews.llvm.org/D50820

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342197 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Link LLVMCore into LLVMExegesisARMTests.
Richard Diamond [Thu, 13 Sep 2018 23:18:33 +0000 (23:18 +0000)]
[NFC] Link LLVMCore into LLVMExegesisARMTests.

Fixes missing `llvm::LLVMContext::~LLVMContext()` symbols w/
`BUILD_SHARED_LIBS`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342193 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] Removed unused method
Tim Renouf [Thu, 13 Sep 2018 21:56:25 +0000 (21:56 +0000)]
[AMDGPU] Removed unused method

Summary:
I accidentally left this behind in D50306, and it causes a build warning
when I build with gcc7.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D52022

Change-Id: I30f7a47047e9d9d841f652da66d2fea19e74842c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342189 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SanitizerCoverage] Create comdat for global arrays.
Matt Morehouse [Thu, 13 Sep 2018 21:45:55 +0000 (21:45 +0000)]
[SanitizerCoverage] Create comdat for global arrays.

Summary:
Place global arrays in comdat sections with their associated functions.
This makes sure they are stripped along with the functions they
reference, even on the BFD linker.

Reviewers: eugenis

Reviewed By: eugenis

Subscribers: eraman, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D51902

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342186 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][InstCombine] PR38708 - inefficient pattern for high-bits checking 3.
Roman Lebedev [Thu, 13 Sep 2018 21:34:47 +0000 (21:34 +0000)]
[NFC][InstCombine] PR38708 - inefficient pattern for high-bits checking 3.

The last, non-canonical variant:
https://godbolt.org/z/aCMsPk
https://rise4fun.com/Alive/I6f

It can only happen due to the extra use on the inner shift.
But here it is ok.

https://bugs.llvm.org/show_bug.cgi?id=38708

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342184 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombine] Fix crash when store merging created an extract_subvector with invalid...
Amara Emerson [Thu, 13 Sep 2018 21:28:58 +0000 (21:28 +0000)]
[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.

Differential Revision: https://reviews.llvm.org/D51831

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342183 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoLLVMExegesisX86Tests: link to LLVMCore, too.
Roman Lebedev [Thu, 13 Sep 2018 21:26:09 +0000 (21:26 +0000)]
LLVMExegesisX86Tests: link to LLVMCore, too.

Fixes build for me.
Refs. D52054

[215/217] Linking CXX executable unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests
FAILED: unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests
: && /usr/bin/g++  -pipe -O2 -g0 -UNDEBUG -fPIC -fvisibility-inlines-hidden -Werror=date-time -std=c++11 -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -fdiagnostics-color -ffunction-sections -fdata-sections -pipe -O2 -g0 -UNDEBUG  -fuse-ld=lld -Wl,--color-diagnostics -Wl,-allow-shlib-undefined     -Wl,-O3 -Wl,--gc-sections unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AnalysisTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/SnippetGeneratorTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/RegisterAliasingTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/TargetTest.cpp.o  -o unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests  -Wl,-rpath,/build/llvm-build-GCC-release/lib lib/libLLVMMC.so.8svn lib/libLLVMMCParser.so.8svn lib/libLLVMObject.so.8svn lib/libLLVMSymbolize.so.8svn lib/libLLVMX86CodeGen.so.8svn lib/libLLVMX86AsmParser.so.8svn lib/libLLVMX86AsmPrinter.so.8svn lib/libLLVMX86Desc.so.8svn lib/libLLVMX86Disassembler.so.8svn lib/libLLVMX86Info.so.8svn lib/libLLVMX86Utils.so.8svn lib/libLLVMSupport.so.8svn -lpthread lib/libgtest_main.so.8svn lib/libgtest.so.8svn -lpthread lib/libLLVMExegesis.so.8svn lib/libLLVMExegesisX86.so.8svn && :
ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunction_Test::TestBody())

ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunctionXOR32rr_Default_Test::TestBody())

ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(void exegesis::MachineFunctionGeneratorBaseTest::Check<int, int, int, int, int, int, int, int>(exegesis::ExegesisTarget const&, llvm::ArrayRef<unsigned int>, llvm::MCInst, int, int, int, int, int, int, int, int))

ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>>               unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunctionMOV32ri_Test::TestBody())
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342182 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis] Add missing MC dependency to CMakeLists.txt
Sam Clegg [Thu, 13 Sep 2018 21:17:16 +0000 (21:17 +0000)]
[llvm-exegesis] Add missing MC dependency to CMakeLists.txt

See rL342148

This probably only shows up in BUILD_SHARED_LIBS=ON builds
which might explain how it crept in.

Differential Revision: https://reviews.llvm.org/D52054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342180 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[bindings/go] Add DebugLoc parameter to InsertXXXAtEnd()
Peter Collingbourne [Thu, 13 Sep 2018 21:16:39 +0000 (21:16 +0000)]
[bindings/go] Add DebugLoc parameter to InsertXXXAtEnd()

These functions previously passed nil for the location, which always resulted in a crash.

This is a signature breaking change, but I cannot see how they could have been used before.

Patch by Ben Clayton!

Differential Revision: https://reviews.llvm.org/D51970

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342179 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd dependency on new llvm-cxxmap tool to check-llvm.
Richard Smith [Thu, 13 Sep 2018 21:15:34 +0000 (21:15 +0000)]
Add dependency on new llvm-cxxmap tool to check-llvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342178 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operands from...
Craig Topper [Thu, 13 Sep 2018 20:51:27 +0000 (20:51 +0000)]
[MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operands from inline assembly instructions if they have an associated flag operand.

INLINEASM instructions use extra operands to carry flags. If a register operand is removed without removing the flag operand, then the flags will no longer make sense.

This patch fixes this by preventing the removal when a flag operand is present.

The included test case was generated by MS inline assembly. Longer term maybe we should fix the inline assembly parsing to not generate redundant operands.

Differential Revision: https://reviews.llvm.org/D51829

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342176 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Fix register resizings for inline assembly register operands.
Nirav Dave [Thu, 13 Sep 2018 20:33:56 +0000 (20:33 +0000)]
[X86] Fix register resizings for inline assembly register operands.

When replacing a named register input to the appropriately sized
sub/super-register. In the case of a 64-bit value being assigned to a
register in 32-bit mode, match GCC's assignment.

Reviewers: eli.friedman, craig.topper

Subscribers: nickdesaulniers, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D51502

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342175 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Cleanup pair returns. NFCI.
Nirav Dave [Thu, 13 Sep 2018 20:33:27 +0000 (20:33 +0000)]
[X86] Cleanup pair returns. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342174 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Inefficient pattern for high-bits checking 2 (PR38708)
Roman Lebedev [Thu, 13 Sep 2018 20:33:12 +0000 (20:33 +0000)]
[InstCombine] Inefficient pattern for high-bits checking 2 (PR38708)

Summary:
It is sometimes important to check that some newly-computed value
is non-negative and only n bits wide (where n is a variable.)
There are many ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)

More complicated, canonical pattern:
https://rise4fun.com/Alive/uhA

We do need to have two `switch()`'es like this,
to not mismatch the swappable predicates.

https://bugs.llvm.org/show_bug.cgi?id=38708

Reviewers: spatel, craig.topper, RKSimon

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342173 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PartiallyInlineLibCalls] Add DebugCounter support
George Burgess IV [Thu, 13 Sep 2018 20:33:04 +0000 (20:33 +0000)]
[PartiallyInlineLibCalls] Add DebugCounter support

This adds DebugCounter support to the PartiallyInlineLibCalls pass,
which should make debugging/automated bisection easier in the future.

Patch by Zhizhou Yang!

Differential Revision: https://reviews.llvm.org/D50093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342172 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][InstCombine] Test what happens if 'unefficient high bit check' pattern is on...
Roman Lebedev [Thu, 13 Sep 2018 20:33:02 +0000 (20:33 +0000)]
[NFC][InstCombine] Test what happens if 'unefficient high bit check' pattern is on both sides.

Came up in https://reviews.llvm.org/D52001#1233827
While we don't do a good job here, we at least want to make
sure that we don't have any inf-loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342171 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DCE] Add DebugCounter support
George Burgess IV [Thu, 13 Sep 2018 20:29:50 +0000 (20:29 +0000)]
[DCE] Add DebugCounter support

Patch by Zhizhou Yang!

Differential Revision: https://reviews.llvm.org/D50092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342170 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested."
Volodymyr Sapsai [Thu, 13 Sep 2018 20:24:36 +0000 (20:24 +0000)]
Revert "[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested."

This reverts commit r342150 as it caused test failure

    LLVM-Unit :: Passes/./PluginsTests/PluginsTests.LoadPlugin

on multiple bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342169 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd flag to llvm-profdata to allow symbols in profile data to be remapped, and
Richard Smith [Thu, 13 Sep 2018 20:22:02 +0000 (20:22 +0000)]
Add flag to llvm-profdata to allow symbols in profile data to be remapped, and
add a tool to generate symbol remapping files.

Summary:
The new tool llvm-cxxmap builds a symbol mapping table from a file containing
a description of partial equivalences to apply to mangled names and files
containing old and new symbol tables.

Reviewers: davidxl

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D51470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342168 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix a couple of mangling canonicalizer corner case bugs.
Richard Smith [Thu, 13 Sep 2018 20:00:21 +0000 (20:00 +0000)]
Fix a couple of mangling canonicalizer corner case bugs.

Summary:
The hash computed for an ArrayType was different when first constructed
versus when later profiled due to the constructor default argument, and
we were not tracking constructor / destructor variant as part of the
mangled name AST, leading to incorrect equivalences.

Reviewers: erik.pilkington

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342166 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Fold (xor (min/max X, Y), -1) -> (max/min ~X, ~Y) when X and Y are...
Craig Topper [Thu, 13 Sep 2018 18:52:58 +0000 (18:52 +0000)]
[InstCombine] Fold (xor (min/max X, Y), -1) -> (max/min ~X, ~Y) when X and Y are freely invertible.

This allows the xor to be removed completely.

This might help with recomitting r341674, but seems good regardless.

Coincidentally fixes PR38915.

Differential Revision: https://reviews.llvm.org/D51964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342163 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Add test cases for D51964. NFC
Craig Topper [Thu, 13 Sep 2018 18:52:56 +0000 (18:52 +0000)]
[InstCombine] Add test cases for D51964. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342162 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoCommon infrastructure for reading a profile remapping file and building
Richard Smith [Thu, 13 Sep 2018 18:51:44 +0000 (18:51 +0000)]
Common infrastructure for reading a profile remapping file and building
a mangling remapper from it.

Differential Revision: https://reviews.llvm.org/D51246

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342161 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago [RISCV][MC] Reject bare symbols for the simm6 and simm6nonzero operand types
Ana Pazos [Thu, 13 Sep 2018 18:37:23 +0000 (18:37 +0000)]
 [RISCV][MC] Reject bare symbols for the simm6 and simm6nonzero operand types

Summary:
Fixed assertions due to invalid fixup when encoding compressed instructions
 (c.addi, c.addiw, c.li, c.andi) with bare symbols with/without modifiers.
  This matches GAS behavior as well.

This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer
for the RISC-V assembly language.

Reviewers: asb

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb

Differential Revision: https://reviews.llvm.org/D52005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342160 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RISCV] Fix decoding of invalid instruction with C extension enabled.
Ana Pazos [Thu, 13 Sep 2018 18:21:19 +0000 (18:21 +0000)]
[RISCV] Fix decoding of invalid instruction with C extension enabled.

Summary:
The illegal instruction 0x00 0x00 is being wrongly decoded as
c.addi4spn with 0 immediate.

The invalid instruction 0x01 0x61 is being wrongly decoded as
c.addi16sp with 0 immediate.

This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer
for the RISC-V assembly language.

Reviewers: asb

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb

Differential Revision: https://reviews.llvm.org/D51815

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342159 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Fix signature of `main` in FixFunctionBitcasts
Sam Clegg [Thu, 13 Sep 2018 17:13:10 +0000 (17:13 +0000)]
[WebAssembly] Fix signature of `main` in FixFunctionBitcasts

Also, add a check to ensure that when main has the expected signature
we do not create a wrapper.

Differential Revision: https://reviews.llvm.org/D51562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342157 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Add integer abs testcases for D51873.
Simon Pilgrim [Thu, 13 Sep 2018 17:11:25 +0000 (17:11 +0000)]
[AArch64] Add integer abs testcases for D51873.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342156 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[cmake] Fix missing DEPENDS.
Richard Diamond [Thu, 13 Sep 2018 17:10:44 +0000 (17:10 +0000)]
[cmake] Fix missing DEPENDS.

Not sure how I didn't catch this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342154 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested.
Richard Diamond [Thu, 13 Sep 2018 16:39:52 +0000 (16:39 +0000)]
[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342150 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] remove checks for IsFreeToInvert()
Sanjay Patel [Thu, 13 Sep 2018 16:18:12 +0000 (16:18 +0000)]
[InstCombine] remove checks for IsFreeToInvert()

I accidentally committed this diff with rL342147 because
I had applied D51964. We probably do need those checks,
but D51964 has tests and more discussion/motivation,
so they should be re-added with that patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342149 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRenovate CMake files in the `llvm-(cfi-verify|exegesis|mca)` tools.
Richard Diamond [Thu, 13 Sep 2018 16:15:03 +0000 (16:15 +0000)]
Renovate CMake files in the `llvm-(cfi-verify|exegesis|mca)` tools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342148 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] reorder folds to reduce chance of infinite loops
Sanjay Patel [Thu, 13 Sep 2018 16:04:06 +0000 (16:04 +0000)]
[InstCombine] reorder folds to reduce chance of infinite loops

I don't have a test case for this, but it's motivated by
the discussion in D51964, and I've added TODO comments for
the better fix - move simplifications into instsimplify
because that's more efficient and reduces risk of infinite
loops in instcombine caused by transforms trying to do the
opposite folds.

In this case, we know that the transform that tries to move
'not' through min/max can be fooled by the multiple uses
of a value in another min/max, so try to squash the
foldSPFofSPF() patterns first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342147 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Allow truncs as sources in ARM CGP
Sam Parker [Thu, 13 Sep 2018 15:14:12 +0000 (15:14 +0000)]
[ARM] Allow truncs as sources in ARM CGP

We previously only allowed truncs as sinks, but now allow them as
sources too. We do this by checking that the result type is the
narrow type that we're trying to optimise for.

Differential Revision: https://reviews.llvm.org/D51978

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342141 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Fix FixConst for ARMCodeGenPrepare
Sam Parker [Thu, 13 Sep 2018 14:48:10 +0000 (14:48 +0000)]
[ARM] Fix FixConst for ARMCodeGenPrepare

Part of FixConsts wrongly assumes either a 8- or 16-bit constant
which can result in the wrong constants being generated during
promotion.

Differential Revision: https://reviews.llvm.org/D52032

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342140 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MC/Dwarf] Unclamp DWARF linetables format on Darwin.
Jonas Devlieghere [Thu, 13 Sep 2018 13:13:50 +0000 (13:13 +0000)]
[MC/Dwarf] Unclamp DWARF linetables format on Darwin.

In r319995, we fixed the line table format to version 2 on Darwin
because dsymutil didn't yet understand the new format which caused test
failures for the LLDB bots. This has been resolved in the meantime so
there's no reason to keep this limitation.

rdar://problem/35968332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342136 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix not preserving alignent in call setups
Matt Arsenault [Thu, 13 Sep 2018 12:14:31 +0000 (12:14 +0000)]
AMDGPU: Fix not preserving alignent in call setups

If an argument was passed on the stack, this
was using the default alignment.

I'm not sure there's an observable change from this. This
was observable due to bugs in expansion of unaligned
loads and stores, but since that is fixed I don't think
this matters much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342133 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDAG: Fix expansion of unaligned FP loads and stores
Matt Arsenault [Thu, 13 Sep 2018 12:14:23 +0000 (12:14 +0000)]
DAG: Fix expansion of unaligned FP loads and stores

This was trying to scalarizing a scalar FP type,
resulting in an assert.

Fixes unaligned f64 stack stores for AMDGPU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342132 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix some outdated datalayouts in tests
Matt Arsenault [Thu, 13 Sep 2018 11:56:28 +0000 (11:56 +0000)]
AMDGPU: Fix some outdated datalayouts in tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342131 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix unused variable warning. NFCI.
Simon Pilgrim [Thu, 13 Sep 2018 10:54:23 +0000 (10:54 +0000)]
Fix unused variable warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342128 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4.
Tim Northover [Thu, 13 Sep 2018 10:28:05 +0000 (10:28 +0000)]
ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4.

The Technical Reference Manuals for these two CPUs state that branching
to an unaligned 32-bit instruction incurs an extra pipeline reload
penalty. That's bad.

This also enables the optimization at -Os since it costs on average one
byte per loop in return for 1 cycle per iteration, which is pretty good
going.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342127 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[XRay] Bug fixes for FDR custom event and arg-logging
Dean Michael Berris [Thu, 13 Sep 2018 09:25:42 +0000 (09:25 +0000)]
[XRay] Bug fixes for FDR custom event and arg-logging

Summary:
This change has a number of fixes for FDR mode in compiler-rt along with
changes to the tooling handling the traces in llvm.

In the runtime, we do the following:

- Advance the "last record" pointer appropriately when writing the
  custom event data in the log.

- Add XRAY_NEVER_INSTRUMENT in the rewinding routine.

- When collecting the argument of functions appropriately marked, we
  should not attempt to rewind them (and reset the counts of functions
  that can be re-wound).

In the tooling, we do the following:

- Remove the state logic in BlockIndexer and instead rely on the
  presence/absence of records to indicate blocks.

- Move the verifier into a loop associated with each block.

Reviewers: mboerger, eizan

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D51965

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342122 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago [AMDGPU] Load divergence predicate refactoring
Alexander Timofeev [Thu, 13 Sep 2018 09:06:56 +0000 (09:06 +0000)]
[AMDGPU] Load divergence predicate refactoring

    Differential revision: https://reviews.llvm.org/D51931

    Reviewers: rampitec

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342120 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[mips] Enable the mnemonic spell corrector
Simon Atanasyan [Thu, 13 Sep 2018 08:38:03 +0000 (08:38 +0000)]
[mips] Enable the mnemonic spell corrector

This implements suggesting alternative mnemonics when an invalid one is
specified. For example `addru $9, $6, 17767` leads to the following
error message:

error: unknown instruction, did you mean: add, addiu, addu, maddu?

Differential revision: https://reviews.llvm.org/D40646

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342119 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis][NFC] Remove dead parameter.
Clement Courbet [Thu, 13 Sep 2018 08:06:29 +0000 (08:06 +0000)]
[llvm-exegesis][NFC] Remove dead parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342118 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-exegesis][NFC] Split BenchmarkRunner class
Clement Courbet [Thu, 13 Sep 2018 07:40:53 +0000 (07:40 +0000)]
[llvm-exegesis][NFC] Split BenchmarkRunner class

Summary:
The snippet-generation part goes to the SnippetGenerator class.

This will allow benchmarking arbitrary code (see PR38437).

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342117 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago [AMDGPU] Preliminary patch for divergence driven instruction selection. Load...
Alexander Timofeev [Thu, 13 Sep 2018 06:34:56 +0000 (06:34 +0000)]
[AMDGPU] Preliminary patch for divergence driven instruction selection. Load offset inlining pattern changed.

    Differential revision: https://reviews.llvm.org/D51975

    Reviewers: rampitec

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342115 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Type legalize v2i32 div/rem by scalarizing rather than promoting
Craig Topper [Thu, 13 Sep 2018 06:13:37 +0000 (06:13 +0000)]
[X86] Type legalize v2i32 div/rem by scalarizing rather than promoting

Summary:
Previously we type legalized v2i32 div/rem by promoting to v2i64. But we don't support div/rem of vectors so op legalization would then scalarize it using i64 scalar ops since it doesn't know about the original promotion. 64-bit scalar divides on Intel hardware are known to be slow and in 32-bit mode they require a libcall.

This patch switches type legalization to do the scalarizing itself using i32.

It looks like the division by power of 2 optimization is still kicking in and leaving the code as a vector. The division by other constant optimization doesn't kick in pre type legalization since it ignores illegal types. And previously, after type legalization we scalarized the v2i64 since we don't have v2i64 MULHS/MULHU support.

Another option might be to widen v2i32 to v4i32 so we could do division by constant optimizations, but we'd have to be careful to only do that for constant divisors or we risk scalaring to 4 scalar divides.

Reviewers: RKSimon, spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51325

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342114 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoARM: correct the relocation type for `bl` on WoA
Saleem Abdulrasool [Thu, 13 Sep 2018 04:55:08 +0000 (04:55 +0000)]
ARM: correct the relocation type for `bl` on WoA

The `IMAGE_REL_ARM_BRANCH20T` applies only to a `b.w` instruction.  A
thumb-2 `bl` should be relocated using a `IMAGE_REL_ARM_BRANCH24T`.
Correct the relocation that we emit in such a case.

Resolves PR38620!  Based on the patch by Jordan Rhee!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342109 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Add Requires: asserts where needed
Max Kazantsev [Thu, 13 Sep 2018 04:43:24 +0000 (04:43 +0000)]
[NFC] Add Requires: asserts where needed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342108 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Use expensive asserts in relevant LICM tests
Max Kazantsev [Thu, 13 Sep 2018 04:00:39 +0000 (04:00 +0000)]
[NFC] Use expensive asserts in relevant LICM tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342107 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove isAsCheapAsAMove from v128.const
Thomas Lively [Thu, 13 Sep 2018 02:50:57 +0000 (02:50 +0000)]
Remove isAsCheapAsAMove from v128.const

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342106 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove isAsCheapAsAMove from mem ops
Thomas Lively [Thu, 13 Sep 2018 02:50:57 +0000 (02:50 +0000)]
Remove isAsCheapAsAMove from mem ops

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342105 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Add missing SIMD instruction attributes
Thomas Lively [Thu, 13 Sep 2018 02:50:56 +0000 (02:50 +0000)]
[WebAssembly] Add missing SIMD instruction attributes

Summary:
These attributes are copied from equivalent instructions in
WebAssemblyInstrInfo.td.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342104 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoSTLExtras: Add some more algorithm wrappers
David Blaikie [Thu, 13 Sep 2018 00:02:03 +0000 (00:02 +0000)]
STLExtras: Add some more algorithm wrappers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342102 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDebugInfo/PDB: Remove unused member
David Blaikie [Thu, 13 Sep 2018 00:02:02 +0000 (00:02 +0000)]
DebugInfo/PDB: Remove unused member

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342101 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agodwarfdump: Improve performance on large DWP files
David Blaikie [Wed, 12 Sep 2018 23:39:51 +0000 (23:39 +0000)]
dwarfdump: Improve performance on large DWP files

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342099 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] improve formatting for select+setcc code; NFC
Sanjay Patel [Wed, 12 Sep 2018 23:03:50 +0000 (23:03 +0000)]
[DAGCombiner] improve formatting for select+setcc code; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342095 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agofix 80-column violation with clang-format
Adrian Prantl [Wed, 12 Sep 2018 22:57:28 +0000 (22:57 +0000)]
fix 80-column violation with clang-format

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342094 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PDB] Remove all clone() methods.
Zachary Turner [Wed, 12 Sep 2018 22:57:03 +0000 (22:57 +0000)]
[PDB] Remove all clone() methods.

These are dead code and encourage poor usage patterns, so I'm
removing them.  They weren't called anywhere anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342093 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Use shuffles when lowering "gather" shufflevectors
Krzysztof Parzyszek [Wed, 12 Sep 2018 22:14:52 +0000 (22:14 +0000)]
[Hexagon] Use shuffles when lowering "gather" shufflevectors

Shufflevector instructions in LLVM IR that extract a subset of elements
of a longer input into a shorter vector can be done using VECTOR_SHUFFLEs.
This will avoid expanding them into constly extracts and inserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342091 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Hexagon] Improve the selection algorithm in scalarizeShuffle
Krzysztof Parzyszek [Wed, 12 Sep 2018 22:10:58 +0000 (22:10 +0000)]
[Hexagon] Improve the selection algorithm in scalarizeShuffle

Use topological ordering for newly generated nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342090 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] sys::fs::directory_entry includes the file_type.
Kristina Brooks [Wed, 12 Sep 2018 22:08:10 +0000 (22:08 +0000)]
[Support] sys::fs::directory_entry includes the file_type.

This is available on most platforms (Linux/Mac/Win/BSD) with no extra syscalls.
On other platforms (e.g. Solaris) we stat() if this information is requested.

This will allow switching clang's VFS to efficiently expose (path, type) when
traversing a directory. Currently it exposes an entire Status, but does so by
calling fs::status() on all platforms.
Almost all callers only need the path, and all callers only need (path, type).

Patch by sammccall (Sam McCall)

Differential Revision: https://reviews.llvm.org/D51918

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342089 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-cov] Delete custom JSON serialization code (NFC)
Vedant Kumar [Wed, 12 Sep 2018 21:59:38 +0000 (21:59 +0000)]
[llvm-cov] Delete custom JSON serialization code (NFC)

Teach llvm-cov to use the new llvm JSON library, and remove some
redundant/brittle JSON serialization tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342088 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Merge ExecutionSessionBase with ExecutionSession by moving a couple of
Lang Hames [Wed, 12 Sep 2018 21:49:02 +0000 (21:49 +0000)]
[ORC] Merge ExecutionSessionBase with ExecutionSession by moving a couple of
template methods in JITDylib out-of-line.

This also splits JITDylib::define into a pair of template methods, one taking an
lvalue reference and the other an rvalue reference. This simplifies the
templates at the cost of a small amount of code duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342087 91177308-0d34-0410-b5e6-96231b3b80d8