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Alexander Graf [Sat, 8 Dec 2012 00:49:52 +0000 (01:49 +0100)]
openpic: convert simple reg operations to builtin bitops
The openpic code has its own bitmap code to access bits inside of a
bitmap. However, that is overkill when we simply want to check for a
bit inside of a uint32_t.
So instead, let's use normal bit masks and C builtin shifts and ands.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 8 Dec 2012 00:25:21 +0000 (01:25 +0100)]
openpic: remove unused type variable
The openpic source irqs are carrying around a type indicator that
is never accessed by anything. Remove it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Sat, 8 Dec 2012 00:04:48 +0000 (01:04 +0100)]
openpic: unify memory api subregions
The only difference between the "openpic" and "mpic" memory api subregion
descriptors is the endianness. Unify them as openpic accessors with explicit
endianness markers in their names.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 23:58:54 +0000 (00:58 +0100)]
openpic: combine openpic and mpic reset functions
The openpic and mpic reset handlers are almost identical. Combine
them and extract the differences into state variables.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 23:43:42 +0000 (00:43 +0100)]
openpic: merge mpic and openpic timer handling
The openpic and mpic timer handling code is basically the same.
Merge them.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 22:51:09 +0000 (23:51 +0100)]
openpic: combine mpic and openpic irq raise functions
The IRQ raise mechanisms of the OpenPIC and MPIC controllers is identical,
just that the MPIC one can also raise critical interrupts.
Combine those two and check for critical raise capability during runtime.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 16:15:15 +0000 (17:15 +0100)]
openpic: Convert subregions to memory api
The "openpic" controller is currently using one big region and does
subregion dispatching manually. Move this to the memory api.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 15:45:40 +0000 (16:45 +0100)]
openpic: combine mpic and openpic src handlers
The MPIC source irq handler suddenly became identical to the standard
OpenPIC source irq handler. Combine them into the same function.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 15:31:55 +0000 (16:31 +0100)]
openpic: update to proper memory api
The openpic code was still using the old mmio memory api. Convert it to
be a generic memory api user and clean up some code that becomes redundant
that way.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 7 Dec 2012 15:10:34 +0000 (16:10 +0100)]
mpic: Unify numbering scheme
MPIC interrupt numbers in Linux (device tree) and in QEMU are different,
because QEMU takes the sparseness of the IRQ number space into account.
Remove that cleverness and instead assume a flat number space. This makes
the code easier to understand, because we are actually aligned with Linux
on the view of our worlds.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Thu, 6 Dec 2012 14:59:27 +0000 (15:59 +0100)]
openpic: Remove unused code
The openpic code had a few WIP bits left that nobody reanimated within
the last few years. Remove that code.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Hervé Poussineau <hpoussin@reactos.org>
David Gibson [Mon, 3 Dec 2012 16:42:13 +0000 (16:42 +0000)]
pseries: Don't allow TCE (iommu) tables to be registered with duplicate LIOBNs
The PAPR specification requires that every bus or device mediated by the
IOMMU have a unique Logical IO Bus Number (LIOBN). This patch adds a check
to enforce this, which will help catch errors in configuration earlier.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Bharat Bhushan [Wed, 10 Oct 2012 04:28:28 +0000 (04:28 +0000)]
Adding BAR0 for e500 PCI controller
PCI Root complex have TYPE-1 configuration header while PCI endpoint
have type-0 configuration header. The type-1 configuration header have
a BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pci
address space to CCSR address space. This can used for 2 purposes: 1)
for MSI interrupt generation 2) Allow CCSR registers access when configured
as PCI endpoint, which I am not sure is a use case with QEMU-KVM guest.
What I observed is that when guest read the size of BAR0 of host controller
configuration header (TYPE1 header) then it always reads it as 0. When
looking into the QEMU hw/ppce500_pci.c, I do not find the PCI controller
device registering BAR0. I do not find any other controller also doing so
may they do not use BAR0.
There are two issues when BAR0 is not there (which I can think of):
1) There should be BAR0 emulated for PCI Root complex (TYPE1 header) and
when reading the size of BAR0, it should give size as per real h/w.
2) Do we need this BAR0 inbound address translation?
When BAR0 is of non-zero size then it will be configured for PCI
address space to local address(CCSR) space translation on inbound access.
The primary use case is for MSI interrupt generation. The device is
configured with an address offsets in PCI address space, which will be
translated to MSI interrupt generation MPIC registers. Currently I do
not understand the MSI interrupt generation mechanism in QEMU and also
IIRC we do not use QEMU MSI interrupt mechanism on e500 guest machines.
But this BAR0 will be used when using MSI on e500.
I can see one more issue, There are ATMUs emulated in hw/ppce500_pci.c,
but i do not see these being used for address translation.
So far that works because pci address space and local address space are 1:1
mapped. BAR0 inbound translation + ATMU translation will complete the address
translation of inbound traffic.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
[agraf: fix double variable assignment w/o read]
Signed-off-by: Alexander Graf <agraf@suse.de>
Bharat Bhushan [Wed, 10 Oct 2012 04:28:27 +0000 (04:28 +0000)]
e500: Adding CCSR memory region
All devices are also placed under CCSR memory region.
The CCSR memory region is exported to pci device. The MSI interrupt
generation is the main reason to export the CCSR region to PCI device.
This put the requirement to move mpic under CCSR region, but logically
all devices should be under CCSR. So this patch places all emulated
devices under ccsr region.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 12 Nov 2012 16:46:58 +0000 (16:46 +0000)]
pseries: Update SLOF for NVRAM support
Now that we have implemented PAPR compatible NVRAM interfaces in qemu, this
updates the SLOF firmware to actually initialize and use the NVRAM as a
PAPR guest firmware is expected to do.
This SLOF update also includes an ugly but useful workaround for a bug in
the SLES11 installer which caused it to fail under KVM.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 12 Nov 2012 16:46:57 +0000 (16:46 +0000)]
pseries: Implement PAPR NVRAM
The PAPR specification requires a certain amount of NVRAM, accessed via
RTAS, which we don't currently implement in qemu. This patch addresses
this deficiency, implementing the NVRAM as a VIO device, with some glue to
instantiate it automatically based on a machine option.
The machine option specifies a drive id, which is used to back the NVRAM,
making it persistent. If nothing is specified, the driver instead simply
allocates space for the NVRAM, which will not be persistent
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 12 Nov 2012 16:46:55 +0000 (16:46 +0000)]
pseries: Split xics irq configuration from state information
Currently the XICS irq controller code has a per-irq state structure which
amongst other things includes whether the interrupt is level or message
triggered - this is configured by the platform code, and is not directly
visible to the guest. This leads to a slightly awkward construct at reset
time where we need to reset everything in the state structure _except_ the
lsi/msi flag, which needs to retain the information given at platform init
time.
More importantly this flag will make matching the qemu state to the KVM
state for the upcoming in-kernel XICS implementation more awkward. This
patch, therefore, removes this flag from the per-irq state structure,
instead adding a parallel array giving the lsi/msi configuration per irq.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 12 Nov 2012 16:46:54 +0000 (16:46 +0000)]
pseries: Add tracepoints to the XICS interrupt controller
This patch adds tracing / debugging calls to the XICS interrupt controller
implementation used on the pseries machine.
Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Ben Herrenschmidt [Mon, 12 Nov 2012 16:46:53 +0000 (16:46 +0000)]
pseries: Allow RTAS tokens without a qemu handler
Kernel-based RTAS calls will not have a qemu handler, but will
still be registered in qemu in order to be assigned a token
number and appear in the device-tree.
Let's test for the name being NULL rather than the handler
when deciding to skip an entry while building the device-tree
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Michael Ellerman [Mon, 12 Nov 2012 16:46:52 +0000 (16:46 +0000)]
pseries: Return the token when we register an RTAS call
The kernel will soon be able to service some RTAS calls. However the
choice of tokens will still be up to userspace. To support this have
spapr_rtas_register() return the token that is allocated for an
RTAS call, that allows the calling code to tell the kernel what the
token value is.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Ben Herrenschmidt [Mon, 12 Nov 2012 16:46:50 +0000 (16:46 +0000)]
pseries: Use #define for XICS base irq number
Currently the lowest "real" irq number for the XICS irq controller (as
opposed to numbers reserved for IPIs and other special purposes) is
hard coded as 16 in two places - in xics_system_init() and in spapr.c.
As well as being generally bad practice, we're going to need to change this
number soon to fit in with the in-kernel XICS implementation. This patch
adds a #define for this number to avoid future breakage.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 12 Nov 2012 16:46:49 +0000 (16:46 +0000)]
pseries: Fix incorrect initialization of interrupt controller
Currently in the reset code for the XICS interrupt controller, we
initialize the pending_priority field to 0 (most favored, by XICS
convention). This is incorrect, since there is no pending interrupt, it
should be set to least favored - 0xff. At the moment our XICS
implementation doesn't get hurt by this edge case, but it does confuse the
upcoming kernel XICS implementation.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Anthony Liguori [Mon, 10 Dec 2012 14:35:15 +0000 (08:35 -0600)]
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
* afaerber/qom-cpu:
target-i386: Postpone cpuid_level update to realize time
target-i386: Use define for cpuid vendor string size
target-i386: Separate feature string parsing from CPU model lookup
target-i386/cpu.c: Coding style fixes
qdev: qdev_create(): use error_report() instead of hw_error()
sysemu.h: Include qemu-types.h instead of qemu-common.h
Create qemu-types.h for struct typedefs
qlist.h: Do not include qemu-common.h
qga/channel-posix.c: Include headers it needs
qapi/qmp-registry.c: Include headers it needs
ui/vnc-palette.c: Include headers it needs
user: Rename qemu-types.h to qemu-user-types.h
user: Move *-user/qemu-types.h to main directory
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Mon, 10 Dec 2012 14:34:29 +0000 (08:34 -0600)]
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
* stefanha/trivial-patches:
pc_sysfw: Plug memory leak on pc_fw_add_pflash_drv() error path
qemu-options: Fix space at EOL
Fix spelling in comments and documentation
Clean up pci_drive_hot_add()'s use of BlockInterfaceType
arm: a9mpcore: remove un-used ptimer_iomem field
target-sparc: Remove t0, t1 from CPUSPARCState
target-m68k: Remove t1 from CPUM68KState
target-alpha: Remove t0, t1 from CPUAlphaState
s390x: Spelling fixes (endianess -> endianness, occured -> occurred)
Fix comments (adress -> address, layed -> laid, wierd -> weird)
Fix spelling (prefered -> preferred)
configure: Remove stray debug output
sd: Send debug printfery to stderr not stdout
Conflicts:
configure
Resolve spelling conflict in configure.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Mon, 10 Dec 2012 14:33:11 +0000 (08:33 -0600)]
Merge remote-tracking branch 'kraxel/acpi.1' into staging
* kraxel/acpi.1:
acpi: drop debug port
q35: update lpc pci config space according to configured devices
apci: switch piix4 pci hotplug to memory api
acpi: remove acpi_gpe_blk
apci: switch piix4 gpe to memory api
acpi: fix piix4 smbus mapping
acpi: switch smbus to memory api
acpi: cleanup ich9 memory region
apci: switch ich9 smi to memory api
apci: switch ich9 gpe to memory api
acpi: cleanup vt82c686 memory region
acpi: cleanup piix4 memory region
apci: switch evt to memory api
apci: switch cnt to memory api
apci: switch timer to memory api
apci: switch vt82c686 to memory api
apci: switch ich9 to memory api
apci: switch piix4 to memory api
Conflicts:
hw/lpc_ich9.c
Resolved merge conflict due to apm_init adding an argument.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Mon, 10 Dec 2012 14:32:15 +0000 (08:32 -0600)]
Merge remote-tracking branch 'aneesh/for-upstream' into staging
* aneesh/for-upstream:
virtfs-proxy-helper: use setresuid and setresgid
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Mon, 10 Dec 2012 14:31:19 +0000 (08:31 -0600)]
Merge remote-tracking branch 'kraxel/usb.74' into staging
* kraxel/usb.74:
usb-tablet: Allow connecting to ehci
ehci: Lower timer freq when the periodic schedule is idle
usb: Allow overriding of usb_desc at the device level
usb: Don't allow USB_RET_ASYNC for interrupt packets
usb: Call wakeup when data becomes available for all devices with int eps
add pc-1.4
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Peter Maydell [Fri, 7 Dec 2012 15:39:13 +0000 (15:39 +0000)]
configure: Default to 'cc', not 'gcc'
Default to 'cc' as our compiler, rather than 'gcc'. We used to have
to insist on gcc when we still kept the CPU env in a fixed global
register, but this is no longer necessary and we will now compile OK
on clang as well as gcc. Using 'cc' should generally result in us
using the most standard and maintained system compiler for the
platform. (For instance on newer MacOS X 'gcc' exists but is an
elderly compiler provided mostly for legacy reasons, and 'cc'
(which is clang) is definitely the better choice.) On Linux there
will generally be no user-visible change since cc will be gcc.
This changeover necessitates a slight reworking of how we set the
'cc' variable, because GNU cross toolchains generally provide a
'${cross_prefix}gcc' but not a '${cross_prefix}cc'.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Peter Maydell [Fri, 12 Oct 2012 03:55:51 +0000 (03:55 +0000)]
linux-user: Merge pread/pwrite into pread64/pwrite64
The Linux syscalls underlying pread() and pwrite() take a 64 bit
offset on all architectures, even if some of them name the syscall
"pread/pwrite" rather than "pread64/pwrite64" for historical reasons.
So move the four QEMU target architectures (arm, i386, sparc,
unicore32) which were defining TARGET_NR_pread/pwrite to define
TARGET_NR_pread64/pwrite64 instead, and drop the TARGET_NR_pread/pwrite
implementation code completely.
(Based on examination of the kernel sources for the four architectures
this patch affects.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:27 +0000 (07:15 +0400)]
target-xtensa: use movcond where possible
Use movcond for all sorts of conditional moves, ABS, CLAMPS, MIN/MAX
opcodes.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:26 +0000 (07:15 +0400)]
target-xtensa: add s32c1i unit tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:25 +0000 (07:15 +0400)]
target-xtensa: add SR accessibility unit tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:24 +0000 (07:15 +0400)]
target-xtensa: implement MISC SR
The Miscellaneous Special Registers Option provides zero to four scratch
registers within the processor readable and writable by RSR, WSR, and
XSR. These registers are privileged. They may be useful for some
application-specific exception and interrupt processing tasks in the
kernel. The MISC registers are undefined after reset.
See ISA, 4.7.3 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:23 +0000 (07:15 +0400)]
target-xtensa: better control rsr/wsr/xsr access to SRs
There are read-only (DEBUGCAUSE, PRID) and write-only (INTCLEAR) SRs,
and INTERRUPT/INTSET SR allows rsr/wsr, but not xsr. Raise illeagal
opcode exception on illegal access to these SRs.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:22 +0000 (07:15 +0400)]
target-xtensa: restrict available SRs by enabled options
Beginning with the RA-2004.1 release, SR access instructions (rsr, wsr,
xsr) are associated with their corresponding SR and raise illegal opcode
exception in case the register is not configured for the core.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:21 +0000 (07:15 +0400)]
target-xtensa: implement CACHEATTR SR
In XEA1, the Options for Memory Protection and Translation and the
corresponding TLB management instructions are not available. Instead,
functionality similar to the Region Protection Option is available
through the cache attribute register. See ISA, A.2.14 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Max Filippov [Wed, 5 Dec 2012 03:15:20 +0000 (07:15 +0400)]
target-xtensa: implement ATOMCTL SR
ATOMCTL SR controls s32c1i opcode behavior depending on targeted memory
type. See ISA, 4.3.12.4 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Blue Swirl [Sat, 8 Dec 2012 17:50:57 +0000 (17:50 +0000)]
Merge branch 'master' of git.qemu-project.org:/pub/git/qemu
* 'master' of git.qemu-project.org:/pub/git/qemu:
target-mips: Fix incorrect shift for SHILO and SHILOV
target-mips: Fix incorrect code and test for INSV
xilinx_uartlite: Accept input after rx FIFO pop
xilinx_uartlite: suppress "cannot receive message"
xilinx_axienet: Implement R_IS behaviour
Eduardo Habkost [Tue, 4 Dec 2012 18:32:58 +0000 (16:32 -0200)]
finally kill cpudef config section support
The external CPU models were removed on QEMU 1.2, and the support for
the "cpudef" config sections was documented as deprecated, but the
actual removal of the config section was pending.
Now that QEMU 1.3 was released, we can finally kill the support for
cpudef config sections, and support only the built-in CPU models from
target-i386/cpu.c.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Blue Swirl [Sat, 8 Dec 2012 14:28:13 +0000 (14:28 +0000)]
Merge branch 'memory-ioport' of git://github.com/afaerber/qemu-cpu
* 'memory-ioport' of git://github.com/afaerber/qemu-cpu:
hw/dma.c: Replace register_ioport_*
hw/pc.c: Replace register_ioport_*
serial: Replace register_ioport_*
hw/cirrus_vga.c: Replace register_ioport_*
hw/apm.c: Replace register_ioport_*
isa: Add isa_address_space_io()
Peter Maydell [Wed, 31 Oct 2012 09:30:47 +0000 (09:30 +0000)]
HACKING: List areas where we may rely on impdef C behaviour
Add a section to HACKING saying which version of the C spec
we use and describing the bits of implementation defined C
compiler behaviour which C code in QEMU is allowed to rely on.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Gerd Hoffmann [Tue, 27 Nov 2012 12:19:40 +0000 (13:19 +0100)]
pixman: require 0.18.4 or newer
When older versions are found the internal pixman version is prefered.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Evgeny Voevodin [Wed, 21 Nov 2012 07:43:07 +0000 (11:43 +0400)]
TCG: Remove unused global gen_opc_ arrays.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Evgeny Voevodin [Wed, 21 Nov 2012 07:43:06 +0000 (11:43 +0400)]
TCG: Use gen_opc_instr_start from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Evgeny Voevodin [Wed, 21 Nov 2012 07:43:05 +0000 (11:43 +0400)]
TCG: Use gen_opc_icount from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Evgeny Voevodin [Wed, 21 Nov 2012 07:43:04 +0000 (11:43 +0400)]
TCG: Use gen_opc_pc from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Evgeny Voevodin [Wed, 21 Nov 2012 07:43:03 +0000 (11:43 +0400)]
tcg/tcg.h: Duplicate global TCG gen_opc_ arrays into TCGContext.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Brad Smith [Mon, 19 Nov 2012 09:22:12 +0000 (04:22 -0500)]
curses: Remove OpenBSD workaround
I removed the same sort of workaround for OpenBSD within the
configure script with commit
4dcc3f5876fa638d5c35bd47be3b717ea74cc2e7
but didn't bother to grep further to come across this same chunk
of code in the curses code itself. So the following diff removes
the same workaround chunk within the curses code.
Signed-off-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Richard Henderson [Thu, 1 Nov 2012 22:20:46 +0000 (09:20 +1100)]
exec: Advise huge pages for the TCG code gen buffer
After allocating 32MB or more contiguous memory, huge pages
would seem to be ideal.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Igor Mammedov [Mon, 22 Oct 2012 15:03:00 +0000 (17:03 +0200)]
target-i386: Postpone cpuid_level update to realize time
Delay capping cpuid_level to 7 to realize time so property setters
for cpuid_7_0_ebx_features and "level" could be used in any order/time
between x86_cpu_initfn() and x86_cpu_realize().
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Markus Armbruster [Fri, 23 Nov 2012 18:12:18 +0000 (19:12 +0100)]
pc_sysfw: Plug memory leak on pc_fw_add_pflash_drv() error path
Harmless, because we the error inevitably leads to another, fatal one
in pc_system_flash_init(): PC system firmware (pflash) not available.
Fix it anyway.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Michal Privoznik [Fri, 23 Nov 2012 08:52:39 +0000 (09:52 +0100)]
qemu-options: Fix space at EOL
There's no need to add a space at the end of line.
Moreover, it can make problems in some projects that
store the help output into a file (and run couple of
tests based on that) and have space at EOL forbidden.
Signed-off-by: Michal Privoznik <mprivozn@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Weil [Fri, 23 Nov 2012 06:26:04 +0000 (07:26 +0100)]
Fix spelling in comments and documentation
These spelling bugs were found by codespell:
supressing -> suppressing
transfered -> transferred
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Markus Armbruster [Thu, 22 Nov 2012 14:16:36 +0000 (15:16 +0100)]
Clean up pci_drive_hot_add()'s use of BlockInterfaceType
pci_drive_hot_add() parameter type has the wrong type: int instead of
BlockInterfaceType. It's actually redundant, so we can just drop it.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Crosthwaite [Mon, 19 Nov 2012 05:13:49 +0000 (15:13 +1000)]
arm: a9mpcore: remove un-used ptimer_iomem field
I'm guessing this is a hangover from a previous coreification of the mptimer
sub-module. This field is completely unused - removed.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Richard Henderson [Thu, 1 Nov 2012 21:36:37 +0000 (08:36 +1100)]
target-sparc: Remove t0, t1 from CPUSPARCState
These fields are no longer used.
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Richard Henderson [Thu, 1 Nov 2012 21:36:36 +0000 (08:36 +1100)]
target-m68k: Remove t1 from CPUM68KState
This field is no longer used.
Cc: Paul Brook <paul@codesourcery.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Richard Henderson [Thu, 1 Nov 2012 21:36:35 +0000 (08:36 +1100)]
target-alpha: Remove t0, t1 from CPUAlphaState
These fields are no longer (or were never?) used.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Weil [Fri, 2 Nov 2012 07:35:54 +0000 (08:35 +0100)]
s390x: Spelling fixes (endianess -> endianness, occured -> occurred)
Replace also "write into" by "write to".
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Weil [Fri, 2 Nov 2012 07:29:53 +0000 (08:29 +0100)]
Fix comments (adress -> address, layed -> laid, wierd -> weird)
Remove also a duplicated 'the'.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Weil [Fri, 2 Nov 2012 07:14:12 +0000 (08:14 +0100)]
Fix spelling (prefered -> preferred)
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Maydell [Sat, 20 Oct 2012 19:37:04 +0000 (20:37 +0100)]
configure: Remove stray debug output
Rather than printing a message saying we're silently falling
back to gthread coroutines when running on MacOS, actually
do it silently.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Crosthwaite [Thu, 15 Nov 2012 06:32:53 +0000 (16:32 +1000)]
sd: Send debug printfery to stderr not stdout
Some debug printfs for SD are coming up in stdout. Redirected them to stderr
instead.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Igor Mammedov [Mon, 22 Oct 2012 15:03:10 +0000 (17:03 +0200)]
target-i386: Use define for cpuid vendor string size
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 4 Dec 2012 19:34:39 +0000 (17:34 -0200)]
target-i386: Separate feature string parsing from CPU model lookup
Instead of parsing the whole cpu_model string inside
cpu_x86_find_by_name(), first split it into the CPU model name and the
full feature string, then parse the feature string into pieces.
When using CPU model classes, those two pieces of information will be
used at different moments (CPU model name will be used to find CPU
class, feature string will be used after CPU object was created), so
making the split in two steps will make it easier to refactor the code
later.
This should also help on the CPU properties work, that will just need to
replace the cpu_x86_parse_featurestr() logic (and can keep the CPU model
lookup code as-is).
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 4 Dec 2012 19:34:38 +0000 (17:34 -0200)]
target-i386/cpu.c: Coding style fixes
- Use spaces instead of tabs on cpu_x86_cpuid().
- Use braces on 'if' statement cpu_x86_find_by_name().
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 4 Dec 2012 13:19:34 +0000 (11:19 -0200)]
qdev: qdev_create(): use error_report() instead of hw_error()
hw_error() is specific for fatal hardware emulation errors, not for
internal errors related to the qdev object/class abstraction or object
initialization.
Replace it with an error_report() call, followed by abort().
This will also help reduce dependencies of the qdev code (as hw_error()
is from cpus.o, and depends on the CPU list from exec.o).
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 23:44:08 +0000 (21:44 -0200)]
sysemu.h: Include qemu-types.h instead of qemu-common.h
It just needs the Monitor and DeviceState typedefs, so it doesn't need
all of qemu-common.h.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 23:41:52 +0000 (21:41 -0200)]
Create qemu-types.h for struct typedefs
Instead of keeping all those struct typedefs in qemu-common.h, move it
to a header that can be safely included by other headers, containing
only the struct typedefs and not pulling in other dependencies.
Also, move some of the qdev-core.h typedefs to the new file, too, so
other headers don't need to include qdev-core.h only because of
DeviceState and other typedefs.
This will help us remove qemu-common.h dependencies from some headers
later.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 23:55:19 +0000 (21:55 -0200)]
qlist.h: Do not include qemu-common.h
I don't know why it was including it, as I don't see any code that
depends on anything from qemu-common.h.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 23:37:20 +0000 (21:37 -0200)]
qga/channel-posix.c: Include headers it needs
Include:
- <errno.h> for errno
- <unistd.h> & <fcntl.h> for fcntl()
- <stdlib.h> for exit()
- "osdep.h" for qemu_open()
Some of those headers were probably being included by accident because
some other headers were including qemu-common.h, but those headers
should eventually stop including qemu-common.h.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 23:35:44 +0000 (21:35 -0200)]
qapi/qmp-registry.c: Include headers it needs
Include:
- <glib.h> for g_malloc0()
- <string.h> for strcmp()
Some of those headers were probably being included by accident because
some other headers were including qemu-common.h, but those headers
should eventually stop including qemu-common.h.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 23:19:18 +0000 (21:19 -0200)]
ui/vnc-palette.c: Include headers it needs
Include:
- <glib.h> for g_malloc0()
- <string.h> for memset()
Some of those headers were probably being included by accident because
some other headers were including qemu-common.h, but those headers
should eventually stop including qemu-common.h.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Wed, 24 Oct 2012 00:54:34 +0000 (22:54 -0200)]
user: Rename qemu-types.h to qemu-user-types.h
The header file is specific for *-user, but I plan to introduce a more
generic qemu-types.h file, so I'm renaming it.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Eduardo Habkost [Tue, 23 Oct 2012 22:42:56 +0000 (20:42 -0200)]
user: Move *-user/qemu-types.h to main directory
The bsd-user/qemu-types.h and linux-user/qemu-types.h files are almost
the same, but linux-user has the additional definitions of tswapal().
This moves the linux-user file to the main directory, so the same file
can be used by linux-user and bsd-user.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Petar Jovanovic [Tue, 4 Dec 2012 23:29:10 +0000 (00:29 +0100)]
target-mips: Fix incorrect shift for SHILO and SHILOV
helper_shilo has not been shifting an accumulator value correctly for negative
values in 'shift' field. Minor optimization for shift=0 case.
This change also adds tests that will trigger issue and check for regressions.
Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Petar Jovanovic [Mon, 26 Nov 2012 15:13:21 +0000 (16:13 +0100)]
target-mips: Fix incorrect code and test for INSV
Content of register rs should be shifted for pos before applying a mask.
This change contains both fix for the instruction and to the existing test.
Signed-off-by: Petar Jovanovic <petarj@mips.com>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Paolo Bonzini [Thu, 11 Oct 2012 12:20:23 +0000 (14:20 +0200)]
virtfs-proxy-helper: use setresuid and setresgid
The setfsuid and setfsgid system calls are obscure and they complicate
the error checking (that glibc's warn_unused_result "feature" forces
us to do). Switch to the standard setresuid and setresgid functions.
Signed-off-by: Paolo Bonzini <pbonini@redhat.com
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Peter Crosthwaite [Wed, 5 Dec 2012 06:53:44 +0000 (16:53 +1000)]
xilinx_uartlite: Accept input after rx FIFO pop
The device return false from the can receive function when the FIFO is
full. This mean the device should check for buffered input whenever a byte is
popped from the FIFO.
Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Peter Crosthwaite [Wed, 5 Dec 2012 06:53:43 +0000 (16:53 +1000)]
xilinx_uartlite: suppress "cannot receive message"
This message is not an error condition, its just informing the user that
the device is corking the uart traffic to not drop characters.
Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Peter Crosthwaite [Wed, 5 Dec 2012 06:53:42 +0000 (16:53 +1000)]
xilinx_axienet: Implement R_IS behaviour
The interrupt status register R_IS is the standard clear-on-write behaviour.
This was unimplemented and defaulting to updating the register to the written
value. Implemented clear-on-write.
Reported-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Julien Grall [Wed, 19 Sep 2012 11:50:09 +0000 (12:50 +0100)]
hw/dma.c: Replace register_ioport_*
Replace all register_ioport_*() with the new Memory API functions.
This permits to use the new Memory stuff like listeners.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Julien Grall [Wed, 19 Sep 2012 11:50:08 +0000 (12:50 +0100)]
hw/pc.c: Replace register_ioport_*
Replace all register_ioport_*() with portio_*() or a MemoryRegion.
This permits to use the new Memory stuff like listeners.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Julien Grall [Wed, 19 Sep 2012 11:50:07 +0000 (12:50 +0100)]
serial: Replace register_ioport_*
Replace all register_ioport_*() with a MemoryRegion.
This permits to use the new Memory stuff like listeners.
For more flexibility, the IO address space is passed as an argument.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto serial split]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Julien Grall [Wed, 19 Sep 2012 11:50:06 +0000 (12:50 +0100)]
hw/cirrus_vga.c: Replace register_ioport_*
Replace all register_ioport_*() with the new Memory API.
This permits to use the new Memory stuff like listeners.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Julien Grall [Wed, 19 Sep 2012 11:50:03 +0000 (12:50 +0100)]
hw/apm.c: Replace register_ioport_*
Replace all register_ioport_*() with a MemoryRegion.
This permits to use the new Memory stuff like listeners.
Moreover, the PCI device is added as an argument for apm_init(),
so we can register IO inside the PCI IO address space.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
[AF: Rebased onto hwaddr and q35]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Julien Grall [Wed, 19 Sep 2012 11:50:02 +0000 (12:50 +0100)]
isa: Add isa_address_space_io()
This function permits to retrieve ISA IO address space.
It will be usefull when we need to pass IO address space as argument.
Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Hans de Goede [Sat, 17 Nov 2012 11:47:18 +0000 (12:47 +0100)]
usb-tablet: Allow connecting to ehci
Our ehci code has is capable of significantly lowering the wakeup rate
for the hcd emulation while the device is idle. It is possible to add
similar code ot the uhci emulation, but that simply is not there atm,
and there is no reason why a (virtual) usb-tablet can not be a USB-2 device.
Making usb-hid devices connect to the emulated ehci controller instead
of the emulated uhci controller on vms which have both lowers the cpuload
for a fully idle vm from 20% to 2-3% (on my laptop).
An alternative implementation to using a property to select the tablet
type, would be simply making it a new device type, ie usb-tablet2, but the
downside of that is that this will require libvirt changes to be available
through libvirt at all, and then management tools changes to become the
default for new vms, where as using a property will automatically get
any pc-1.3 type vms the lower cpuload.
[ kraxel: adapt compat property for post-1.3 merge ]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
tablet compat fixup
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Hans de Goede [Sat, 17 Nov 2012 11:47:17 +0000 (12:47 +0100)]
ehci: Lower timer freq when the periodic schedule is idle
Lower the timer freq if no iso schedule packets complete for 64 frames in
a row.
We can safely do this, without adding latency, because:
1) If there is isoc traffic this will never trigger
2) For async handled interrupt packets (only usb-host), the completion handler
will immediately schedule the frame_timer from a bh
3) All devices using NAK to signal no data for interrupt endpoints now use
wakeup, which will immediately schedule the frame_timer from a bh
The advantage of this is that when we only have interrupt packets in the
periodic schedule, async_stepdown can do its work and significantly lower
the frequency at which the frame_timer runs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Hans de Goede [Sat, 17 Nov 2012 11:47:16 +0000 (12:47 +0100)]
usb: Allow overriding of usb_desc at the device level
This allows devices to present a different set of descriptors based on
device properties.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Hans de Goede [Sat, 17 Nov 2012 11:47:15 +0000 (12:47 +0100)]
usb: Don't allow USB_RET_ASYNC for interrupt packets
It is tempting to use USB_RET_ASYNC for interrupt packets, rather then the
current NAK + polling approach, but this causes issues for migration, as
an async completed packet will not getting written back to guest memory until
the next poll time, and if a migration happens in between it will get lost!
Make an exception for host devices, because:
1) host-linux actually uses async completion for interrupt endpoints
2) host devices don't migrate anyways
Ideally we would convert host-linux.c to handle (input) interrupt endpoints in
a buffered manner like it does for isoc endpoints, keeping multiple urbs
submitted to ensure the devices timing requirements are met, as well as making
its interrupt ep handling the same as other usb-devices.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Hans de Goede [Sat, 17 Nov 2012 11:47:14 +0000 (12:47 +0100)]
usb: Call wakeup when data becomes available for all devices with int eps
This is necessary for proper interaction with the xhci controller, and it
will allow other hcds to lower there frame timer while waiting for interrupt
data.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Tue, 4 Dec 2012 13:39:16 +0000 (14:39 +0100)]
add pc-1.4
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Tue, 27 Nov 2012 07:24:42 +0000 (08:24 +0100)]
acpi: drop debug port
I'm pretty sure this isn't needed any more. I think this predates the
switch to seabios, and the seabios DSDT table has a DBUG() aml macro
which writes stuff to the seabios debug port (0x402).
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 23 Nov 2012 14:02:18 +0000 (15:02 +0100)]
q35: update lpc pci config space according to configured devices
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 23 Nov 2012 15:03:19 +0000 (16:03 +0100)]
apci: switch piix4 pci hotplug to memory api
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 23 Nov 2012 14:37:05 +0000 (15:37 +0100)]
acpi: remove acpi_gpe_blk
With gpe being switched to memory api this is no longer needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 23 Nov 2012 14:35:13 +0000 (15:35 +0100)]
apci: switch piix4 gpe to memory api
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 23 Nov 2012 13:58:04 +0000 (14:58 +0100)]
acpi: fix piix4 smbus mapping
Make write to the smbus base register and enable bit actually work.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 23 Nov 2012 13:57:01 +0000 (14:57 +0100)]
acpi: switch smbus to memory api
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>