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5 years ago[InstCombine] try to fold 'add+sub' to 'not+add'
Sanjay Patel [Sun, 29 Jul 2018 18:13:16 +0000 (18:13 +0000)]
[InstCombine] try to fold 'add+sub' to 'not+add'

These are reassociated versions of the same pattern and
similar transforms as in rL338200 and rL338118.

The motivation is identical to those commits:
Patterns with add/sub combos can be improved using
'not' ops. This is better for analysis and may lead
to follow-on transforms because 'xor' and 'add' are
commutative/associative. It can also help codegen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338221 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for another sub-not variant; NFC
Sanjay Patel [Sun, 29 Jul 2018 18:07:28 +0000 (18:07 +0000)]
[InstCombine] add tests for another sub-not variant; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338220 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] NFC - Remove state from Demangler class.
Zachary Turner [Sun, 29 Jul 2018 16:38:02 +0000 (16:38 +0000)]
[MS Demangler] NFC - Remove state from Demangler class.

We need to be able to initiate a nested demangling from inside
of an "outer" demangling.  These need to be able to share some
state, such as back-references.  As a result, we can't store
things like the output stream or the mangled name in the Demangler
class, since each demangling will have different values.  So
remove this state and pass it through the necessary methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338219 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] fold funnel shifts with 0-shift amount
Sanjay Patel [Sun, 29 Jul 2018 16:36:38 +0000 (16:36 +0000)]
[InstSimplify] fold funnel shifts with 0-shift amount

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338218 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] add tests for funnel shift intrinsics; NFC
Sanjay Patel [Sun, 29 Jul 2018 16:27:17 +0000 (16:27 +0000)]
[InstSimplify] add tests for funnel shift intrinsics; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338217 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[dsymutil] Simplify temporary file handling.
Jonas Devlieghere [Sun, 29 Jul 2018 14:56:15 +0000 (14:56 +0000)]
[dsymutil] Simplify temporary file handling.

Dsymutil's update functionality was broken on Windows because we tried
to rename a file while we're holding open handles to that file. TempFile
provides a solution for this through its keep(Twine) method. This patch
changes dsymutil to make use of that functionality.

Differential revision: https://reviews.llvm.org/D49860

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338216 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] refactor intrinsic simplifications; NFCI
Sanjay Patel [Sun, 29 Jul 2018 14:42:08 +0000 (14:42 +0000)]
[InstSimplify] refactor intrinsic simplifications; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338215 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agorevert r338206 because the test does not pass
Sanjay Patel [Sun, 29 Jul 2018 14:30:49 +0000 (14:30 +0000)]
revert r338206 because the test does not pass

Example of bot failure:
http://lab.llvm.org:8011/builders/clang-cmake-armv8-quick/builds/5107/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Ainline-asm-operand-implicit-cast.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338214 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AVR] Re-enable expansion of ADDE/ADDC/SUBE/SUBC in ISel
Dylan McKay [Sun, 29 Jul 2018 11:38:36 +0000 (11:38 +0000)]
[AVR] Re-enable expansion of ADDE/ADDC/SUBE/SUBC in ISel

This was disabled in r333748, which broke four tests.

In the future, these need to be updated to UADDO/ADDCARRY or
USUBO/SUBCARRY.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338212 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Support for WHILE(LE|LO|LS|LT) instructions.
Sander de Smalen [Sun, 29 Jul 2018 08:51:08 +0000 (08:51 +0000)]
[AArch64][SVE] Asm: Support for WHILE(LE|LO|LS|LT) instructions.

The WHILE instructions generate a predicate that is true while the
comparison of the first scalar operand (incremented for each predicate
element) with the second scalar operand is true and false thereafter.

  WHILELE  While incrementing signed scalar less than or equal to scalar
  WHILELO  While incrementing unsigned scalar lower than scalar
  WHILELS  While incrementing unsigned scalar lower than or same as scalar
  WHILELT  While incrementing signed scalar less than scalar

e.g.

  whilele  p0.s, x0, x1

  generates predicate p0 (for 32bit elements) by incrementing
  (signed) x0 and comparing that vector to splat(x1).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338211 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Instructions to perform serialized operations.
Sander de Smalen [Sun, 29 Jul 2018 08:00:16 +0000 (08:00 +0000)]
[AArch64][SVE] Asm: Instructions to perform serialized operations.

The instructions added in this patch permit active elements within
a vector to be processed sequentially without unpacking the vector.

  PFIRST      Set the first active element to true.
  PNEXT       Find next active element in predicate.
  CTERMEQ     Compare and terminate loop when equal.
  CTERMNE     Compare and terminate loop when not equal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338210 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Refactor some of the name parsing code.
Zachary Turner [Sat, 28 Jul 2018 22:10:42 +0000 (22:10 +0000)]
[MS Demangler] Refactor some of the name parsing code.

There are some very subtle differences between how one should
parse symbol names and type names.  They differ with respect
to back-referencing, the set of legal values that can appear
as the unqualified portion, and various other aspects.

By separating the parsing code into separate paths, we can
remove a lot of ambiguity during the demangling process, which
is necessary for demangling more complicated things like
function local statics, nested classes, and lambdas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338207 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix crash on inline asm with 64bit matching input in 32bit GPR
Thomas Preud'homme [Sat, 28 Jul 2018 21:33:39 +0000 (21:33 +0000)]
Fix crash on inline asm with 64bit matching input in 32bit GPR

Add support for inline assembly with matching input operand that do not
naturally go in the register class it is constrained to (eg. double in a
32-bit GPR). Note that regular input is already handled by existing
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338206 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Pass std::vector by reference instead of by pointer to BuildSDIV/Build...
Craig Topper [Sat, 28 Jul 2018 19:44:20 +0000 (19:44 +0000)]
[SelectionDAG] Pass std::vector by reference instead of by pointer to BuildSDIV/BuildUDIV.

This removes the need for an assert to ensure the pointer isn't null.

Years ago we had ifs the checked the pointer was non-null before very access to the vector. These checks were removed and replaced with a single assert. But a reference seems more suitable here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338205 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Correct the immediate cost for 'add/sub i64 %x, 0x80000000'.
Craig Topper [Sat, 28 Jul 2018 18:21:46 +0000 (18:21 +0000)]
[X86] Correct the immediate cost for 'add/sub i64 %x, 0x80000000'.

X86 normally requires immediates to be a signed 32-bit value which would exclude i64 0x80000000. But for add/sub we can negate the constant and use the opposite instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338204 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Use alignTo and divideCeil to make some code more readable. NFC
Craig Topper [Sat, 28 Jul 2018 18:21:45 +0000 (18:21 +0000)]
[X86] Use alignTo and divideCeil to make some code more readable. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338203 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd VS natvis support for LLVMDemangle's StringView.
Zachary Turner [Sat, 28 Jul 2018 17:25:42 +0000 (17:25 +0000)]
Add VS natvis support for LLVMDemangle's StringView.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338202 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Tests for fold Select with binary op
David Bolvansky [Sat, 28 Jul 2018 17:13:33 +0000 (17:13 +0000)]
[InstCombine] Tests for fold Select with binary op

Differential Revision: https://reviews.llvm.org/D49961

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338201 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] try to fold 'sub' to 'not'
Sanjay Patel [Sat, 28 Jul 2018 16:48:44 +0000 (16:48 +0000)]
[InstCombine] try to fold 'sub' to 'not'

https://rise4fun.com/Alive/jDd

Patterns with add/sub combos can be improved using
'not' ops. This is better for analysis and may lead
to follow-on transforms because 'xor' and 'add' are
commutative/associative. It can also help codegen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338200 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Support for PFALSE and PTEST instructions.
Sander de Smalen [Sat, 28 Jul 2018 14:18:11 +0000 (14:18 +0000)]
[AArch64][SVE] Asm: Support for PFALSE and PTEST instructions.

This patch adds PFALSE (unconditionally sets all elements of
the predicate to false) and PTEST (set the status flags for the
predicate).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338198 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Stop wasting argument registers with v3i32/v3f32
Matt Arsenault [Sat, 28 Jul 2018 14:11:34 +0000 (14:11 +0000)]
AMDGPU: Stop wasting argument registers with v3i32/v3f32

SelectionDAGBuilder widens v3i32/v3f32 arguments to
to v4i32/v4f32 which consume an additional register.
In addition to wasting argument space, this produces extra
instructions since now it appears the 4th vector component has
a meaningful value to most combines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338197 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Data-dependent loop predicate partitioning instructions.
Sander de Smalen [Sat, 28 Jul 2018 14:04:52 +0000 (14:04 +0000)]
[AArch64][SVE] Asm: Data-dependent loop predicate partitioning instructions.

This patch adds support for instructions that partition a predicate
based on data-dependent termination conditions in a loop.

  BRKA      Break after the first true condition
  BRKAS     Break after the first true condition, setting condition flags
  BRKB      Break before the first true condition
  BRKBS     Break before the first true condition, setting condition flags

  BRKPA     Break after the first true condition, propagating from the
            previous partition
  BRKPAS    Break after the first true condition, propagating from the
            previous partition, setting condition flags
  BRKPB     Break before the first true condition, propagating from the
            previous partition
  BRKPBS    Break before the first true condition, propagating from the
            previous partition, setting condition flags

  BRKN      Propagate break to next partition
  BKRNS     Propagate break to next partition, setting condition flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338196 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] Moved Select + AND/OR tests from InstCombine
David Bolvansky [Sat, 28 Jul 2018 13:52:45 +0000 (13:52 +0000)]
[InstSimplify] Moved Select + AND/OR tests from InstCombine

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49957

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338195 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDAG: Add calling convention argument to calling convention funcs
Matt Arsenault [Sat, 28 Jul 2018 13:25:19 +0000 (13:25 +0000)]
DAG: Add calling convention argument to calling convention funcs

This seems like a pretty glaring omission, and AMDGPU
wants to treat kernels differently from other calling
conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338194 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Stop trying to extend arguments for clover
Matt Arsenault [Sat, 28 Jul 2018 12:34:25 +0000 (12:34 +0000)]
AMDGPU: Stop trying to extend arguments for clover

This was trying to replace i8/i16 arguments with i32, which
was broken and no longer necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338193 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalOpt] Test array indices inside structs for out-of-bounds accesses
David Green [Sat, 28 Jul 2018 08:20:10 +0000 (08:20 +0000)]
[GlobalOpt] Test array indices inside structs for out-of-bounds accesses

We now, from clang, can turn arrays of
  static short g_data[] = {16, 16, 16, 16, 16, 16, 16, 16, 0, 0, 0, 0, 0, 0, 0, 0};
into structs of the form
  @g_data = internal global <{ [8 x i16], [8 x i16] }> ...

GlobalOpt will incorrectly SROA it, not realising that the access to the first
element may overflow into the second. This fixes it by checking geps more
thoroughly.

I believe this makes the globalsra-partial.ll test case invalid as the %i value
could be out of bounds. I've re-purposed it as a negative test for this case.

Differential Revision: https://reviews.llvm.org/D49816

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338192 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] Fold Select with AND/OR condition
David Bolvansky [Sat, 28 Jul 2018 06:55:51 +0000 (06:55 +0000)]
[InstCombine] Fold Select with AND/OR condition

Summary:
Fold
```
%A = icmp ne i8 %X, %V1
%B = icmp ne i8 %X, %V2
%C = or i1 %A, %B
%D = select i1 %C, i8 %X, i8 %V1
ret i8 %D
  =>
ret i8 %X

Fixes https://bugs.llvm.org/show_bug.cgi?id=38334
Proof: https://rise4fun.com/Alive/plI8

Reviewers: spatel, lebedev.ri

Reviewed By: lebedev.ri

Subscribers: craig.topper, llvm-commits

Differential Revision: https://reviews.llvm.org/D49919

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338191 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[demangler] Fix an oss-fuzz bug from r338138
Erik Pilkington [Sat, 28 Jul 2018 04:06:30 +0000 (04:06 +0000)]
[demangler] Fix an oss-fuzz bug from r338138

Stack overflow on invalid. While collapsing references, we were skipping over a
cycle check in ForwardTemplateReference leading to a stack overflow. This commit
fixes the problem by duplicating the cycle check in ReferenceType.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338190 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Dominators] Make applyUpdate's documentation less confusing [NFC]
Jakub Kuderski [Sat, 28 Jul 2018 00:54:07 +0000 (00:54 +0000)]
[Dominators] Make applyUpdate's documentation less confusing [NFC]

Summary:
It was pointed out by @chandlerc that it's not clear whether both applyUpdates and insert/deleteEdge can be used to perform multiple updates.

IMO, the confusing part was that the comment above applyUpdates made a comparison of expected update time between calling it and calling insert/deleteEdge multiple times. It's generally not possible to safely call insert/deleteEdge multiple times, which documentation for each of the 3 functions warns about, so the whole comparison makes very little sense. On top of that, the comment is already lengthy, so I think it's best to just get rid of this comparison.

Reviewers: chandlerc, asbirlea, NutshellySima, grosser

Reviewed By: chandlerc

Subscribers: llvm-commits, chandlerc

Differential Revision: https://reviews.llvm.org/D49944

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338184 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Clarify role of DIExpressions within debug intrinsics
Vedant Kumar [Sat, 28 Jul 2018 00:33:47 +0000 (00:33 +0000)]
[docs] Clarify role of DIExpressions within debug intrinsics

This should make the semantics of DIExpressions within llvm.dbg.{addr,
declare, value} easier to understand.

Differential Revision: https://reviews.llvm.org/D49572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338182 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)
Craig Topper [Sat, 28 Jul 2018 00:27:25 +0000 (00:27 +0000)]
[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)

This can be useful since addition is commutable, and subtraction is not.

This matches a transform that is also done by InstCombine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338181 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SimpleLoopUnswitch] Fix DT updates for trivial branch unswitching.
Alina Sbirlea [Sat, 28 Jul 2018 00:01:05 +0000 (00:01 +0000)]
[SimpleLoopUnswitch] Fix DT updates for trivial branch unswitching.

Summary:
Fixing 2 issues with the DT update in trivial branch switching, though I don't have a case where DT update fails.
1. After splitting ParentBB->UnswitchedBB edge, new edges become: ParentBB->LoopExitBB->UnswitchedBB, so remove ParentBB->LoopExitBB edge.
2. AFAIU, for multiple CFG changes, DT should be updated using batch updates, vs consecutive addEdge and removeEdge calls.

Reviewers: chandlerc, kuhar

Subscribers: sanjoy, jlebar, llvm-commits

Differential Revision: https://reviews.llvm.org/D49925

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338180 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[WebAssembly] Added default stack-only instruction mode for MC."
Wouter van Oortmerssen [Fri, 27 Jul 2018 23:19:51 +0000 (23:19 +0000)]
Revert "[WebAssembly] Added default stack-only instruction mode for MC."

This reverts commit d3c9af4179eae7793d1487d652e2d4e23844555f.
(SVN revision 338164)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338176 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] Remove unnecessary MemoryBuffer::anchor (where the destructor serves as...
Fangrui Song [Fri, 27 Jul 2018 23:12:11 +0000 (23:12 +0000)]
[Support] Remove unnecessary MemoryBuffer::anchor (where the destructor serves as the key function)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338175 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add support expanding multiplies by constant where the constant is -3/-5/-9...
Craig Topper [Fri, 27 Jul 2018 23:04:59 +0000 (23:04 +0000)]
[X86] Add support expanding multiplies by constant where the constant is -3/-5/-9 multplied by a power of 2.

These can be replaced with an LEA, a shift, and a negate. This seems to match what gcc and icc would do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338174 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objcopy] Make --strip-debug strip .zdebug* (zlib-gnu) sections
Fangrui Song [Fri, 27 Jul 2018 22:51:36 +0000 (22:51 +0000)]
[llvm-objcopy] Make --strip-debug strip .zdebug* (zlib-gnu) sections

This behavior matches GNU objcopy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338173 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstrProf] Don't register __llvm_profile_runtime_user
Reid Kleckner [Fri, 27 Jul 2018 22:21:35 +0000 (22:21 +0000)]
[InstrProf] Don't register __llvm_profile_runtime_user

Refactor some FileCheck prefixes while I'm at it.

Fixes PR38340

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338172 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[WebAssembly] Added default stack-only instruction mode for MC.
Wouter van Oortmerssen [Fri, 27 Jul 2018 20:56:43 +0000 (20:56 +0000)]
[WebAssembly] Added default stack-only instruction mode for MC.

Summary:
Moved Explicit Locals pass to last.
Made that pass obligatory.
Made it convert from register to stack based instructions, and removed the registers.
Fixes to related code that was expecting register based instructions.
Added the correct testing flag to all tests, depending on what the
format they were expecting so far.
Translated one test to stack format as example: reg-stackify-stack.ll

tested:
llvm-lit -v `find test -name WebAssembly`
unittests/MC/*

Reviewers: dschuff, sunfish

Subscribers: sbc100, jgravelle-google, eraman, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D49160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338164 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] [NFC] [Tests] Fold Select with AND/OR condition - fixed
David Bolvansky [Fri, 27 Jul 2018 20:29:32 +0000 (20:29 +0000)]
[InstCombine] [NFC] [Tests] Fold Select with AND/OR condition - fixed

Differential Revision: https://reviews.llvm.org/D49933

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338161 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRecommit "Enable MachineOutliner by default under -Oz for AArch64"
Jessica Paquette [Fri, 27 Jul 2018 20:18:27 +0000 (20:18 +0000)]
Recommit "Enable MachineOutliner by default under -Oz for AArch64"

Fixed the ASAN failure from before in r338148, so recommiting.

This patch enables the MachineOutliner by default in AArch64 under -Oz.

The MachineOutliner offers around a 4.5% improvement on the current -Oz code
size improvements.

We have done work into improving the debuggability of outlined code, so that
users of -Oz won't be surprised by the optimization. We have also been executing
the LLVM test suite and common external tests such as the SPEC suites
continuously with no issue. The outliner has a low compile-time overhead of
roughly 1%. At this point, the outliner would be a really good addition to the
-Oz pass pipeline!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338160 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] [NFC] [Tests] Fold Select with AND/OR condition
David Bolvansky [Fri, 27 Jul 2018 20:18:12 +0000 (20:18 +0000)]
[InstCombine] [NFC] [Tests] Fold Select with AND/OR condition

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49932

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338159 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SLC] Test simplification of pow(x, 0.333...) to cbrt(x) (NFC)
Evandro Menezes [Fri, 27 Jul 2018 18:56:47 +0000 (18:56 +0000)]
[SLC] Test simplification of pow(x, 0.333...) to cbrt(x) (NFC)

Add test case for simplifying `pow(x, 0.333...)` into `cbrt(x)`, which
D49040 enables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338152 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64, PowerPC, x86] add more signbit math tests; NFC
Sanjay Patel [Fri, 27 Jul 2018 18:31:21 +0000 (18:31 +0000)]
[AArch64, PowerPC, x86] add more signbit math tests; NFC

The tests with a constant sub operand were added with rL338143,
but the potential transform doesn't have that requirement, so
adding more tests with variable operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338150 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MachineOutliner] Exit getOutliningCandidateInfo when we erase all candidates
Jessica Paquette [Fri, 27 Jul 2018 18:21:57 +0000 (18:21 +0000)]
[MachineOutliner] Exit getOutliningCandidateInfo when we erase all candidates

There was a missing check for if a candidate list was entirely deleted. This
adds that check.

This fixes an asan failure caused by running test/CodeGen/AArch64/addsub_ext.ll
with the MachineOutliner enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338148 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM] Add new target feature to fuse literal generation
Evandro Menezes [Fri, 27 Jul 2018 18:16:47 +0000 (18:16 +0000)]
[ARM] Add new target feature to fuse literal generation

This feature enables the fusion of such operations on Cortex A57 and Cortex
A72, as recommended in their Software Optimisation Guides, sections 4.14 and
4.11, respectively.

Differential revision: https://reviews.llvm.org/D49563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338147 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64, PowerPC, x86] add more signbit math tests; NFC
Sanjay Patel [Fri, 27 Jul 2018 18:12:29 +0000 (18:12 +0000)]
[AArch64, PowerPC, x86] add more signbit math tests; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338143 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[demangler] Support for reference collapsing
Erik Pilkington [Fri, 27 Jul 2018 17:27:40 +0000 (17:27 +0000)]
[demangler] Support for reference collapsing

llvm.org/PR38323

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338138 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "Enable MachineOutliner by default under -Oz for AArch64"
Jessica Paquette [Fri, 27 Jul 2018 17:25:38 +0000 (17:25 +0000)]
Revert "Enable MachineOutliner by default under -Oz for AArch64"

It failed an Asan test on a bot:

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/21543/steps/check-llvm%20asan/logs/stdio

Fixing that before recommitting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338136 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agobpf: add missing RegState to notify MachineInstr verifier necessary register usage
Yonghong Song [Fri, 27 Jul 2018 16:58:52 +0000 (16:58 +0000)]
bpf: add missing RegState to notify MachineInstr verifier necessary register usage

Errors like the following are reported by:

  https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_llvm-2Dclang-2Dx86-5F64-2Dexpensive-2Dchecks-2Dwin_builds_11261&d=DwIBAg&c=5VD0RTtNlTh3ycd41b3MUw&r=DA8e1B5r073vIqRrFz7MRA&m=929oWPCf7Bf2qQnir4GBtowB8ZAlIRWsAdTfRkDaK-g&s=9k-wbEUVpUm474hhzsmAO29VXVvbxJPWD9RTgCD71fQ&e=

  *** Bad machine code: Explicit definition marked as use ***
  - function:    cal_align1
  - basic block: %bb.0 entry (0x47edd98)
  - instruction: LDB $r3, $r2, 0
  - operand 0:   $r3

This is because RegState info was missing for ScratchReg inside
expandMEMCPY. This caused incomplete register usage information to
MachineInstr verifier which then would complain as there could be potential
code-gen issue if the complained MachineInstr is used in place where
register usage information matters even though the memcpy expanding is not
in such case as it happens at the last stage of IR optimization pipeline.

We should always specify those register usage information which compiler
couldn't deduct automatically whenever we add a hardware register manually.

Reported-by: Builder llvm-clang-x86_64-expensive-checks-win Build #11261
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Reviewed-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338134 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoEnable MachineOutliner by default under -Oz for AArch64
Jessica Paquette [Fri, 27 Jul 2018 16:44:42 +0000 (16:44 +0000)]
Enable MachineOutliner by default under -Oz for AArch64

This patch enables the MachineOutliner by default in AArch64 under -Oz.

The MachineOutliner offers around a 4.5% improvement on the current -Oz code
size improvements.

We have done work into improving the debuggability of outlined code, so that
users of -Oz won't be surprised by the optimization. We have also been executing
the LLVM test suite and common external tests such as the SPEC suites
continuously with no issue. The outliner has a low compile-time overhead of
roughly 1%. At this point, the outliner would be a really good addition to the
-Oz pass pipeline!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338133 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] fold 'not' with signbit math
Sanjay Patel [Fri, 27 Jul 2018 16:42:55 +0000 (16:42 +0000)]
[DAGCombiner] fold 'not' with signbit math

This is a follow-up suggested in D48970.

Alive proofs:
https://rise4fun.com/Alive/sII

We can eliminate an instruction in the usual select-of-constants
to bit hack transform by adjusting the add/sub with constant.
This is always a win.

There are more transforms that are likely wins, but they may need
target hooks in case some targets do not benefit.

This is another step towards making up for canonicalizing to
select-of-constants in rL331486.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338132 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[x86] add more tests for signbit math; NFC
Sanjay Patel [Fri, 27 Jul 2018 16:22:40 +0000 (16:22 +0000)]
[x86] add more tests for signbit math; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338131 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] add more tests for signbit math; NFC
Sanjay Patel [Fri, 27 Jul 2018 16:22:18 +0000 (16:22 +0000)]
[PowerPC] add more tests for signbit math; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338130 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] add more tests for signbit math; NFC
Sanjay Patel [Fri, 27 Jul 2018 16:21:56 +0000 (16:21 +0000)]
[AArch64] add more tests for signbit math; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338129 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] Use unsigned char for xxHash 64-bit
Fangrui Song [Fri, 27 Jul 2018 16:01:09 +0000 (16:01 +0000)]
[Support] Use unsigned char for xxHash 64-bit

Before, the last 3 bytes were char-signedness dependent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338128 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/R600: Add MOV instructions to BFE patterns
Jan Vesely [Fri, 27 Jul 2018 15:00:13 +0000 (15:00 +0000)]
AMDGPU/R600: Add MOV instructions to BFE patterns

R600 can't handle immediates for BFE, these will be eliminated later.
Fixes powr/pow regressions n r600 since r334817

Differential Revision: https://reviews.llvm.org/D49641

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338127 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Predicated integer reductions.
Sander de Smalen [Fri, 27 Jul 2018 14:24:55 +0000 (14:24 +0000)]
[AArch64][SVE] Asm: Predicated integer reductions.

This patch adds support for various integer reduction operations:

  SADDV    signed add reduction to scalar
  UADDV    unsigned add reduction to scalar

  SMAXV    signed maximum reduction to scalar
  SMINV    signed minimum reduction to scalar
  UMAXV    unsigned maximum reduction to scalar
  UMINV    unsigned minimum reduction to scalar

  ANDV     logical AND reduction to scalar
  ORV      logical OR reduction to scalar
  EORV     logical EOR reduction to scalar

The reduction is predicated, e.g.
  smaxv s0, p0, z1.s

performs a signed maximum reduction on active elements in z1,
and stores the (signed max value) result in s0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338126 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU][MC][DOC] Updated AMD GPU assembler description
Dmitry Preobrazhensky [Fri, 27 Jul 2018 14:17:15 +0000 (14:17 +0000)]
[AMDGPU][MC][DOC] Updated AMD GPU assembler description

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338125 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Predicated floating point reductions.
Sander de Smalen [Fri, 27 Jul 2018 13:58:48 +0000 (13:58 +0000)]
[AArch64][SVE] Asm: Predicated floating point reductions.

This patch adds support for various floating-point
reduction operations:

  FADDA    strictly-ordered add reduction, accumulating in scalar
  FADDV    recursive add reduction to scalar
  FMAXV    recursive max reduction to scalar
  FMINV    recursive min reduction to scalar
  FMAXNMV  recursive max number reduction to scalar
  FMINNMV  recursive min number reduction to scalar

The reduction is predicated, e.g.

  fadda d0, p0, d0, z1.d

performs the add-reduction in strict order on active elements
in z1, accumulating into d0.

  faddv d0, p0, z1.d

performs the add-reduction (not in strict order)
on active elements in z1, storing the result in d0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338123 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Support for FEXPA and FTSSEL.
Sander de Smalen [Fri, 27 Jul 2018 12:40:09 +0000 (12:40 +0000)]
[AArch64][SVE] Asm: Support for FEXPA and FTSSEL.

This patch adds support for transcendental acceleration
instructions 'FEXPA' (exponential accelerator) and 'FTSSEL'
(trigonometric select coefficient).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338121 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][SVE] Asm: Support for FRECPE and FRSQRTE.
Sander de Smalen [Fri, 27 Jul 2018 12:26:24 +0000 (12:26 +0000)]
[AArch64][SVE] Asm: Support for FRECPE and FRSQRTE.

Support for floating-point instructions for reciprocal
estimate (FRECPE) and reciprocal square root estimate (FRSQRTE).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338120 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[CMake] Followup for r337366: Only export LLVM_LINK_LLVM_DYLIB if it's set to ON
Philip Pfaffe [Fri, 27 Jul 2018 10:57:51 +0000 (10:57 +0000)]
[CMake] Followup for r337366: Only export LLVM_LINK_LLVM_DYLIB if it's set to ON

Summary:
As it was, always exporting LLVM_LINK_LLVM_DYLIB caused out-of-tree
clients to lose the ability to link against the dylib, even if in-tree tools did
not. By only exporting the setting if it is enabled, out-of-tree clients get the
correct default, but may still choose if they can.

Reviewers: mgorny, beanz, labath, bogner, chandlerc

Reviewed By: bogner, chandlerc

Subscribers: bollu, llvm-commits

Differential Revision: https://reviews.llvm.org/D49843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338119 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] not(sub X, Y) --> add (not X), Y
Sanjay Patel [Fri, 27 Jul 2018 10:54:48 +0000 (10:54 +0000)]
[InstCombine] not(sub X, Y) --> add (not X), Y

The tests with constants show a missing optimization.
Analysis for adds is better than subs, so this can also
help with other transforms. And codegen is better with
adds for targets like x86 (destructive ops, no sub-from).

https://rise4fun.com/Alive/llK

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338118 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] add tests for not+sub; NFC
Sanjay Patel [Fri, 27 Jul 2018 10:45:04 +0000 (10:45 +0000)]
[InstCombine] add tests for not+sub; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338117 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SimplifyIndVar] Canonicalize comparisons to unsigned while eliminating truncs
Max Kazantsev [Fri, 27 Jul 2018 09:43:39 +0000 (09:43 +0000)]
[SimplifyIndVar] Canonicalize comparisons to unsigned while eliminating truncs

This is a follow-up for the patch rL335020. When we replace compares against
trunc with compares against wide IV, we can also replace signed predicates with
unsigned where it is legal.

Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D48763

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338115 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] Bring std::errc::not_supported to llvm::errc.
Victor Leschuk [Fri, 27 Jul 2018 09:15:05 +0000 (09:15 +0000)]
[Support] Bring std::errc::not_supported to llvm::errc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338114 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU: Fix code size for return_to_epilog pseudo
Matt Arsenault [Fri, 27 Jul 2018 09:15:03 +0000 (09:15 +0000)]
AMDGPU: Fix code size for return_to_epilog pseudo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338113 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDAG: Remove unnecessary .str()
Matt Arsenault [Fri, 27 Jul 2018 09:04:41 +0000 (09:04 +0000)]
DAG: Remove unnecessary .str()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338112 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoPatternMatch: Add wrappers for fabs and canonicalize
Matt Arsenault [Fri, 27 Jul 2018 09:04:35 +0000 (09:04 +0000)]
PatternMatch: Add wrappers for fabs and canonicalize

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338111 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[LV][DebugInfo] Set DL to the middle block Icmp instruction"
Anastasis Grammenos [Fri, 27 Jul 2018 08:22:54 +0000 (08:22 +0000)]
Revert "[LV][DebugInfo] Set DL to the middle block Icmp instruction"

This reverts commit r338106.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338109 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstSimplify] tests for D48828: fold extraction from std::pair
Hiroshi Inoue [Fri, 27 Jul 2018 07:21:02 +0000 (07:21 +0000)]
[InstSimplify] tests for D48828: fold extraction from std::pair

This commit includes unit tests for D48828, which enhances InstSimplify to enable jump threading with a method whose return type is std::pair<int, bool> or std::pair<bool, int>.
I am going to commit the actual transformation later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338107 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LV][DebugInfo] Set DL to the middle block Icmp instruction
Anastasis Grammenos [Fri, 27 Jul 2018 07:12:44 +0000 (07:12 +0000)]
[LV][DebugInfo] Set DL to the middle block Icmp instruction

Reviewers: hsaito

Differential Revision: https://reviews.llvm.org/D49746

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338106 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Docs] Remove hard tab character from code block in optbisect documentation
Craig Topper [Fri, 27 Jul 2018 06:54:13 +0000 (06:54 +0000)]
[Docs] Remove hard tab character from code block in optbisect documentation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338105 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC] Remove an empty line.
Xin Tong [Fri, 27 Jul 2018 06:50:45 +0000 (06:50 +0000)]
[NFC] Remove an empty line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338104 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAMDGPU/GlobalISel: Fix crash in regbankselect on non-power-of-2 types
Tom Stellard [Fri, 27 Jul 2018 06:04:40 +0000 (06:04 +0000)]
AMDGPU/GlobalISel: Fix crash in regbankselect on non-power-of-2 types

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D49624

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338102 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove an unnecessary 'if' that prevented treating INT64_MAX and -INT64_MAX...
Craig Topper [Fri, 27 Jul 2018 05:56:27 +0000 (05:56 +0000)]
[X86] Remove an unnecessary 'if' that prevented treating INT64_MAX and -INT64_MAX as power of 2 minus 1 in the multiply expansion code.

Not sure why they were being explicitly excluded, but I believe all the math inside the if works. I changed the absolute value to be uint64_t instead of int64_t so INT64_MIN+1 wouldn't be signed wrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338101 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LTO] Don't internalize declarations
Bob Haarman [Fri, 27 Jul 2018 05:40:29 +0000 (05:40 +0000)]
[LTO] Don't internalize declarations

Summary:
Some links were failing with "Global is external, but doesn't have
external or weak linkage!" in ThinLTO builds with debug
information. This happened when we elide the body of a global that is
referenced by debug info. This results in a declaration, which we
would then internalize - but declarations cannot be internal. This
change avoids the problem by not internalizing these declarations.

Fixes PR38046.

Reviewers: pcc, tejohnson

Subscribers: mehdi_amini, aprantl, hiraditya, JDevlieghere, steven_wu, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D49777

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338100 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReplace LLVM_ALIGNAS with alignas as a follow-up of r337330
Fangrui Song [Fri, 27 Jul 2018 05:38:14 +0000 (05:38 +0000)]
Replace LLVM_ALIGNAS with alignas as a follow-up of r337330

The minimum required GCC version was raised to 4.8 (which started to support alignas) in r284497.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338099 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add matching for another pattern of PMADDWD.
Craig Topper [Fri, 27 Jul 2018 04:29:10 +0000 (04:29 +0000)]
[X86] Add matching for another pattern of PMADDWD.

Summary:
This is the pattern you get from the loop vectorizer for something like this

int16_t A[1024];
int16_t B[1024];
int32_t C[512];

void pmaddwd() {
  for (int i = 0; i != 512; ++i)
    C[i] = (A[2*i]*B[2*i]) + (A[2*i+1]*B[2*i+1]);
}

In this case we will have (add (mul (build_vector), (build_vector)), (mul (build_vector), (build_vector))). This is different than the pattern we currently match which has the build_vectors between an add and a single multiply. I'm not sure what C code would get you that pattern.

Reviewers: RKSimon, spatel, zvi

Reviewed By: zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49636

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338097 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstCombine] canonicalize abs pattern
Chen Zheng [Fri, 27 Jul 2018 01:49:51 +0000 (01:49 +0000)]
[InstCombine] canonicalize abs pattern
Differential Revision: https://reviews.llvm.org/D48754

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338092 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] When removing sign extends from gather/scatter indices, make sure we handle...
Craig Topper [Fri, 27 Jul 2018 00:00:30 +0000 (00:00 +0000)]
[X86] When removing sign extends from gather/scatter indices, make sure we handle UpdateNodeOperands finding an existing node to CSE with.

If this happens the operands aren't updated and the existing node is returned. Make sure we pass this existing node up to the DAG combiner so that a proper replacement happens. Otherwise we get stuck in an infinite loop with an unoptimized node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338090 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.
Craig Topper [Thu, 26 Jul 2018 23:22:11 +0000 (23:22 +0000)]
[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.

Masked loads are calling DAG.getRoot rather than calling SelectionDAGBuilder::getRoot, which means the PendingLoads weren't emptied to update the root and create any needed TokenFactor. So it would be incorrect to call setRoot for the masked load.

This patch instead adds the masked load to PendingLoads so that the root doesn't get update until a store or scatter or something happens.. Alternatively, we could call SelectionDAGBuilder::getRoot before it, but that would create unnecessary serialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338085 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[InstrProf] Use comdats on COFF for available_externally functions
Reid Kleckner [Thu, 26 Jul 2018 22:59:17 +0000 (22:59 +0000)]
[InstrProf] Use comdats on COFF for available_externally functions

Summary:
r262157 added ELF-specific logic to put a comdat on the __profc_*
globals created for available_externally functions. We should be able to
generalize that logic to all object file formats that support comdats,
i.e. everything other than MachO. This fixes duplicate symbol errors,
since on COFF, linkonce_odr doesn't make the symbol weak.

Fixes PR38251.

Reviewers: davidxl, xur

Subscribers: hiraditya, dmajor, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D49882

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338082 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DWARF v5] Reposting r337981, which was reverted in r337997 due to a test failure...
Wolfgang Pieb [Thu, 26 Jul 2018 22:48:52 +0000 (22:48 +0000)]
[DWARF v5] Reposting r337981, which was reverted in r337997 due to a test failure in debuginfo_tests.
The test failure was caused by the compiler not emitting a __debug_ranges section with DWARF 4 and
earlier when no ranges are needed. The test checks for the existence regardless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338081 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Add MLOAD/MSTORE/MGATHER/MSCATTER to AddNodeIDCustom to properly calcu...
Craig Topper [Thu, 26 Jul 2018 22:40:24 +0000 (22:40 +0000)]
[SelectionDAG] Add MLOAD/MSTORE/MGATHER/MSCATTER to AddNodeIDCustom to properly calculate their folding set ID to allow them to be CSEd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338080 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] Remove some calls to AddToWorklist that should be unnecessary.
Craig Topper [Thu, 26 Jul 2018 22:40:22 +0000 (22:40 +0000)]
[DAGCombiner] Remove some calls to AddToWorklist that should be unnecessary.

The DAGCombiner has a system for ensuring all nodes are visited. It doesn't require an AddToWorkList for every node that is created by a combine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338079 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix -Wsign-compare warning.
Zachary Turner [Thu, 26 Jul 2018 22:24:01 +0000 (22:24 +0000)]
Fix -Wsign-compare warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338078 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Properly handle function parameter back-refs.
Zachary Turner [Thu, 26 Jul 2018 22:13:39 +0000 (22:13 +0000)]
[MS Demangler] Properly handle function parameter back-refs.

Properly demangle function parameter back-references.

Previously we treated lists of function parameters and template
parameters the same. There are some important differences with regards
to back-references, and some less important differences regarding which
characters can appear before or after the name.

The important differences are that with a given type T, all instances of
a function parameter list share the same global back-ref table.
Specifically, if X and Y are function pointers, then there are 3
entities in the declaration X func(Y) which all affect and are affected
by the master parameter back-ref table:
  1) The parameter list of X's function type
  2) the parameter list of func itself
  3) The parameter list of Y's function type.

The previous code would create a back-reference table that was local to
a single parameter list, so it would not be shared across parameter
lists.

This was discovered when porting ms-back-references.test from clang's
mangling tests. All of these tests should now pass with the new changes.

In doing so, I split the function for parsing template and function
parameters into two separate functions. This makes the template
parameter list parsing code in particular very small and easy to
understand now.

Differential Revision: https://reviews.llvm.org/D49875

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338075 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Don't expand Wrap predicate using inttoptr in ni addrspaces
Keno Fischer [Thu, 26 Jul 2018 21:55:06 +0000 (21:55 +0000)]
[SCEV] Don't expand Wrap predicate using inttoptr in ni addrspaces

Summary:
In non-integral address spaces, we're not allowed to introduce inttoptr/ptrtoint
intrinsics. Instead, we need to expand any pointer arithmetic as geps on the
base pointer. Luckily this is a common task for SCEV, so all we have to do here
is hook up the corresponding helper function and add test case.

Fixes PR38290

Reviewers: sanjoy
Differential Revision: https://reviews.llvm.org/D49832

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338073 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Add an expandAddToGEP overload for a single operand. NFC.
Keno Fischer [Thu, 26 Jul 2018 21:55:03 +0000 (21:55 +0000)]
[SCEV] Add an expandAddToGEP overload for a single operand. NFC.

Only wanting to pass a single SCEV operand to use as the offset of
the GEP is a common operation. Right now this requires creating a
temporary stack array at every call site. Add an overload
that encapsulates that pattern and simplify the call sites.

Suggested-By: sanjoy (in https://reviews.llvm.org/D49832)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338072 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoADT: Document advantages of SmallVector<T,0> over std::vector
Duncan P. N. Exon Smith [Thu, 26 Jul 2018 21:29:54 +0000 (21:29 +0000)]
ADT: Document advantages of SmallVector<T,0> over std::vector

In light of the recent changes to SmallVector in r335421, r337514, and
r337820, document its advantages over std::vector (see r175906 and
r266909).

Also add a release note.

https://reviews.llvm.org/D49748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338071 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[RegisterCoalescer] Fixed inconsistent followCopyChain with subreg
Tim Renouf [Thu, 26 Jul 2018 21:27:34 +0000 (21:27 +0000)]
[RegisterCoalescer] Fixed inconsistent followCopyChain with subreg

Summary:
The behavior of followCopyChain with a subreg depends on the order in
which subranges appear in a live interval, which is bad.

This commit fixes that, and allows the copy chain to continue only if
all matching subranges that are not undefined take us to the same def.

I don't have a test for this; the reproducer I had on my branch with
various other local changes does not reproduce the problem on upstream
llvm. Also that reproducer was an ll test; attempting to convert it to a
mir test made the subranges appear in a different order and hid the
problem.

However I would argue that the old behavior was obviously wrong
and needs fixing.

Subscribers: MatzeB, qcolombet, llvm-commits

Differential Revision: https://reviews.llvm.org/D49535

Change-Id: Iee7936ef305918f3b498ac432e2cf651ae5cc2df

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338070 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DebugInfo] LowerDbgDeclare: Add derefs when handling CallInst users
Vedant Kumar [Thu, 26 Jul 2018 20:56:53 +0000 (20:56 +0000)]
[DebugInfo] LowerDbgDeclare: Add derefs when handling CallInst users

LowerDbgDeclare inserts a dbg.value before each use of an address
described by a dbg.declare. When inserting a dbg.value before a CallInst
use, however, it fails to append DW_OP_deref to the DIExpression.

The DW_OP_deref is needed to reflect the fact that a dbg.value describes
a source variable directly (as opposed to a dbg.declare, which relies on
pointer indirection).

This patch adds in the DW_OP_deref where needed. This results in the
correct values being shown during a debug session for a program compiled
with ASan and optimizations (see https://reviews.llvm.org/D49520). Note
that ConvertDebugDeclareToDebugValue is already correct -- no changes
there were needed.

One complication is that SelectionDAG is unable to distinguish between
direct and indirect frame-index (FRAMEIX) SDDbgValues. This patch also
fixes this long-standing issue in order to not regress integration tests
relying on the incorrect assumption that all frame-index SDDbgValues are
indirect. This is a necessary fix: the newly-added DW_OP_derefs cannot
be lowered properly otherwise. Basically the fix prevents a direct
SDDbgValue with DIExpression(DW_OP_deref) from being dereferenced twice
by a debugger. There were a handful of tests relying on this incorrect
"FRAMEIX => indirect" assumption which actually had incorrect
DW_AT_locations: these are all fixed up in this patch.

Testing:

- check-llvm, and an end-to-end test using lldb to debug an optimized
  program.
- Existing unit tests for DIExpression::appendToStack fully cover the
  new DIExpression::append utility.
- check-debuginfo (the debug info integration tests)

Differential Revision: https://reviews.llvm.org/D49454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338069 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Print calling convention inside parentheses.
Zachary Turner [Thu, 26 Jul 2018 20:33:48 +0000 (20:33 +0000)]
[MS Demangler] Print calling convention inside parentheses.

For function pointers, we would print something like

int __cdecl (*)(int)

We need to move the calling convention inside, and print

int (__cdecl *)(int)

This patch implements this change for regular function pointers as
well as member function pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338068 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Add ms-arg-qualifiers.test
Zachary Turner [Thu, 26 Jul 2018 20:25:35 +0000 (20:25 +0000)]
[MS Demangler] Add ms-arg-qualifiers.test

This converts the arg qualifier mangling tests from
clang/CodeGenCXX/mangle-ms-arg-qualifiers.cpp to demangling tests.
Most tests already pass, so this patch doesn't come with any
functional change, just the addition of new tests.  The few tests
that don't pass are left in with a FIXME label so that they don't
run but serve as documentation about what still doesn't work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338067 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd missing tests from ms-mangle.cpp.
Zachary Turner [Thu, 26 Jul 2018 20:20:29 +0000 (20:20 +0000)]
Add missing tests from ms-mangle.cpp.

None of these tests pass yet so they are commented out, but I'm
adding them with a FIXME label so that they don't get lost when
copying tests over from clang's mangling tests.  Currently these
tests are all commented out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338066 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Demangle pointers to member functions.
Zachary Turner [Thu, 26 Jul 2018 20:20:10 +0000 (20:20 +0000)]
[MS Demangler] Demangle pointers to member functions.

After this patch, we can now properly demangle pointers to member
functions.  The calling convention is located in the wrong place,
but this will be fixed in a followup since it also affects non
member function pointers.

Differential Revision: https://reviews.llvm.org/D49639

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338065 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MC] Add support for the .rva assembler directive for COFF targets
Martin Storsjo [Thu, 26 Jul 2018 20:11:26 +0000 (20:11 +0000)]
[MC] Add support for the .rva assembler directive for COFF targets

Even though gas doesn't document it, it has been supported there for
a very long time.

This produces the 32 bit relative virtual address (aka image relative
address) for a given symbol. ".rva foo" is essentially equal to
".long foo@imgrel".

Differential Revision: https://reviews.llvm.org/D49821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338063 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoHandle the lack of a symbol table correctly.
Stephen Hines [Thu, 26 Jul 2018 20:05:31 +0000 (20:05 +0000)]
Handle the lack of a symbol table correctly.

Summary:
These two cases will trigger a dereference on a nullptr, since the
SymbolTable can be nonexistent for a given library, in addition to just
being empty.

Reviewers: alexshap

Reviewed By: alexshap

Subscribers: meikeb, kongyi, chh, jakehehrlich, llvm-commits, pirama

Differential Revision: https://reviews.llvm.org/D49534

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338062 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MS Demangler] Demangle data member pointers.
Zachary Turner [Thu, 26 Jul 2018 19:56:09 +0000 (19:56 +0000)]
[MS Demangler] Demangle data member pointers.

Differential Revision: https://reviews.llvm.org/D49630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338061 91177308-0d34-0410-b5e6-96231b3b80d8