arm64: dts: qcom: sm8450: Add usb nodes

SM8450 features a single USB controller which connects to both HS and SS
phy. Add the USB and the phy nodes for Qualcomm SM8450 SoC.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216110813.658384-1-vkoul@kernel.org

arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes

Add device tree nodes for two i2c blocks: i2c13 and i2c14.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-12-vkoul@kernel.org

arm64: dts: qcom: sm8450: add cpufreq support

The change adds a description of a SM8450 cpufreq-epss controller and
references to it from CPU nodes.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-11-vkoul@kernel.org

arm64: dts: qcom: sm8450: Add rpmhpd node

This adds RPMH power domain found in SM8450 SoC

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-10-vkoul@kernel.org

arm64: dts: qcom: sm8450-qrd: enable ufs nodes

Enable the UFS and phy node and add the regulators used by them.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-9-vkoul@kernel.org

arm64: dts: qcom: sm8450: add ufs nodes

Add the UFS and QMP PHY node for SM8450 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-8-vkoul@kernel.org

arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes

Add the RPMH regulators found in QRD-SM8450 platform

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-7-vkoul@kernel.org

arm64: dts: qcom: Add base SM8450 QRD DTS

Add DTS for Qualcomm QRD platform which uses SM8450 SoC and mark the
reserved nodes.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-6-vkoul@kernel.org

arm64: dts: qcom: sm8450: add smmu nodes

Add the apps smmu node as found in the SM8450 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-5-vkoul@kernel.org

arm64: dts: qcom: sm8450: Add reserved memory nodes

Add the reserved memory nodes for SM8450. This is based on the downstream
documentation.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-4-vkoul@kernel.org

arm64: dts: qcom: sm8450: Add tlmm nodes

Add tlmm node found in SM8450 SoC and uart pin configuration

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-3-vkoul@kernel.org

arm64: dts: qcom: Add base SM8450 DTSI

This add based DTSI for SM8450 SoC and includes base description of
CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to
shell with console on boards with this SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-2-vkoul@kernel.org

arm64: dts: qcom: ipq6018: Fix gpio-ranges property

There must be three parameters in gpio-ranges property. Fixes this not
very helpful error message:

  OF: /soc/pinctrl@1000000: (null) = 3 found 3

Fixes: 1e8277854b49 ("arm64: dts: Add ipq6018 SoC and CP01 board support")
Cc: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/8a744cfd96aff5754bfdcf7298d208ddca5b319a.1638862030.git.baruch@tkos.co.il

arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible

Use correct compatible according to dt-binding.

Fixes + few other lines of `make qcom/sdm845-oneplus-fajita.dtb`:
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: qfprom@784000: compatible: ['qcom,qfprom'] is too short
        From schema: Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213190228.106924-1-david@ixit.cz

arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones

Downstream defines four ADC channels related to thermal sensors external
to the PM8998 and two channels for internal voltage measurements.

Add these to the upstream SDM845 MTP, describe the thermal monitor
channels and add thermal_zones for these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org

arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node

Add a node for the ADC Thermal Monitor found in the PM8998 PMIC. This is
used to connect thermal zones with ADC channels.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20211005032531.2251928-4-bjorn.andersson@linaro.org

arm64: qcom: dts: drop legacy property #stream-id-cells

Property #stream-id-cells is legacy leftover and isn't currently
documented nor used.

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208184707.100716-1-david@ixit.cz

Merge tag '20211207114003.100693-2-vkoul@' into arm64-for-5.17

v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org

The immutable branch contains DT binding and in defines for the global
clock controller registers used the the Qualcomm SM8450 dtsi.

Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"

This reverts commit ed9500c1df59437856d43e657f185fb1eb5d817d.

The clock-frequency property was meant to aid platforms with broken firmwares
that don't set up the timer properly on their own. Don't include it where it is
not the case.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211202004328.459899-1-konrad.dybcio@somainline.org

arm64: dts: qcom: c630: add headset jack and button detection support

Add MBHC support available in WCD934X codec.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209175342.20386-3-srinivas.kandagatla@linaro.org

arm64: dts: qcom: c630: Fix soundcard setup

Currently Soundcard has 1 rx device for headset and SoundWire Speaker Playback.

This setup has issues, ex if we try to play on headset the audio stream is
also sent to SoundWire Speakers and we will hear sound in both headsets and speakers.

Make a separate device for Speakers and Headset so that the streams are
different and handled properly.

Fixes: 45021d35fcb2 ("arm64: dts: qcom: c630: Enable audio support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209175342.20386-2-srinivas.kandagatla@linaro.org

arm64: dts: qcom: add minimal DTS for Microsoft Surface Duo 2

This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350
Chipset

Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209183246.842880-2-kaperez@linux.microsoft.com

arm64: dts: qcom: sdm845-oneplus-*: add msm-id and board-id

The msm-id and board-id can be used to select the correct dtb when
multiple are provided to the bootloader.

Multiple DTBs can be provided on sdm845 devices using boot image header
v1 by appending them all to the kernel image before creating the boot
image. The bootloader then selects them like this:

Best match DTB tags 321/00000008/0x00000000/20001/20014/20115/20018/0/(offset)0x79998E27/(size)0x000173CD
Using pmic info 0x20014/0x20115/0x20018/0x0 for device 0x20014/0x20115/0x20018/0x0

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209225938.2427342-1-caleb.connolly@linaro.org

dt-bindings: clock: Add SM8450 GCC clock bindings

Add device tree bindings for global clock controller on SM8450 SoCs.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org

arm64: dts: qcom: sm7225-fairphone-fp4: Enable ADSP, CDSP & MPSS

Enable the remoteprocs found on the SoC and add a qcom,rmtfs-mem node.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-9-luca.weiss@fairphone.com

arm64: dts: qcom: sm6350: Add CDSP nodes

Add the required nodes for booting the CDSP on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-8-luca.weiss@fairphone.com

arm64: dts: qcom: sm6350: Add ADSP nodes

Add the required nodes for booting the ADSP on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-6-luca.weiss@fairphone.com

arm64: dts: qcom: sm6350: Add MPSS nodes

Add the required nodes for booting the MPSS on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-4-luca.weiss@fairphone.com

arm64: dts: qcom: sm6350: Fix validation errors

Sort clocks and interrupts as specified in the docs and remove the stray
property #power-domain-cells from aoss_qmp to solve dtbs_check
validation errors.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082614.22651-11-luca.weiss@fairphone.com

arm64: dts: qcom: Add device tree for Samsung J5 2015 (samsung-j5)

Samsung J5 2015 is a MSM8916 based Smartphone. It is similar to some of the
other MSM8916 devices, especially the Samsung ones.

With this patch initial support for the following is added:
  - eMMC/SD card
  - Buttons
  - USB (although no suiting MUIC driver currently)
  - UART (untested for lack of equipment)
  - WiFi/Bluetooth (WCNSS)

It is worth noting that Samsung J5 with MSM8916 exists in different
generations (e.g Samsung J5 2015 and Samsung J5 2016) which each have
different models (e.g. samsung-j5nlte, samsung-j5xnlte, etc). This patch
is only regarding the 2015 generation, but should work with all of it's
models, as far as we could test.

Co-developed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Julian Ribbeck <julian.ribbeck@gmx.de>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211116200734.73920-1-julian.ribbeck@gmx.de

arm64: dts: qcom: msm8916: fix MMC controller aliases

Change sdhcN aliases to mmcN to make them actually work. Currently the
board uses non-standard aliases sdhcN, which do not work, resulting in
mmc0 and mmc1 hosts randomly changing indices between boots.

Fixes: c4da5a561627 ("arm64: dts: qcom: Add msm8916 sdhci configuration nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201020559.1611890-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm6125: Add power domains to sdhc

Add RPM Power Domains to internal eMMC and SDCard.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-4-martin.botka@somainline.org

arm64: dts: qcom: sm6125: Add RPMPD node

Add RPM Power Distribution node for sm6125 SoC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-3-martin.botka@somainline.org

arm64: dts: qcom: sc7280-crd: Add Touchscreen and touchpad support

Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board

Signed-off-by: Kshitiz Godara <kgodara1@codeaurora.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-5-git-send-email-quic_rjendra@quicinc.com

arm64: dts: qcom: sc7280: Define EC and H1 nodes for IDP/CRD

The IDP2 and CRD boards share the EC and H1 parts, so define
all related device nodes into a common file and include them
in the idp2 and crd dts files to avoid duplication.

Signed-off-by: Kshitiz Godara <kgodara@codeaurora.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-4-git-send-email-quic_rjendra@quicinc.com

arm64: dts: qcom: sc7280-crd: Add device tree files for CRD

CRD (Compute Reference Design) is a sc7280 based board, largely
derived from the existing IDP board design with some key deltas
1. has EC and H1 over SPI similar to IDP2
2. touchscreen and trackpad support
3. eDP display

We just add the barebones dts file here, subsequent patches will
add support for EC/H1 and other components.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-3-git-send-email-quic_rjendra@quicinc.com

dt-bindings: arm: qcom: Document qcom,sc7280-crd board

Document the qcom,sc7280-crd board based off sc7280 SoC,
The board is also known as hoglin in the Chrome OS builds,
so document the google,hoglin compatible as well.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-2-git-send-email-quic_rjendra@quicinc.com

arm64: dts: qcom: Drop input-name property

This property doesn't seem to exist in the documentation nor
in source code, but for some reason it is defined in a bunch
of device trees.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211123162436.1507341-1-danct12@riseup.net

arm64: dts: qcom: sdm660-xiaomi-lavender: Add volume up button

This enables the volume up key.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211121170449.1124048-1-danct12@riseup.net

arm64: dts: qcom: msm8916: Add RPM sleep stats

MSM8916 is similar to the other SoCs that had the RPM stats node added
in commit 290bc6846547 ("arm64: dts: qcom: Enable RPM Sleep stats").
However, the dynamic offset readable at 0x14 seems only available on
some of the newer firmware versions. To be absolutely sure, make use
of the new qcom,msm8916-rpm-stats compatible that reads the sleep stats
from a fixed offset of 0xdba0.

Statistics are available for a "vmin" and "xosd" low power mode:

$ cat /sys/kernel/debug/qcom_stats/vmin
Count: 0
Last Entered At: 0
Last Exited At: 0
Accumulated Duration: 0
Client Votes: 0x0
$ cat /sys/kernel/debug/qcom_stats/xosd
Count: 0
Last Entered At: 0
Last Exited At: 0
Accumulated Duration: 0
Client Votes: 0x0

Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211119213953.31970-4-stephan@gerhold.net

arm64: dts: qcom: sm8250: Add CPU opp tables

Add OPP tables to scale DDR and L3 with CPUs for SM8250 SoCs.

Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211110215330.74257-1-thara.gopinath@linaro.org

arm64: dts: qcom: sdm660-xiaomi-lavender: Add USB

Enable and configure DWC3 and QUSB2 PHY to enable USB
functionality on the Redmi Note 7.

Signed-off-by: Alexey Min <alexey.min@gmail.com>
Co-developed-by: Dang Huynh <danct12@riseup.net>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-9-danct12@riseup.net

arm64: dts: qcom: sdm660-xiaomi-lavender: Enable Simple Framebuffer

This lets the user sees the framebuffer console.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-8-danct12@riseup.net

arm64: dts: qcom: sdm660-xiaomi-lavender: Add eMMC and SD

This commit enable the SD card slot and internal MMC.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-7-danct12@riseup.net

arm64: dts: qcom: sdm660-xiaomi-lavender: Add PWRKEY and RESIN

This enables the volume down key as well as the power button.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-5-danct12@riseup.net

arm64: dts: qcom: sdm660-xiaomi-lavender: Add RPM and fixed regulators

Add most of the RPM PM660/PM660L regulators and the fixed ones,
defining the common electrical part of this platform.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-4-danct12@riseup.net

arm64: dts: qcom: sdm630-pm660: Move RESIN to pm660 dtsi

It's not worth duplicating the same node over and over again,
so let's keep the common bits in the pm660 DTSI, making only
changing the status and keycode necessary.

Also, disable RESIN/PWR by default just in case if there are
devices that doesn't use them.

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-3-danct12@riseup.net

arm64: dts: qcom: sdm630: Assign numbers to eMMC and SD

This makes eMMC/SD device number consistent.

Reviewed-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Dang Huynh <danct12@riseup.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211120214227.779742-2-danct12@riseup.net

arm64: dts: qcom: sc7280: Fix 'interrupt-map' parent address cells

Update interrupt-map parent address cells for sc7280
Similar to existing Qcom SoCs.

Fixes: 92e0ee9f8 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1637060508-30375-4-git-send-email-pmaliset@codeaurora.org

arm64: dts: qcom: sc7280: Add pcie clock support

Add pcie clock phandle for sc7280 SoC.

Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1637060508-30375-3-git-send-email-pmaliset@codeaurora.org

arm64: dts: qcom: sc7280: Fix incorrect clock name

Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk
To match with dt binding.

Fixes: ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1637060508-30375-2-git-send-email-pmaliset@codeaurora.org

arm64: dts: qcom: sc7180: Fix ps8640 power sequence for Homestar rev4

When powering up the ps8640, we need to deassert PD right
after we turn on the vdd33 regulator. Unfortunately, the vdd33
regulator takes some time (~4ms) to turn on. Add in the delay
for the vdd33 regulator so that when the driver deasserts PD
that the regulator has had time to ramp.

Signed-off-by: yangcong <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211115030155.9395-1-yangcong5@huaqin.corp-partner.google.com

arm64: dts: qcom: sm8350: Add LLCC node

Configure the Last-Level Cache Controller for SM8350.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-16-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350-sagami: Configure remote processors

Configure ADSP, CDSP, MPSS, SLPI and IPA on SoMC Sagami.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-15-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350-sagami: Enable and populate I2C/SPI nodes

Based on current driver availability, add either nodes or comments regarding
peripherals connected via I2C/SPI.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-14-konrad.dybcio@somainline.org

arm64: dts: qcom: Add support for Xperia 1 III / 5 III

Add support for SONY Xperia 1 III (PDX215) and 5 III (PDX214) smartphones.
Both are based on the SM8350 Sagami platform and feature some really high-end
specs, such as:

- 4K (1 III / PRO-I) / 1080p (5 III), 120Hz HDR OLED 10-bit panels
- USB-C 3.1 with HDMI in (yes, phone as display!) and DP out
- 5G
- 8 or 12 gigs of ram, 128/256/512 gigs of storage
- A 3.5mm headphone jack, a RGB notification LED and a uSD card slot :)
- IP65/68 dust/water resistance
- Dual front-firing speakers and a lot of microphones
- Crazy complex camera hardware (especially on the PRO-I), which includes
4 cameras, an RGBIR sensor and a 3D iToF

The aforementioned PRO-I (PDX217) is not supported in this patch, because
even though it shares most of the code with 1 III, nobody really has it (yet?)

This only adds basic support for booting to a USB shell with a
bootloader-enabled display, support for all the awesome hardware listed above
will (hopefully) come (hopefully) soon.

In order to get a working boot image, you need to run (e.g. for 1 III):

cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm8350-sony-xperia-\
sagami-pdx215.dtb > .Image.gz-dtb

mkbootimg \
--kernel .Image.gz-dtb \
--ramdisk some_initrd.img \
--pagesize 4096 \
--base 0x0 \
--kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 \
--tags_offset 0x100 \
--cmdline "SOME_CMDLINE" \
--dtb_offset 0x1f00000 \
--header_version 1 \
--os_version 11 \
--os_patch_level 2021-10 \ # or newer
-o boot.img-sony-xperia-pdx215

Then, you need to flash it on the device and get rid of all the
vendor_boot/dtbo mess:

fastboot flash boot boot.img-sony-xperia-pdx215
fastboot erase vendor_boot
fastboot flash dtbo emptydtbo.img
fastboot reboot

Where emptydtbo.img is a tiny file that consists of 2 bytes (all zeroes), doing
a "fastboot erase" won't cut it, the bootloader will go crazy and things will
fall apart when it tries to overlay random bytes from an empty partition onto a
perfectly good appended DTB.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-13-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Assign iommus property to QUP WRAPs

Assign the iommus property to allow access to QUP hosts that were not set up by
the bootloader.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-12-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Set up WRAP2 QUPs

Set up I2C&SPI hosts and UARTs connected to WRAP2 and their respective pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-11-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Set up WRAP1 QUPs

Set up I2C&SPI hosts and UARTs connected to WRAP1 and their respective pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-10-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Set up WRAP0 QUPs

Set up I2C&SPI hosts and UARTs connected to WRAP0 and their respective pins.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-9-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Describe GCC dependency clocks

Add all the clock names that the GCC driver expects to get via DT, so that the
clock handles can be filled as the development progresses.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-8-konrad.dybcio@somainline.org

arm64: dts: qcom: *8350* Consolidate PON/RESIN usage

Disable PON/RESIN keys by default and keep the RESIN keycode set-per-board, as
these settings are not common between devices (one cannot even assume all
devices have buttons nowadays..).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-7-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Shorten camera-thermal-bottom name

Thermal zone names should not be longer than 20 names, which is indicated by
a message at boot. Change "camera-thermal-bottom" to "cam-thermal-bottom" to
fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-6-konrad.dybcio@somainline.org

arm64: dts: qcom: sm[68]350: Use interrupts-extended with pdc interrupts

Using interrupts = <&pdc X Y> makes the interrupt framework interpret this as
the &pdc-nth range of the main interrupt controller (GIC). Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-5-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer

Arch timer runs at 19.2 MHz. Specify the rate in the timer node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-4-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Add redistributor stride to GICv3

The redistributor properties were missing. Add them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-3-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Add missing QUPv3 ID2

Add the missing third QUPv3 master node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-2-konrad.dybcio@somainline.org

arm64: dts: qcom: sm8350: Move gpio.h inclusion to SoC DTSI

Almost any board that boots and has a way to interact with it
(say for the rare cases of just-pstore or let's-rely-on-bootloader-setup)
needs to set some GPIOs, so it makes no sense to include gpio.h separately
each time. Hence move it to SoC DTSI.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-1-konrad.dybcio@somainline.org

arm64: dts: qcom: Add missing vdd-supply for QUSB2 PHY

QUSB2 PHY requires vdd-supply for digital circuit operation.  Add it for
platforms that miss it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210928022002.26286-4-shawn.guo@linaro.org

arm64: dts: qcom: msm8996-xiaomi-common: Change TUSB320 to TUSB320L

This platform actually doesn't have TUSB320, but rather TUSB320L.
The TUSB320 compatible string was used due to lack of support for
TUSB320L, and it was close enough to detect cable plug-in and
direction, but it was limited to upstream facing port mode only.
Now that support for TUSB320L is added[1], change node name and
compatible to match and allow it to be properly reset and have
its mode set to dual-role port.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=ce0320bd3872038569be360870e2d5251b975692

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104111454.105875-1-y.oudjana@protonmail.com

arm64: dts: qcom: msm8996-xiaomi-scorpio: Add touchkey controller

Add a node and pin states for Cypress StreetFighter touchkey
controller.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104104932.104046-1-y.oudjana@protonmail.com

arm64: dts: qcom: msm8996-sony-xperia-tone: fix SPMI regulators declaration

Device tree for the Sony Xperia tone family of devices specifies
S9+S10+S11 SAW regulator as a part of the pmi8994_spmi_regulators device
tree node. However PMI8994 does not have these regulators, they are part
of the PM8994 device. All other MSM8996-based devices list them in the
pm8994_spmi_regulators device tree node. Move them accordingly.

Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104002949.2204727-5-dmitry.baryshkov@linaro.org

arm64: dts: qcom: msm8994-sony-xperia-kitakami: correct lvs1 and lvs2 supply property

The qcom_rpm_smd_regulator driver uses vdd_lvs1_2-supply property to
specify the supply regulator for LVS1 and LVS2 (following the pin name
in the PMIC datasheet). Correct the board's device tree property, so
that the regulator supply is setup properly.

Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104002949.2204727-4-dmitry.baryshkov@linaro.org

arm64: dts: qcom: apq8096-db820c: correct lvs1 and lvs2 supply property

The qcom_rpm_smd_regulator driver uses vdd_lvs1_2-supply property to
specify the supply regulator for LVS1 and LVS2 (following the pin name
in the PMIC datasheet). Correct the board's device tree property, so
that the regulator supply is setup properly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104002949.2204727-3-dmitry.baryshkov@linaro.org

arm64: dts: qcom: apq8096-db820c: add missing regulator details

Specify that S11 (well, whole block of s8+s9+s10+s11) of pm8994 and S2
(s2 + s3) of pmi8994 are supplied by vph_pwr. While we are at it, add
regulator name to S11, so that is displayed as VDD_APCC in the system.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104002949.2204727-2-dmitry.baryshkov@linaro.org

arm64: dts: qcom: apq8096-db820c: specify adsp firmware name

Specify firmware name to be used for the ADSP. Quoting Bjorn from the
respective apq8016-sbc commit:

The firmware for the modem and WiFi subsystems platform specific and is
signed with a OEM specific key (or a test key). In order to support more
than a single device it is therefor not possible to rely on the default
path and stash these files directly in the firmware directory.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211104002949.2204727-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)

Add support for SONY Xperia XZ2, XZ2 Compact and XZ3 smartphones, all based on
the Qualcomm SDM845 chipset. There also exists a fourth Tama device, the XZ2
Premium (Aurora) with a 4K display, but it's relatively rare.

The devices are affected by a scary UFS behaviour where sending a certain UFS
command (which is worked around on downstream) renders the device unbootable,
by effectively erasing the bootloader. Therefore UFS AND UFSPHY are strictly
disabled for now.

Downstream workaround:
https://github.com/kholk/kernel/commit/2e7a9ee1c91a016baa0b826a7752ec45663a0561

This platform's bootloader is not very nice either. To boot mainline you need
to flash a bogus DTBO (fastboot erasing may cut it, but it takes an inhumane
amount of time) - one that's just 4 bytes (all zeroes) seems to work just fine.

Of course, one can also provide a "normal" DTBO (device-specific DT overlayed
on top of the SoC DT), but that's not yet supported by the mainline kernel
build system.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211111184630.605035-1-konrad.dybcio@somainline.org

arm64: dts: qcom: msm8996: drop not documented adreno properties

These properties aren't documented nor implemented in the driver.
Drop them.

Fixes warnings as:
$ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/msm/gpu.yaml
...
arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: gpu@b00000: 'qcom,gpu-quirk-fault-detect-mask', 'qcom,gpu-quirk-two-pass-use-wfi' do not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/display/msm/gpu.yaml
...

Fixes: 69cc3114ab0f ("arm64: dts: Add Adreno GPU definitions")
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211030100413.28370-1-david@ixit.cz

arm64: dts: qcom: sc7180: Support Homestar rev4

Support Homestar rev4 board where Parade ps8640 is added as the
second source edp bridge.

Support different edp bridge chips in different board revisions,
now we move the #incldue line of the edp bridge dts fragment (e.g.
sc7180-trogdor-ti-sn65dsi86.dtsi) from "sc7180-trogdor-homestar.dtsi"
to per-board-rev dts files.

Since the edp bridge dts fragment overrides 'dsi0_out', which is
defined in "sc7180.dtsi", move the #incldue line of "sc7180.dtsi" from
"sc7180-trogdor-homestar.dtsi" to per-board-rev dts files too, before
the #include line of the edp bridge dts fragment.

Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211029152647.v3.4.If7aaa8e36f1269acae5488035bd62ce543756bf8@changeid

arm64: dts: qcom: sc7180: Support Lazor/Limozeen rev9

Support Lazor/Limozeen rev9 board where Parade ps8640 is added as the
second source edp bridge.

To support different edp bridge chips in different board revisions,
now we move the #incldue line of the edp bridge dts fragment (e.g.
sc7180-trogdor-ti-sn65dsi86.dtsi) from "sc7180-trogdor-lazor.dtsi" to
per-board-rev dts files.

Since the edp bridge dts fragment overrides 'dsi0_out', which is
defined in "sc7180.dtsi", move the #incldue line of "sc7180.dtsi" from
"sc7180-trogdor-lazor.dtsi" to per-board-rev dts files too, before
the #include line of the edp bridge dts fragment.

Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211029152647.v3.3.Ie56f55924f5c7706fe3194e710bbef6fdb8b5bc6@changeid

arm64: dts: qcom: sc7180: Specify "data-lanes" for DSI host output

MSM DSI host driver actually parses "data-lanes" in DT and compare
it with the number of DSI lanes the bridge driver sets for
mipi_dsi_device. So we need to always specify "data-lanes" for the
DSI host output. As of now, "data-lanes" is added to ti-sn65dsi86 dts
fragment, but missing in parade-ps8640 dts fragment, which requires
a fixup.

Since we'll do 4-lane DSI regardless of which bridge chip is used,
instead of adding "data-lanes" to parade-ps8640 dts fragment, let's
just move "data-lanes" from the bridge dts to sc7180-trogdor.dtsi.

Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211029152647.v3.2.If23c83a786fc4d318a1986f43803f22b4b1d82cd@changeid

arm64: dts: qcom: sc7180: Include gpio.h in edp bridge dts

The edp bridge dts fragment files use the macros defined in
'dt-bindings/gpio/gpio.h'.

To help us more flexibly order the #include lines of dts files in a
board-revision-specific dts file, let's include the gpio header in the
bridge dts fragment files themselves.

Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211029152647.v3.1.Ie17e51ad3eb91d72826ce651ca2786534a360210@changeid

arm64: dts: qcom: ipq8074: add MDIO bus

IPQ8074 uses an IPQ4019 compatible MDIO controller that is already
supported in the kernel, so add the DT node in order to use it.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007115846.26255-1-robimarko@gmail.com

arm64: dts: qcom: sdm845-xiaomi-beryllium: set venus firmware path

Enable loading the Qualcomm Venus video accelerator firmware on Xiaomi Pocophone F1.

Signed-off-by: Kate Doeen <jld3103yt@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211028102016.106063-1-jld3103yt@gmail.com

arm64: dts: qcom: sdm845-oneplus-common: set venus firmware path

Enable loading the Qualcomm Venus video accelerator firmware on OnePlus sdm845 devices.

Signed-off-by: Kate Doeen <jld3103yt@gmail.com>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211028101957.106034-1-jld3103yt@gmail.com

arm64: dts: qcom: sc7280: Add venus DT node

Add DT entries for the sc7280 venus encoder/decoder.

Co-developed-by: Mansur Alisha Shaik <mansur@codeaurora.org>
Signed-off-by: Mansur Alisha Shaik <mansur@codeaurora.org>
Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1635259922-25378-1-git-send-email-quic_dikshita@quicinc.com

arm64: dts: qcom: Add missing 'chassis-type's

Add the "chassis-type" to msm8916-samsung-serranove and
sm7225-fairphone-fp4 that were posted before the patch that added the
chassis-type to existing device trees, but merged after it.

Also, looks like sdm636-sony-xperia-ganges-mermaid was missing in
commit eaa744b1c101 ("arm64: dts: qcom: add 'chassis-type' property")
so add it there as well.

Cc: Luca Weiss <luca@z3ntu.xyz>
Cc: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211025102224.23746-1-stephan@gerhold.net

arm64: dts: qcom: sm8250-mtp: add sound card support

This patch adds sound card support for MTP using WCD938x headset playback,
capture, WSA8810 Speaker Playback and DMICs via VA macro.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211006164712.16078-5-srinivas.kandagatla@linaro.org

arm64: dts: qcom: sm8250-mtp: Add wsa8810 audio codec node

SM8250-MTP has WSA8810 via wsa macro for Speaker playback use case.
Add node for this device to be able to use it for sound card device.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211006164712.16078-4-srinivas.kandagatla@linaro.org

arm64: dts: qcom: sm8250-mtp: Add wcd9380 audio codec node

SM8250-MTP has WCD9380 codec for headset playback and capture via
rx and tx macro respectively.
Add node for this device to be able to use it for sound card device.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211006164712.16078-3-srinivas.kandagatla@linaro.org

arm64: dts: qcom: sm8250: Add nodes for tx and rx macros with soundwire masters

SM8250 has TX and RX macros with SoundWire Controllers to attach with
codecs like WCD938x. Add these nodes for sm8250 mtp audio use case.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211006164712.16078-2-srinivas.kandagatla@linaro.org

Linux 5.16-rc1

kconfig: Add support for -Wimplicit-fallthrough

Add Kconfig support for -Wimplicit-fallthrough for both GCC and Clang.

The compiler option is under configuration CC_IMPLICIT_FALLTHROUGH,
which is enabled by default.

Special thanks to Nathan Chancellor who fixed the Clang bug[1][2]. This
bugfix only appears in Clang 14.0.0, so older versions still contain
the bug and -Wimplicit-fallthrough won't be enabled for them, for now.

This concludes a long journey and now we are finally getting rid
of the unintentional fallthrough bug-class in the kernel, entirely. :)

Link: https://github.com/llvm/llvm-project/commit/9ed4a94d6451046a51ef393cd62f00710820a7e8
Link: https://bugs.llvm.org/show_bug.cgi?id=51094
Link: https://github.com/KSPP/linux/issues/115
Link: https://github.com/ClangBuiltLinux/linux/issues/236
Co-developed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
Co-developed-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'xfs-5.16-merge-5' of git://git./fs/xfs/xfs-linux

Pull xfs cleanups from Darrick Wong:
 "The most 'exciting' aspect of this branch is that the xfsprogs
  maintainer and I have worked through the last of the code
  discrepancies between kernel and userspace libxfs such that there are
  no code differences between the two except for #includes.

  IOWs, diff suffices to demonstrate that the userspace tools behave the
  same as the kernel, and kernel-only bits are clearly marked in the
  /kernel/ source code instead of just the userspace source.

  Summary:

   - Clean up open-coded swap() calls.

   - A little bit of #ifdef golf to complete the reunification of the
     kernel and userspace libxfs source code"

* tag 'xfs-5.16-merge-5' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux:
  xfs: sync xfs_btree_split macros with userspace libxfs
  xfs: #ifdef out perag code for userspace
  xfs: use swap() to make dabtree code cleaner

Merge tag 'for-5.16/parisc-3' of git://git./linux/kernel/git/deller/parisc-linux

Pull more parisc fixes from Helge Deller:
 "Fix a build error in stracktrace.c, fix resolving of addresses to
  function names in backtraces, fix single-stepping in assembly code and
  flush userspace pte's when using set_pte_at()"

* tag 'for-5.16/parisc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc/entry: fix trace test in syscall exit path
  parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page
  parisc: Fix implicit declaration of function '__kernel_text_address'
  parisc: Fix backtrace to always include init funtion names

Merge tag 'sh-for-5.16' of git://git.libc.org/linux-sh

Pull arch/sh updates from Rich Felker.

* tag 'sh-for-5.16' of git://git.libc.org/linux-sh:
  sh: pgtable-3level: Fix cast to pointer from integer of different size
  sh: fix READ/WRITE redefinition warnings
  sh: define __BIG_ENDIAN for math-emu
  sh: math-emu: drop unused functions
  sh: fix kconfig unmet dependency warning for FRAME_POINTER
  sh: Cleanup about SPARSE_IRQ
  sh: kdump: add some attribute to function
  maple: fix wrong return value of maple_bus_init().
  sh: boot: avoid unneeded rebuilds under arch/sh/boot/compressed/
  sh: boot: add intermediate vmlinux.bin* to targets instead of extra-y
  sh: boards: Fix the cacography in irq.c
  sh: check return code of request_irq
  sh: fix trivial misannotations

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:

 - Fix early_iounmap

 - Drop cc-option fallbacks for architecture selection

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 9156/1: drop cc-option fallbacks for architecture selection
  ARM: 9155/1: fix early early_iounmap()

Merge tag 'devicetree-fixes-for-5.16-1' of git://git./linux/kernel/git/robh/linux

Pull devicetree fixes from Rob Herring:

 - Two fixes due to DT node name changes on Arm, Ltd. boards

 - Treewide rename of Ingenic CGU headers

 - Update ST email addresses

 - Remove Netlogic DT bindings

 - Dropping few more cases of redundant 'maxItems' in schemas

 - Convert toshiba,tc358767 bridge binding to schema

* tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: watchdog: sunxi: fix error in schema
  bindings: media: venus: Drop redundant maxItems for power-domain-names
  dt-bindings: Remove Netlogic bindings
  clk: versatile: clk-icst: Ensure clock names are unique
  of: Support using 'mask' in making device bus id
  dt-bindings: treewide: Update @st.com email address to @foss.st.com
  dt-bindings: media: Update maintainers for st,stm32-hwspinlock.yaml
  dt-bindings: media: Update maintainers for st,stm32-cec.yaml
  dt-bindings: mfd: timers: Update maintainers for st,stm32-timers
  dt-bindings: timer: Update maintainers for st,stm32-timer
  dt-bindings: i2c: imx: hardware do not restrict clock-frequency to only 100 and 400 kHz
  dt-bindings: display: bridge: Convert toshiba,tc358767.txt to yaml
  dt-bindings: Rename Ingenic CGU headers to ingenic,*.h

Merge tag 'timers-urgent-2021-11-14' of git://git./linux/kernel/git/tip/tip

Pull timer fix from Thomas Gleixner:
 "A single fix for POSIX CPU timers to address a problem where POSIX CPU
  timer delivery stops working for a new child task because
  copy_process() copies state information which is only valid for the
  parent task"

* tag 'timers-urgent-2021-11-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  posix-cpu-timers: Clear task::posix_cputimers_work in copy_process()

Merge tag 'irq-urgent-2021-11-14' of git://git./linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A set of fixes for the interrupt subsystem

  Core code:

   - A regression fix for the Open Firmware interrupt mapping code where
     a interrupt controller property in a node caused a map property in
     the same node to be ignored.

  Interrupt chip drivers:

   - Workaround a limitation in SiFive PLIC interrupt chip which
     silently ignores an EOI when the interrupt line is masked.

   - Provide the missing mask/unmask implementation for the CSKY MP
     interrupt controller.

  PCI/MSI:

   - Prevent a use after free when PCI/MSI interrupts are released by
     destroying the sysfs entries before freeing the memory which is
     accessed in the sysfs show() function.

   - Implement a mask quirk for the Nvidia ION AHCI chip which does not
     advertise masking capability despite implementing it. Even worse
     the chip comes out of reset with all MSI entries masked, which due
     to the missing masking capability never get unmasked.

   - Move the check which prevents accessing the MSI[X] masking for XEN
     back into the low level accessors. The recent consolidation missed
     that these accessors can be invoked from places which do not have
     that check which broke XEN. Move them back to he original place
     instead of sprinkling tons of these checks all over the code"

* tag 'irq-urgent-2021-11-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  of/irq: Don't ignore interrupt-controller when interrupt-map failed
  irqchip/sifive-plic: Fixup EOI failed when masked
  irqchip/csky-mpintc: Fixup mask/unmask implementation
  PCI/MSI: Destroy sysfs before freeing entries
  PCI: Add MSI masking quirk for Nvidia ION AHCI
  PCI/MSI: Deal with devices lying about their MSI mask capability
  PCI/MSI: Move non-mask check back into low level accessors