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Geoff Berry [Thu, 14 Apr 2016 21:31:07 +0000 (21:31 +0000)]
[ScheduleDAGInstrs] Re-factor for based on review feedback. NFC.
Summary:
Re-factor some code to improve clarity and style based on review
comments from http://reviews.llvm.org/D18093.
Reviewers: MatzeB, mcrosier
Subscribers: MatzeB, mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D19128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266372
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Renato Golin [Thu, 14 Apr 2016 20:42:18 +0000 (20:42 +0000)]
[ARM] Adding IEEE-754 SIMD detection to loop vectorizer
Some SIMD implementations are not IEEE-754 compliant, for example ARM's NEON.
This patch teaches the loop vectorizer to only allow transformations of loops
that either contain no floating-point operations or have enough allowance
flags supporting lack of precision (ex. -ffast-math, Darwin).
For that, the target description now has a method which tells us if the
vectorizer is allowed to handle FP math without falling into unsafe
representations, plus a check on every FP instruction in the candidate loop
to check for the safety flags.
This commit makes LLVM behave like GCC with respect to ARM NEON support, but
it stops short of fixing the underlying problem: sub-normals. Neither GCC
nor LLVM have a flag for allowing sub-normal operations. Before this patch,
GCC only allows it using unsafe-math flags and LLVM allows it by default with
no way to turn it off (short of not using NEON at all).
As a first step, we push this change to make it safe and in sync with GCC.
The second step is to discuss a new sub-normal's flag on both communitues
and come up with a common solution. The third step is to improve the FastMath
flags in LLVM to encode sub-normals and use those flags to restrict NEON FP.
Fixes PR16275.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266363
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Sanjay Patel [Thu, 14 Apr 2016 20:17:40 +0000 (20:17 +0000)]
[InstCombine] remove constant by inverting compare + logic (PR27105)
https://llvm.org/bugs/show_bug.cgi?id=27105
We can check if all bits outside of a constant mask are set with a
single constant.
As noted in the bug report, although this form should be considered the
canonical IR, backends may want to transform this into an 'andn' / 'andc'
comparison against zero because that could be a single machine instruction.
Differential Revision: http://reviews.llvm.org/D18842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266362
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Dehao Chen [Thu, 14 Apr 2016 19:46:38 +0000 (19:46 +0000)]
Fix null pointer access for discriminator assignment.
Summary: This fixes the buildbot failure.
Reviewers: dnovillo, davidxl
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19129
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266360
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Tom Stellard [Thu, 14 Apr 2016 19:09:28 +0000 (19:09 +0000)]
AMDGPU: Add skeleton GlobalIsel implementation
Summary:
This adds the necessary target code to be able to run the ir translator.
Lowering function arguments and returns is a nop and there is no support
for RegBankSelect.
Reviewers: arsenm, qcolombet
Subscribers: arsenm, joker.eph, vkalintiris, llvm-commits
Differential Revision: http://reviews.llvm.org/D19077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266356
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Dehao Chen [Thu, 14 Apr 2016 18:37:18 +0000 (18:37 +0000)]
Update discriminator assignment algorithm to handle nested call correctly.
Summary: Add discriminator for nested call correctly.
Reviewers: davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19127
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266354
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Reid Kleckner [Thu, 14 Apr 2016 18:29:59 +0000 (18:29 +0000)]
Sink DI metadata usage out of MachineInstr.h and MachineInstrBuilder.h
MachineInstr.h and MachineInstrBuilder.h are very popular headers,
widely included across all LLVM backends. It turns out that there only a
handful of TUs that actually care about DI operands on MachineInstrs.
After this change, touching DebugInfoMetadata.h and rebuilding llc only
needs 112 actions instead of 542.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266351
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Davide Italiano [Thu, 14 Apr 2016 18:07:32 +0000 (18:07 +0000)]
[ValueMapper] Range-loopify to improve readability. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266350
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Jacques Pienaar [Thu, 14 Apr 2016 17:59:22 +0000 (17:59 +0000)]
[lanai] Add custom lowering for SRL_PARTS i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266349
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Tom Stellard [Thu, 14 Apr 2016 17:45:38 +0000 (17:45 +0000)]
[GlobalISel] Move GISelAccessor class into public headers
Reviewers: qcolombet
Subscribers: joker.eph, vkalintiris, llvm-commits
Differential Revision: http://reviews.llvm.org/D19120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266348
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Nicolai Haehnle [Thu, 14 Apr 2016 17:42:47 +0000 (17:42 +0000)]
[DivergenceAnalysis] Treat PHI with incoming undef as constant
Summary:
If a PHI has an incoming undef, we can pretend that it is equal to one
non-undef, non-self incoming value.
This is particularly relevant in combination with the StructurizeCFG
pass, which introduces PHI nodes with undefs. Previously, this lead to
branch conditions that were uniform before StructurizeCFG to become
non-uniform afterwards, which confused the SIAnnotateControlFlow
pass.
This fixes a crash when Mesa radeonsi compiles a shader from
dEQP-GLES3.functional.shaders.switch.switch_in_for_loop_dynamic_vertex
Reviewers: arsenm, tstellarAMD, jingyue
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19013
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266347
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Nicolai Haehnle [Thu, 14 Apr 2016 17:42:35 +0000 (17:42 +0000)]
[StructurizeCFG] Annotate branches that were treated as uniform
Summary:
This fully solves the problem where the StructurizeCFG pass does not
consider the same branches as uniform as the SIAnnotateControlFlow pass.
The patch in D19013 helps with this problem, but is not sufficient
(and, interestingly, causes a "regression" with one of the existing
test cases).
No tests included here, because tests in D19013 already cover this.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266346
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Nicolai Haehnle [Thu, 14 Apr 2016 17:42:29 +0000 (17:42 +0000)]
AMDGPU: Remove SIFixSGPRLiveRanges pass
Summary:
This pass is unnecessary and overly conservative. It was motivated by
situations like
def %vreg0:SGPR_32
...
if-block:
..
def %vreg1:SGPR_32
...
else-block:
...
use %vreg0:SGPR_32
...
and similar situations with uses after the non-uniform control flow, where
we are not allowed to assign %vreg0 and %vreg1 to the same physical register,
even though in the original, thread/workitem-based CFG, it looks like the
live ranges of these registers do not overlap.
However, by the time register allocation runs, we have moved to a wave-based
CFG that accurately represents the fact that the wave may run through both
the if- and the else-block. So the live ranges of %vreg0 and %vreg1 already
overlap even without the SIFixSGPRLiveRanges pass.
In addition to proving this change correct, I have tested it with Piglit
and a small number of other tests.
Reviewers: arsenm, tstellarAMD
Subscribers: MatzeB, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19041
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266345
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Nicolai Haehnle [Thu, 14 Apr 2016 17:42:18 +0000 (17:42 +0000)]
AMDGPU: change a redundant if () to an assert(). NFC
Summary:
I've been carrying this change around with me for a while, because the if ()
managed to confuse me while following the code. All callers ensure that the
assertion holds.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19042
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266344
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Tom Stellard [Thu, 14 Apr 2016 17:23:33 +0000 (17:23 +0000)]
[GlobalISel] Coding style and whitespace fixes
Reviewers: qcolombet
Subscribers: joker.eph, llvm-commits, vkalintiris
Differential Revision: http://reviews.llvm.org/D19119
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266342
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Tim Northover [Thu, 14 Apr 2016 17:03:29 +0000 (17:03 +0000)]
AArch64: expand cmpxchg after regalloc at -O0.
FastRegAlloc works only at the basic-block level and spills all live-out
registers. Unfortunately for a stack-based cmpxchg near the spill slots, this
can perpetually clear the exclusive monitor, which means the cmpxchg will never
succeed.
I believe the only way to handle this within LLVM is by expanding the loop
post-regalloc. We don't want this in general because it severely limits the
optimisations that can be done, so we limit this to -O0 compilations.
It's an ugly hack, and about the one good point in the whole mess is that we
can treat all cmpxchg operations in the most naive way possible (seq_cst, no
clrex faff) without affecting correctness.
Should fix PR25526.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266339
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Jacques Pienaar [Thu, 14 Apr 2016 16:47:42 +0000 (16:47 +0000)]
[lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMemOpBaseRegImmOfsWidth.
Summary: Add getMemOpBaseRegImmOfsWidth to enable determining independence during MiSched.
Reviewers: eliben, majnemer
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D18903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266338
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Tom Stellard [Thu, 14 Apr 2016 16:27:07 +0000 (16:27 +0000)]
AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit
Summary:
For GL_ARB_compute_shader we need to support workgroup sizes of at least 1024. However, if we want to allow large workgroup sizes, we may need to use less registers, as we have to run more waves per SIMD.
This patch adds an attribute to specify the maximum work group size the compiled program needs to support. It defaults, to 256, as that has no wave restrictions.
Reducing the number of registers available is done similarly to how the registers were reserved for chips with the sgpr init bug.
Reviewers: mareko, arsenm, tstellarAMD, nhaehnle
Subscribers: FireBurn, kerberizer, llvm-commits, arsenm
Differential Revision: http://reviews.llvm.org/D18340
Patch By: Bas Nieuwenhuizen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266337
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Tom Stellard [Thu, 14 Apr 2016 16:27:03 +0000 (16:27 +0000)]
AMDGPU/SI: Use the correct scratch wave offset register for shaders.
Summary:
The code previously always used s1 as it was using the user + system SGPR
information for compute kernels. This is incorrect for Mesa shaders though,
The register should be the next SGPR after all user and system SGPR's.
We use that Mesa adds arguments for all input and system SGPR's and
take the next available SGPR for the scratch wave offset register.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewers: mareko, arsenm, nhaehnle, tstellarAMD
Subscribers: qcolombet, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18941
Patch By: Bas Nieuwenhuizen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266336
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Betul Buyukkurt [Thu, 14 Apr 2016 16:25:45 +0000 (16:25 +0000)]
[PGO] Do not attach VP metadata if value count at site is 0 [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266335
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Silviu Baranga [Thu, 14 Apr 2016 16:08:45 +0000 (16:08 +0000)]
[SCEV][LAA] Add tests for SCEV expression transformations performed during LAA
Summary:
Add a print method to Predicated Scalar Evolution which prints all interesting
transformations done by PSE.
Loop Access Analysis will now print this as part of the analysis output.
We now use this to check the exact expression transformations that were done
by PSE in LAA.
The additional checking also acts as white-box testing for the getAsAddRec method.
Reviewers: anemet, sanjoy
Subscribers: sanjoy, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D18792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266334
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Simon Dardis [Thu, 14 Apr 2016 13:43:17 +0000 (13:43 +0000)]
Summary:
Alias 'jic $reg, 0' to 'jrc $reg' and 'jialc $reg, 0' to 'jalrc $reg' like
binutils.
This patch was previous committed as r266055 as seemed to have caused some spurious
test failures. They did not reappear after further local testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266301
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Igor Kudrin [Thu, 14 Apr 2016 10:43:37 +0000 (10:43 +0000)]
[Coverage] Update testing methods to support more than two files
Differential Revision: http://reviews.llvm.org/D18757
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266289
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Vasileios Kalintiris [Thu, 14 Apr 2016 09:13:13 +0000 (09:13 +0000)]
[mips] Remove duplicate tests and add missing prefixes for *-LABEL checks. NFC.
Summary:
The only difference between the removed tests and the pre-existing
ones, is the materialization of the zero constant, which shouldn't
matter for these cases.
Reviewers: dsanders, sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D18693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266285
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Igor Kudrin [Thu, 14 Apr 2016 09:10:00 +0000 (09:10 +0000)]
[Coverage] Avoid unnecessary copying of std::vector
Approved by: Justin Bogner <mail@justinbogner.com>
Differential Revision: http://reviews.llvm.org/D18756
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266284
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Adam Nemet [Thu, 14 Apr 2016 08:47:17 +0000 (08:47 +0000)]
Revert "Support arbitrary addrspace pointers in masked load/store intrinsics"
This reverts commit r266086.
It breaks the LTO build of gcc in SPEC2000.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266282
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Mehdi Amini [Thu, 14 Apr 2016 08:46:22 +0000 (08:46 +0000)]
ThinLTO: linkonce compile-time optimization, do not bother when there is only one input file
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266281
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David Majnemer [Thu, 14 Apr 2016 07:13:24 +0000 (07:13 +0000)]
[CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN
The behavior of {MIN,MAX}NAN differs from that of {MIN,MAX}NUM when only
one of the inputs is NaN: -NUM will return the non-NaN argument while
-NAN would return NaN.
It is desirable to lower to @llvm.{min,max}num to -NAN if they don't
have a native instruction for -NUM. Notably, ARMv7 NEON's vmin has the
-NAN semantics.
N.B. Of course, it is only safe to do this if the intrinsic call is
marked nnan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266279
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Mehdi Amini [Thu, 14 Apr 2016 04:36:40 +0000 (04:36 +0000)]
Do not use getGlobalContext()... ever.
This code was creating a new type in the global context, regardless
of which context the user is sitting in, what can possibly go wrong?
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266275
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Matt Arsenault [Thu, 14 Apr 2016 01:42:16 +0000 (01:42 +0000)]
AMDGPU: Implement canonicalize
Also add generic DAG node for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266272
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Matthias Braun [Thu, 14 Apr 2016 01:10:42 +0000 (01:10 +0000)]
TargetLowering: Factor out common code for tail call eligibility checking; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266270
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George Burgess IV [Wed, 13 Apr 2016 23:27:37 +0000 (23:27 +0000)]
[CFLAA] Fix up code style a bit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266262
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Sanjay Patel [Wed, 13 Apr 2016 23:23:30 +0000 (23:23 +0000)]
[ppc] add tests to show potential andc optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266261
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Tim Northover [Wed, 13 Apr 2016 23:08:27 +0000 (23:08 +0000)]
ARM: override cost function to re-enable ConstantHoisting (& fix it).
At some point, ARM stopped getting any benefit from ConstantHoisting because
the pass called a different variant of getIntImmCost. Reimplementing the
correct variant revealed some problems, however:
+ ConstantHoisting was modifying switch statements. This is simply invalid,
the cases must remain integer constants no matter the notional cost.
+ ConstantHoisting was mangling alloca instructions in the entry block. These
should be handled by FrameLowering, so constants actually have a cost of 0.
Worse, the resulting bitcasts meant they became dynamic allocas.
rdar://
25707382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266260
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Amaury Sechet [Wed, 13 Apr 2016 23:01:39 +0000 (23:01 +0000)]
Revert "Add LLVMGetAttrKindIDInContext in the C API in order to facilitate migration away from LLVMAttribute"
This reverts commit
0bcfd95c268bcb180a525e1837e84475df8acdc7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266259
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Duncan P. N. Exon Smith [Wed, 13 Apr 2016 22:54:01 +0000 (22:54 +0000)]
ValueMapper: Resolve cycles on the new nodes
Fix a major bug from r265456. Although it's now much rarer, ValueMapper
sometimes has to duplicate cycles. The
might-transitively-reference-a-temporary counts don't decrement on their
own when there are cycles, and you need to call MDNode::resolveCycles to
fix it.
r265456 was checking the input nodes to see if they were unresolved.
This is useless; they should never be unresolved. Instead we should
check the output nodes and resolve cycles on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266258
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Amaury Sechet [Wed, 13 Apr 2016 22:51:40 +0000 (22:51 +0000)]
Add LLVMGetAttrKindIDInContext in the C API in order to facilitate migration away from LLVMAttribute
Summary: LLVMAttribute has outlived its utility and is becoming a problem for C API users that what to use all the LLVM attributes. In order to help moving away from LLVMAttribute in a smooth manner, this diff introduce LLVMGetAttrKindIDInContext, which can be used instead of the enum values.
Reviewers: Wallbraker, whitequark, joker.eph, echristo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266257
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Reid Kleckner [Wed, 13 Apr 2016 22:46:06 +0000 (22:46 +0000)]
[IR] Optimize memory usage of Metadata on MSVC
An unsigned 2 bit bitfield takes 4 bytes in MSVC. Instead of a bitfield,
just use an unsigned char. We can go back to a bitfield when someone
implements the TODO of exposing and reusing the remaining 6 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266256
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Davide Italiano [Wed, 13 Apr 2016 22:08:26 +0000 (22:08 +0000)]
[llvm-lto] Uniform error handling. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266255
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Matthias Braun [Wed, 13 Apr 2016 21:43:25 +0000 (21:43 +0000)]
ARM: Use a callee save register for the swiftself parameter.
It is very likely that the swiftself parameter is alive throughout most
functions function so putting it into a callee save register should
avoid spills for the callers with only a minimum amount of extra spills
in the callees.
Currently the generated code is correct but unnecessarily spills and
reloads arguments passed in callee save registers, I will address this
in upcoming patches.
This also adds a missing check that for tail calls the preserved value
of the caller must be the same as the callees parameter.
Differential Revision: http://reviews.llvm.org/D18901
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266253
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Matthias Braun [Wed, 13 Apr 2016 21:43:21 +0000 (21:43 +0000)]
X86: Use a callee save register for the swiftself parameter.
It is very likely that the swiftself parameter is alive throughout most
functions function so putting it into a callee save register should
avoid spills for the callers with only a minimum amount of extra spills
in the callees.
Currently the generated code is correct but unnecessarily spills and
reloads arguments passed in callee save registers, I will address this
in upcoming patches.
This also adds a missing check that for tail calls the preserved value
of the caller must be the same as the callees parameter.
Differential Revision: http://reviews.llvm.org/D18902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266252
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Matthias Braun [Wed, 13 Apr 2016 21:43:16 +0000 (21:43 +0000)]
AArch64: Use a callee save registers for swiftself parameters
It is very likely that the swiftself parameter is alive throughout most
functions function so putting it into a callee save register should
avoid spills for the callers with only a minimum amount of extra spills
in the callees.
Currently the generated code is correct but unnecessarily spills and
reloads arguments passed in callee save registers, I will address this
in upcoming patches.
This also adds a missing check that for tail calls the preserved value
of the caller must be the same as the callees parameter.
Differential Revision: http://reviews.llvm.org/D19007
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266251
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Davide Italiano [Wed, 13 Apr 2016 21:41:35 +0000 (21:41 +0000)]
[llvm-lto] clang-format before working on this file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266250
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Easwaran Raman [Wed, 13 Apr 2016 21:20:22 +0000 (21:20 +0000)]
Return immediately from analyzeCall if analyzeBlock returns false.
This is part of the patch reviewed at http://reviews.llvm.org/D17584
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266249
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Kevin Enderby [Wed, 13 Apr 2016 21:17:58 +0000 (21:17 +0000)]
Start to add real error messages for malformed Mach-O files.
And update the existing test cases in test/Object/macho-invalid.test
to use llvm-objdump with the -macho option to produce these
error messages and stop producing the generic "Invalid data
was encountered while parsing the file" message.
Working from the beginning of the file, if the mach header is too large for
the size of the file and then if the load commands that follow extend past
the end of the file these two errors now generate correct error messages.
Both of these have existing test cases in test/Object/macho-invalid.test .
But the first with macho-invalid-header it will never trigger the error message
"mach header extends past the end of the file" using any of the llvm tools as
they all use identify_magic() which rejects files with the correct magic number
that are too small in size. So I tested this by hacking that code and seeing the
error message down in parseHeader() really does happen. So in case there
is ever code in llvm that directly calls createMachOObjectFile() this error
message will be correctly produced.
The second error message of "load commands extends past the end of the file"
is triggered by a number of existing tests cases in test/Object/macho-invalid.test .
Also other tests trigger different error messages now like "ilocalsym plus
nlocalsym in LC_DYSYMTAB load command extends past the end of the
symbol table".
There are two existing test cases that still get the "Invalid data was encountered ..."
error messages that I will tackle next. But they will involve a bit of pluming an
Expect<...> up through the call stack and I want to do those as separate changes.
FYI, for those test cases that were trying to test specific errors that now get
different errors I’ll fix those in follow on changes and create new test cases
for those so they test the error they were meant to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266248
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JF Bastien [Wed, 13 Apr 2016 21:12:21 +0000 (21:12 +0000)]
NFC mergefunc: const correctness
Some of the comparators were const others weren't making it annoying to add new comparators which call existing ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266247
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Tom Stellard [Wed, 13 Apr 2016 20:44:16 +0000 (20:44 +0000)]
AMDGPU/SI: Add support for spilling VGPRs without having to scavenge registers
Summary:
When we are spilling SGPRs to scratch memory, we usually don't have
free SGPRs to do the address calculation, so we need to re-use the
ScratchOffset register for the calculation.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18917
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266244
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Sanjay Patel [Wed, 13 Apr 2016 20:40:43 +0000 (20:40 +0000)]
[x86] add tests to show potential BMI optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266243
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Davide Italiano [Wed, 13 Apr 2016 20:17:42 +0000 (20:17 +0000)]
[DebugInfo] Optimize memory layout of DISubprogram.
A DISubprogram on x86_64 was 48 bytes. During an LTO build we
end up allocating *a lot* of these (see Duncan's numbers on
llvm-dev and/or my numbers in the review link).
This change reduces the size to 40 bytes, with a nice effect
on peak memory usage when LTO'ing clang.
There are more classes in the hierarchy which can be compacted
so more patches will come. DISubprogram was the biggest offender
in my profiling, anyway.
Differential Revision: http://reviews.llvm.org/D18918
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266241
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Tim Northover [Wed, 13 Apr 2016 19:46:54 +0000 (19:46 +0000)]
AsmParser: record "# line file" context to calculate location for diag
Since we can't emit diagnostics for missing "jmp 1f" labels until the end of
the file, we need to be able to restore the context used to calculate
file/line. This is basically the "# line file" directive that's being used at
the time the expression is seen.
rdar://
25706972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266238
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Easwaran Raman [Wed, 13 Apr 2016 19:43:31 +0000 (19:43 +0000)]
Test case for r265852.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266237
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Peter Collingbourne [Wed, 13 Apr 2016 19:36:04 +0000 (19:36 +0000)]
LibDriver: Silently do nothing when provided no inputs.
This behavior is strange, but it matches lib.exe. Based on a patch by
Nico Weber.
Fixes PR27335.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266236
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Betul Buyukkurt [Wed, 13 Apr 2016 18:52:19 +0000 (18:52 +0000)]
[PGO] Remove redundant VP instrumentation
LLVM optimization passes may reduce a profiled target expression
to a constant. Removing runtime calls at such instrumentation points
would help speedup the runtime of the instrumented program.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266229
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Nemanja Ivanovic [Wed, 13 Apr 2016 18:51:18 +0000 (18:51 +0000)]
[PowerPC] Basic support for P9 byte comparison and count trailing zero insns
This patch corresponds to review:
http://reviews.llvm.org/D17850
This patch implements the following instructions:
cmprb, cmpeqb, cnttzw, cnttzw., cnttzd, cnttzd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266228
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David Blaikie [Wed, 13 Apr 2016 18:38:33 +0000 (18:38 +0000)]
llvm-dwp: Add assert text
Post-commit feedback from Eric Christopher on r265452.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266225
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Evandro Menezes [Wed, 13 Apr 2016 18:31:45 +0000 (18:31 +0000)]
[AArch64] Disable LDP/STP for quads
Disable LDP/STP for quads on Exynos M1 as they are not as efficient as pairs
of regular LDR/STR.
Patch by Abderrazek Zaafrani <a.zaafrani@samsung.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266223
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Davide Italiano [Wed, 13 Apr 2016 18:08:07 +0000 (18:08 +0000)]
Revert "[IR/Verifier] Each DISubprogram with isDefinition: true must belong to a CU."
This reverts commit r266102. The O(N^2) verifier check causes timeouts
in LTO test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266221
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David Blaikie [Wed, 13 Apr 2016 17:42:56 +0000 (17:42 +0000)]
[IR/DebugInfoMetadata] Simplify array length calculation by using array_lengthof instead of ArrayRef::size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266218
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Nirav Dave [Wed, 13 Apr 2016 17:27:26 +0000 (17:27 +0000)]
Cleanup Store Merging in UseAA case
This patch fixes a bug (PR26827) when using anti-aliasing in store
merging. This sets the chain users of the component stores to point to
the new store instead of the component stores chain parent.
Reviewers: jyknight
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18909
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266217
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Mehdi Amini [Wed, 13 Apr 2016 17:20:10 +0000 (17:20 +0000)]
Sanity check `opt` options compatibility: can't have module-summary or module-hash when emitting textual IR
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266216
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Mehdi Amini [Wed, 13 Apr 2016 17:20:07 +0000 (17:20 +0000)]
Revert "Make aliases explicit in the summary"
Inadvertently commited...
This reverts commit
e618ec93786d99df2ddf280ad2d5e02f5516cecf.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266215
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Mehdi Amini [Wed, 13 Apr 2016 17:18:42 +0000 (17:18 +0000)]
Make aliases explicit in the summary
Summary:
To be able to work accurately on the reference graph when taking decision
about internalizing, promoting, renaming, etc. We need to have the alias
information explicit.
Reviewers: tejohnson
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18836
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266214
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Mehdi Amini [Wed, 13 Apr 2016 17:06:49 +0000 (17:06 +0000)]
Revert inadvertently modified comment in r266131
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266210
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Tim Northover [Wed, 13 Apr 2016 16:25:39 +0000 (16:25 +0000)]
AArch64: don't create instructions that write to xzr/wzr twice.
These are unpredictable even on AArch64.
Patch by Yichao Yu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266206
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Artem Tamazov [Wed, 13 Apr 2016 16:18:41 +0000 (16:18 +0000)]
[AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)git status
Tests added along with implemented feature.
Note that there is a small leftover of unecessary MI sheduling issue
(more info in the review). CodeGen/AMDGPU/salu-to-valu.ll updated to fix
the false regression.
TODO: Support for TTMP quads, comma-separated syntax in "[]" and more.
Differential Revision: http://reviews.llvm.org/D17825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266205
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Zoran Jovanovic [Wed, 13 Apr 2016 16:02:25 +0000 (16:02 +0000)]
[mips] Fix emitAtomicCmpSwapPartword to handle 64 bit pointers correctly
Differential Revision: http://reviews.llvm.org/D18995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266204
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Vasileios Kalintiris [Wed, 13 Apr 2016 15:07:45 +0000 (15:07 +0000)]
[mips] Sign-extend i32 values truncated from previously zero-extended i32 values.
Summary:
This is a special case for MIPS64 because the architecture requires
properly 32-bit sign-extended values in the register containers.
Additionaly, we merge consecutive trunc + AssertZExt nodes in order
to avoid unnecessary sign-extensions when the extension comes from a
type smaller than i32.
Reviewers: dsanders
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D18893
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266203
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David L Kreitzer [Wed, 13 Apr 2016 14:31:06 +0000 (14:31 +0000)]
Simplify strlen to a subtraction for certain cases.
Patch by Li Huang (li1.huang@intel.com)
Differential Revision: http://reviews.llvm.org/D18230
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266200
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Simon Pilgrim [Wed, 13 Apr 2016 12:40:22 +0000 (12:40 +0000)]
[X86][SSE] Regenerated vector integer absolute tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266194
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Petar Jovanovic [Wed, 13 Apr 2016 12:25:25 +0000 (12:25 +0000)]
Calculate __builtin_object_size when pointer depends on a condition
This patch fixes calculating of builtin_object_size if it depends on a
condition. Before this patch compiler did not know how to calculate the
object size when it finds a condition that cannot be eliminated.
This patch enables calculating of builtin_object_size even in case when
condition cannot be eliminated by choosing minimum or maximum value as a
result from condition. Choosing minimum or maximum value from condition
is based on the second argument of __builtin_object_size function.
Patch by Strahinja Petrovic.
Differential Revision: http://reviews.llvm.org/D18438
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266193
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Simon Pilgrim [Wed, 13 Apr 2016 09:28:44 +0000 (09:28 +0000)]
Added missing autogeneration note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266185
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Alexander Kornienko [Wed, 13 Apr 2016 08:58:52 +0000 (08:58 +0000)]
Don't use misc-unused-parameters check on LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266183
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Zlatko Buljan [Wed, 13 Apr 2016 08:02:26 +0000 (08:02 +0000)]
[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions
Differential Revision: http://reviews.llvm.org/D17137
This patch was reverted after the revertion of dependant patch http://reviews.llvm.org/D17068.
There was the problem with test-suite failure.
The problem is hopefully solved with dependant patch so this patch is commited again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266179
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David Majnemer [Wed, 13 Apr 2016 06:55:52 +0000 (06:55 +0000)]
[InstCombine] We folded an fcmp to an i1 instead of a vector of i1
Remove an ad-hoc transform in InstCombine and replace it with more
general machinery (ValueTracking, InstructionSimplify and VectorUtils).
This fixes PR27332.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266175
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Mehdi Amini [Wed, 13 Apr 2016 06:32:46 +0000 (06:32 +0000)]
Simplify LTOInternalize into UpdateLLVMCompilerUsed
It is now only doing the update to the llvm.compiler_used global.
The client has to call separately the internalization stage.
Hopefully the code is simpler to understand this way.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266174
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Mehdi Amini [Wed, 13 Apr 2016 06:32:29 +0000 (06:32 +0000)]
Minor cleanup in Internalize, hide helper class using anonymous namespace (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266173
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Mehdi Amini [Wed, 13 Apr 2016 06:32:04 +0000 (06:32 +0000)]
LTOInternalize: Use a StringSet instead of a sorted vector and a binary search query for each function
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266172
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Hrvoje Varga [Wed, 13 Apr 2016 06:17:21 +0000 (06:17 +0000)]
[mips][microMIPS] Fix for "Cannot copy registers" assertion
Differential Revision: http://reviews.llvm.org/D17068
This changes contains fix for failing test-suite. So, this patch should hopefully work now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266171
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Mehdi Amini [Wed, 13 Apr 2016 05:36:06 +0000 (05:36 +0000)]
Move "ExternalSymbols" out of LTOInternalize (NFC)
This is not really related to internalization per se.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266170
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Mehdi Amini [Wed, 13 Apr 2016 05:25:16 +0000 (05:25 +0000)]
Really return whether Internalize did change the Module or not.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266169
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Mehdi Amini [Wed, 13 Apr 2016 05:25:12 +0000 (05:25 +0000)]
Modernize Internalizer with for-range loop (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266168
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Mehdi Amini [Wed, 13 Apr 2016 05:25:08 +0000 (05:25 +0000)]
Refactor the InternalizePass into a helper class, and expose it through a public free function (NFC)
There is really no reason to require to instanciate a pass manager to
internalize.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266167
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Mehdi Amini [Wed, 13 Apr 2016 04:20:32 +0000 (04:20 +0000)]
Refactor Internalization pass to use as a callback instead of a StringSet (NFC)
This will save a bunch of copies / initialization of intermediate
datastructure, and (hopefully) simplify the code.
This also abstract the symbol preservation mechanism outside of the
Internalization pass into the client code, which is not forced
to keep a map of strings for instance (ThinLTO will prefere hashes).
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266163
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Wei Mi [Wed, 13 Apr 2016 03:08:27 +0000 (03:08 +0000)]
Recommit r265547, and r265610,r265639,r265657 on top of it, plus
two fixes with one about error verify-regalloc reported, and
another about live range update of phi after rematerialization.
r265547:
Replace analyzeSiblingValues with new algorithm to fix its compile
time issue. The patch is to solve PR17409 and its duplicates.
analyzeSiblingValues is a N x N complexity algorithm where N is
the number of siblings generated by reg splitting. Although it
causes siginificant compile time issue when N is large, it is also
important for performance since it removes redundent spills and
enables rematerialization.
To solve the compile time issue, the patch removes analyzeSiblingValues
and replaces it with lower cost alternatives containing two parts. The
first part creates a new spill hoisting method in postOptimization of
register allocation. It does spill hoisting at once after all the spills
are generated instead of inside every instance of selectOrSplit. The
second part queries the define expr of the original register for
rematerializaiton and keep it always available during register allocation
even if it is already dead. It deletes those dead instructions only in
postOptimization. With the two parts in the patch, it can remove
analyzeSiblingValues without sacrificing performance.
Patches on top of r265547:
r265610 "Fix the compare-clang diff error introduced by r265547."
r265639 "Fix the sanitizer bootstrap error in r265547."
r265657 "InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]"
Differential Revision: http://reviews.llvm.org/D15302
Differential Revision: http://reviews.llvm.org/D18934
Differential Revision: http://reviews.llvm.org/D18935
Differential Revision: http://reviews.llvm.org/D18936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266162
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Mehdi Amini [Wed, 13 Apr 2016 01:52:32 +0000 (01:52 +0000)]
Fix FunctionImport export list computation: need to take a reference to a map entry to actually modify it
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266159
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Matt Arsenault [Wed, 13 Apr 2016 00:39:52 +0000 (00:39 +0000)]
AMDGPU: Add test for m0 initialization in basic loop
Initialization of m0 is emitted for each LDS operation, so
every block with LDS usage ends up with one. MachineLICM
used to fail to hoist this out of the loop, so every loop
iteration with LDS usage in it would re-initialize it.
This seems to be fixed now, so add a test to make sure that
it stays this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266156
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Matt Arsenault [Wed, 13 Apr 2016 00:39:48 +0000 (00:39 +0000)]
AMDGPU: Remove leftover ShaderType attributes in tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266155
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Mehdi Amini [Tue, 12 Apr 2016 23:58:30 +0000 (23:58 +0000)]
LTOInternalize: Fix member type, should be a reference and not a copy
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266153
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Tom Stellard [Tue, 12 Apr 2016 23:57:30 +0000 (23:57 +0000)]
AMDGPU/SI: Fix spilling of 96-bit registers
Summary:
It seems like this was broken in r252327. I thought we had test cases
for this, but it's really hard to tirgger spills of this exact register
size since they aren't used very much.
Reviewers: arsenm, nhaehnle
Subscribers: nhaehnle, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19021
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266152
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Mehdi Amini [Tue, 12 Apr 2016 23:25:11 +0000 (23:25 +0000)]
Fix mismatch on returned type between header and implementation for createNameAnonFunctionPass()
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266151
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Justin Bogner [Tue, 12 Apr 2016 23:21:53 +0000 (23:21 +0000)]
CodeGen: Clear the MFI's save and restore point after PrologEpilogInserter
This state is no longer useful and not guaranteed to be valid in later
codegen passes. For example, see the added test, which would print a
savepoint of %bb.-1 without this change, and crashes with a
use-after-free error under ASan if you apply the recycling allocator
patch from llvm.org/PR26808.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266150
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Jeroen Ketema [Tue, 12 Apr 2016 23:21:46 +0000 (23:21 +0000)]
Add space between words in verify-scev-maps option help message
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266149
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Sanjay Patel [Tue, 12 Apr 2016 23:16:23 +0000 (23:16 +0000)]
[x86, InstCombine] fix masked load pass-through operand to be a zero vector
This bug was introduced with:
http://reviews.llvm.org/rL262269
AVX masked loads are specified to set vector lanes to zero when the high bit of the mask
element for that lane is zero:
"If the mask is 0, the corresponding data element is set to zero in the load form of these
instructions, and unmodified in the store form." --Intel manual
Differential Revision: http://reviews.llvm.org/D19017
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266148
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Evandro Menezes [Tue, 12 Apr 2016 22:42:36 +0000 (22:42 +0000)]
[AArch64] Fuse AES{D,E}/AESMC for Exynos M1. (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266144
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James Y Knight [Tue, 12 Apr 2016 22:32:47 +0000 (22:32 +0000)]
Pre-fill LibcallRoutineNames with nullptr.
And rearrange InitLibcallNames slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266142
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James Y Knight [Tue, 12 Apr 2016 21:54:57 +0000 (21:54 +0000)]
Update psabi link for x86-64. Add link to linux gabi supplement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266137
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David Blaikie [Tue, 12 Apr 2016 21:45:53 +0000 (21:45 +0000)]
[MC/ELFObjectWriter] Fix indentation of class body.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266136
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David L Kreitzer [Tue, 12 Apr 2016 21:45:09 +0000 (21:45 +0000)]
Fixed a few typos and formatting problems. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266135
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Davide Italiano [Tue, 12 Apr 2016 21:44:16 +0000 (21:44 +0000)]
[DebugInfo] Add error message to test.
Suggested by Rafael as post-commit review (r266102).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266134
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Mehdi Amini [Tue, 12 Apr 2016 21:35:28 +0000 (21:35 +0000)]
Add a pass to name anonymous/nameless function
Summary:
For correct handling of alias to nameless
function, we need to be able to refer them through a GUID in the summary.
Here we name them using a hash of the non-private global names in the module.
Reviewers: tejohnson
Subscribers: joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D18883
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266132
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