OSDN Git Service
Craig Topper [Fri, 23 Jun 2017 20:28:49 +0000 (20:28 +0000)]
[APInt] Use trailing bit counting methods instead of population count method in isAllOnesValue, isMaxSigendValue, and isMinSignedValue. NFCI
The trailing bit methods will early out if they find a bit of the opposite while popcount must always look at all bits. I also assume that more CPUs implement trailing bit counting with native instructions than population count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306154
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 23 Jun 2017 20:28:45 +0000 (20:28 +0000)]
[APInt] Move the single word cases of countTrailingZeros and countLeadingOnes inline for consistency with countTrailingOnes and countLeadingZeros. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306153
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 23 Jun 2017 20:28:40 +0000 (20:28 +0000)]
[CorrelatedValuePropagation] Fix typo in comment sense->since. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306152
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 23 Jun 2017 20:28:35 +0000 (20:28 +0000)]
[CorrelatedValuePropagation] Remove comment about iterating switch cases in reverse order. This is no longer being done after r298791. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306151
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 23 Jun 2017 20:28:14 +0000 (20:28 +0000)]
[llvm-pdbutil] Show what blocks a stream occupies.
This is useful when you want to look at a specific chunk of a
stream or look for discontinuities, and you need to know the
list of blocks occupied by a stream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306150
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 23 Jun 2017 20:18:38 +0000 (20:18 +0000)]
[llvm-pdbutil] Dump raw bytes of pdb name map.
This patch dumps the raw bytes of the pdb name map which contains
the mapping of stream name to stream index for the string table
and other reserved streams.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306148
91177308-0d34-0410-b5e6-
96231b3b80d8
Brian Gesiak [Fri, 23 Jun 2017 20:06:34 +0000 (20:06 +0000)]
[opt-viewer] Remove positional arg checks (NFC)
Summary:
opt-stats.py and opt-viewer.py's argument parsers both take a positional
argument 'yaml_files'. Positional arguments in Python's argparse module are
required by default, so the subsequent checks for `len(args.yaml_files) == 0`
are unnecessary -- if the length was zero, then the call to
`parser.parse_args()` would have thrown an error already.
Because there is no way for `len(args.yaml_files)` to be zero at these
points, removing the code is NFC.
Reviewers: anemet, davidxl
Reviewed By: anemet
Subscribers: llvm-commits, fhahn
Differential Revision: https://reviews.llvm.org/D34567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306147
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 23 Jun 2017 19:54:44 +0000 (19:54 +0000)]
[llvm-pdbutil] Add the ability to dump raw bytes from the file.
Normally we can only make sense of the content of a PDB in terms
of streams and blocks, but in some cases it may be useful to dump
bytes at a specific absolute file offset. For example, if you
know that some interesting data is at a particular location and
you want to see some surrounding data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306146
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 23 Jun 2017 19:47:04 +0000 (19:47 +0000)]
Revert "[Hexagon] Handle decreasing of stack alignment in frame lowering"
This breaks passing of aligned function arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306145
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Fri, 23 Jun 2017 19:20:12 +0000 (19:20 +0000)]
[AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free".
This patch contains a pass that transforms CBZ/CBNZ/TBZ/TBNZ instructions into a
conditional branch (Bcc), when the NZCV flags can be set for "free". This is
preferred on targets that have more flexibility when scheduling Bcc
instructions as compared to CBZ/CBNZ/TBZ/TBNZ (assuming all other variables are
equal). This can reduce register pressure and is also the default behavior for
GCC.
A few examples:
add w8, w0, w1 -> cmn w0, w1 ; CMN is an alias of ADDS.
cbz w8, .LBB_2 -> b.eq .LBB0_2 ; single def/use of w8 removed.
add w8, w0, w1 -> adds w8, w0, w1 ; w8 has multiple uses.
cbz w8, .LBB1_2 -> b.eq .LBB1_2
sub w8, w0, w1 -> subs w8, w0, w1 ; w8 has multiple uses.
tbz w8, #31, .LBB6_2 -> b.ge .LBB6_2
In looking at all current sub-target machine descriptions, this transformation
appears to be either positive or neutral.
Differential Revision: https://reviews.llvm.org/D34220.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306144
91177308-0d34-0410-b5e6-
96231b3b80d8
whitequark [Fri, 23 Jun 2017 18:58:10 +0000 (18:58 +0000)]
[X86] Fix SP adjustment in stack probes emitted on 32-bit Windows.
Commit r306010 adjusted the condition as follows:
- if (Is64Bit) {
+ if (!STI.isTargetWin32()) {
The intent was to preserve the behavior on all Windows platforms
but extend the behavior on 64-bit Windows platforms to every
other one. (Before r306010, emitStackProbeCall only ever executed
when emitting code for Windows triples.)
Unfortunately,
if (Is64Bit && STI.isOSWindows())
is not the same as
if (!STI.isTargetWin32())
because of the way isTargetWin32() is defined:
bool isTargetWin32() const {
return !In64BitMode && (isTargetCygMing() ||
isTargetKnownWindowsMSVC());
}
In practice this broke the JIT tests on 32-bit Windows, which did not
satisfy the new condition:
LLVM :: ExecutionEngine/MCJIT/2003-01-15-AlignmentTest.ll
LLVM :: ExecutionEngine/MCJIT/2003-08-15-AllocaAssertion.ll
LLVM :: ExecutionEngine/MCJIT/2003-08-23-RegisterAllocatePhysReg.ll
LLVM :: ExecutionEngine/MCJIT/test-loadstore.ll
LLVM :: ExecutionEngine/OrcMCJIT/2003-01-15-AlignmentTest.ll
LLVM :: ExecutionEngine/OrcMCJIT/2003-08-15-AllocaAssertion.ll
LLVM :: ExecutionEngine/OrcMCJIT/2003-08-23-RegisterAllocatePhysReg.ll
LLVM :: ExecutionEngine/OrcMCJIT/test-loadstore.ll
because %esp was not updated correctly. The failures are only visible
on a MSVC 2017 Debug build, for which we do not have bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306142
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 23 Jun 2017 18:52:13 +0000 (18:52 +0000)]
[llvm-pdbutil] Add a function for formatting MSF data.
The goal here is to make it possible to display absolute
file offsets when dumping byets from an MSF. The problem is
that when dumping bytes from an MSF, often the bytes will
cross a block boundary and encounter a discontinuity. We
can't use the normal formatBinary() function for this because
this would just treat the sequence as entirely ascending, and
not account out-of-order blocks.
This patch adds a formatMsfData() function to our printer, and
then uses this function to improve the output of the -stream-data
command line option for dumping bytes from a particular stream.
Test coverage is also expanded to make sure to include all possible
scenarios of offsets, sizes, and crossing block boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306141
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 23 Jun 2017 18:47:55 +0000 (18:47 +0000)]
[Hexagon] Remove call to printAndVerify from HexagonPassConfig
It causes an extra pass of the machine verifier to be added to the pass
manager, and causes test/CodeGen/Generic/llc-start-stop.ll to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306140
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 23 Jun 2017 18:42:15 +0000 (18:42 +0000)]
[x86] fix value types for SBB transform (PR33560)
I'm not sure yet why this wouldn't fail in the simple case,
but clearly I used the wrong value type with:
https://reviews.llvm.org/rL306040
...and the bug manifests with:
https://bugs.llvm.org/show_bug.cgi?id=33560
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306139
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 18:34:56 +0000 (18:34 +0000)]
[X86][AVX] Regenerate i256 bitcasted store test
Check on slow/fast unaligned memory targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306138
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 18:03:04 +0000 (18:03 +0000)]
Fix Wdocumentation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306133
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 17:19:44 +0000 (17:19 +0000)]
Regenerate extract-store.ll tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306131
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 23 Jun 2017 17:17:47 +0000 (17:17 +0000)]
Fix a misleading indentation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306130
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 23 Jun 2017 17:13:51 +0000 (17:13 +0000)]
Make the size specification for cache_size_bytes case insensitive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306129
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 23 Jun 2017 17:05:03 +0000 (17:05 +0000)]
Add a ThinLTO cache policy for controlling the maximum cache size in bytes.
This is useful when an upper limit on the cache size needs to be
controlled independently of the amount of the amount of free space.
One use case is a machine with a large number of cache directories
(e.g. a buildbot slave hosting a large number of independent build
jobs). By imposing an upper size limit on each cache directory,
users can more easily estimate the server's capacity.
Differential Revision: https://reviews.llvm.org/D34547
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306126
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Fri, 23 Jun 2017 16:53:59 +0000 (16:53 +0000)]
[Hexagon] Handle decreasing of stack alignment in frame lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306124
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Fri, 23 Jun 2017 16:38:40 +0000 (16:38 +0000)]
Add a BinarySubstreamRef, and a method to read one.
This is essentially just a BinaryStreamRef packaged with an
offset and the logic for reading one is no different than the
logic for reading a BinaryStreamRef, except that we save the
current offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306122
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 16:35:32 +0000 (16:35 +0000)]
Remove trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306121
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Fri, 23 Jun 2017 16:15:55 +0000 (16:15 +0000)]
GlobalISel: remove G_SEQUENCE instruction.
It was trying to do too many things. The basic lumping together of values for
legalization purposes is now handled by G_MERGE_VALUES. More complex things
involving gaps and odd sizes are handled by G_INSERT sequences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306120
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Fri, 23 Jun 2017 16:15:37 +0000 (16:15 +0000)]
GlobalISel: convert buildSequence to use non-deprecated instructions.
G_SEQUENCE is going away soon so as a first step the MachineIRBuilder needs to
be taught how to emulate it with alternatives. We use G_MERGE_VALUES where
possible, and a sequence of G_INSERTs if not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306119
91177308-0d34-0410-b5e6-
96231b3b80d8
Jun Bum Lim [Fri, 23 Jun 2017 16:12:37 +0000 (16:12 +0000)]
[InlineCost] Do not take INT_MAX when Cost is negative
Summary: visitSwitchInst should not take INT_MAX when Cost is negative. Instead of INT_MAX , we also use a valid upperbound cost when overflow occurs in Cost.
Reviewers: hans, echristo, dmgreen
Reviewed By: dmgreen
Subscribers: mcrosier, javed.absar, llvm-commits, eraman
Differential Revision: https://reviews.llvm.org/D34436
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306118
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 23 Jun 2017 15:56:14 +0000 (15:56 +0000)]
[SystemZ] Remove unnecessary serialization before volatile loads
This reverts the use of TargetLowering::prepareVolatileOrAtomicLoad
introduced by r196905. Nothing in the semantics of the "volatile"
keyword or the definition of the z/Architecture actually requires
that volatile loads are preceded by a serialization operation, and
no other compiler on the platform actually implements this.
Since we've now seen a use case where this additional serialization
causes noticable performance degradation, this patch removes it.
The patch still leaves in the serialization before atomic loads,
which is now implemented directly in lowerATOMIC_LOAD. (This also
seems overkill, but that can be addressed separately.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306117
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 23 Jun 2017 15:29:49 +0000 (15:29 +0000)]
[x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306114
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 23 Jun 2017 15:22:27 +0000 (15:22 +0000)]
[x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306113
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Fri, 23 Jun 2017 15:17:17 +0000 (15:17 +0000)]
AMDGPU/GlobalISel: Mark 32-bit G_AND as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D34349
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306112
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 23 Jun 2017 15:06:30 +0000 (15:06 +0000)]
[x86] remove overridden target settings in test; NFC
r306109 was supposed to make this change, but I committed the wrong version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306110
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 23 Jun 2017 14:58:21 +0000 (14:58 +0000)]
[x86] rename test file and auto-generate complete checks; NFC
The command-line params override the target setting in the file itself, so delete that.
Also, remove the cpu and arch because those don't matter and neither does the OS specification in the triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306109
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 14:38:00 +0000 (14:38 +0000)]
[X86][AVX] Extended vector average tests
Added AVX1 tests and merged AVX1/AVX2/AVX512 checks where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306107
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Paulsson [Fri, 23 Jun 2017 14:30:46 +0000 (14:30 +0000)]
[SystemZ] Fix trap issue and enable expensive checks.
The isBarrier/isTerminator flags have been removed from the SystemZ trap
instructions, so that tests do not fail with EXPENSIVE_CHECKS. This was just
an issue at -O0 and did not affect code output on benchmarks.
(Like Eli pointed out: "targets are split over whether they consider their
"trap" a terminator; x86, AArch64, and NVPTX don't, but ARM, MIPS, PPC, and
SystemZ do. We should probably try to be consistent here.". This is still the
case, although SystemZ has switched sides).
SystemZ now returns true in isMachineVerifierClean() :-)
These Generic tests have been modified so that they can be run with or without
EXPENSIVE_CHECKS: CodeGen/Generic/llc-start-stop.ll and
CodeGen/Generic/print-machineinstrs.ll
Review: Ulrich Weigand, Simon Pilgrim, Eli Friedman
https://bugs.llvm.org/show_bug.cgi?id=33047
https://reviews.llvm.org/D34143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306106
91177308-0d34-0410-b5e6-
96231b3b80d8
Anna Thomas [Fri, 23 Jun 2017 14:28:01 +0000 (14:28 +0000)]
[RuntimeLoopUnrolling] Rename exit block and move assert earlier. NFC
The single exit block allowed in runtime unrolling is guaranteed to be
the Latch's successor, so rename it as LatchExitBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306105
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 14:16:50 +0000 (14:16 +0000)]
[X86][SSE] Dropped -mcpu from vector average tests
Use triple and attribute only for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306104
91177308-0d34-0410-b5e6-
96231b3b80d8
Ekaterina Vaartis [Fri, 23 Jun 2017 13:54:10 +0000 (13:54 +0000)]
[docs] As of binutils 2.21.51.0.2, ld.bfd supports plugins too, represent this in docs
PR#32760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306102
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 13:53:55 +0000 (13:53 +0000)]
Fix double->float truncation warning on MSVC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306101
91177308-0d34-0410-b5e6-
96231b3b80d8
Anna Thomas [Fri, 23 Jun 2017 13:41:45 +0000 (13:41 +0000)]
[InstCombine] Recognize and simplify three way comparison idioms
Summary:
Many languages have a three way comparison idiom where comparing two values
produces not a boolean, but a tri-state value. Typical values (e.g. as used in
the lcmp/fcmp bytecodes from Java) are -1 for less than, 0 for equality, and +1
for greater than.
We actually do a great job already of converting three way comparisons into
binary comparisons when the result produced has one a single use. Unfortunately,
such values can have more than one use, and in that case, our existing
optimizations break down.
The patch adds a peephole which converts a three-way compare + test idiom into a
binary comparison on the original inputs. It focused on replacing the test on
the result of the three way compare and does nothing about removing the three
way compare itself. That's left to other optimizations (which do actually kick
in commonly.)
We currently recognize one idiom on signed integer compare. In the future, we
plan to recognize and simplify other comparison idioms on
other signed/unsigned datatypes such as floats, vectors etc.
This is a resurrection of Philip Reames' original patch:
https://reviews.llvm.org/D19452
Reviewers: majnemer, apilipenko, reames, sanjoy, mkazantsev
Reviewed by: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34278
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306100
91177308-0d34-0410-b5e6-
96231b3b80d8
Petar Jovanovic [Fri, 23 Jun 2017 13:33:46 +0000 (13:33 +0000)]
Revert r306095: [mips] Fix reg positions in the aui/daui instructions
ELF/mips-plt-r6.s in lld-test is failing. Reverting the change.
Original commit message:
[mips] Fix register positions in the aui/daui instructions
Swapped the position of the rt and rs register in the aut/daui
instructions for mips32r6 and mips64r6. With this change, the format of
the generated instructions complies with specifications and GCC.
Patch by Milos Stojanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306099
91177308-0d34-0410-b5e6-
96231b3b80d8
Pavel Labath [Fri, 23 Jun 2017 13:13:06 +0000 (13:13 +0000)]
Fix build breakage caused by r306096
It seems some targets don't have std::strtof and friends. Hopefully,
dropping the std:: will be fine, as that's what the compiler recommends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306098
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 13:07:20 +0000 (13:07 +0000)]
[X86][SSE] Dropped -mcpu from scalar math tests
Use triple and attribute only for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306097
91177308-0d34-0410-b5e6-
96231b3b80d8
Pavel Labath [Fri, 23 Jun 2017 12:55:02 +0000 (12:55 +0000)]
[ADT] Add llvm::to_float
Summary:
The function matches the interface of llvm::to_integer, but as we are
calling out to a C library function, I let it take a Twine argument, so
we can avoid a string copy at least in some cases.
I add a test and replace a couple of existing uses of strtod with this
function.
Reviewers: zturner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306096
91177308-0d34-0410-b5e6-
96231b3b80d8
Petar Jovanovic [Fri, 23 Jun 2017 12:47:18 +0000 (12:47 +0000)]
[mips] Fix register positions in the aui/daui instructions
Swapped the position of the rt and rs register in the aut/daui instructions
for mips32r6 and mips64r6. With this change, the format of the generated
instructions complies with specifications and GCC.
Patch by Milos Stojanovic.
Differential Revision: https://reviews.llvm.org/D33988
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306095
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 23 Jun 2017 11:00:49 +0000 (11:00 +0000)]
[X86][SSE] Dropped -mcpu from insertps tests
Use triple and attribute only for consistency
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306092
91177308-0d34-0410-b5e6-
96231b3b80d8
Stefan Maksimovic [Fri, 23 Jun 2017 09:09:31 +0000 (09:09 +0000)]
[mips][msa] Splat.d endianness check
Before this change, it was always the first element of a vector that got splatted since the lower 6 bits of vshf.d $wd were always zero for little endian.
Additionally, masking has been performed for vshf via which splat.d is created.
Vshf has a property where if its first operand's elements have either bit 6 or 7 set, destination element is set to zero.
Initially masked with 63 to avoid this property, which would result in generation of and.v + vshf.d in all cases.
Masking with one results in generating a single splati.d instruction when possible.
Differential Revision: https://reviews.llvm.org/D32216
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306090
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 23 Jun 2017 05:41:35 +0000 (05:41 +0000)]
[JumpThreading] Teach jump threading how to analyze (and (cmp A, C1), (cmp A, C2)) after InstCombine has turned it into (cmp (add A, C3), C4)
Currently JumpThreading can use LazyValueInfo to analyze an 'and' or 'or' of compare if the compare is fed by a livein of a basic block. This can be used to to prove the condition can't be met for some predecessor and the jump from that predecessor can be moved to the false path of the condition.
But if the compare is something that InstCombine turns into an add and a single compare, it can't be analyzed because the livein is now an input to the add and not the compare.
This patch adds a new method to LVI to get a ConstantRange on an edge. Then we teach jump threading to detect the add livein feeding a compare and to get the ConstantRange and propagate it.
Differential Revision: https://reviews.llvm.org/D33262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306085
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 23 Jun 2017 05:41:32 +0000 (05:41 +0000)]
[JumpThreading] Use some temporary variables to reduce the number of times we call the same methods. NFC
A future patch will add even more uses of these variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306084
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 23 Jun 2017 04:07:44 +0000 (04:07 +0000)]
COFF: Produce an error on invalid pcrel relocs.
X86_64 COFF only has support for 32 bit pcrel relocations. Produce an
error on all others.
Note that gnu as has extended the relocation values to support
this. It is not clear if we should support the gnu extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306082
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Fri, 23 Jun 2017 04:03:04 +0000 (04:03 +0000)]
[LoopSimplify] Factor the logic to form dedicated exits into a utility.
I want to use the same logic as LoopSimplify to form dedicated exits in
another pass (SimpleLoopUnswitch) so I wanted to factor it out here.
I also noticed that there is a pretty significantly more efficient way
to implement this than the way the code in LoopSimplify worked. We don't
need to actually retain the set of unique exit blocks, we can just
rewrite them as we find them and use only a set to deduplicate.
This did require changing one part of LoopSimplify to not re-use the
unique set of exits, but it only used it to check that there was
a single unique exit. That part of the code is about to walk the exiting
blocks anyways, so it seemed better to rewrite it to use those exiting
blocks to compute this property on-demand.
I also had to ditch a statistic, but it doesn't seem terribly valuable.
Differential Revision: https://reviews.llvm.org/D34049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306081
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 23 Jun 2017 03:48:01 +0000 (03:48 +0000)]
Make the test a bit more strict. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306080
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 23 Jun 2017 02:15:56 +0000 (02:15 +0000)]
COFF: handle "undef - ." expressions.
This is another thing that the ELF implementation can do but is
missing from COFF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306078
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 23 Jun 2017 01:08:16 +0000 (01:08 +0000)]
[LVI] Teach LVI to reason about ORs of icmps similar to how it reasons about ANDs of icmps
Summary: LVI can reason about an AND of icmps on the true dest of a branch. I believe we can do similar for the false dest of ORs. This allows us to get the same answer for the demorganed versions of some of the AND test cases as you can see.
Reviewers: anna, reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34431
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306076
91177308-0d34-0410-b5e6-
96231b3b80d8
Farhana Aleen [Thu, 22 Jun 2017 23:56:31 +0000 (23:56 +0000)]
Fixed a (product) build error that was due to an unused variable
Details: There was a use but it was in the assert which was not
exercised during product build.
Reviewers: Andrew Kaylor
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306073
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 22 Jun 2017 23:47:15 +0000 (23:47 +0000)]
[x86] add/sub (X==0) --> sbb(cmp X, 1)
This is very similar to the transform in:
https://reviews.llvm.org/rL306040
...but in this case, we use cmp X, 1 to set the carry bit as needed.
Again, we can show that all of these are logically equivalent (although
InstCombine currently canonicalizes to a form not seen here), and if
we believe IACA, then this is the smallest/fastest code. Eg, with SNB:
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | 1.0 | | | | | | | cmp edi, 0x1
| 2 | | 1.0 | | | | 1.0 | CP | sbb eax, eax
The larger motivation is to clean up all select-of-constants combining/lowering
because we're missing some common cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306072
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Kaylor [Thu, 22 Jun 2017 23:27:16 +0000 (23:27 +0000)]
Restrict the definition of loop preheader to avoid EH blocks
Differential Revision: https://reviews.llvm.org/D34487
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306070
91177308-0d34-0410-b5e6-
96231b3b80d8
whitequark [Thu, 22 Jun 2017 23:22:36 +0000 (23:22 +0000)]
Define behavior of "stack-probe-size" attribute when inlining.
Also document the attribute, since "probe-stack" already is.
Reviewed By: majnemer
Differential Revision: https://reviews.llvm.org/D34528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306069
91177308-0d34-0410-b5e6-
96231b3b80d8
Farhana Aleen [Thu, 22 Jun 2017 22:59:04 +0000 (22:59 +0000)]
Supported lowerInterleavedStore() in X86InterleavedAccess.
Reviewers: RKSimon, DavidKreitzer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306068
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Thu, 22 Jun 2017 22:58:12 +0000 (22:58 +0000)]
Remove the LoadCombine pass. It was never enabled and is unsupported.
Based on discussions with the author on mailing lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306067
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 22 Jun 2017 22:17:05 +0000 (22:17 +0000)]
[x86] add more tests for select --> sbb transform; NFC
These are siblings of the tests added with r306032.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306064
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 22 Jun 2017 21:57:04 +0000 (21:57 +0000)]
Change creation of relative relocations on COFF.
For whatever reason, when processing
.globl foo
foo:
.data
bar:
.long foo-bar
llvm-mc creates a relocation with the section:
0x0 IMAGE_REL_I386_REL32 .text
This is different than when the relocation is relative from the
beginning. For example, a file with
call foo
produces
0x0 IMAGE_REL_I386_REL32 foo
I would like to refactor the logic for converting "foo - ." into a
relative relocation so that it is shared with ELF. This is the first
step and just changes the coff implementation to match what ELF (and
COFF in the case of calls) does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306063
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Thu, 22 Jun 2017 21:54:26 +0000 (21:54 +0000)]
[ORC] Expose a typedef in RTDyldObjectLinkingLayer.
This should fix the failure on the polly bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306062
91177308-0d34-0410-b5e6-
96231b3b80d8
Kamil Rytarowski [Thu, 22 Jun 2017 21:28:48 +0000 (21:28 +0000)]
Fix modular build
Exclude header Support/Solaris/sys/regset.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306061
91177308-0d34-0410-b5e6-
96231b3b80d8
Jacob Gravelle [Thu, 22 Jun 2017 21:26:08 +0000 (21:26 +0000)]
[WebAssembly] WebAssemblyFastISel getelementptr variable index support
Summary:
Previously -fast-isel getelementptr would constant-fold non-constant i8
load/stores.
Reviewers: sunfish
Subscribers: jfb, dschuff, sbc100, llvm-commits
Differential Revision: https://reviews.llvm.org/D34044
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306060
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 22 Jun 2017 21:11:44 +0000 (21:11 +0000)]
[Hexagon] Properly update kill flags in HexagonNewValueJump
The feeder instruction will be moved to right before the compare, so
the updating code should not be looking for kills past the compare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306059
91177308-0d34-0410-b5e6-
96231b3b80d8
Lang Hames [Thu, 22 Jun 2017 21:06:54 +0000 (21:06 +0000)]
[ORC] Switch the object layer API from addObjectSet to addObject (singular), and
move the ObjectCache from the IRCompileLayer to SimpleCompiler.
This is the first in a series of patches aimed at cleaning up and improving the
robustness and performance of the ORC APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306058
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Thu, 22 Jun 2017 21:02:14 +0000 (21:02 +0000)]
[MC] Allow assembling .secidx and .secrel32 for undefined symbols
There's nothing incorrect about emitting such relocations against
symbols defined in other objects. The code in EmitCOFFSec* was missing
the visitUsedExpr part of MCStreamer::EmitValueImpl, so these symbols
were not being registered with the object file assembler.
This will be used to make reduced test cases for LLD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306057
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 22 Jun 2017 20:58:11 +0000 (20:58 +0000)]
[llvm-pdbutil] Create a "bytes" subcommand.
This idea originally came about when I was doing some deep
investigation of why certain bytes in a PDB that we round-tripped
differed from their original bytes in the source PDB. I found
myself having to hack up the code in many places to dump the
bytes of this substream, or that record. It would be nice if
we could just do this for every possible stream, substream,
debug chunk type, etc.
It doesn't make sense to put this under dump because there's just
so many options that would detract from the more common use case
of just dumping deserialized records. So making a new subcommand
seems like the most logical course of action. In doing so, we
already have two command line options that are suitable for this
new subcommand, so start out by moving them there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306056
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 22 Jun 2017 20:57:39 +0000 (20:57 +0000)]
[llvm-pdbutil] Rename "raw" to "dump".
Now you run llvm-pdbutil dump <options>. This is a followup
after having renamed the tool, whereas before raw was obviously
just the style of dumping, whereas now "dump" is the action to
perform with the "util".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306055
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 22 Jun 2017 20:43:02 +0000 (20:43 +0000)]
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
Remove the previous, manual shuffling of the kill flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306054
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 22 Jun 2017 20:27:33 +0000 (20:27 +0000)]
Simplify WinCOFFObjectWriter::recordRelocation.
It looks like that when this code was written recordRelocation could
be called with A-B where A and B are in the same section. The
expression evaluation logic these days makes sure those are folded, so
some of this code was dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306053
91177308-0d34-0410-b5e6-
96231b3b80d8
Anna Thomas [Thu, 22 Jun 2017 20:20:56 +0000 (20:20 +0000)]
[LoopDeletion] Update exits correctly when multiple duplicate edges from an exiting block
Summary:
Currently, we incorrectly update exit blocks of loops when there are multiple
edges from a single exiting block to the exit block. This can happen when we
have switches as the terminator of the exiting blocks.
The fix here is to correctly update the phi nodes in the exit block, and remove
all incoming values *except* for one which is from the preheader.
Note: Currently, this error can manifest only while deleting non-executed loops. However, it
is possible to trigger this error in invariant loops, once we enhance the logic
around the exit conditions for the loop check.
Reviewers: chandlerc, dberlin, sanjoy, efriedma
Reviewed by: efriedma
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D34516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306048
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 22 Jun 2017 20:11:01 +0000 (20:11 +0000)]
[AVX-512] Remove and autoupgrade the masked integer compare intrinsics
Summary:
These intrinsics aren't used by clang and haven't been for a while.
There's some really terrible codegen in the 32-bit target for avx512bw due to i64 not being legal. But as I said these intrinsics aren't used by clang even before this patch so this codegen reflects our clang behavior today.
Reviewers: spatel, RKSimon, zvi, igorb
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34389
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306047
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Thu, 22 Jun 2017 19:50:56 +0000 (19:50 +0000)]
Updated llvm-objdump for arm64 Mach-O MH_KEXT_BUNDLE file types so
it symbolically disassembles the __text section from the
__TEXT_EXEC segment not the usual __TEXT segment by default.
rdar://
30590208
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306046
91177308-0d34-0410-b5e6-
96231b3b80d8
Ekaterina Vaartis [Thu, 22 Jun 2017 19:08:30 +0000 (19:08 +0000)]
[MC] Fix const qualifier warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306045
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 22 Jun 2017 19:04:14 +0000 (19:04 +0000)]
[BasicAA] Add type check and Value equality check around code added in r305481.
This matches the checks done at the beginning of isKnownNonEqual that this code is partially emulating.
Without this we can get assertion failures due to the bit widths of the KnownBits not matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306044
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian McCarthy [Thu, 22 Jun 2017 18:57:51 +0000 (18:57 +0000)]
Fix build break by using llvm::make_unique instead of std::make_unique.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306043
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian McCarthy [Thu, 22 Jun 2017 18:43:18 +0000 (18:43 +0000)]
Add IDs and clone methods to NativeRawSymbol
All NativeRawSymbols will have a unique symbol ID (retrievable via
getSymIndexId). For now, these are initialized to 0, but soon the
NativeSession will be responsible for creating the raw symbols, and it will
assign unique IDs.
The symbol cache in the NativeSession will also require the ability to clone
raw symbols, so I've provided implementations for that as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306042
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian McCarthy [Thu, 22 Jun 2017 18:42:23 +0000 (18:42 +0000)]
Make IPDBSession::getGlobalScope a non-const method
There doesn't seem to be a compelling reason why this method should be const
other than it was possible with the DIA implementation. The native session
is going to act as a symbol factory and cache. This could be acheived with
mutable (and the existing const_cast), but it seems cleaner to accept that
this method affects the state of the session.
This change eliminates an existing const_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306041
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 22 Jun 2017 18:11:19 +0000 (18:11 +0000)]
[x86] add/sub (X==0) --> sbb(neg X)
Our handling of select-of-constants is lumpy in IR (https://reviews.llvm.org/D24480),
lumpy in DAGCombiner, and lumpy in X86ISelLowering. That's why we only had the 'sbb'
codegen in 1 out of the 4 tests. This is a step towards smoothing that out.
First, show that all of these IR forms are equivalent:
http://rise4fun.com/Alive/mx
Second, show that the 'sbb' version is faster/smaller. IACA output for SandyBridge
(later Intel and AMD chips are similar based on Agner's tables):
This is the "obvious" x86 codegen (what gcc appears to produce currently):
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1* | | | | | | | | xor eax, eax
| 1 | 1.0 | | | | | | CP | test edi, edi
| 1 | | | | | | 1.0 | CP | setnz al
| 1 | | 1.0 | | | | | CP | neg eax
This is the adc version:
| 1* | | | | | | | | xor eax, eax
| 1 | 1.0 | | | | | | CP | cmp edi, 0x1
| 2 | | 1.0 | | | | 1.0 | CP | adc eax, 0xffffffff
And this is sbb:
| 1 | 1.0 | | | | | | | neg edi
| 2 | | 1.0 | | | | 1.0 | CP | sbb eax, eax
If IACA is trustworthy, then sbb became a single uop in Broadwell, so this will be
clearly better than the alternatives going forward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306040
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Thu, 22 Jun 2017 17:57:01 +0000 (17:57 +0000)]
MC: Fix dumping of MCFragment values
Without this cast the "char" overload of operator<< is
chosen and the values is output as an ascii rather than
an integer.
Differential Revision: https://reviews.llvm.org/D34486
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306039
91177308-0d34-0410-b5e6-
96231b3b80d8
Zachary Turner [Thu, 22 Jun 2017 17:43:15 +0000 (17:43 +0000)]
Silence warnings about hidden virtual methods.
Patch by Sergey Andreenko.
Differential Revision: https://reviews.llvm.org/D34429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306038
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Thu, 22 Jun 2017 17:41:22 +0000 (17:41 +0000)]
Updated llvm-objdump symbolic disassembly with x86_64 Mach-O MH_KEXT_BUNDLE
file types so it symbolically disassembles operands using the external
relocation entries.
rdar://
31521343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306037
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 22 Jun 2017 17:25:35 +0000 (17:25 +0000)]
Add a common error checking for some invalid expressions.
This refactors a bit of duplicated code and fixes an assertion failure
on ELF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306035
91177308-0d34-0410-b5e6-
96231b3b80d8
David Stuttard [Thu, 22 Jun 2017 17:15:49 +0000 (17:15 +0000)]
[AMDGPU] Add intrinsics for tbuffer load and store - build error fix
Variable was unused in non-debug build (used in assert) causing compile time
warning and eventual build failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306034
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 22 Jun 2017 17:01:14 +0000 (17:01 +0000)]
[x86] add tests for select --> sbb transform; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306032
91177308-0d34-0410-b5e6-
96231b3b80d8
David Stuttard [Thu, 22 Jun 2017 16:29:22 +0000 (16:29 +0000)]
[AMDGPU] Add intrinsics for tbuffer load and store
Intrinsic already existed for llvm.SI.tbuffer.store
Needed tbuffer.load and also re-implementing the intrinsic as llvm.amdgcn.tbuffer.*
Added CodeGen tests for the 2 new variants added.
Left the original llvm.SI.tbuffer.store implementation to avoid issues with existing code
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, tpr
Differential Revision: https://reviews.llvm.org/D30687
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306031
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 22 Jun 2017 16:25:46 +0000 (16:25 +0000)]
[Hexagon] Fix typo in a testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306030
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 22 Jun 2017 16:23:30 +0000 (16:23 +0000)]
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306029
91177308-0d34-0410-b5e6-
96231b3b80d8
Teresa Johnson [Thu, 22 Jun 2017 16:18:48 +0000 (16:18 +0000)]
[ThinLTO] Remove unnecessary include of Linker.h (NFC)
The ModuleLinker is no longer used by ThinLTO, so this is not needed.
Patch by Benoit Belley <Benoit.Belley@autodesk.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306028
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Thu, 22 Jun 2017 16:12:02 +0000 (16:12 +0000)]
[InstCombine] Add one use checks to or/and->xnor folding
If the components of the and/or had multiple uses, this transform created an additional instruction.
This patch makes sure we remove one of the components.
Differential Revision: https://reviews.llvm.org/D34498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306027
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 22 Jun 2017 15:53:31 +0000 (15:53 +0000)]
[Hexagon] Handle a global operand to A2_addi when creating duplexes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306012
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 22 Jun 2017 15:46:54 +0000 (15:46 +0000)]
[InstCombine] reverse bitcast + bitwise-logic canonicalization (PR33138)
There are 2 parts to this patch made simultaneously to avoid a regression.
We're reversing the canonicalization that moves bitwise vector ops before bitcasts.
We're moving bitwise vector ops *after* bitcasts instead. That's the 1st and 3rd hunks
of the patch. The motivation is that there's only one fold that currently depends on
the existing canonicalization (see next), but there are many folds that would
automatically benefit from the new canonicalization.
PR33138 ( https://bugs.llvm.org/show_bug.cgi?id=33138 ) shows why/how we have these
patterns in IR.
There's an or(and,andn) pattern that requires an adjustment in order to continue matching
to 'select' because the bitcast changes position. This match is unfortunately complicated
because it requires 4 logic ops with optional bitcast and sext ops.
Test diffs:
1. The bitcast.ll and bitcast-bigendian.ll changes show the most basic difference -
bitcast comes before logic.
2. There are also tests with no diffs in bitcast.ll that verify that we're still doing
folds that were enabled by the previous canonicalization.
3. icmp-xor-signbit.ll shows the payoff. We don't need to adjust existing icmp patterns
to look through bitcasts.
4. logical-select.ll contains several tests for the or(and,andn) --> select fold to
verify that we are still handling those cases. The lone diff shows the movement of
the bitcast from the new canonicalization rule.
Differential Revision: https://reviews.llvm.org/D33517
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306011
91177308-0d34-0410-b5e6-
96231b3b80d8
whitequark [Thu, 22 Jun 2017 15:42:53 +0000 (15:42 +0000)]
[X86] Add support for "probe-stack" attribute
This commit adds prologue code emission for stack probe function
calls.
Reviewed By: majnemer
Differential Revision: https://reviews.llvm.org/D34387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306010
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Thu, 22 Jun 2017 15:32:41 +0000 (15:32 +0000)]
[ARM] Create relocations for beq.w branches to ARM function syms.
Summary:
The ARM ELF ABI requires the linker to do interworking for wide
conditional branches from Thumb code to ARM code.
That was pointed out by @peter.smith in the comments for D33436.
Reviewers: rafael, peter.smith, echristo
Reviewed By: peter.smith
Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits, peter.smith
Differential Revision: https://reviews.llvm.org/D34447
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306009
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Thu, 22 Jun 2017 15:28:01 +0000 (15:28 +0000)]
[InstCombine] add peekThroughBitcast() helper; NFC
This is an NFC portion of D33517. We have similar helpers in the backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306008
91177308-0d34-0410-b5e6-
96231b3b80d8
Petar Jovanovic [Thu, 22 Jun 2017 15:24:16 +0000 (15:24 +0000)]
[mips] Allow $AT to be used as a register name
This patch allows $AT to be used as a register name in assembly files.
Currently only $at is recognized as a valid register name.
Patch by Stanislav Ocovaj.
Differential Revision: https://reviews.llvm.org/D34348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306007
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Thu, 22 Jun 2017 15:07:49 +0000 (15:07 +0000)]
[DAG] Add Target Store Merge pass ordering function
Allow targets to specify if they should merge stores before or after
legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306006
91177308-0d34-0410-b5e6-
96231b3b80d8
Pavel Labath [Thu, 22 Jun 2017 14:18:55 +0000 (14:18 +0000)]
Revert "[Support] Add RetryAfterSignal helper function" and subsequent fix
The fix in r306003 uncovered a pretty fundamental problem that libc++
implementation of std::result_of does not handle the prototype of
open(2) correctly (presumably because it contains ...). This makes the
whole function unusable in its current form, so I am also reverting the
original commit (r305892), which introduced the function, at least until
I figure out a way to solve the libc++ issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306005
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Thu, 22 Jun 2017 14:11:23 +0000 (14:11 +0000)]
[Hexagon] Recognize potential offset overflow for store-imm to stack
Reserve an extra scavenging stack slot if the offset field in store-
-immediate instructions may overflow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306004
91177308-0d34-0410-b5e6-
96231b3b80d8