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Denis V. Lunev [Mon, 30 May 2022 10:39:57 +0000 (12:39 +0200)]
block: use 'unsigned' for in_flight field on driver state
This patch makes in_flight field 'unsigned' for BDRVNBDState and
MirrorBlockJob. This matches the definition of this field on BDS
and is generically correct - we should never get negative value here.
Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: John Snow <jsnow@redhat.com>
CC: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
CC: Kevin Wolf <kwolf@redhat.com>
CC: Hanna Reitz <hreitz@redhat.com>
CC: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Denis V. Lunev [Mon, 30 May 2022 10:39:29 +0000 (12:39 +0200)]
nbd: trace long NBD operations
At the moment there are 2 sources of lengthy operations if configured:
* open connection, which could retry inside and
* reconnect of already opened connection
These operations could be quite lengthy and cumbersome to catch thus
it would be quite natural to add trace points for them.
This patch is based on the original downstream work made by Vladimir.
Signed-off-by: Denis V. Lunev <den@openvz.org>
CC: Eric Blake <eblake@redhat.com>
CC: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
CC: Kevin Wolf <kwolf@redhat.com>
CC: Hanna Reitz <hreitz@redhat.com>
CC: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:26 +0000 (16:27 +0300)]
iotests: copy-before-write: add cases for cbw-timeout option
Add two simple test-cases: timeout failure with
break-snapshot-on-cbw-error behavior and similar with
break-guest-write-on-cbw-error behavior.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:25 +0000 (16:27 +0300)]
block/copy-before-write: implement cbw-timeout option
In some scenarios, when copy-before-write operations lasts too long
time, it's better to cancel it.
Most useful would be to use the new option together with
on-cbw-error=break-snapshot: this way if cbw operation takes too long
time we'll just cancel backup process but do not disturb the guest too
much.
Note the tricky point of realization: we keep additional point in
bs->in_flight during block_copy operation even if it's timed-out.
Background "cancelled" block_copy operations will finish at some point
and will want to access state. We should care to not free the state in
.bdrv_close() earlier.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
[vsementsov: use bdrv_inc_in_flight()/bdrv_dec_in_flight() instead of
direct manipulation on bs->in_flight]
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:24 +0000 (16:27 +0300)]
block/block-copy: block_copy(): add timeout_ns parameter
Add possibility to limit block_copy() call in time. To be used in the
next commit.
As timed-out block_copy() call will continue in background anyway (we
can't immediately cancel IO operation), it's important also give user a
possibility to pass a callback, to do some additional actions on
block-copy call finish.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:23 +0000 (16:27 +0300)]
util: add qemu-co-timeout
Add new API, to make a time limited call of the coroutine.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:22 +0000 (16:27 +0300)]
iotests: add copy-before-write: on-cbw-error tests
Add tests for new option of copy-before-write filter: on-cbw-error.
Note that we use QEMUMachine instead of VM class, because in further
commit we'll want to use throttling which doesn't work with -accel
qtest used by VM.
We also touch pylintrc to not break iotest 297.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
[vsementsov: add arguments to QEMUMachine constructor]
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:21 +0000 (16:27 +0300)]
block/copy-before-write: add on-cbw-error open parameter
Currently, behavior on copy-before-write operation failure is simple:
report error to the guest.
Let's implement alternative behavior: break the whole copy-before-write
process (and corresponding backup job or NBD client) but keep guest
working. It's needed if we consider guest stability as more important.
The realisation is simple: on copy-before-write failure we set
s->snapshot_ret and continue guest operations. s->snapshot_ret being
set will lead to all further snapshot API requests. Note that all
in-flight snapshot-API requests may still success: we do wait for them
on BREAK_SNAPSHOT-failure path in cbw_do_copy_before_write().
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Vladimir Sementsov-Ogievskiy [Thu, 7 Apr 2022 13:27:20 +0000 (16:27 +0300)]
block/copy-before-write: refactor option parsing
We are going to add one more option of enum type. Let's refactor option
parsing so that we can simply work with BlockdevOptionsCbw object.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@openvz.org>
Reviewed-by: Hanna Reitz <hreitz@redhat.com>
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Richard Henderson [Tue, 28 Jun 2022 04:54:30 +0000 (10:24 +0530)]
Merge tag 'pull-semi-
20220628' of https://gitlab.com/rth7680/qemu into staging
Semihosting syscall reorg:
* Split out semihosting/syscalls.c with common implementations.
* Reorg arm-compat-semi.c to use syscalls.c.
* Minor prep cleanups to m68k, mips, nios2.
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* tag 'pull-semi-
20220628' of https://gitlab.com/rth7680/qemu: (60 commits)
target/nios2: Move nios2-semi.c to nios2_softmmu_ss
target/nios2: Eliminate nios2_semi_is_lseek
target/mips: Drop pread and pwrite syscalls from semihosting
target/mips: Add UHI errno values
target/mips: Use an exception for semihosting
target/m68k: Make semihosting system only
target/m68k: Eliminate m68k_semi_is_fseek
semihosting: Create semihost_sys_poll_one
semihosting: Remove qemu_semihosting_console_outs
semihosting: Use console_out_gf for SYS_WRITE0
semihosting: Remove qemu_semihosting_console_outc
semihosting: Use console_out_gf for SYS_WRITEC
semihosting: Use console_in_gf for SYS_READC
semihosting: Create qemu_semihosting_guestfd_init
semihosting: Add GuestFDConsole
semihosting: Create qemu_semihosting_console_write
semihosting: Cleanup chardev init
semihosting: Expand qemu_semihosting_console_inc to read
semihosting: Pass CPUState to qemu_semihosting_console_inc
semihosting: Fix docs comment for qemu_semihosting_console_inc
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sat, 30 Apr 2022 02:50:02 +0000 (19:50 -0700)]
target/nios2: Move nios2-semi.c to nios2_softmmu_ss
Semihosting is not enabled for nios2-linux-user.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 23:49:20 +0000 (16:49 -0700)]
target/nios2: Eliminate nios2_semi_is_lseek
Reorg nios2_semi_return_* to gdb_syscall_complete_cb.
Use the 32-bit version normally, and the 64-bit version
for HOSTED_LSEEK.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 3 May 2022 05:52:19 +0000 (22:52 -0700)]
target/mips: Drop pread and pwrite syscalls from semihosting
We don't implement it with _WIN32 hosts, and the syscalls
are missing from the gdb remote file i/o interface.
Since we can't implement them universally, drop them.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 03:03:01 +0000 (20:03 -0700)]
target/mips: Add UHI errno values
From the Unified Hosting Interface, MD01069 Reference Manual,
version 1.1.6, 06 July 2015.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 07:11:25 +0000 (00:11 -0700)]
target/mips: Use an exception for semihosting
Within do_interrupt, we hold the iothread lock, which
is required for Chardev access for the console, and for
the round trip for use_gdb_syscalls().
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sat, 30 Apr 2022 03:16:53 +0000 (20:16 -0700)]
target/m68k: Make semihosting system only
While we had a call to do_m68k_semihosting in linux-user, it
wasn't actually reachable. We don't include DISAS_INSN(halt)
as an instruction unless system mode.
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 23:44:44 +0000 (16:44 -0700)]
target/m68k: Eliminate m68k_semi_is_fseek
Reorg m68k_semi_return_* to gdb_syscall_complete_cb.
Use the 32-bit version normally, and the 64-bit version
for HOSTED_LSEEK.
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 18:15:40 +0000 (11:15 -0700)]
semihosting: Create semihost_sys_poll_one
This will be used for implementing the xtensa select_one
system call. Choose "poll" over "select" so that we can
reuse Glib's g_poll constants and to avoid struct timeval.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 01:04:27 +0000 (18:04 -0700)]
semihosting: Remove qemu_semihosting_console_outs
This function has been replaced by *_write.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 01:02:53 +0000 (18:02 -0700)]
semihosting: Use console_out_gf for SYS_WRITE0
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 00:57:22 +0000 (17:57 -0700)]
semihosting: Remove qemu_semihosting_console_outc
This function has been replaced by *_write.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 00:55:20 +0000 (17:55 -0700)]
semihosting: Use console_out_gf for SYS_WRITEC
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 00:42:43 +0000 (17:42 -0700)]
semihosting: Use console_in_gf for SYS_READC
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 00:21:00 +0000 (17:21 -0700)]
semihosting: Create qemu_semihosting_guestfd_init
For arm-compat, initialize console_{in,out}_gf;
otherwise, initialize stdio file descriptors.
This will go some way to cleaning up arm-compat, and
will allow other semihosting to use normal stdio.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 1 May 2022 20:11:45 +0000 (13:11 -0700)]
semihosting: Add GuestFDConsole
Add a GuestFDType for connecting to the semihosting console.
Hook up to read, write, isatty, and fstat syscalls.
Note that the arm-specific syscall flen cannot be applied
to the console, because the console is not a descriptor
exposed to the guest.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 1 May 2022 19:42:37 +0000 (12:42 -0700)]
semihosting: Create qemu_semihosting_console_write
Will replace qemu_semihosting_console_{outs,outc},
but we need more plumbing first.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 1 May 2022 23:59:06 +0000 (16:59 -0700)]
semihosting: Cleanup chardev init
Rename qemu_semihosting_connect_chardevs to
qemu_semihosting_chardev_init; pass the result
directly to qemu_semihosting_console_init.
Store the chardev in SemihostingConsole instead
of SemihostingConfig, which lets us drop
semihosting_get_chardev.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 1 May 2022 19:31:08 +0000 (12:31 -0700)]
semihosting: Expand qemu_semihosting_console_inc to read
Allow more than one character to be read at one time.
Will be used by m68k and nios2 semihosting for stdio.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 1 May 2022 19:21:19 +0000 (12:21 -0700)]
semihosting: Pass CPUState to qemu_semihosting_console_inc
We don't need CPUArchState, and we do want the CPUState of the
thread performing the operation -- use this instead of current_cpu.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 1 May 2022 18:58:58 +0000 (11:58 -0700)]
semihosting: Fix docs comment for qemu_semihosting_console_inc
The implementation of qemu_semihosting_console_inc does not
defer to gdbstub, but only reads from the fifo in console.c.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 23:21:43 +0000 (16:21 -0700)]
gdbstub: Adjust gdb_syscall_complete_cb declaration
Change 'ret' to uint64_t. This resolves a FIXME in the
m68k and nios2 semihosting that we've lost data.
Change 'err' to int. There is nothing target-specific
about the width of the errno value.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 23:05:49 +0000 (16:05 -0700)]
semihosting: Create semihost_sys_gettimeofday
This syscall will be used by m68k and nios2 semihosting.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 22:45:25 +0000 (15:45 -0700)]
semihosting: Create semihost_sys_{stat,fstat}
These syscalls will be used by m68k and nios2 semihosting.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 20:57:19 +0000 (13:57 -0700)]
semihosting: Split out semihost_sys_system
Split out the non-ARM specific portions of SYS_SYSTEM to a
reusable function.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 17:11:31 +0000 (10:11 -0700)]
semihosting: Split out semihost_sys_rename
Split out the non-ARM specific portions of SYS_RENAME to a
reusable function.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 16:29:27 +0000 (09:29 -0700)]
semihosting: Split out semihost_sys_remove
Split out the non-ARM specific portions of SYS_REMOVE to a
reusable function.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 16:05:36 +0000 (09:05 -0700)]
semihosting: Split out semihost_sys_flen
The ARM-specific SYS_FLEN isn't really something that can be
reused by other semihosting apis, but there are parts that can
reused for the implementation of semihost_sys_fstat.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 19:31:25 +0000 (12:31 -0700)]
semihosting: Split out semihost_sys_isatty
Split out the non-ARM specific portions of SYS_ISTTY to a
reusable function. This handles all GuestFD.
Add a common_semi_istty_cb helper to translate the Posix
error return, 0+ENOTTY, to the Arm semihosting not-a-file
success result.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 19:04:44 +0000 (12:04 -0700)]
semihosting: Split out semihost_sys_lseek
Split out the non-ARM specific portions of SYS_SEEK to a
reusable function. This handles all GuestFD. Isolate the
curious ARM-specific return value processing to a new
callback, common_semi_seek_cb.
Expand the internal type of the offset to int64_t, and
provide the whence argument, which will be required by
m68k and nios2 semihosting.
Note that gdb_do_syscall %x reads target_ulong, not int.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 19:15:14 +0000 (12:15 -0700)]
semihosting: Bound length for semihost_sys_{read,write}
Fixes a minor bug in which a 64-bit guest on a 32-bit host could
truncate the length. This would only ever cause a problem if
there were no bits set in the low 32, so that it truncates to 0.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 18:49:47 +0000 (11:49 -0700)]
semihosting: Split out semihost_sys_write
Split out the non-ARM specific portions of SYS_WRITE to a
reusable function. This handles all GuestFD. This removes
the last use of common_semi_syscall_len.
Note that gdb_do_syscall %x reads target_ulong, not int.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 18:40:41 +0000 (11:40 -0700)]
semihosting: Split out semihost_sys_read
Split out the non-ARM specific portions of SYS_READ to a
reusable function. This handles all GuestFD. Isolate the
curious ARM-specific return value processing to a new
callback, common_semi_rw_cb.
Note that gdb_do_syscall %x reads target_ulong, not int.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 16:22:18 +0000 (09:22 -0700)]
semihosting: Split out semihost_sys_close
Split out the non-ARM specific portions of SYS_CLOSE to a
reusable function. This handles all GuestFD.
Note that gdb_do_syscall %x reads target_ulong, not int.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 08:44:28 +0000 (01:44 -0700)]
semihosting: Split out semihost_sys_open
Split out the non-ARM specific portions of SYS_OPEN to a
reusable function. This handles gdb and host file i/o.
Add helpers to validate the length of the filename string.
Prepare for usage by other semihosting by allowing the
filename length parameter to be 0, and calling strlen.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 18:40:14 +0000 (11:40 -0700)]
semihosting: Move GET_ARG/SET_ARG earlier in the file
Moving this to be useful for another function
besides do_common_semihosting.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 21:18:40 +0000 (14:18 -0700)]
semihosting: Use env more often in do_common_semihosting
We've already loaded cs->env_ptr into a local variable; use it.
Since env is unconditionally used, we don't need a dummy use.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 7 Jun 2022 17:31:22 +0000 (10:31 -0700)]
semihosting: Split out common-semi-target.h
Move the ARM and RISCV specific helpers into
their own header file.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 21:16:01 +0000 (14:16 -0700)]
semihosting: Split out common_semi_has_synccache
We already have some larger ifdef blocks for ARM and RISCV;
split out a boolean test for SYS_SYNCCACHE.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 20:59:52 +0000 (13:59 -0700)]
semihosting: Split common_semi_flen_buf per target
We already have some larger ifdef blocks for ARM and RISCV;
split out common_semi_stack_bottom per target.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 18:31:04 +0000 (11:31 -0700)]
semihosting: Split is_64bit_semihosting per target
We already have some larger ifdef blocks for ARM and RISCV;
split the function into multiple implementations per arch.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 21:55:21 +0000 (14:55 -0700)]
semihosting: Use struct gdb_stat in common_semi_flen_cb
Load the entire 64-bit size value. While we're at it,
use offsetof instead of an integer constant.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 7 Jun 2022 19:38:26 +0000 (12:38 -0700)]
gdbstub: Convert GDB error numbers to host error numbers
Provide the callback with consistent state -- always use
host error numbers. The individual callback can then
decide if the errno requires conversion for the guest.
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 2 May 2022 01:35:18 +0000 (18:35 -0700)]
include/exec: Define errno values in gdbstub.h
Define constants for the errno values defined by the
gdb remote fileio protocol.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 21:41:37 +0000 (14:41 -0700)]
include/exec: Move gdb_stat and gdb_timeval to gdbstub.h
We have two copies of these structures, and require them
in semihosting/ going forward.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 08:29:54 +0000 (01:29 -0700)]
include/exec: Move gdb open flags to gdbstub.h
There were 3 copies of these flags. Place them in the
file with gdb_do_syscall, with which they belong.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 7 Jun 2022 17:50:43 +0000 (10:50 -0700)]
semihosting: Remove GDB_O_BINARY
The value is zero, and gdb always opens files in binary mode.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 08:14:02 +0000 (01:14 -0700)]
semihosting: Move common-semi.h to include/semihosting/
This header is not private to the top-level semihosting directory,
so place it in the public include directory.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 08:10:55 +0000 (01:10 -0700)]
semihosting: Return void from do_common_semihosting
Perform the cleanup in the FIXME comment in common_semi_gdb_syscall.
Do not modify guest registers until the syscall is complete,
which in the gdbstub case is asynchronous.
In the synchronous non-gdbstub case, use common_semi_set_ret
to set the result. Merge set_swi_errno into common_semi_cb.
Rely on the latter for combined return value / errno setting.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 17 May 2022 02:37:14 +0000 (19:37 -0700)]
semihosting: Clean up common_semi_open_cb
Use common_semi_cb to return results instead of calling
set_swi_errno and common_semi_set_ret directly.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 17 May 2022 02:34:06 +0000 (19:34 -0700)]
semihosting: Clean up common_semi_flen_cb
Do not read from the gdb struct stat buffer if the callback is
reporting an error. Use common_semi_cb to finish returning results.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 29 Apr 2022 19:32:24 +0000 (12:32 -0700)]
semihosting: Adjust error checking in common_semi_cb
The err parameter is non-zero if and only if an error occured.
Use this instead of ret == -1 for determining if we need to
update the saved errno.
This fixes the errno setting of SYS_ISTTY, which returns 0 on
error, not -1.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 17 May 2022 02:25:19 +0000 (19:25 -0700)]
semihosting: Inline set_swi_errno into common_semi_cb
Do not store 'err' into errno only to read it back immediately.
Use 'ret' for the return value, not 'reg0'.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 04:38:02 +0000 (21:38 -0700)]
semihosting: Split out guestfd.c
In arm-compat-semi.c, we have more advanced treatment of
guest file descriptors than we do in other implementations.
Split out GuestFD and related functions to a new file so
that they can be shared.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 04:06:58 +0000 (21:06 -0700)]
semihosting: Simplify softmmu_lock_user_string
We are not currently bounding the search to the 1024 bytes
that we allocated, possibly overrunning the buffer.
Use softmmu_strlen_user to find the length and allocate the
correct size from the beginning.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 04:03:12 +0000 (21:03 -0700)]
semihosting: Add target_strlen for softmmu-uaccess.h
Mirror the interface of the user-only function of the same name.
Use probe_access_flags for the common case of ram, and
cpu_memory_rw_debug for the uncommon case of mmio.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v3: Use probe_access_flags (pmm)
Richard Henderson [Sat, 21 May 2022 05:12:08 +0000 (22:12 -0700)]
accel/stubs: Add tcg stub for probe_access_flags
Reviewed-by: Luc Michel <lmichel@kalray.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 03:44:17 +0000 (20:44 -0700)]
semihosting: Move softmmu-uaccess.h functions out of line
Rather that static (and not even inline) functions within a
header, move the functions to semihosting/uaccess.c.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sat, 30 Apr 2022 01:32:35 +0000 (18:32 -0700)]
semihosting: Improve condition for config.c and console.c
While CONFIG_SEMIHOSTING is currently only set for softmmu,
this will not continue to be true.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 03:01:24 +0000 (20:01 -0700)]
semihosting: Return failure from softmmu-uaccess.h functions
We were reporting unconditional success for these functions;
pass on any failure from cpu_memory_rw_debug.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 28 Apr 2022 03:48:41 +0000 (20:48 -0700)]
semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.h
We have a subdirectory for semihosting; move this file out of exec.
Rename to emphasize the contents are a replacement for the functions
in linux-user/bsd-user uaccess.c.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 27 Jun 2022 11:17:39 +0000 (16:47 +0530)]
Merge tag 'pull-target-arm-
20220627' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* sphinx: change default language to 'en'
* Diagnose attempts to emulate EL3 in hvf as well as kvm
* More SME groundwork patches
* virt: Fix calculation of physical address space size
for v7VE CPUs (eg cortex-a15)
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# gpg: Signature made Mon 27 Jun 2022 03:51:21 PM +0530
# gpg: using RSA key
E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
* tag 'pull-target-arm-
20220627' of https://git.linaro.org/people/pmaydell/qemu-arm: (25 commits)
target/arm: Check V7VE as well as LPAE in arm_pamax
target/arm: Extend arm_pamax to more than aarch64
target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h
target/arm: Add SVL to TB flags
target/arm: Introduce sve_vqm1_for_el_sm
target/arm: Add cpu properties for SME
target/arm: Unexport aarch64_add_*_properties
target/arm: Move arm_cpu_*_finalize to internals.h
target/arm: Generalize cpu_arm_{get, set}_default_vec_len
target/arm: Generalize cpu_arm_{get,set}_vq
target/arm: Create ARMVQMap
target/arm: Move error for sve%d property to arm_cpu_sve_finalize
target/arm: Implement SMSTART, SMSTOP
target/arm: Add the SME ZA storage to CPUARMState
target/arm: Add PSTATE.{SM,ZA} to TB flags
target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
target/arm: Add SMCR_ELx
target/arm: Add SVCR
target/arm: Add ARM_CP_SME
target/arm: Add syn_smetrap
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 19 Jun 2022 00:15:41 +0000 (17:15 -0700)]
target/arm: Check V7VE as well as LPAE in arm_pamax
In machvirt_init we create a cpu but do not fully initialize it.
Thus the propagation of V7VE to LPAE has not been done, and we
compute the wrong value for some v7 cpus, e.g. cortex-a15.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1078
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reported-by: He Zhe <zhe.he@windriver.com>
Message-id:
20220619001541.131672-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Sun, 19 Jun 2022 00:15:40 +0000 (17:15 -0700)]
target/arm: Extend arm_pamax to more than aarch64
Move the code from hw/arm/virt.c that is supposed
to handle v7 into the one function.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reported-by: He Zhe <zhe.he@windriver.com>
Message-id:
20220619001541.131672-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:52:04 +0000 (10:52 -0700)]
target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h
We will need these functions in translate-sme.c.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:52:03 +0000 (10:52 -0700)]
target/arm: Add SVL to TB flags
We need SVL separate from VL for RDSVL et al, as well as
ZA storage loads and stores, which do not require PSTATE.SM.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:52:02 +0000 (10:52 -0700)]
target/arm: Introduce sve_vqm1_for_el_sm
When Streaming SVE mode is enabled, the size is taken from
SMCR_ELx instead of ZCR_ELx. The format is shared, but the
set of vector lengths is not. Further, Streaming SVE does
not require any particular length to be supported.
Adjust sve_vqm1_for_el to pass the current value of PSTATE.SM
to the new function.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:52:01 +0000 (10:52 -0700)]
target/arm: Add cpu properties for SME
Mirror the properties for SVE. The main difference is
that any arbitrary set of powers of 2 may be supported,
and not the stricter constraints that apply to SVE.
Include a property to control FEAT_SME_FA64, as failing
to restrict the runtime to the proper subset of insns
could be a major point for bugs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id:
20220620175235.60881-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:52:00 +0000 (10:52 -0700)]
target/arm: Unexport aarch64_add_*_properties
These functions are not used outside cpu64.c,
so make them static.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:59 +0000 (10:51 -0700)]
target/arm: Move arm_cpu_*_finalize to internals.h
Drop the aa32-only inline fallbacks,
and just use a couple of ifdefs.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:58 +0000 (10:51 -0700)]
target/arm: Generalize cpu_arm_{get, set}_default_vec_len
Rename from cpu_arm_{get,set}_sve_default_vec_len,
and take the pointer to default_vq from opaque.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:57 +0000 (10:51 -0700)]
target/arm: Generalize cpu_arm_{get,set}_vq
Rename from cpu_arm_{get,set}_sve_vq, and take the
ARMVQMap as the opaque parameter.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:56 +0000 (10:51 -0700)]
target/arm: Create ARMVQMap
Pull the three sve_vq_* values into a structure.
This will be reused for SME.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:55 +0000 (10:51 -0700)]
target/arm: Move error for sve%d property to arm_cpu_sve_finalize
Keep all of the error messages together. This does mean that
when setting many sve length properties we'll only generate
one error, but we only really need one.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:54 +0000 (10:51 -0700)]
target/arm: Implement SMSTART, SMSTOP
These two instructions are aliases of MSR (immediate).
Use the two helpers to properly implement svcr_write.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:53 +0000 (10:51 -0700)]
target/arm: Add the SME ZA storage to CPUARMState
Place this late in the resettable section of the structure,
to keep the most common element offsets from being > 64k.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-10-richard.henderson@linaro.org
[PMM: expanded comment on zarray[] format]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:52 +0000 (10:51 -0700)]
target/arm: Add PSTATE.{SM,ZA} to TB flags
These are required to determine if various insns
are allowed to issue.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:51 +0000 (10:51 -0700)]
target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
Implement the streaming mode identification register, and the
two streaming priority registers. For QEMU, they are all RES0.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:50 +0000 (10:51 -0700)]
target/arm: Add SMCR_ELx
These cpregs control the streaming vector length and whether the
full a64 instruction set is allowed while in streaming mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:49 +0000 (10:51 -0700)]
target/arm: Add SVCR
This cpreg is used to access two new bits of PSTATE
that are not visible via any other mechanism.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:48 +0000 (10:51 -0700)]
target/arm: Add ARM_CP_SME
This will be used for controlling access to SME cpregs.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:47 +0000 (10:51 -0700)]
target/arm: Add syn_smetrap
This will be used for raising various traps for SME.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:46 +0000 (10:51 -0700)]
target/arm: Add SMEEXC_EL to TB flags
This is CheckSMEAccess, which is the basis for a set of
related tests for various SME cpregs and instructions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 20 Jun 2022 17:51:45 +0000 (10:51 -0700)]
target/arm: Implement TPIDR2_EL0
This register is part of SME, but isn't closely related to the
rest of the extension.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620175235.60881-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Fri, 24 Jun 2022 14:42:56 +0000 (15:42 +0100)]
target/arm: Catch invalid kvm state also for hvf
Some features such as running in EL3 or running M profile code are
incompatible with virtualization as QEMU implements it today. To prevent
users from picking invalid configurations on other virt solutions like
Hvf, let's run the same checks there too.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1073
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620192242.70573-2-agraf@csgraf.de
[PMM: Allow qtest accelerator too; tweak comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alexander Graf [Fri, 24 Jun 2022 14:42:56 +0000 (15:42 +0100)]
accel: Introduce current_accel_name()
We need to fetch the name of the current accelerator in flexible error
messages more going forward. Let's create a helper that gives it to us
without casting in the target code.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20220620192242.70573-1-agraf@csgraf.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Martin Liška [Fri, 24 Jun 2022 14:42:55 +0000 (15:42 +0100)]
sphinx: change default language to 'en'
Fixes the following Sphinx warning (treated as error) starting
with 5.0 release:
Warning, treated as error:
Invalid configuration value found: 'language = None'. Update your configuration to a valid langauge code. Falling back to 'en' (English).
Signed-off-by: Martin Liska <mliska@suse.cz>
Message-id:
e91e51ee-48ac-437e-6467-
98b56ee40042@suse.cz
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Sun, 26 Jun 2022 23:51:05 +0000 (05:21 +0530)]
Merge tag 'qemu-sparc-
20220626' of https://github.com/mcayland/qemu into staging
qemu-sparc queue
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# jWBcSvg=
# =0MrK
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 26 Jun 2022 11:12:29 PM +0530
# gpg: using RSA key
CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* tag 'qemu-sparc-
20220626' of https://github.com/mcayland/qemu: (55 commits)
artist: set memory region owners for buffers to the artist device
ps2: remove update_irq() function and update_arg parameter
pckbd: add QEMU interface comment for I8042 device
pckbd: switch I8042 device from update_irq() function to PS2 device gpio
pckbd: add i8042_reset() function to I8042 device
pckbd: add QEMU interface comment for I8042_MMIO device
pckbd: switch I8042_MMIO device from update_irq() function to PS2 device gpio
lasips2: add QEMU interface comment
lasips2: switch over from update_irq() function to PS2 device gpio
lasips2: use sysbus IRQ for output IRQ
lasips2: implement lasips2_realize()
lasips2: add base property
lasips2: move initialisation of PS2 ports from lasi_initfn() to lasi_init()
lasips2: move mapping of LASIPS2 registers to HPPA machine
lasips2: implement lasips2_init() function
lasips2: rename lasips2_init() to lasips2_initfn() and update it to return the LASIPS2 device
lasips2: move lasips2 QOM types from lasips2.c to lasips2.h
lasips2: QOMify LASIPS2State
pl050: add QEMU interface comment
pl050: switch over from update_irq() function to PS2 device gpio
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Mark Cave-Ayland [Fri, 24 Jun 2022 16:08:39 +0000 (17:08 +0100)]
artist: set memory region owners for buffers to the artist device
This fixes the output of "info qom-tree" so that the buffers appear as children
of the artist device, rather than underneath the "unattached" container.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <
20220624160839.886649-1-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Helge Deller <deller@gmx.de>
Mark Cave-Ayland [Fri, 24 Jun 2022 13:41:09 +0000 (14:41 +0100)]
ps2: remove update_irq() function and update_arg parameter
Now that all the PS2 devices have been converted to use GPIOs the update_irq()
callback function and the update_arg parameter can be removed.
This allows these arguments to be completely removed from ps2_kbd_init() and
ps2_mouse_init(), along with the transitional logic that was added to
ps2_raise_irq() and ps2_lower_irq().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Helge Deller <deller@gmx.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20220624134109.881989-55-mark.cave-ayland@ilande.co.uk>
Mark Cave-Ayland [Fri, 24 Jun 2022 13:41:08 +0000 (14:41 +0100)]
pckbd: add QEMU interface comment for I8042 device
This describes the I8042 device interface implemented within QEMU.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <
20220624134109.881989-54-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>