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Igor Breger [Sun, 20 Aug 2017 09:25:22 +0000 (09:25 +0000)]
[GlobalISel][X86] Support call ABI.
Summary: Support call ABI. For now only Linux C and X86_64_SysV calling conventions supported. Variadic function not supported.
Reviewers: zvi, guyblank, oren_ben_simhon
Reviewed By: oren_ben_simhon
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D34602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311279
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Igor Breger [Sun, 20 Aug 2017 07:14:40 +0000 (07:14 +0000)]
[GlobalISel][X86] Support asimetric copy from/to GPR physical register.
Usually this case generated by ABI lowering, it requare to performe trancate/anyext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311278
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Alex Bradbury [Sun, 20 Aug 2017 06:58:43 +0000 (06:58 +0000)]
[RISCV] Trivial whitespace fix in RISCVInstPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311277
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Alex Bradbury [Sun, 20 Aug 2017 06:57:27 +0000 (06:57 +0000)]
[RISCV] Fix two abuses of llvm_unreachable
Replace with report_fatal_error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311276
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Alex Bradbury [Sun, 20 Aug 2017 06:55:14 +0000 (06:55 +0000)]
[RISCV] Set HasRelocationAddend for RISCVELFObjectWriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311275
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Sam Elliott [Sun, 20 Aug 2017 06:55:10 +0000 (06:55 +0000)]
Revert "Emit only A Single Opt Remark When Inlining"
Reverting due to clang build failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311274
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Sam Elliott [Sun, 20 Aug 2017 06:43:34 +0000 (06:43 +0000)]
Emit only A Single Opt Remark When Inlining
Summary:
This updates the Inliner to only add a single Optimization
Remark when Inlining, rather than an Analysis Remark and an
Optimization Remark.
Fixes https://bugs.llvm.org/show_bug.cgi?id=33786
Reviewers: anemet, davidxl, chandlerc
Reviewed By: anemet
Subscribers: haicheng, fhahn, mehdi_amini, dblaikie, llvm-commits, eraman
Differential Revision: https://reviews.llvm.org/D36054
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311273
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Igor Breger [Sun, 20 Aug 2017 06:26:22 +0000 (06:26 +0000)]
[GlobalIsel] Fix undefined behavior if Action not set (release), it aslo crashing in debug mode.
Differential Revision: https://reviews.llvm.org/D34978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311272
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Sam Elliott [Sun, 20 Aug 2017 01:30:45 +0000 (01:30 +0000)]
Keep Optimization Remark Yaml in NewPM
Summary:
The New Pass Manager infrastructure was forgetting to keep around the optimization remark yaml file that the compiler might have been producing. This meant setting the option to '-' for stdout worked, but setting it to a filename didn't give file output (presumably it was deleted because compilation didn't explicitly keep it). This change just ensures that the file is kept if compilation succeeds.
So far I have updated one of the optimization remark output tests to add a version with the new pass manager. It is my intention for this patch to also include changes to all tests that use `-opt-remark-output=` but I wanted to get the code patch ready for review while I was making all those changes.
Fixes https://bugs.llvm.org/show_bug.cgi?id=33951
Reviewers: anemet, chandlerc
Reviewed By: anemet, chandlerc
Subscribers: javed.absar, chandlerc, fhahn, llvm-commits
Differential Revision: https://reviews.llvm.org/D36906
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311271
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Chandler Carruth [Sat, 19 Aug 2017 23:35:50 +0000 (23:35 +0000)]
[x86] Fix an even stranger corner case where we have multiple levels of
cmov self-refrencing.
Pointed out by Amjad Aboud in code review, test case minorly simplified
from the one he posted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311267
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Craig Topper [Sat, 19 Aug 2017 23:21:22 +0000 (23:21 +0000)]
[X86] Merge all of the vecload and alignedload predicates into single predicates.
We can load the memory VT and check for natural alignment. This also adds a new preferNonTemporalLoad helper that checks the correct subtarget feature based on the load size.
This shrinks the isel table by at least 5000 bytes by allowing more reordering and combining to occur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311266
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Craig Topper [Sat, 19 Aug 2017 23:21:21 +0000 (23:21 +0000)]
[X86] Converge alignedstore/alignedstore256/alignedstore512 to a single predicate.
We can read the memoryVT and get its store size directly from the SDNode to check its alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311265
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Craig Topper [Sat, 19 Aug 2017 22:02:02 +0000 (22:02 +0000)]
[AVX512] Use alignedstore256 in a pattern that's emitting a 256-bit movaps from an extract subvector operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311263
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Victor Leschuk [Sat, 19 Aug 2017 21:05:08 +0000 (21:05 +0000)]
Set init value for ScalarEvolution::BackedgeTakenInfo::MaxOrZero
Otherwise it can be used uninitialized in move ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311262
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Martin Storsjo [Sat, 19 Aug 2017 20:26:51 +0000 (20:26 +0000)]
[ARM] Factorize the calculation of WhichResult in isV*Mask. NFC.
Differential Revision: https://reviews.llvm.org/D36930
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311260
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Martin Storsjo [Sat, 19 Aug 2017 19:47:48 +0000 (19:47 +0000)]
[ARM] Check the right order for halves of VZIP/VUZP if both parts are used
This is the exact same fix as in SVN r247254. In that commit, the fix was
applied only for isVTRNMask and isVTRN_v_undef_Mask, but the same issue
is present for VZIP/VUZP as well.
This fixes PR33921.
Differential Revision: https://reviews.llvm.org/D36899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311258
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Teresa Johnson [Sat, 19 Aug 2017 19:15:04 +0000 (19:15 +0000)]
Fix bot failures by requiring x86 target
The tests added in r311254 require a target triple since they are
running through code generation. Fix bot failures by requiring
an x86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311257
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Konstantin Zhuravlyov [Sat, 19 Aug 2017 18:44:27 +0000 (18:44 +0000)]
AMDGPU/NFC: Reorder functions in SIMemoryLegalizer:
- Move *load* functions before *atomic* functions
- Move *store* functions before *atomic* functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311256
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Jatin Bhateja [Sat, 19 Aug 2017 18:08:59 +0000 (18:08 +0000)]
[DAGCombiner] Extending pattern detection for vector shuffle.
Summary:
If all the operands of a BUILD_VECTOR extract elements from same vector then split the
vector efficiently based on the maximum vector access index.
Reviewers: zvi, delena, RKSimon, thakis
Reviewed By: RKSimon
Subscribers: chandlerc, eladcohen, llvm-commits
Differential Revision: https://reviews.llvm.org/D35788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311255
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Teresa Johnson [Sat, 19 Aug 2017 18:04:25 +0000 (18:04 +0000)]
[ThinLTO] Fix ThinLTO crash
Summary:
Follow up to fix in r311023, which fixed the case where the combined
index is written to disk. The same samplePGO logic exists for the
in-memory index when computing imports, so we need to filter out
GlobalVariable summaries there too.
Reviewers: davidxl
Subscribers: inglorion, llvm-commits
Differential Revision: https://reviews.llvm.org/D36919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311254
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Craig Topper [Sat, 19 Aug 2017 18:02:28 +0000 (18:02 +0000)]
[X86] Remove an unnecessary alignment restriction from MOVDDUP pattern.
The SSE MOVDDUP instruction only loads 64-bits with no alignment restriction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311253
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Jatin Bhateja [Sat, 19 Aug 2017 17:59:58 +0000 (17:59 +0000)]
Revert rL311247 : To rectify commit message.
Summary: This reverts commit rL311247.
Differential Revision: https://reviews.llvm.org/D36927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311252
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Jatin Bhateja [Sat, 19 Aug 2017 17:00:04 +0000 (17:00 +0000)]
Merge branch 'arcpatch-D35788'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311247
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Jatin Bhateja [Sat, 19 Aug 2017 16:40:06 +0000 (16:40 +0000)]
Revert rL311242 "Extension of shuffle vector pattern detection, updating post rebase."
Summary:
This reverts commit rL311242.
Differential Revision: https://reviews.llvm.org/D36924
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311246
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Jatin Bhateja [Sat, 19 Aug 2017 15:58:36 +0000 (15:58 +0000)]
Extension of shuffle vector pattern detection, updating post rebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311242
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Victor Leschuk [Sat, 19 Aug 2017 12:24:41 +0000 (12:24 +0000)]
revert failing test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311238
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Victor Leschuk [Sat, 19 Aug 2017 12:02:39 +0000 (12:02 +0000)]
Add temporary test to verify that win10 builder hangs on error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311236
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Victor Leschuk [Sat, 19 Aug 2017 07:58:07 +0000 (07:58 +0000)]
Temporary mark lit :: shtest-format as unsupported on windows
When run manually it fails, but when run under buildbot it causes hang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311230
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Chandler Carruth [Sat, 19 Aug 2017 06:56:11 +0000 (06:56 +0000)]
[Inliner] Fix a nasty bug when inlining a non-recursive trace of
a function into itself.
We tried to fix this before in r306495 but that got reverted as the
assert was actually hit.
This fixes the original bug (which we seem to have lost track of with
the revert) by blocking a second remapping when the function being
inlined is also the caller and the remapping could succeed but
erroneously.
The included test case would actually load from an inlined copy of the
alloca before this change, failing to load the stored value and
miscompiling.
Many thanks to Richard Smith for diagnosing a user miscompile to this
bug, and to Kyle for the first attempt and initial analysis and David Li
for remembering the issue and how to fix it and suggesting the patch.
I'm just stitching it together and landing it. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311229
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Chandler Carruth [Sat, 19 Aug 2017 06:06:44 +0000 (06:06 +0000)]
[Inliner] Clean up a test case a bit to make it more clear what is being
tested and why.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311228
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Chandler Carruth [Sat, 19 Aug 2017 05:06:23 +0000 (05:06 +0000)]
[SLP] Fix an unused variable warning in non-asserts builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311227
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Chandler Carruth [Sat, 19 Aug 2017 05:01:19 +0000 (05:01 +0000)]
[x86] Teach the cmov converter to aggressively convert cmovs with memory
operands into control flow.
We have seen periodically performance problems with cmov where one
operand comes from memory. On modern x86 processors with strong branch
predictors and speculative execution, this tends to be much better done
with a branch than cmov. We routinely see cmov stalling while the load
is completed rather than continuing, and if there are subsequent
branches, they cannot be speculated in turn.
Also, in many (even simple) cases, macro fusion causes the control flow
version to be fewer uops.
Consider the IACA output for the initial sequence of code in a very hot
function in one of our internal benchmarks that motivates this, and notice the
micro-op reduction provided.
Before, SNB:
```
Throughput Analysis Report
--------------------------
Block Throughput: 2.20 Cycles Throughput Bottleneck: Port1
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | | 1.0 | | | | | CP | mov rcx, rdi
| 0* | | | | | | | | xor edi, edi
| 2^ | 0.1 | 0.6 | 0.5 0.5 | 0.5 0.5 | | 0.4 | CP | cmp byte ptr [rsi+0xf], 0xf
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | mov rax, qword ptr [rsi]
| 3 | 1.8 | 0.6 | | | | 0.6 | CP | cmovbe rax, rdi
| 2^ | | | 0.5 0.5 | 0.5 0.5 | | 1.0 | | cmp byte ptr [rcx+0xf], 0x10
| 0F | | | | | | | | jb 0xf
Total Num Of Uops: 9
```
After, SNB:
```
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles Throughput Bottleneck: Port5
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | |
---------------------------------------------------------------------
| 1 | 0.5 | 0.5 | | | | | | mov rax, rdi
| 0* | | | | | | | | xor edi, edi
| 2^ | 0.5 | 0.5 | 1.0 1.0 | | | | | cmp byte ptr [rsi+0xf], 0xf
| 1 | 0.5 | 0.5 | | | | | | mov ecx, 0x0
| 1 | | | | | | 1.0 | CP | jnbe 0x39
| 2^ | | | | 1.0 1.0 | | 1.0 | CP | cmp byte ptr [rax+0xf], 0x10
| 0F | | | | | | | | jnb 0x3c
Total Num Of Uops: 7
```
The difference even manifests in a throughput cycle rate difference on Haswell.
Before, HSW:
```
Throughput Analysis Report
--------------------------
Block Throughput: 2.00 Cycles Throughput Bottleneck: FrontEnd
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 0* | | | | | | | | | | mov rcx, rdi
| 0* | | | | | | | | | | xor edi, edi
| 2^ | | | 0.5 0.5 | 0.5 0.5 | | 1.0 | | | | cmp byte ptr [rsi+0xf], 0xf
| 1 | | | 0.5 0.5 | 0.5 0.5 | | | | | | mov rax, qword ptr [rsi]
| 3 | 1.0 | 1.0 | | | | | 1.0 | | | cmovbe rax, rdi
| 2^ | 0.5 | | 0.5 0.5 | 0.5 0.5 | | | 0.5 | | | cmp byte ptr [rcx+0xf], 0x10
| 0F | | | | | | | | | | jb 0xf
Total Num Of Uops: 8
```
After, HSW:
```
Throughput Analysis Report
--------------------------
Block Throughput: 1.50 Cycles Throughput Bottleneck: FrontEnd
| Num Of | Ports pressure in cycles | |
| Uops | 0 - DV | 1 | 2 - D | 3 - D | 4 | 5 | 6 | 7 | |
---------------------------------------------------------------------------------
| 0* | | | | | | | | | | mov rax, rdi
| 0* | | | | | | | | | | xor edi, edi
| 2^ | | | 1.0 1.0 | | | 1.0 | | | | cmp byte ptr [rsi+0xf], 0xf
| 1 | | 1.0 | | | | | | | | mov ecx, 0x0
| 1 | | | | | | | 1.0 | | | jnbe 0x39
| 2^ | 1.0 | | | 1.0 1.0 | | | | | | cmp byte ptr [rax+0xf], 0x10
| 0F | | | | | | | | | | jnb 0x3c
Total Num Of Uops: 6
```
Note that this cannot be usefully restricted to inner loops. Much of the
hot code we see hitting this is not in an inner loop or not in a loop at
all. The optimization still remains effective and indeed critical for
some of our code.
I have run a suite of internal benchmarks with this change. I saw a few
very significant improvements and a very few minor regressions,
but overall this change rarely has a significant effect. However, the
improvements were very significant, and in quite important routines
responsible for a great deal of our C++ CPU cycles. The gains pretty
clealy outweigh the regressions for us.
I also ran the test-suite and SPEC2006. Only 11 binaries changed at all
and none of them showed any regressions.
Amjad Aboud at Intel also ran this over their benchmarks and saw no
regressions.
Differential Revision: https://reviews.llvm.org/D36858
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311226
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Chandler Carruth [Sat, 19 Aug 2017 04:28:20 +0000 (04:28 +0000)]
[x86] Refactor the CMOV conversion pass to be more flexible.
The primary thing that this accomplishes is to allow future re-use of
these routines in more contexts and clarify the behavior w.r.t. loops.
For example, if handling outer loops is desirable, doing so in
a inside-out order becomes straight forward because it walks the loop
nest itself (rather than walking the function's basic blocks) and
de-couples the CMOV rewriting from the loop structure as there isn't
actually anything loop-specific about this transformation.
This patch should be essentially a no-op. It potentially changes the
order in which we visit the inner loops, but otherwise should merely set
the stage for subsequent changes.
Differential Revision: https://reviews.llvm.org/D36783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311225
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Dinar Temirbulatov [Sat, 19 Aug 2017 03:15:07 +0000 (03:15 +0000)]
[SLPVectorizer] Tighten up VLeft, VRight declaration, remove unnecessary testcase test/Transforms/SLPVectorizer/X86/reorder.ll, NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311223
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Dinar Temirbulatov [Sat, 19 Aug 2017 02:54:20 +0000 (02:54 +0000)]
[SLPVectorizer] Add opcode parameter to reorderAltShuffleOperands, reorderInputsAccordingToOpcode functions.
Reviewers: mkuper, RKSimon, ABataev, mzolotukhin, spatel, filcab
Subscribers: llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D36766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311221
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Matthias Braun [Sat, 19 Aug 2017 01:21:11 +0000 (01:21 +0000)]
ARMRegsiterInfo: Define more ssub indexes; NFC
This doesn't really change anything as Tablegen would have inferred
those indices anyway; defining them gives us shorter names that are
easier to read while debugging (i.e. "ssub_4" rather than
"dsub2_then_ssub_0")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311218
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Adrian Prantl [Sat, 19 Aug 2017 01:15:06 +0000 (01:15 +0000)]
Filter out non-constant DIGlobalVariableExpressions reachable via the CU
They won't affect the DWARF output, but they will mess with the
sorting of the fragments. This fixes the crash reported in PR34159.
https://bugs.llvm.org/show_bug.cgi?id=34159
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311217
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Eric Beckmann [Sat, 19 Aug 2017 00:37:41 +0000 (00:37 +0000)]
llvm-mt: Merge manifest namespaces.
mt.exe performs a tree merge where certain element nodes are combined
into one. This introduces the possibility of xml namespaces conflicting
with each other. The original mt.exe has a hierarchy whereby certain
namespace names can override others, and nodes that would then end up in
ambigious namespaces have their namespaces explicitly defined. This
namespace handles this merging process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311215
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Eugene Zelenko [Fri, 18 Aug 2017 23:51:26 +0000 (23:51 +0000)]
[Analysis] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311212
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Xinliang David Li [Fri, 18 Aug 2017 23:08:50 +0000 (23:08 +0000)]
Fix comment /NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311209
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Xinliang David Li [Fri, 18 Aug 2017 23:00:05 +0000 (23:00 +0000)]
[Profile] backward propagate profile info in JumpThreading
Differential Revsion: http://reviews.llvm.org/D36864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311208
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Amjad Aboud [Fri, 18 Aug 2017 22:56:55 +0000 (22:56 +0000)]
[InstCombine] Teach ComputeNumSignBitsImpl to handle integer multiply instruction.
Differential Revision: https://reviews.llvm.org/D36679
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311206
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Max Kazantsev [Fri, 18 Aug 2017 22:50:29 +0000 (22:50 +0000)]
[IRCE] Fix buggy behavior in Clamp
Clamp function was too optimistic when choosing signed or unsigned min/max function for calculations.
In fact, `!IsSignedPredicate` guarantees us that `Smallest` and `Greatest` can be compared safely using unsigned
predicates, but we did not check this for `S` which can in theory be negative.
This patch makes Clamp use signed min/max for cases when it fails to prove `S` being non-negative,
and it adds a test where such situation may lead to incorrect conditions calculation.
Differential Revision: https://reviews.llvm.org/D36873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311205
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Justin Bogner [Fri, 18 Aug 2017 21:38:03 +0000 (21:38 +0000)]
IR: Make stripDebugInfo robust against (invalid) empty basic blocks
Since stripDebugInfo runs before the verifier when reading IR, we can
end up in a situation where we read some invalid IR but don't know its
invalid yet. Before this patch we would crash in stripDebugInfo when
given IR with a completely empty basic block, and after we get a nice
error from the verifier instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311202
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Jonas Devlieghere [Fri, 18 Aug 2017 21:35:44 +0000 (21:35 +0000)]
[llvm-dwarfdump] Hide .debug_str and DIE reference offsets in brief mode
This patch hides the .debug_str offset and DIE reference offsets into
the CU when llvm-dwarfdump is invoked with -brief.
Differential Revision: https://reviews.llvm.org/D36835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311201
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 18 Aug 2017 21:21:14 +0000 (21:21 +0000)]
[X86][ADX] Regenerate ADX intrinsics tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311198
91177308-0d34-0410-b5e6-
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Sanjay Patel [Fri, 18 Aug 2017 20:27:47 +0000 (20:27 +0000)]
fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311193
91177308-0d34-0410-b5e6-
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Ana Pazos [Fri, 18 Aug 2017 19:17:08 +0000 (19:17 +0000)]
[PGO] Fixed assertion due to mismatched memcpy size type.
Summary:
Memcpy intrinsics have size argument of any integer type, like i32 or i64.
Fixed size type along with its value when cloning the intrinsic.
Reviewers: davidxl, xur
Reviewed By: davidxl
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D36844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311188
91177308-0d34-0410-b5e6-
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Tim Northover [Fri, 18 Aug 2017 19:13:56 +0000 (19:13 +0000)]
ARM: use an external relocation for calls from MachO ARM mode.
The internal (__text-relative) relocation risks the offset not being encodable
if the destination is Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311187
91177308-0d34-0410-b5e6-
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Matt Morehouse [Fri, 18 Aug 2017 18:43:30 +0000 (18:43 +0000)]
[SanitizerCoverage] Add stack depth tracing instrumentation.
Summary:
Augment SanitizerCoverage to insert maximum stack depth tracing for
use by libFuzzer. The new instrumentation is enabled by the flag
-fsanitize-coverage=stack-depth and is compatible with the existing
trace-pc-guard coverage. The user must also declare the following
global variable in their code:
thread_local uintptr_t __sancov_lowest_stack
https://bugs.llvm.org/show_bug.cgi?id=33857
Reviewers: vitalybuka, kcc
Reviewed By: vitalybuka
Subscribers: kubamracek, hiraditya, cfe-commits, llvm-commits
Differential Revision: https://reviews.llvm.org/D36839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311186
91177308-0d34-0410-b5e6-
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Marek Sokolowski [Fri, 18 Aug 2017 18:24:17 +0000 (18:24 +0000)]
Reapply: [llvm-rc] Add basic RC scripts parsing ability.
As for now, the parser supports a limited set of statements and
resources. This will be extended in the following patches.
Thanks to Nico Weber (thakis) for his original work in this area.
This patch was originally submitted as r311175 and got reverted
in r311177 because of the problems with compilation under gcc.
Differential Revision: https://reviews.llvm.org/D36340
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311184
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Fri, 18 Aug 2017 18:07:00 +0000 (18:07 +0000)]
[Debug info] Transfer DI to fragment expressions for split integer values.
This patch teaches the SDag type legalizer how to split up debug info for
integer values that are split into a hi and lo part.
(re-commit)
Differential Revision: https://reviews.llvm.org/D36805
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311181
91177308-0d34-0410-b5e6-
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Ben Dunbobbin [Fri, 18 Aug 2017 17:32:57 +0000 (17:32 +0000)]
[lit] support unsetting env variables (again!)
This is an updated version of https://reviews.llvm.org/D22144 by @jlpeyton.
The patch was accepted but not landed.
This is useful functionality and I would like to use this to enable lit tests for environment variable behaviour.
Differential Revision: https://reviews.llvm.org/D36403
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311180
91177308-0d34-0410-b5e6-
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Konstantin Zhuravlyov [Fri, 18 Aug 2017 17:30:02 +0000 (17:30 +0000)]
AMDGPU/NFC: Rename few things in SIMemoryLegalizer:
- AtomicInfo -> MemOpInfo
- getAtomicLoadInfo -> getLoadInfo
- getAtomicStoreInfo -> getStoreInfo
- expandAtomicLoad -> expandLoad
- expandAtomicStore -> expandStore
Differential Revision: https://reviews.llvm.org/D36861
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311179
91177308-0d34-0410-b5e6-
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Marek Sokolowski [Fri, 18 Aug 2017 17:25:55 +0000 (17:25 +0000)]
Revert "[llvm-rc] Add basic RC scripts parsing ability."
This reverts commit r311175.
This failed some buildbots compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311177
91177308-0d34-0410-b5e6-
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Jakub Kuderski [Fri, 18 Aug 2017 17:06:37 +0000 (17:06 +0000)]
[Dominators] Don't print the whole tree when running with -debug
As the incremental API is now used in several transforms, printing
the whole dominator tree creates a lot of noise when running with
the `-debug` flag. This patch fixes that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311176
91177308-0d34-0410-b5e6-
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Marek Sokolowski [Fri, 18 Aug 2017 17:05:47 +0000 (17:05 +0000)]
[llvm-rc] Add basic RC scripts parsing ability.
As for now, the parser supports a limited set of statements and
resources. This will be extended in the following patches.
Thanks to Nico Weber (thakis) for his original work in this area.
Differential Revision: https://reviews.llvm.org/D36340
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311175
91177308-0d34-0410-b5e6-
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Ben Dunbobbin [Fri, 18 Aug 2017 16:55:44 +0000 (16:55 +0000)]
[Support] env vars with empty values on windows
An environment variable can be in one of three states:
1. undefined.
2. defined with a non-empty value.
3. defined but with an empty value.
The windows implementation did not support case 3
(it was not handling errors). The Linux implementation
is already correct.
Differential Revision: https://reviews.llvm.org/D36394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311174
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 18 Aug 2017 16:26:39 +0000 (16:26 +0000)]
[X86][BMI2] Added scheduling test for RORX/SARX/SHLX/SHRX instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311171
91177308-0d34-0410-b5e6-
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Brian Gesiak [Fri, 18 Aug 2017 15:35:53 +0000 (15:35 +0000)]
[Lexicon] Add "GEP"
Summary:
`getelementptr` is frequently abbreviated as "GEP", often in source files that
do not ever reference the full name of the instruction. Add it to the Lexicon,
in case readers go to look for what it means there.
Test plan:
1. `ninja sphinx`
2. Confirm that the rendered docs HTML contains the new "GEP" entry
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311168
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Simon Pilgrim [Fri, 18 Aug 2017 15:26:51 +0000 (15:26 +0000)]
[X86][AES] Add scheduling latency/throughput tests for AES instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311167
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 18 Aug 2017 15:08:30 +0000 (15:08 +0000)]
[X86][PCLMUL] Add scheduling latency/throughput test for PCLMULQDQ instruction
Added it to the SSE42 tests as targets seem to always have both
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311166
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Simon Pilgrim [Fri, 18 Aug 2017 14:55:50 +0000 (14:55 +0000)]
[X86][SHA] Add scheduling latency/throughput tests for SHA instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311164
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 18 Aug 2017 14:44:31 +0000 (14:44 +0000)]
[X86][MOVBE] Add scheduling latency/throughput tests for MOVBE instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311163
91177308-0d34-0410-b5e6-
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Sam Parker [Fri, 18 Aug 2017 14:27:51 +0000 (14:27 +0000)]
[ARM] Add PostRAScheduler option
This patch adds the option to allow also using the PostRA scheduler,
which brings the ARM backend inline with AArch64 targets. The
SchedModel can also set 'PostRAScheduler', as the R52 does, so also
query this property in the overridden function.
Differential Revision: https://reviews.llvm.org/D36866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311162
91177308-0d34-0410-b5e6-
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Simon Dardis [Fri, 18 Aug 2017 13:27:02 +0000 (13:27 +0000)]
[mips] Follow up comments on r310460
Use dblaikie's suggestion of cast<> instead of a seperate assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311160
91177308-0d34-0410-b5e6-
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Simon Pilgrim [Fri, 18 Aug 2017 13:22:18 +0000 (13:22 +0000)]
[X86][BMI2] Added scheduling test for MULX instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311159
91177308-0d34-0410-b5e6-
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Sjoerd Meijer [Fri, 18 Aug 2017 10:51:14 +0000 (10:51 +0000)]
[AArch64] Do not promote f16 when subtarget HasFullFP16
Armv8.2-A adds FP16 support, i.e. f16 is not only a storage-only type, but it
also supports performing data processing on 16-bit floating-point quantities.
All the necessary (tablegen) groundwork of adding the ARMv8.2-A FP16 (scalar)
instructions was done in D15014. To take advantage of this, this patch avoids
promotion of f16 to f32 types when the subtarget supports FullFP16, which
enables instruction selection of these FP16 instructions.
Differential Revision: https://reviews.llvm.org/D36396
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311154
91177308-0d34-0410-b5e6-
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Renato Golin [Fri, 18 Aug 2017 10:35:42 +0000 (10:35 +0000)]
[Triple] Define OS Check for Haiku
This adds the OS check for the Haiku operating system, as it was
missing in the Triple class. Tests for x86_64-unknown-haiku and
i586-pc-haiku were also added.
These patches only affect Haiku and are completely harmless for
other platforms.
Patch by Calvin Hill <calvin@hakobaito.co.uk>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311153
91177308-0d34-0410-b5e6-
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Ilya Biryukov [Fri, 18 Aug 2017 09:37:23 +0000 (09:37 +0000)]
Addressed some security issues in Dockerfiles.
Summary:
- Removed --trust-server-cert from `svn checkout` invocations.
Installing 'ca-certificates' package on ubuntu adds required CAs to
the system and svn can do proper checkout using https.
- Added checksum verification when installing cmake from cmake.org.
Reviewers: mehdi_amini, klimek
Reviewed By: mehdi_amini
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311152
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Diana Picus [Fri, 18 Aug 2017 09:31:21 +0000 (09:31 +0000)]
Revert "GlobalISel (AArch64): fix ABI at border between GPRs and SP."
This reverts commit
e8fd20964798ca6d46d2729dd3a789707a6416da in an
attempt to appease the GlobalISel buildbot, which fails in the
test-suite with errors like
fpcmp: files differ without tolerance allowance
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311151
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Sam Parker [Fri, 18 Aug 2017 09:08:05 +0000 (09:08 +0000)]
[AArch64] Fix for buildbots, unused function
Removing function declaration, my previous commit broke the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311150
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Victor Leschuk [Fri, 18 Aug 2017 09:02:06 +0000 (09:02 +0000)]
Remove useless default case in switch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311149
91177308-0d34-0410-b5e6-
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Sam Parker [Fri, 18 Aug 2017 08:39:54 +0000 (08:39 +0000)]
[AArch64] Remove DecodeAuthLoadWriteback
The BaseAuthLoad instruction class was incorrectly passing an empty
constraint string to its parent, so I have corrected this. This makes
the DecodeAuthLoadWriteback function redundant, so I've also removed
it.
Differential Revision: https://reviews.llvm.org/D36741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311148
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Alex Bradbury [Fri, 18 Aug 2017 06:45:34 +0000 (06:45 +0000)]
Refine report_fatal_error guidance after post-commit review
Use text suggested by Justin Bogner in post-commit review of r311146
<http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20170814/479898.html>,
which makes it clear that report_fatal_error shouldn't be used when there is a
practicable alternative. Also make this clearer in CodingStandards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311147
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Alex Bradbury [Fri, 18 Aug 2017 05:29:21 +0000 (05:29 +0000)]
Give guidance on report_fatal_error in CodingStandards.rst and ProgrammersManual.rst
The current ProgrammersManual.rst document has a lot of well-written
documentation on error handling thanks to @lhames. It suggests errors can be
split cleanly into "programmatic" and "recoverable" errors. However, the
reality in current LLVM seems to be there are a number of cases where a
non-programmatic error is not easily recoverable. Therefore, add a note to
indicate the existence of report_fatal_error for these cases. I've also added
a reminder to CodingStandards.rst in the section on assertions, to indicate
that llvm_unreachable and assertions should not be relied upon to report
errors triggered by user input.
The ProgrammersManual is also silent on the use of LLVMContext::diagnose,
which is used in BPF+WebAssembly+AMDGPU to report some errors during
instruction selection. I don't address that in this patch, as it's not quite
clear how to fit in to the current error handling story
Differential Revision: https://reviews.llvm.org/D36826
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311146
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Craig Topper [Fri, 18 Aug 2017 04:52:46 +0000 (04:52 +0000)]
[DAGCombiner] Fix bad comment that had immediate values swapped from the code and what they need to be to make sense. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311144
91177308-0d34-0410-b5e6-
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Jatin Bhateja [Fri, 18 Aug 2017 02:39:28 +0000 (02:39 +0000)]
Test commit access
Summary: Adding a blank line.
Differential Revision: https://reviews.llvm.org/D36859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311143
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Geoff Berry [Fri, 18 Aug 2017 01:43:11 +0000 (01:43 +0000)]
Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" round 2
This reverts commit r311135.
sanitizer-x86_64-linux-android buildbot is timing out with just this
patch applied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311142
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Richard Smith [Thu, 17 Aug 2017 23:38:41 +0000 (23:38 +0000)]
Increase tail dup threshold for -O3 from 3 to 4.
We see a modest performance improvement from this slightly higher tail dup threshold.
Differential Revision: https://reviews.llvm.org/D36775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311139
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Craig Topper [Thu, 17 Aug 2017 23:20:57 +0000 (23:20 +0000)]
[X86] Remove SSE/AVX patterns for AND/XOR/OR/ANDN that checked for the inputs being bitcasted from floating point types.
There's really no reason to do this we should just let isel pick the integer version and let the execution dependency fixing pass take care of moving to FP if necessary.
It's not very reliable to look for bitcasts at the edges of patterns. If for some reason one input was bitcasted and the other wasn't, or if one was a v4f32 bitcast and one was a v2f64 bitcast, we would have fallen back to the integer pattern anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311138
91177308-0d34-0410-b5e6-
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Tim Northover [Thu, 17 Aug 2017 23:14:01 +0000 (23:14 +0000)]
GlobalISel (AArch64): fix ABI at border between GPRs and SP.
If a struct would end up half in GPRs and half on SP the ABI says it should
actually go entirely on the stack. We were getting this wrong in GlobalISel
before, causing compatibility issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311137
91177308-0d34-0410-b5e6-
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Geoff Berry [Thu, 17 Aug 2017 23:06:55 +0000 (23:06 +0000)]
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
Two issues identified by buildbots were addressed:
- The pass no longer forwards COPYs to physical register uses, since
doing so can break code that implicitly relies on the physical
register number of the use.
- The pass no longer forwards COPYs to undef uses, since doing so
can break the machine verifier by creating LiveRanges that don't
end on a use (since the undef operand is not considered a use).
[MachineCopyPropagation] Extend pass to do COPY source forwarding
This change extends MachineCopyPropagation to do COPY source forwarding.
This change also extends the MachineCopyPropagation pass to be able to
be run during register allocation, after physical registers have been
assigned, but before the virtual registers have been re-written, which
allows it to remove virtual register COPY LiveIntervals that become dead
through the forwarding of all of their uses.
Reviewers: qcolombet, javed.absar, MatzeB, jonpa
Subscribers: jyknight, nemanjai, llvm-commits, nhaehnle, mcrosier, mgorny
Differential Revision: https://reviews.llvm.org/D30751
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311135
91177308-0d34-0410-b5e6-
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Zachary Turner [Thu, 17 Aug 2017 22:20:15 +0000 (22:20 +0000)]
Fix warning about covered switch default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311129
91177308-0d34-0410-b5e6-
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Tom Stellard [Thu, 17 Aug 2017 22:20:04 +0000 (22:20 +0000)]
AMDGPU: Add R600InstPrinter class
Summary:
This is step towards separating the GCN and R600 tablegen'd code.
This is a little awkward for now, because the R600 functions won't have the
MCSubtargetInfo parameter, so we need to have AMDMGPUInstPrinter
delegate to R600InstPrinter, but once the tablegen'd code is split,
we will be able to drop the delegation and use R600InstPrinter directly.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D36444
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311128
91177308-0d34-0410-b5e6-
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Jakub Kuderski [Thu, 17 Aug 2017 21:48:19 +0000 (21:48 +0000)]
[LoopRotate][Dominators] Use the incremental API to update DomTree
Summary: This patch teaches LoopRotate to use the new incremental API to update the DominatorTree.
Reviewers: dberlin, davide, grosser, sanjoy
Reviewed By: dberlin, davide
Subscribers: hiraditya, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D35581
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311125
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Eugene Zelenko [Thu, 17 Aug 2017 21:26:39 +0000 (21:26 +0000)]
[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311124
91177308-0d34-0410-b5e6-
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Zachary Turner [Thu, 17 Aug 2017 20:18:36 +0000 (20:18 +0000)]
Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311119
91177308-0d34-0410-b5e6-
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Zachary Turner [Thu, 17 Aug 2017 20:04:51 +0000 (20:04 +0000)]
[llvm-pdbutil] Fix some dumping issues.
When dumping, we were treating the S_INLINESITESYM as referring
to a type record, when it actually refers to an id record. We
had this correct in TypeIndexDiscovery, so our merging algorithm
should be fine, but we had it wrong in the dumper, which means it
would appear to work most of the time, unless the index was out
of bounds in the type stream, when it would fail. Fixed this, and
audited a few other cases to make them match the behavior in
TypeIndexDiscovery.
Also, I've now observed a new symbol record with kind 0x1168 which
I have no clue what it is, so to avoid crashing we have to just
print "Unknown Symbol Kind".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311117
91177308-0d34-0410-b5e6-
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Zachary Turner [Thu, 17 Aug 2017 20:04:31 +0000 (20:04 +0000)]
Fix a few minor issues when dumping symbols.
1) We weren't handling symbol types that weren't able to parse,
even if we knew what the leaf type was. This was triggering
when trying to dump /DEBUG:FASTLINK PDBs, where we expect a
certain symbol to show up, but we just don't know how to parse
it.
2) We lost the code for dumping record bytes, so this was added
back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311116
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Lang Hames [Thu, 17 Aug 2017 18:21:53 +0000 (18:21 +0000)]
[docs] Tweak phrasing of the varargs explanation in the command section of the
CMake primer.
This moves the introduction of the ARGV/ARGN variables up to immmediately follow
the introduction of the concept of variable argument functions, and explicitly
connects this concept to C varargs functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311113
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Lang Hames [Thu, 17 Aug 2017 18:00:28 +0000 (18:00 +0000)]
[docs] Fix typo and tweak wording of special variable handling in CMake primer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311112
91177308-0d34-0410-b5e6-
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Jonas Devlieghere [Thu, 17 Aug 2017 17:58:33 +0000 (17:58 +0000)]
Revert "[Debug info] Transfer DI to fragment expressions for split integer values."
This reverts commit r311102.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311111
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Alexey Bataev [Thu, 17 Aug 2017 17:26:52 +0000 (17:26 +0000)]
[SimplifyCFG] Add a test for preserve store alignment, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311106
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Sanjay Patel [Thu, 17 Aug 2017 17:07:37 +0000 (17:07 +0000)]
[x86] add tests for vector select-of-constants; NFC
We've discussed canonicalizing to this form in IR, so the backend
should be prepared to lower these in ways better than what we see
here in most cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311103
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Jonas Devlieghere [Thu, 17 Aug 2017 17:06:48 +0000 (17:06 +0000)]
[Debug info] Transfer DI to fragment expressions for split integer values.
This patch teaches the SDag type legalizer how to split up debug info for
integer values that are split into a hi and lo part.
Differential Revision: https://reviews.llvm.org/D36805
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311102
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Sanjay Patel [Thu, 17 Aug 2017 17:03:11 +0000 (17:03 +0000)]
[PowerPC] add tests for vector select-of-constants; NFC
We've discussed canonicalizing to this form in IR, so the backend
should be prepared to lower these in ways better than what we see
here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311099
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Adrian Prantl [Thu, 17 Aug 2017 16:57:13 +0000 (16:57 +0000)]
Improve line debug info when translating a CaseBlock to SDNodes.
The SelectionDAGBuilder translates various conditional branches into
CaseBlocks which are then translated into SDNodes. If a conditional
branch results in multiple CaseBlocks only the first CaseBlock is
translated into SDNodes immediately, the rest of the CaseBlocks are
put in a queue and processed when all LLVM IR instructions in the
basic block have been processed.
When a CaseBlock is transformed into SDNodes the SelectionDAGBuilder
is queried for the current LLVM IR instruction and the resulting
SDNodes are annotated with the debug info of the current
instruction (if it exists and has debug metadata).
When the deferred CaseBlocks are processed, the SelectionDAGBuilder
does not have a current LLVM IR instruction, and the resulting SDNodes
will not have any debuginfo. As DwarfDebug::beginInstruction() outputs
a .loc directive for the first instruction in a labeled
block (typically the case for something coming from a CaseBlock) this
tends to produce a line-0 directive.
This patch changes the handling of CaseBlocks to store the current
instruction's debug info into the CaseBlock when it is created (and the
SelectionDAGBuilder knows the current instruction) and to always use
the stored debug info when translating a CaseBlock to SDNodes.
Patch by Frej Drejhammar!
Differential Revision: https://reviews.llvm.org/D36671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311097
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Jakub Kuderski [Thu, 17 Aug 2017 16:45:35 +0000 (16:45 +0000)]
[Dominators] Teach LoopUnswitch to use the incremental API
Summary:
This patch makes LoopUnswitch use new incremental API for updating dominators.
It also updates SplitCriticalEdge, as it is called in LoopUnswitch.
There doesn't seem to be any noticeable performance difference when bootstrapping clang with this patch.
Reviewers: dberlin, davide, sanjoy, grosser, chandlerc
Reviewed By: davide, grosser
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D35528
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311093
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Craig Topper [Thu, 17 Aug 2017 15:40:25 +0000 (15:40 +0000)]
[AVX512] Don't switch unmasked subvector insert/extract instructions when AVX512DQI is enabled.
There's no reason to switch instructions with and without DQI. It just creates extra isel patterns and test divergences.
There is however value in enabling the masked version of the instructions with DQI.
This required introducing some new multiclasses to enabling this splitting.
Differential Revision: https://reviews.llvm.org/D36661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311091
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