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Alex Light [Tue, 20 Oct 2015 21:28:27 +0000 (21:28 +0000)]
Merge "Fix typos."
Richard Uhler [Tue, 20 Oct 2015 19:29:14 +0000 (19:29 +0000)]
Merge "Change dex_location_ from const char* to std::string."
Richard Uhler [Tue, 20 Oct 2015 19:26:52 +0000 (19:26 +0000)]
Merge "Switch ahat test to use core-optimizing-pic.art."
Alex Light [Tue, 20 Oct 2015 17:49:48 +0000 (10:49 -0700)]
Fix typos.
Change-Id: Ie2198e3bb4b978c638de12db34547b4311d85eb5
Roland Levillain [Tue, 20 Oct 2015 17:48:04 +0000 (17:48 +0000)]
Merge "Disable the x86 & x86-64 UnsafeCASObject intrinsic with heap poisoning."
Alex Light [Tue, 20 Oct 2015 17:37:11 +0000 (17:37 +0000)]
Merge "Disable test 961-default-iface-resolution-generated with gcstress"
Andreas Gampe [Tue, 20 Oct 2015 17:23:45 +0000 (17:23 +0000)]
Merge "MIPS64: Disassembler support for rotate instructions."
Alex Light [Tue, 20 Oct 2015 17:23:32 +0000 (10:23 -0700)]
Disable test 961-default-iface-resolution-generated with gcstress
The test takes too long with gcstress and can cause timeouts.
Change-Id: I99d16e882650ea73d07f4292fcfba0869f5b7ed1
Roland Levillain [Tue, 20 Oct 2015 16:55:06 +0000 (17:55 +0100)]
Disable the x86 & x86-64 UnsafeCASObject intrinsic with heap poisoning.
The current heap poisoning instrumentation of this intrinsic
does not always work properly when heap poisoning in
enabled, hence this quick fix to let the build & test
infrastructure turn green again.
Bug:
12687968
Change-Id: I03702a057fb6f07134e926e2c1c2780f47e3a50a
Nicolas Geoffray [Tue, 20 Oct 2015 12:36:24 +0000 (12:36 +0000)]
Merge "New attempt at fixing mac build."
Nicolas Geoffray [Tue, 20 Oct 2015 12:35:38 +0000 (13:35 +0100)]
New attempt at fixing mac build.
Change-Id: I00e3df55e65eb5edb4e8dd244bb7f8918dd942d4
Nicolas Geoffray [Tue, 20 Oct 2015 11:56:02 +0000 (11:56 +0000)]
Merge "Fix mac build."
Nicolas Geoffray [Tue, 20 Oct 2015 11:55:20 +0000 (12:55 +0100)]
Fix mac build.
Change-Id: I7229a628a619164eea22735bcaed507428ab054a
Nicolas Geoffray [Tue, 20 Oct 2015 11:41:49 +0000 (11:41 +0000)]
Merge "Remove ArtCode."
Nicolas Geoffray [Fri, 16 Oct 2015 16:13:34 +0000 (17:13 +0100)]
Remove ArtCode.
- Instead use OatQuickMethodHeader.
- Various cleanups now that we don't have all those
ArtMethod -> ArtCode -> OatQuickMethodHeader indirections.
As a consequence of this cleanup, exception handling got a bit
faster.
ParserCombinators benchmark (exception intensive) on x64: (lower is better)
Before:
ParserCombinators(RunTime):
1062500.0 us.
After:
ParserCombinators(RunTime): 833000.0 us.
Change-Id: Idac917b6f1b0dc254ad68fb3781cd61bccadb0f3
Calin Juravle [Tue, 20 Oct 2015 10:32:22 +0000 (10:32 +0000)]
Merge "Fix induction_var_range_test."
Calin Juravle [Tue, 20 Oct 2015 10:29:36 +0000 (11:29 +0100)]
Fix induction_var_range_test.
Change-Id: I43101c5e35f4c516ea4ba3137631508f12703412
Calin Juravle [Tue, 20 Oct 2015 09:38:07 +0000 (09:38 +0000)]
Merge "Revert "Revert "optimizing: propagate type information of arguments"""
Chris Larsen [Mon, 19 Oct 2015 22:17:16 +0000 (15:17 -0700)]
MIPS64: Disassembler support for rotate instructions.
Also, tighten the tests for recognizing the various shift commands. The
tests, previously, would be unable to distinguish between "shift right
logical" and "rotate right" commands. In particular:
- SRLV vs. ROTRV
- DSRLV vs. DROTRV,
- DSRL vs. DROTR, and
- DSRL32 vs. DROTR32
Change-Id: I7a6df8ab0d76fd3d34b1207da9915369ad84fa97
Andreas Gampe [Mon, 19 Oct 2015 22:06:00 +0000 (22:06 +0000)]
Merge "MIPS64: Add intrinsic support for bit rotation"
Chris Larsen [Sat, 3 Oct 2015 00:25:58 +0000 (17:25 -0700)]
MIPS64: Add intrinsic support for bit rotation
- int java.lang.Integer.rotateLeft(int i, int distance)
- int java.lang.Long.rotateLeft(long i, int distance)
Change-Id: I048ebf310265c6b20a80108673a7931cbeee0513
Aart Bik [Mon, 19 Oct 2015 20:52:50 +0000 (20:52 +0000)]
Merge "Added ability to generate induction range code."
Mathieu Chartier [Mon, 19 Oct 2015 19:54:44 +0000 (19:54 +0000)]
Merge "Keep dex files live in class table"
Aart Bik [Thu, 15 Oct 2015 00:44:55 +0000 (17:44 -0700)]
Added ability to generate induction range code.
Rationale: used by dynamic BCE (done in another CL).
Change-Id: Ia6ce75da57b5298fba74622822ae0bae69c74188
Mathieu Chartier [Sat, 17 Oct 2015 19:46:42 +0000 (12:46 -0700)]
Keep dex files live in class table
The DexFile.loadClass API allows callers to load classes using a
dex file without having that dex file owned by the specified class
loader. We now add the dex file to the class table to make sure it
stays live until the class loader is unreachable.
Fixes interpreter gcstress test 087 with 64 bit.
Bug:
22720414
Change-Id: Ia4341149f45b6293312f8b275c7a68cea179f718
Aart Bik [Mon, 19 Oct 2015 18:42:59 +0000 (18:42 +0000)]
Merge "Generalize codegen and simplification of deopt."
Aart Bik [Mon, 19 Oct 2015 18:05:03 +0000 (11:05 -0700)]
Generalize codegen and simplification of deopt.
Rationale: the de-opt instruction is very similar to an if,
so the existing assumption that it always has a
conditional "under the hood" is very unsafe, since
optimizations may have replaced conditionals with
actual values; this CL generalizes handling of deopt.
Change-Id: I1c6cb71fdad2af869fa4714b38417dceed676459
Vladimir Marko [Mon, 19 Oct 2015 17:20:53 +0000 (17:20 +0000)]
Merge "ART: Replace an "ALWAYS_INLINE" with "inline" to fix build."
Vladimir Marko [Mon, 19 Oct 2015 17:18:27 +0000 (18:18 +0100)]
ART: Replace an "ALWAYS_INLINE" with "inline" to fix build.
Change-Id: I61e6806737589266b36ab7a33561da7e1f8c02ca
Vladimir Marko [Mon, 19 Oct 2015 16:57:22 +0000 (16:57 +0000)]
Merge "Clean up OatFile."
Andreas Gampe [Mon, 19 Oct 2015 15:45:55 +0000 (15:45 +0000)]
Merge "MIPS64: Add intrinsic support for bit rotation"
Vladimir Marko [Fri, 16 Oct 2015 10:23:41 +0000 (11:23 +0100)]
Clean up OatFile.
In Setup(), avoid reading beyond the end and use the %zu
format specifier instead of %zd for size_t output.
Make the .bss section pointers non-const.
Change-Id: Ic8f066effe8037b552d8e911c6a5d17370d79ff4
Chris Larsen [Wed, 23 Sep 2015 00:54:15 +0000 (17:54 -0700)]
MIPS64: Add intrinsic support for bit rotation
- int java.lang.Integer.rotateRight(int i, int distance)
- int java.lang.Long.rotateRight(long i, int distance)
Assembler tests for new MIPS instructions will be provided in a
separate patch.
Change-Id: I6dd4786e2d5f674bf56ff3d5afd321bb1bef589e
Andreas Gampe [Mon, 19 Oct 2015 15:12:57 +0000 (15:12 +0000)]
Merge "MIPS64: Add intrinsics support for trailing zeros"
Chris Larsen [Tue, 22 Sep 2015 23:02:40 +0000 (16:02 -0700)]
MIPS64: Add intrinsics support for trailing zeros
- int java.lang.Integer.numberOfTrailingZeros(int i)
- int java.lang.Long.numberOfTrailingZeros(long i)
Change-Id: I0fc1c2629738de9047313b6511b490639eef68f3
Andreas Gampe [Sat, 17 Oct 2015 00:17:20 +0000 (00:17 +0000)]
Merge "MIPS64: Implement intrinsics from sun.misc.Unsafe:"
Chris Larsen [Sat, 5 Sep 2015 06:38:16 +0000 (23:38 -0700)]
MIPS64: Implement intrinsics from sun.misc.Unsafe:
- int getInt(Object, long)
- int getIntVolatile(Object, long)
- long getLong(Object, long)
- long getLongVolatile(Object, long)
- Object getObject(Object, long)
- Object getObjectVolatile(Object, long)
- void putInt(Object, long, int)
- void putOrderedInt(Object, long, int)
- void putIntVolatile(Object, long, int)
- void putObject(Object, long, Object)
- void putOrderedObject(Object, long, Object)
- void putObjectVolatile(Object, long, Object)
- void putLong(Object, long, long)
- void putOrderedLong(Object, long, long)
- void putLongVolatile(Object, long, long)
The compareAndSwap*() functions will be delivered in a separate patch.
Change-Id: I94238254b2f9df017d58fa9a4bb38632f6479472
Alex Light [Sat, 17 Oct 2015 00:00:30 +0000 (00:00 +0000)]
Merge "Allow changing the optimization level of a build with env variable."
Andreas Gampe [Fri, 16 Oct 2015 22:17:56 +0000 (22:17 +0000)]
Merge "MIPS64: Additional assember tests:"
Andreas Gampe [Fri, 16 Oct 2015 21:42:10 +0000 (21:42 +0000)]
Merge "MIPS64: Implement intrinsics from java.lang.String:"
Richard Uhler [Thu, 15 Oct 2015 22:12:23 +0000 (15:12 -0700)]
Change dex_location_ from const char* to std::string.
Because we tend to use the dex_location_ as an std::string fairly
often.
Change-Id: Ida9624c9cb12c8ad30577146f1e6e97e25edc155
Hiroshi Yamauchi [Fri, 16 Oct 2015 17:18:53 +0000 (17:18 +0000)]
Merge "Revert "Revert "Implement rosalloc fast path in assembly for 32 bit arm."""
Mathieu Chartier [Fri, 16 Oct 2015 16:34:26 +0000 (16:34 +0000)]
Merge "Fix mips64 cfi test"
Mathieu Chartier [Fri, 16 Oct 2015 16:29:31 +0000 (09:29 -0700)]
Fix mips64 cfi test
Change-Id: I93224f29b23473fb9f2f6631a62949fdf2e8f888
Calin Juravle [Fri, 16 Oct 2015 16:29:23 +0000 (16:29 +0000)]
Merge "Fix in reference type propagation"
Calin Juravle [Fri, 16 Oct 2015 15:28:46 +0000 (16:28 +0100)]
Fix in reference type propagation
We miss updating the type of objects if their nullability gets updated
first.
Bug:
25008765
Change-Id: Id1a753d7d5b7b0d5ed708c325bd00a36240925fb
Vladimir Marko [Fri, 16 Oct 2015 16:13:34 +0000 (16:13 +0000)]
Merge "ART: Fix Mips64 JNI Calling Convention"
Mathieu Chartier [Fri, 16 Oct 2015 15:47:08 +0000 (15:47 +0000)]
Merge "Change hash table load factors"
Mathieu Chartier [Thu, 15 Oct 2015 16:19:15 +0000 (09:19 -0700)]
Change hash table load factors
Changed class table and intern table load factors to query the
runtime. The runtime returns load factors based on whether or not we
are a low ram device.
DescriptorEquals time for class linking goes from 10% -> 1.2% for
compiling GmsCore with interpret only.
Added test.
Bug:
24917584
Change-Id: Iaaf5d2eab1b0c2d188d299e4bc1852cdb3801173
Vladimir Marko [Wed, 2 Sep 2015 20:23:32 +0000 (21:23 +0100)]
ART: Fix Mips64 JNI Calling Convention
The frame size did not include RA. RA is part of the core spill
mask, and implicitly spilled in BuildFrame. Count this.
Change-Id: Iab7565c2496ee99660c7faa39a07a2c87be53756
Nicolas Geoffray [Fri, 16 Oct 2015 08:36:15 +0000 (08:36 +0000)]
Merge "ARM64: Better recognition of constants encodable as immediates."
Alexandre Rames [Fri, 16 Oct 2015 08:08:46 +0000 (09:08 +0100)]
ARM64: Better recognition of constants encodable as immediates.
When the right-hand side input is a constant, VIXL will automatically
switch between add and sub (or between similar pairs of instructions).
Change-Id: Icf05237b8653c409618f44e45049df87baf0f4c6
Andreas Gampe [Fri, 16 Oct 2015 02:56:15 +0000 (02:56 +0000)]
Merge "Parse runtime compiler options for JIT"
Mathieu Chartier [Fri, 16 Oct 2015 01:19:01 +0000 (18:19 -0700)]
Parse runtime compiler options for JIT
For the case where the CppDefines do not match the device the JIT is
running on.
Sample logcat output to prove it works:
JIT instruction set variant krait
JIT instruction set features default
Bug:
24982714
Change-Id: I1f4991a5d7cdc6101d1b0ecbcb39fb26dd20180a
Andreas Gampe [Fri, 16 Oct 2015 01:07:57 +0000 (01:07 +0000)]
Merge "Use ATTRIBUTE_UNUSED more."
Mathieu Chartier [Thu, 15 Oct 2015 23:47:03 +0000 (23:47 +0000)]
Merge "Fix race in ART 079-phantom"
Hiroshi Yamauchi [Thu, 15 Oct 2015 19:26:57 +0000 (12:26 -0700)]
Revert "Revert "Implement rosalloc fast path in assembly for 32 bit arm.""
With a heap poisoning fix.
This reverts commit
cf91c7d973f3b2f491abc61d47c141782c96d46e.
Bug:
9986565
Change-Id: Ia72edbde65ef6119e1931a77cc4c595a0b80ce31
Roland Levillain [Wed, 26 Aug 2015 17:34:03 +0000 (18:34 +0100)]
Use ATTRIBUTE_UNUSED more.
Use it in lieu of UNUSED(), which had some incorrect uses.
Change-Id: If247dce58b72056f6eea84968e7196f0b5bef4da
Andreas Gampe [Thu, 15 Oct 2015 17:32:36 +0000 (17:32 +0000)]
Merge "ART: Add simple null alias tracking for lock counting"
Andreas Gampe [Wed, 14 Oct 2015 19:55:48 +0000 (12:55 -0700)]
ART: Add simple null alias tracking for lock counting
Null is the only literal for objects, and one may lock and unlock
on different registers containing null, which is still balanced.
Bug:
23502994
Change-Id: Ibfbf1b8c2aa7d1409e3e426988d2d15efe1f2d0d
Aart Bik [Thu, 15 Oct 2015 16:18:05 +0000 (16:18 +0000)]
Merge "Added support for unsigned comparisons"
Vladimir Marko [Thu, 15 Oct 2015 16:01:16 +0000 (16:01 +0000)]
Merge "ART: Use .bss section for dex cache arrays."
Brian Carlstrom [Thu, 15 Oct 2015 15:55:56 +0000 (15:55 +0000)]
Merge "Fix monitor contention logging to support negative line numbers"
Vladimir Marko [Thu, 15 Oct 2015 15:53:39 +0000 (15:53 +0000)]
Merge "Fix a sign-extension bug in JValue."
Mathieu Chartier [Thu, 15 Oct 2015 15:52:53 +0000 (15:52 +0000)]
Merge "Allocate dex cache arrays in their class loader's linear alloc"
Vladimir Marko [Tue, 8 Sep 2015 12:47:48 +0000 (13:47 +0100)]
ART: Use .bss section for dex cache arrays.
Change-Id: I5fd507973b56f6a662a02a8c1dd9ac4493fb7b36
Mathieu Chartier [Wed, 14 Oct 2015 17:55:30 +0000 (10:55 -0700)]
Allocate dex cache arrays in their class loader's linear alloc
Fixes memory leak for class unloading where the dex cache arrays
used to be in the runtime linear alloc which never got freed.
TODO: Some of the callers like the compiler just use the runtime
linear alloc. We could clean this up if we want to have class
unloading during compilation for some reason.
Added regression test.
Bug:
22720414
Change-Id: Ia50333a06a339efbdaedb5ad94b7a1ae841124ec
Calin Juravle [Thu, 15 Oct 2015 12:35:37 +0000 (12:35 +0000)]
Merge "Move x86 constant area code to its own file"
Nicolas Geoffray [Thu, 15 Oct 2015 10:33:25 +0000 (10:33 +0000)]
Merge "Revert "load store elimination.""
Nicolas Geoffray [Thu, 15 Oct 2015 10:30:18 +0000 (10:30 +0000)]
Revert "load store elimination."
Breaks libcore tests:
libcore.java.lang.ref.FinalizeTest#testWatchdogDoesNotFailForObjectsThatAreNearTheDeadline
libcore.java.util.ResourceLeakageDetectorTest#testDetectsUnclosedCloseGuard
org.apache.harmony.tests.java.lang.ref.ReferenceTest#test_finalizeReferenceInteraction
This reverts commit
589dac7f0ce078d19aad7e35bb0195c47ddf01d2.
Change-Id: I55115765c10762d5bc152d3425e4622560d8b9f4
Mingyao Yang [Thu, 15 Oct 2015 08:47:48 +0000 (08:47 +0000)]
Merge "load store elimination."
Mingyao Yang [Mon, 24 Aug 2015 18:21:42 +0000 (11:21 -0700)]
load store elimination.
This adds a pass to eliminate some unnecessary heap loads/stores. It
first collects heap locations and then tracks values stored to those heap
locations. Alias analysis is done based on offset, type, singleton,
pre-existence, etc.
Change-Id: I11a9d8ef20d1b2f245607eb25118e9aff9be472a
Nicolas Geoffray [Thu, 15 Oct 2015 07:30:00 +0000 (07:30 +0000)]
Merge "Revert "Implement rosalloc fast path in assembly for 32 bit arm.""
Nicolas Geoffray [Thu, 15 Oct 2015 07:29:38 +0000 (07:29 +0000)]
Revert "Implement rosalloc fast path in assembly for 32 bit arm."
Tentative. Looks like heap poisoning breaks with this change.
bug:
9986565
This reverts commit
e6316940db61faead36f9642cce137d41fc8f606.
Change-Id: I5c63758221464fe319315f40ae79c656048faed0
Alex Light [Thu, 15 Oct 2015 00:42:12 +0000 (00:42 +0000)]
Merge "Make the run-test makefile check if we have python3"
Alex Light [Wed, 14 Oct 2015 23:21:17 +0000 (16:21 -0700)]
Allow changing the optimization level of a build with env variable.
This is useful for debugging.
Change-Id: I60e61cdb53a00d74cf619d56991f9d11ab9ae0c4
Mathieu Chartier [Wed, 14 Oct 2015 23:13:43 +0000 (23:13 +0000)]
Merge "Fix structural class checks"
Mathieu Chartier [Tue, 13 Oct 2015 01:13:39 +0000 (18:13 -0700)]
Fix structural class checks
Enabled for debug builds to prevent bit rotting. Changed
DexFileAndClassPair to work with std::queue.
Re-enabled structural check tests.
Change-Id: Ia981564650bf1c7e418d8a73efcc15733ddf7501
Alex Light [Wed, 14 Oct 2015 17:43:01 +0000 (10:43 -0700)]
Make the run-test makefile check if we have python3
It will only disable these tests if we do not to get better CI
coverage.
Change-Id: I850582a445b61dface961ed6cfa75187d22c4454
Aart Bik [Fri, 9 Oct 2015 18:15:55 +0000 (11:15 -0700)]
Added support for unsigned comparisons
Rationale: even though not directly supported in input graph,
having the ability to express unsigned comparisons
in HIR is useful for all sorts of optimizations.
Change-Id: I4543c96a8c1895c3d33aaf85685afbf80fe27d72
Andreas Gampe [Wed, 14 Oct 2015 20:30:00 +0000 (20:30 +0000)]
Merge "ART: Fix build"
Andreas Gampe [Wed, 14 Oct 2015 20:26:49 +0000 (13:26 -0700)]
ART: Fix build
We warn on multiline comments.
Bug:
23502994
Change-Id: I1ab89585c0350922675c242d107682ca27489cc1
Andreas Gampe [Wed, 14 Oct 2015 19:51:40 +0000 (19:51 +0000)]
Merge "ART: More lenient lock merging in the verifier"
Alex Light [Wed, 14 Oct 2015 19:00:02 +0000 (19:00 +0000)]
Merge "Cleanup interface initialization code to create fewer scopes"
Alex Light [Wed, 14 Oct 2015 18:07:41 +0000 (11:07 -0700)]
Cleanup interface initialization code to create fewer scopes
Make us not create scopes and handles in loops and instead just mutate
a single one.
Bug:
24618811
Change-Id: Ia16ed24c9914efa5a3358df24f0b2d05e2613910
Hiroshi Yamauchi [Wed, 14 Oct 2015 18:18:24 +0000 (18:18 +0000)]
Merge "Implement rosalloc fast path in assembly for 32 bit arm."
Mathieu Chartier [Wed, 14 Oct 2015 18:05:38 +0000 (18:05 +0000)]
Merge "Do not attempt to unregister null oat files"
Mathieu Chartier [Wed, 14 Oct 2015 17:58:41 +0000 (10:58 -0700)]
Do not attempt to unregister null oat files
The oat file in the DexFile array may be null if we are running
without dex2oat.
Bug:
22720414
Change-Id: Ie1014b740caa77c3484a1671f29edb42bcc746c0
Mark Mendell [Tue, 6 Oct 2015 18:58:32 +0000 (14:58 -0400)]
Move x86 constant area code to its own file
Move the logic to constant_area_fixups_x86.cc to keep the graph
modifications out of the code generation file.
Change-Id: I476f1fce80cb4ad38ae872b620ae58f6e52fe664
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Vladimir Marko [Wed, 14 Oct 2015 17:21:56 +0000 (17:21 +0000)]
Merge "X86 jump tables for PackedSwitch"
Vladimir Marko [Wed, 14 Oct 2015 17:19:09 +0000 (17:19 +0000)]
Merge "X86_64 jump tables for PackedSwitch"
Mark Mendell [Fri, 18 Sep 2015 18:10:29 +0000 (14:10 -0400)]
X86 jump tables for PackedSwitch
Implement X86PackedSwitch using a jump table of offsets to blocks. The
X86PackedSwitch version just adds an input to address the constant area.
Change-Id: Id2752a1ee79222493040c6fd0e59aee9a544b76a
Bug:
21119474
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Calin Juravle [Wed, 14 Oct 2015 13:53:10 +0000 (13:53 +0000)]
Revert "Revert "optimizing: propagate type information of arguments""
This reverts commit
89c0d32437011bbe492fe14c766cd707046ce043.
Change-Id: I603a49794e155cc97410b8836c8ea425bfdc98eb
Mark Mendell [Fri, 18 Sep 2015 17:36:07 +0000 (13:36 -0400)]
X86_64 jump tables for PackedSwitch
Implement PackedSwitch using a jump table of offsets to blocks.
Bug:
24092914
Bug:
21119474
Change-Id: I83430086c03ef728d30d79b4022607e9245ef98f
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Vladimir Marko [Wed, 14 Oct 2015 11:34:02 +0000 (11:34 +0000)]
Merge "Improve Thumb2 bitwise operations."
Vladimir Marko [Mon, 14 Sep 2015 14:13:26 +0000 (15:13 +0100)]
Improve Thumb2 bitwise operations.
Allow embedding constants in AND, ORR, EOR. Add ORN to
assembler, use BIC and ORN for AND and ORR when needed.
Change-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661
Nicolas Geoffray [Wed, 14 Oct 2015 10:48:44 +0000 (10:48 +0000)]
Merge "Fix braino in arm assembler."
Nicolas Geoffray [Wed, 14 Oct 2015 10:44:23 +0000 (11:44 +0100)]
Fix braino in arm assembler.
Method is pure virtual. Caught by clang.
Change-Id: I061666ec919702fa7c30e9a98161cad56a9c864d
Nicolas Geoffray [Wed, 14 Oct 2015 09:42:04 +0000 (09:42 +0000)]
Merge "Fix MIPS64 boot"
Goran Jakovljevic [Wed, 14 Oct 2015 09:23:48 +0000 (11:23 +0200)]
Fix MIPS64 boot
Return register in FieldAccessCallingConventionMIPS64 was A0,
but it should be V0.
With this change, the system server doesn't crash.
Change-Id: Id52f684658d235fd001d9784145f4ea5ed2938b6