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Roman Lebedev [Sun, 30 Sep 2018 12:42:08 +0000 (12:42 +0000)]
[NFC][CodeGen][X86][AArch64] Add 64-bit constant bit field extract pattern tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343404
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Simon Pilgrim [Sun, 30 Sep 2018 09:42:04 +0000 (09:42 +0000)]
[X86] Regenerate MMX coalescing test
Exposes another extractelement(bitcast(scalartovector())) pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343403
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Zachary Turner [Sun, 30 Sep 2018 03:57:49 +0000 (03:57 +0000)]
[PDB] Fix this test for real.
I was able to test this fix on an actual Windows machine
so this should get the bot green again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343400
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Craig Topper [Sun, 30 Sep 2018 03:01:46 +0000 (03:01 +0000)]
[X86] Disable BMI BEXTR in X86DAGToDAGISel::matchBEXTRFromAnd unless we're on compiling for a CPU with single uop BEXTR
Summary:
This function turns (X >> C1) & C2 into a BMI BEXTR or TBM BEXTRI instruction. For BMI BEXTR we have to materialize an immediate into a register to feed to the BEXTR instruction.
The BMI BEXTR instruction is 2 uops on Intel CPUs. It looks like on SKL its one port 0/6 uop and one port 1/5 uop. Despite what Agner's tables say. I know one of the uops is a regular shift uop so it would have to go through the port 0/6 shifter unit. So that's the same or worse execution wise than the shift+and which is one 0/6 uop and one 0/1/5/6 uop. The move immediate into register is an additional 0/1/5/6 uop.
For now I've limited this transform to AMD CPUs which have a single uop BEXTR. If may also might make sense if we can fold a load or if the and immediate is larger than 32-bits and can't be encoded as a sign extended 32-bit value or if LICM or CSE can hoist the move immediate and share it. But we'd need to look more carefully at that. In the regression I looked at it doesn't look load folding or large immediates were occurring so the regression isn't caused by the loss of those. So we could try to be smarter here if we find a compelling case.
Reviewers: RKSimon, spatel, lebedev.ri, andreadb
Reviewed By: RKSimon
Subscribers: llvm-commits, andreadb, RKSimon
Differential Revision: https://reviews.llvm.org/D52570
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343399
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Zachary Turner [Sun, 30 Sep 2018 00:51:54 +0000 (00:51 +0000)]
Only dump the types we need in the test.
We added support for dumping pointers but pointers to arrays
won't correctly dump until we add support for dumping arrays.
Instead of trying to dump everything, which this test isn't
even interested in, just dump enums and typedefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343398
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Zachary Turner [Sun, 30 Sep 2018 00:22:21 +0000 (00:22 +0000)]
Fix some tests on Windows.
I don't actually have a Windows machine at the present moment,
so hopefully this fixes it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343397
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Lang Hames [Sat, 29 Sep 2018 23:49:57 +0000 (23:49 +0000)]
[ORC] Add partitioning support to CompileOnDemandLayer2.
CompileOnDemandLayer2 now supports user-supplied partition functions (the
original CompileOnDemandLayer already supported these).
Partition functions are called with the list of requested global values
(i.e. global values that currently have queries waiting on them) and have an
opportunity to select extra global values to materialize at the same time.
Also adds testing infrastructure for the new feature to lli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343396
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Lang Hames [Sat, 29 Sep 2018 23:49:56 +0000 (23:49 +0000)]
[ORC] Clear SymbolToDefinitionMap when materializing a MaterializationUnit.
The map is inaccessible at this point, so we may as well reclaim the memory
early.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343395
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Lang Hames [Sat, 29 Sep 2018 23:49:54 +0000 (23:49 +0000)]
Add a comment to clarify the contract for LLVMGetErrorMessage in the c-bindings
for Error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343394
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Zachary Turner [Sat, 29 Sep 2018 23:28:19 +0000 (23:28 +0000)]
[PDB] Better native API support for pointers.
We didn't properly detect when a pointer was a member
pointer, and when that was the case we were not
properly returning class parent info. This caused
member pointers to render incorrectly in pretty mode.
However, we didn't even have pretty tests for pointers
in native mode, so those are also added now to ensure
this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343393
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David Bolvansky [Sat, 29 Sep 2018 21:00:37 +0000 (21:00 +0000)]
[DAGCombiner][NFC] Tests for X div/rem Y single bit fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343392
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Simon Pilgrim [Sat, 29 Sep 2018 20:34:16 +0000 (20:34 +0000)]
[X86][AVX2] Cleanup shuffle combining tests - add common prefixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343391
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Simon Pilgrim [Sat, 29 Sep 2018 18:15:26 +0000 (18:15 +0000)]
[X86] SimplifyDemandedVectorEltsForTargetNode - remove identity target shuffles before simplifying inputs
By removing demanded target shuffles that simplify to zero/undef/identity before simplifying its inputs we improve chances of further simplification, as only the immediate parent user of the combined is added back to the work list - this still doesn't help us if its passed through other ops though (bitcasts....).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343390
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Craig Topper [Sat, 29 Sep 2018 18:03:52 +0000 (18:03 +0000)]
[X86] Add fast-isel test cases for unaligned load/store intrinsics recently added to clang
This adds tests for:
_mm_loadu_si16
_mm_loadu_si32
_mm_loadu_si16
_mm_storeu_si64
_mm_storeu_si32
_mm_storeu_si16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343389
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Simon Pilgrim [Sat, 29 Sep 2018 17:36:22 +0000 (17:36 +0000)]
[X86][SSE] LowerScalarImmediateShift - remove 32-bit vXi64 special case handling.
This is all handled generally by getTargetConstantBitsFromNode now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343387
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Simon Pilgrim [Sat, 29 Sep 2018 17:11:19 +0000 (17:11 +0000)]
Fix signed/unsigned mismatch warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343385
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Simon Pilgrim [Sat, 29 Sep 2018 17:01:55 +0000 (17:01 +0000)]
[X86] getTargetConstantBitsFromNode - add support for rearranging constant bits via shuffles
Exposed an issue that recursive calls to getTargetConstantBitsFromNode don't handle changes to EltSizeInBits yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343384
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Simon Pilgrim [Sat, 29 Sep 2018 16:40:35 +0000 (16:40 +0000)]
[X86][SSE] LowerScalarImmediateShift - use getTargetConstantBitsFromNode to get immediate data
Don't just attempt to find a splat build vector.
First step towards getting rid of all the 32-bit special case code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343383
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Sanjay Patel [Sat, 29 Sep 2018 15:05:24 +0000 (15:05 +0000)]
[InstCombine] fix formatting in vector evaluators; NFC
We need to alter the functionality as shown in D52548.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343379
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Sanjay Patel [Sat, 29 Sep 2018 15:01:45 +0000 (15:01 +0000)]
[InstCombine] add test for vector widening of insertelements; NFC
The test shows a potential overreach with the fix from D52548.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343378
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Simon Pilgrim [Sat, 29 Sep 2018 14:51:09 +0000 (14:51 +0000)]
[X86] getTargetConstantBitsFromNode - fix self-move assertions from gcc builds due to rL343375
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343377
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Simon Pilgrim [Sat, 29 Sep 2018 14:31:00 +0000 (14:31 +0000)]
[X86] Regenerate fma comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343376
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Simon Pilgrim [Sat, 29 Sep 2018 14:17:32 +0000 (14:17 +0000)]
[X86] getTargetConstantBitsFromNode - add support for peeking through ISD::EXTRACT_SUBVECTOR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343375
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Simon Pilgrim [Sat, 29 Sep 2018 13:25:22 +0000 (13:25 +0000)]
[X86][SSE] Fixed issue with v2i64 variable shifts on 32-bit targets
The shift amount might have peeked through a extract_subvector, altering the number of vector elements in the 'Amt' variable - so we were incorrectly calculating the ratio when peeking through bitcasts, resulting in incorrectly detecting splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343373
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Heejin Ahn [Sat, 29 Sep 2018 09:22:25 +0000 (09:22 +0000)]
Fix comment indentation in addLandingPad
rL343018 messed up the comment indentation while moving it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343371
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Vitaly Buka [Sat, 29 Sep 2018 02:17:12 +0000 (02:17 +0000)]
[cxx2a] Fix warning triggered by r343285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343369
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Lang Hames [Fri, 28 Sep 2018 22:03:17 +0000 (22:03 +0000)]
[ORC] Make MaterializationResponsibility::getRequestedSymbols() const.
This makes it available for use in IRTransformLayer2::TransformFunction
instances (since a const MaterializationResponsibility& parameter was
added in r343365).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343367
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Lang Hames [Fri, 28 Sep 2018 21:49:53 +0000 (21:49 +0000)]
[ORC] Add more utilities to aid debugging output.
(1) A const accessor for the LLVMContext held by a ThreadSafeContext.
(2) A const accessor for the ThreadSafeModules held by an IRMaterializationUnit.
(3) A const MaterializationResponsibility reference to IRTransformLayer2's
transform function. This makes IRTransformLayer2 useful for JIT debugging
(since it can inspect JIT state through the responsibility argument) as well
as program transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343365
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Thomas Lively [Fri, 28 Sep 2018 21:36:43 +0000 (21:36 +0000)]
[ValueTracking] Allow select patterns to work on FP vectors
Summary:
This CL allows constant vectors of floats to be recognized as non-NaN
and non-zero in select patterns. This change makes
`matchSelectPattern` more powerful generally, but was motivated
specifically because I wanted fminnan and fmaxnan to be created for
vector versions of the scalar patterns they are created for.
Tested with check-all on all targets. A testcase in the WebAssembly
backend that tests the non-nan codepath is in an upcoming CL.
Reviewers: aheejin, dschuff
Subscribers: sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343364
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Robert Widmann [Fri, 28 Sep 2018 20:54:29 +0000 (20:54 +0000)]
[LLVM-C] Add an accessor for the "value type" of a global
Summary: Before this, there was no reasonable way to retrieve the type of a global value (most notably, a function) that was created with the C API.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343363
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Heejin Ahn [Fri, 28 Sep 2018 20:54:04 +0000 (20:54 +0000)]
[WebAssembly] Fix memory leak on WasmEHFuncInfo
Summary: WasmEHFuncInfo objects were not being properly deleted.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343362
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Eli Friedman [Fri, 28 Sep 2018 20:27:31 +0000 (20:27 +0000)]
[ARM] Fix correctness checks in promoteToConstantPool.
Correctly check for relocations in the constant to promote. And don't
allow promoting a constant multiple times.
This partially fixes https://bugs.llvm.org//show_bug.cgi?id=32780 ;
it's not a complete fix because we also need to prevent
ARMConstantIslands from cloning the constant.
(-arm-promote-constant is currently off by default, and it stays off
with this patch. I'll look into turning it on again when all the known
issues are fixed.)
Differential Revision: https://reviews.llvm.org/D51472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343361
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Eli Friedman [Fri, 28 Sep 2018 20:21:51 +0000 (20:21 +0000)]
[ARM] Use preferred alignment for constants in promoteToConstantPool.
This mostly affects IR generated by non-clang frontends because clang
generally sets the alignment of globals explicitly.
Fixes https://bugs.llvm.org//show_bug.cgi?id=32394 .
(-arm-promote-constant is currently off by default, and it stays off
with this patch. I'll look into turning it on again when all the known
issues are fixed.)
Differential Revision: https://reviews.llvm.org/D51469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343359
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Lang Hames [Fri, 28 Sep 2018 20:16:16 +0000 (20:16 +0000)]
[ORC] Narrow a cast: the block guarded by the condition only handles
GlobalVariables, not all GlobalValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343358
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Craig Topper [Fri, 28 Sep 2018 19:06:28 +0000 (19:06 +0000)]
[X86] Add test cases for failures to use narrow test with immediate instructions when a truncate is beteen the CMP and the AND and the sign flag is used.
The code in X86ISelDAGToDAG only looks through truncates if the sign flag isn't used, but that is overly restrictive. A future patch will improve this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343355
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Evandro Menezes [Fri, 28 Sep 2018 19:05:09 +0000 (19:05 +0000)]
[AArch64] Split zero cycle feature more granularly
Split the `zcz` feature into specific ones got GP and FP registers, `zcz-gp`
and `zcz-fp`, respectively, while retaining the original feature option to
mean both.
Differential revision: https://reviews.llvm.org/D52621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343354
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George Karpenkov [Fri, 28 Sep 2018 18:49:01 +0000 (18:49 +0000)]
GraphWriter: Provide an API for writing a graph into a specified file
Always generating a temporary file is not always suitable, especially for tests
Differential Revision: https://reviews.llvm.org/D52636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343351
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David Bolvansky [Fri, 28 Sep 2018 18:40:30 +0000 (18:40 +0000)]
[DAGCombiner] [NFC] Improve X div/rem 1 fold
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52661
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343349
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Chris Matthews [Fri, 28 Sep 2018 17:55:18 +0000 (17:55 +0000)]
make lit builtins a package
cat.py is not being installed when lit is installed from source. So
tests that use the internal shell fail when using cat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343347
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Andrea Di Biagio [Fri, 28 Sep 2018 17:47:09 +0000 (17:47 +0000)]
[llvm-mca] Add a test for zero-idiom VPERM2F128rr. NFC
We don't correctly model the latency and resource usage information for
zero-idiom VPERM2F128rr on Jaguar.
This is demonstrated by the incorrect numbers in the resource pressure view, and
the timeline view.
A follow up patch will fix this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343346
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whitequark [Fri, 28 Sep 2018 17:39:59 +0000 (17:39 +0000)]
[bindings/go] Add Go bindings to the Token type
Summary: This type is necessary for implementing coroutines.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: modocache, llvm-commits
Differential Revision: https://reviews.llvm.org/D47684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343345
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Luke Cheeseman [Fri, 28 Sep 2018 17:01:50 +0000 (17:01 +0000)]
Revert r343317
- asan buildbots are breaking and I need to investigate the issue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343341
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whitequark [Fri, 28 Sep 2018 16:48:47 +0000 (16:48 +0000)]
[bindings/go] Add Go bindings for inline assembly
Reviewers: harlanhaskins, whitequark, pcc
Reviewed By: pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46437
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343339
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whitequark [Fri, 28 Sep 2018 16:45:18 +0000 (16:45 +0000)]
Revert "[LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints"
This reverts commit
c4baf7c2f06ff5459c4f5998ce980346e72bff97.
Broke the bots, and should really be in Transforms/Coroutines
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343337
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whitequark [Fri, 28 Sep 2018 16:38:11 +0000 (16:38 +0000)]
[LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints
Summary: This patch adds bindings to C and Go for addCoroutinePassesToExtensionPoints, which is used to add coroutine passes to the correct locations in PassManagerBuilder.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: mehdi_amini, modocache, llvm-commits
Differential Revision: https://reviews.llvm.org/D51642
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343336
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Robert Widmann [Fri, 28 Sep 2018 16:02:26 +0000 (16:02 +0000)]
[LLVM-C] Fix broken build bots
Summary: Fix broken bots caused by the merge of D51522.
Reviewers: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343334
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Greg Bedwell [Fri, 28 Sep 2018 15:39:18 +0000 (15:39 +0000)]
[utils] Cope with the binary having a .exe extension in update_mca_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343333
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Greg Bedwell [Fri, 28 Sep 2018 15:39:09 +0000 (15:39 +0000)]
[utils] Stricter checking from update_mca_test_checks.py
If any prefixes have been specified on the RUN lines that do not end up
ever actually getting printed, raise an Error. This is either an
indication that the run lines just need cleaning up, or that something
is more fundamentally wrong with the test.
Also raise an Error if there are any blocks which cannot be checked
because they are not uniquely covered by a prefix.
Fixed up a couple of tests where the extra checking flagged up issues.
Differential Revision: https://reviews.llvm.org/D48276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343332
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Greg Bedwell [Fri, 28 Sep 2018 15:38:56 +0000 (15:38 +0000)]
[utils] Allow better identification of matching blocks in update_mca_test_checks.py
Insert empty blocks to cause the positions of matching blocks to match
across lists where possible so that later stages of the algorithm can
actually identify them as being identical.
Regenerated all tests with this change.
Differential Revision: https://reviews.llvm.org/D52560
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343331
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Robert Widmann [Fri, 28 Sep 2018 15:35:18 +0000 (15:35 +0000)]
[LLVM-C] Add more debug information accessors to GlobalObject and Instruction
Summary: Adds missing debug information accessors to GlobalObject. This puts the finishing touches on cloning debug info in the echo tests.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: aprantl, JDevlieghere, llvm-commits, harlanhaskins
Differential Revision: https://reviews.llvm.org/D51522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343330
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Sanjay Patel [Fri, 28 Sep 2018 15:24:41 +0000 (15:24 +0000)]
[InstCombine] don't propagate wider shufflevector arguments to predecessors
InstCombine would propagate shufflevector insts that had wider output vectors onto
predecessors, which would sometimes push undef's onto the divisor of a div/rem and
result in bad codegen.
I've fixed this by just banning propagating shufflevector back if the result of
the shufflevector is wider than the input vectors.
Patch by: @sheredom (Neil Henning)
Differential Revision: https://reviews.llvm.org/D52548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343329
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Sanjay Patel [Fri, 28 Sep 2018 15:20:06 +0000 (15:20 +0000)]
[InstCombine] adjust shuffle undef propagation tests; NFC
These are the updated baseline tests for D52548 -
I'm putting the tests next to the tests where the transform
functions as expected, so we can see the intended/unintended
consequences.
Patch by: @sheredom (Neil Henning)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343328
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Lang Hames [Fri, 28 Sep 2018 15:13:41 +0000 (15:13 +0000)]
[ORC] Remove some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343327
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Lang Hames [Fri, 28 Sep 2018 15:09:14 +0000 (15:09 +0000)]
[ORC] Fix the unit tests that were broken by r343323.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343326
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Aditya Nandakumar [Fri, 28 Sep 2018 15:08:49 +0000 (15:08 +0000)]
[GISel]: Remove an incorrect assert in CallLowering
https://reviews.llvm.org/D51147
Asserting if any extend of vectors should be up to the target's
legalizer/target specific code not in CallLowering.
reviewed by : dsanders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343325
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Lang Hames [Fri, 28 Sep 2018 15:03:11 +0000 (15:03 +0000)]
[ORC] Improve debugging output for ORC.
(1) Print debugging output under a session lock to avoid garbled messages when
compiling on multiple threads.
(2) Name MaterializationUnits, add an ostream operator for them, and so they can
be easily referenced in debugging output, and have that ostream operator
optionally print code/data/hidden symbols provided by that materialization unit
based on command line options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343323
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Simon Pilgrim [Fri, 28 Sep 2018 14:20:42 +0000 (14:20 +0000)]
[X86][Btver2] PSUBS/PSUBUS instructions are zero-idioms
Noticed during llvm-exegesis tests, the PSUBS/PSUBUS instructions have the same zero-idiom behaviour to PSUB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343321
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Simon Pilgrim [Fri, 28 Sep 2018 13:53:11 +0000 (13:53 +0000)]
[X86][Btver2] Add zero-idiom tests for PSUBS/PSUBUS instructions
Noticed during llvm-exegesis tests, the PSUBS/PSUBUS instructions have the same zero-idiom behaviour to PSUB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343319
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Luke Cheeseman [Fri, 28 Sep 2018 13:37:27 +0000 (13:37 +0000)]
Reapply changes reverted by r343235
- Add fix so that all code paths that create DWARFContext
with an ObjectFile initialise the target architecture in the context
- Add an assert that the Arch is known in the Dwarf CallFrameString method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343317
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Sven van Haastregt [Fri, 28 Sep 2018 13:31:55 +0000 (13:31 +0000)]
Fix and modernize StringMatcher comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343316
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Petar Jovanovic [Fri, 28 Sep 2018 13:28:47 +0000 (13:28 +0000)]
[MIPS GlobalISel] Lower i64 arguments
Lower integer arguments larger then 32 bits for MIPS32.
setMostSignificantFirst is used in order for G_UNMERGE_VALUES and
G_MERGE_VALUES to always hold registers in same order, regardless of
endianness.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D52409
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343315
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Simon Pilgrim [Fri, 28 Sep 2018 13:19:22 +0000 (13:19 +0000)]
[X86][Btver2] CVTSS2I/CVTSD2I - add missing JFPU0 pipe
We issue JFPU1->JSTC then JFPU0->JFPA then -> JALU0 (integer pipe)
Match AMD Fam16h SOG + llvm-exegesis tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343314
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Jonas Devlieghere [Fri, 28 Sep 2018 12:08:51 +0000 (12:08 +0000)]
Split invocations in CodeGen/X86/cpus.ll among multiple tests. (NFC)
On GreenDragon `CodeGen/X86/cpus.ll` is timing out on the bot with Asan
and UBSan enabled. With the same configuration on my machine, the test
passes but takes more than 3 minutes to do so. I could increase the
timeout, but I believe it makes more sense to split up the test because
it allows for more parallelism.
Differential revision: https://reviews.llvm.org/D52603
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343313
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Andrea Di Biagio [Fri, 28 Sep 2018 10:47:24 +0000 (10:47 +0000)]
[llvm-mca] Remove redundant namespace prefixes. NFC
We are already "using" namespace llvm in all the files modified by this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343312
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Simon Pilgrim [Fri, 28 Sep 2018 10:26:48 +0000 (10:26 +0000)]
[X86][Btver2] Fix BSF/BSR schedule
Double throughput to account for 2 pipes + fix BSF's latency/uop counts
Match AMD Fam16h SOG + llvm-exegesis tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343311
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Florian Hahn [Fri, 28 Sep 2018 10:20:07 +0000 (10:20 +0000)]
Revert r343308: [LoopInterchange] Turn into a loop pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343310
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Florian Hahn [Fri, 28 Sep 2018 09:45:50 +0000 (09:45 +0000)]
[LoopInterchange] Turn into a loop pass.
This patch turns LoopInterchange into a loop pass. It now only
considers top-level loops and tries to move the innermost loop to the
optimal position within the loop nest. By only looking at top-level
loops, we might miss a few opportunities the function pass would get
(e.g. if we have a loop nest of 3 loops, in the function pass
we might process loops at level 1 and 2 and move the inner most loop to
level 1, and then we process loops at levels 0, 1, 2 and interchange
again, because we now have a different inner loop). But I think it would
be better to handle such cases by picking the best inner loop from the
start and avoid re-visiting the same loops again.
The biggest advantage of it being a function pass is that it interacts
nicely with the other loop passes. Without this patch, there are some
performance regressions on AArch64 with loop interchanging enabled,
where no loops were interchanged, but we missed out on some other loop
optimizations.
It also removes the SimplifyCFG run. We are just changing branches, so
the CFG should not be more complicated, besides the additional 'unique'
preheaders this pass might create.
Reviewers: chandlerc, efriedma, mcrosier, javed.absar, xbolva00
Reviewed By: xbolva00
Differential Revision: https://reviews.llvm.org/D51702
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343308
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Andrea Di Biagio [Fri, 28 Sep 2018 09:42:06 +0000 (09:42 +0000)]
[llvm-mca] Teach how to track zero registers in class RegisterFile.
This change is in preparation for a future work on improving support for
optimizable register moves. We already know if a write is from a zero-idiom, so
we can propagate that bit of information to the PRF. We use an APInt mask to
identify registers that are set to zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343307
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Peter Smith [Fri, 28 Sep 2018 09:04:27 +0000 (09:04 +0000)]
[ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k
The ARMTargetParser.def contains an entry for arm1176j-s which is the
default for the ArmV6K architecture. This cpu does not exist, there are
only arm1176jz-s and arm1176jzf-s and they are both architecture ArmV6KZ.
The only CPUs that are actually ArmV6K are the mpcore, mpcore_nofpu and
later revisions of the arm1136 family r1px (which we don't have a table
entry for).
This patch removes the arm1176j-s and makes mpcore the default for armv6k.
Differential Revision: https://reviews.llvm.org/D52594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343303
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David Spickett [Fri, 28 Sep 2018 08:55:19 +0000 (08:55 +0000)]
[ARM] Allow execute only code on Cortex-m23
The NoMovt feature prevents the use of MOVW/MOVT
instructions on Cortex-M23 for performance reasons.
These instructions are required for execute only code
so NoMovt should be disabled when that option is enabled.
Differential Revision: https://reviews.llvm.org/D52551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343302
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David Spickett [Fri, 28 Sep 2018 08:45:28 +0000 (08:45 +0000)]
Remove extra whitespace. NFC. (test commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343301
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Oliver Stannard [Fri, 28 Sep 2018 08:27:56 +0000 (08:27 +0000)]
[ARM][v8.5A] Add speculation barriers SSBB and PSSBB
This adds two new barrier instructions which can be used to restrict
speculative execution of load instructions.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52484
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343300
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Simon Pilgrim [Fri, 28 Sep 2018 08:21:39 +0000 (08:21 +0000)]
[X86][BtVer2] Fix PHMINPOS schedule resources typo
PHMINPOS can run on either JFPU pipe
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343299
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Hiroshi Inoue [Fri, 28 Sep 2018 05:27:32 +0000 (05:27 +0000)]
[CodeGen] fix broken successor probability in MBB dump
When printing successor probabilities for a MBB, a human readable value is sometimes shown as 200.0%.
The human readable output is based on getProbabilityIterator, which returns 0xFFFFFFFF for getNumerator() and 0x80000000 for getDenominator() for unknown BranchProbability.
By using getSuccProbability as we do for the non-human readable part, we can avoid this problem.
Differential Revision: https://reviews.llvm.org/D52605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343297
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Owen Rodley [Fri, 28 Sep 2018 04:51:45 +0000 (04:51 +0000)]
Test commit. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343296
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Craig Topper [Fri, 28 Sep 2018 03:35:37 +0000 (03:35 +0000)]
[ScalarizeMaskedMemIntrin] Use MinAlign to calculate alignment for the scalar load/stores to handle element types that are byte-sized but not powers of 2.
This pass doesn't handle non-byte sized types correctly at all, but at least we can make byte sized types work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343294
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Aaron Smith [Fri, 28 Sep 2018 02:32:07 +0000 (02:32 +0000)]
[pdb] Simplify the code by replacing a few string conversions with calls to invokeBstrMethod()
Reviewers: aleksandr.urakov, zturner, llvm-commits
Reviewed By: zturner
Differential Revision: https://reviews.llvm.org/D52624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343291
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Tom Stellard [Fri, 28 Sep 2018 02:30:42 +0000 (02:30 +0000)]
merge-request.sh: Add 7.0 metabug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343290
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Lang Hames [Fri, 28 Sep 2018 01:41:33 +0000 (01:41 +0000)]
[ORC] clang-format the ThreadSafeModule code.
Evidently I forgot to do this before committing r343055.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343288
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Lang Hames [Fri, 28 Sep 2018 01:41:33 +0000 (01:41 +0000)]
[ORC] Add a const version of ThreadSafeModule::getModule().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343287
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Lang Hames [Fri, 28 Sep 2018 01:41:29 +0000 (01:41 +0000)]
[ORC] Lock ThreadSafeContext during module destruction in ThreadSafeModule's
move constructor.
This is basically the same fix as r343261, but applied to the move constructor:
Failure to lock the context during module destruction can lead to data races if
other threads are operating on the context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343286
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Craig Topper [Fri, 28 Sep 2018 01:06:13 +0000 (01:06 +0000)]
[ScalarizeMaskedMemIntrin] Fix the alignment calculation for the scalar stores of a masked store expansion.
It should be the minimum of the original alignment and the scalar size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343284
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Craig Topper [Fri, 28 Sep 2018 01:06:09 +0000 (01:06 +0000)]
[ScalarizeMaskedMemIntrin] Add test cases for masked store expansion. Increase alignment of one of the masked load test cases.
The masked store alignment is being miscalculated, but masked load is correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343283
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Craig Topper [Thu, 27 Sep 2018 23:25:10 +0000 (23:25 +0000)]
[X86] Add the test case from PR38986.
The assembly for this test should be optimal now after changes to the ScalarizeMaskedMemIntrin patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343281
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Craig Topper [Thu, 27 Sep 2018 22:31:42 +0000 (22:31 +0000)]
[ScalarizeMaskedMemIntrin] Ensure the mask is a vector of ConstantInts before generating the expansion without control flow.
Its possible the mask itself or one of the elements is a ConstantExpr and we shouldn't optimize in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343278
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Craig Topper [Thu, 27 Sep 2018 22:31:40 +0000 (22:31 +0000)]
[ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast checked by an assert. Consistently make use of the element type variable we already have. NFCI
cast will take care of asserting internally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343277
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Derek Schuff [Thu, 27 Sep 2018 22:20:33 +0000 (22:20 +0000)]
WebAssembly: Rename GetSignature to GetLibcallSignature [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343275
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Craig Topper [Thu, 27 Sep 2018 21:28:59 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] When expanding masked gathers, start with the passthru vector and insert the new load results into it.
Previously we started with undef and did a final merge with the passthru at the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343273
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Craig Topper [Thu, 27 Sep 2018 21:28:55 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] Add some IR only test cases for masked gather expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343272
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Craig Topper [Thu, 27 Sep 2018 21:28:52 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] When expanding masked loads, start with the passthru value and insert each conditional load result over their element.
Previously we started with undef and did one final merge at the end with a select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343271
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Craig Topper [Thu, 27 Sep 2018 21:28:46 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] Handle the case where the mask is an all zero vector.
This shouldn't really happen in practice I hope, but we tried to handle other constant cases. We missed this one because we checked for ConstantVector without realizing that zero becomes ConstantAggregateZero instead.
So instead just check for Constant and use getAggregateElement which will do the dirty work for us.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343270
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Craig Topper [Thu, 27 Sep 2018 21:28:43 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] Add dedicated IR only tests for masked load expansion so I can begin making modifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343269
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Craig Topper [Thu, 27 Sep 2018 21:28:41 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] Remove some temporary variables that are only used by a single if condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343268
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Craig Topper [Thu, 27 Sep 2018 21:28:39 +0000 (21:28 +0000)]
[ScalarizeMaskedMemIntrin] Cleanup comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343267
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Lang Hames [Thu, 27 Sep 2018 21:13:07 +0000 (21:13 +0000)]
[ORC] Add definition for IRLayer::setCloneToNewContextOnEmit, use it to set the
flag to true in LLJIT when running in multithreaded mode.
The IRLayer::setCloneToNewContextOnEmit method sets a flag within the IRLayer
that causes modules added to that layer to be moved to a new context (by
serializing to/from a memory buffer) when they are emitted. This allows modules
that were all loaded on the same context to be compiled in parallel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343266
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Konstantin Zhuravlyov [Thu, 27 Sep 2018 20:49:00 +0000 (20:49 +0000)]
AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343264
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Lang Hames [Thu, 27 Sep 2018 20:36:10 +0000 (20:36 +0000)]
[ORC] Make LocalIndirectStubsManager's operations thread-safe.
Locks stub management operations and switches to atomic update for stub
pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343262
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Lang Hames [Thu, 27 Sep 2018 20:36:08 +0000 (20:36 +0000)]
[ORC] Lock ThreadSafeContext during Module destructing in ThreadSafeModule.
Failure to lock the context can lead to data races if other threads are
operating on other ThreadSafeModules that share the same context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343261
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Konstantin Zhuravlyov [Thu, 27 Sep 2018 19:46:41 +0000 (19:46 +0000)]
AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343259
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Lang Hames [Thu, 27 Sep 2018 19:27:20 +0000 (19:27 +0000)]
[ORC] Coalesce all of ORC's symbol renaming / linkage-promotion utilities into
one SymbolLinkagePromoter utility.
SymbolLinkagePromoter renames anonymous and private symbols, and bumps all
linkages to at least global/hidden-visibility. Modules whose symbols have been
promoted by this utility can be decomposed into sub-modules without introducing
link errors. This is used by the CompileOnDemandLayer to extract single-function
modules for lazy compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343257
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