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Jessica Zhang [Fri, 9 Jun 2023 22:57:13 +0000 (15:57 -0700)]
msm/drm/dsi: Round up DSC hdisplay calculation
Currently, when compression is enabled, hdisplay is reduced via integer
division. This causes issues for modes where the original hdisplay is
not a multiple of 3.
To fix this, use DIV_ROUND_UP to divide hdisplay.
Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Fixes:
08802f515c3cf ("drm/msm/dsi: Add support for DSC configuration")
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/541970/
Link: https://lore.kernel.org/r/20230405-add-dsc-support-v6-1-95eab864d1b6@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Abhinav Kumar [Thu, 25 May 2023 17:40:57 +0000 (10:40 -0700)]
drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag information. Each display compression engine (DCE) contains
dual DSC encoders so both share same base address but with its own
different sub block address.
changes in v4:
-- delete DPU_DSC_HW_REV_1_1
-- re arrange sc8280xp_dsc[]
changes in v4:
-- fix checkpatch warning
changes in v10:
-- remove hard slice from commit text
-- replace DPU_DSC_NATIVE_422_EN with DPU_DSC_NATIVE_42x_EN
-- change DSC_BLK_1_2 .len from 0x100 to 0x29c
changes in v11:
-- remove comment at DSC_BLK_1_2 marco
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/539507/
Link: https://lore.kernel.org/r/1685036458-22683-10-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Kuogee Hsieh [Thu, 25 May 2023 17:40:54 +0000 (10:40 -0700)]
drm/msm/dpu: add support for DSC encoder v1.2 engine
Add support for DSC 1.2 by providing the necessary hooks to program
the DPU DSC 1.2 encoder.
Changes in v3:
-- fixed kernel test rebot report that "__iomem *off" is declared but not
used at dpu_hw_dsc_config_1_2()
-- unrolling thresh loops
Changes in v4:
-- delete DPU_DSC_HW_REV_1_1
-- delete off and used real register name directly
Changes in v7:
-- replace offset with sblk->enc.base
-- replace ss with slice
Changes in v8:
-- fixed checkpatch warning
Changes in v9:
-- replaced __dsc_calc_ob_max_addr() with __dsc_calc_output_buf_max_addr()
-- replaced variable num_ss with num_softslice
-- remove inline from function declaration
changes in v10:
-- rewording text of changes in v9
-- replace DPU_DSC_NATIVE_422_EN with DPU_DSC_NATIVE_42x_EN
-- replace drm_dsc_calculate_flatness_det_thresh() with drm_dsc_flatness_det_thresh()
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/539500/
Link: https://lore.kernel.org/r/1685036458-22683-7-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:22 +0000 (10:45 -0700)]
drm/msm/dsi: update hdisplay calculation for dsi_timing_setup
Currently, hdisplay is being divided by 3 for DSC. However, this
calculation only works for cases where BPP = 8.
Update hdisplay calculation to be bytes_per_line / 3, so that it
accounts for cases where BPP != 8.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539271/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-9-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:21 +0000 (10:45 -0700)]
drm/msm/dsi: Use MSM and DRM DSC helper methods
Use MSM and DRM DSC helper methods to configure DSC for DSI.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539274/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-8-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:20 +0000 (10:45 -0700)]
drm/msm/dpu: Fix slice_last_group_size calculation
Correct the math for slice_last_group_size so that it matches the
calculations downstream.
Fixes:
c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539269/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-7-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:19 +0000 (10:45 -0700)]
drm/msm/dpu: Use fixed DRM DSC helper for det_thresh_flatness
The current dpu_hw_dsc calculation for det_thresh_flatness does not
match the downstream calculation or the DSC spec.
Use the DRM DSC helper for det_thresh_flatness to match downstream
implementation and the DSC spec.
Fixes:
c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539275/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-6-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:18 +0000 (10:45 -0700)]
drm/msm: Add MSM-specific DSC helper methods
Introduce MSM-specific DSC helper methods, as some calculations are
common between DP and DSC.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539272/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-5-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dmitry Baryshkov [Wed, 24 May 2023 17:45:17 +0000 (10:45 -0700)]
drm/msm/dsi: use DRM DSC helpers for DSC setup
Use new DRM DSC helpers to setup DSI DSC configuration. The
initial_scale_value needs to be adjusted according to the standard, but
this is a separate change.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539276/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-4-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:16 +0000 (10:45 -0700)]
drm/display/dsc: Add drm_dsc_get_bpp_int helper
Add helper to get the integer value of drm_dsc_config.bits_per_pixel
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539268/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-3-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dmitry Baryshkov [Wed, 24 May 2023 17:45:15 +0000 (10:45 -0700)]
drm/display/dsc: add helper to set semi-const parameters
Add a helper setting config values which are typically constant across
operating modes (table E-4 of the standard) and mux_word_size (which is
a const according to 3.5.2).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539280/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-2-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Jessica Zhang [Wed, 24 May 2023 17:45:14 +0000 (10:45 -0700)]
drm/display/dsc: Add flatness and initial scale value calculations
Add helpers to calculate det_thresh_flatness and initial_scale_value as
these calculations are defined within the DSC spec.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/539282/
Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-1-bafc7be95691@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dmitry Baryshkov [Mon, 12 Jun 2023 18:25:34 +0000 (21:25 +0300)]
drm/msm/dpu/catalog: define DSPP blocks found on sdm845
Add definitions of DSPP blocks present on the sdm845 platform. This
should enable color-management on sdm845-bassed devices.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Sumit Semwal <sumit.semwal@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542142/
Link: https://lore.kernel.org/r/20230612182534.3345805-2-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Mon, 12 Jun 2023 18:25:33 +0000 (21:25 +0300)]
drm/msm/dpu: do not enable color-management if DSPPs are not available
We can not support color management without DSPP blocks being provided
in the HW catalog. Do not enable color management for CRTCs if num_dspps
is 0.
Fixes:
4259ff7ae509 ("drm/msm/dpu: add support for pcc color block in dpu driver")
Reported-by: Yongqin Liu <yongqin.liu@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Sumit Semwal <sumit.semwal@linaro.org>
Tested-by: Yongqin Liu <yongqin.liu@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542141/
Link: https://lore.kernel.org/r/20230612182534.3345805-1-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Mon, 12 Jun 2023 18:25:27 +0000 (21:25 +0300)]
drm/msm/adreno: make adreno_is_a690()'s argument const
Change adreno_is_a690() prototype to accept the const struct adreno_gpu
pointer instead of a non-const one. This fixes the following warning:
In file included from drivers/gpu/drm/msm/msm_drv.c:33:
drivers/gpu/drm/msm/adreno/adreno_gpu.h: In function ‘adreno_is_a660_family’:
drivers/gpu/drm/msm/adreno/adreno_gpu.h:303:54: warning: passing argument 1 of ‘adreno_is_a690’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
303 | return adreno_is_a660(gpu) || adreno_is_a690(gpu) || adreno_is_7c3(gpu);
Fixes:
1b90e8f8879c ("drm/msm/adreno: change adreno_is_* functions to accept const argument")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/542138/
Link: https://lore.kernel.org/r/20230612182527.3345786-1-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Mon, 12 Jun 2023 21:20:40 +0000 (00:20 +0300)]
Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base
Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patches depend on these helpers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dmitry Baryshkov [Tue, 11 Apr 2023 16:19:03 +0000 (19:19 +0300)]
drm/msm/adreno: change adreno_is_* functions to accept const argument
All adreno_is_*() functions do not modify their argument in any way, so
they can be changed to accept const struct adreno_gpu pointer.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/531706/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Dmitry Baryshkov [Tue, 11 Apr 2023 16:19:02 +0000 (19:19 +0300)]
drm/msm/adreno: warn if chip revn is verified before being set
The commit
010c8bbad2cb ("drm: msm: adreno: Disable preemption on Adreno
510") tried to check GPU's revn before revn being set. Add WARN_ON_ONCE
to prevent such bugs from happening again. A separate helper is
necessary so that the warning is displayed really just once instead of
being displayed for each of comparisons.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/531705/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Dmitry Baryshkov [Sun, 9 Apr 2023 01:13:29 +0000 (04:13 +0300)]
drm/msm/a5xx: really check for A510 in a5xx_gpu_init
The commit
010c8bbad2cb ("drm: msm: adreno: Disable preemption on Adreno
510") added special handling for a510 (this SKU doesn't seem to support
preemption, so the driver should clamp nr_rings to 1). However the
gpu->revn is not yet set (it is set later, in adreno_gpu_init()) and
thus the condition is always false. Check config->rev instead.
Fixes:
010c8bbad2cb ("drm: msm: adreno: Disable preemption on Adreno 510")
Reported-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Adam Skladowski <a39.skl@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/531511/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Rob Clark [Sat, 3 Jun 2023 16:43:56 +0000 (09:43 -0700)]
drm/msm/a6xx: Fix a690 CP_PROTECT settings
Allow access to CP_PERFCTR_CP_SEL[n] and RB_PERFCTR_RB_SEL which are
used by fdperf and pps-provider (perfetto).
Signed-off-by: Rob Clark <robdclark@chromium.org>
Bjorn Andersson [Wed, 31 May 2023 03:09:43 +0000 (20:09 -0700)]
drm/msm/adreno: Add Adreno A690 support
Introduce support for the Adreno A690, found in Qualcomm SC8280XP.
Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/540335/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Rob Clark [Mon, 17 Apr 2023 22:55:10 +0000 (15:55 -0700)]
drm/msm: Move cmdstream dumping out of sched kthread
This is something that can block for arbitrary amounts of time as
userspace consumes from the FIFO. So we don't really want this to
be in the fence signaling path.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/532617/
Dmitry Baryshkov [Mon, 10 Apr 2023 18:52:26 +0000 (21:52 +0300)]
drm/msm/a6xx: don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA with coherent SMMU
If the Adreno SMMU is dma-coherent, allocation will fail unless we
disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk for the
coherent SMMUs (like we have on sm8350 platform).
Fixes:
54af0ceb7595 ("arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes")
Reported-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM8450 HDK
Patchwork: https://patchwork.freedesktop.org/patch/531562/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Dmitry Baryshkov [Wed, 29 Mar 2023 00:55:29 +0000 (03:55 +0300)]
drm/msm: drop unused ring variable in msm_ioctl_gem_submit()
The variable ring is not used by msm_parse_deps() and
msm_ioctl_gem_submit() and thus can be dropped.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/529340/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Dmitry Baryshkov [Mon, 10 Apr 2023 22:40:34 +0000 (01:40 +0300)]
drm/msm/adreno: fix sparse warnings in a6xx code
Sparse reports plenty of warnings against the a6xx code because of
a6xx_gmu::mmio and a6xx_gmu::rscc members. For some reason they were
defined as __iomem pointers rather than pointers to __iomem memory.
Correct the __iomem attribute.
Fixes:
02ef80c54e7c ("drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650")
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/oe-kbuild-all/202304070550.NrbhJCvP-lkp@intel.com/
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/531583/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Dmitry Baryshkov [Sat, 10 Jun 2023 00:56:52 +0000 (03:56 +0300)]
Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', 'msm-next-lumag-dp', 'msm-next-lumag-dsi' and 'msm-next-lumag-mdp5' into msm-next-lumag
Core:
- Add Marijn Suijten as drm/msm reviewer
- Adreno A660 bindings
- SM8350 MDSS bindings fix
DP:
- Removed obsolete USB-PD remains
- Documented DP compatible string for sm8550 platform
DPU:
- Added support for DPU on sm6350 and sm6375 platforms
- Implemented tearcheck support to support vsync on SM150 and newer platforms
- Enabled missing features (DSPP, DSC, split display) on sc8180x, sc8280xp, sm8450
- Enabled writeback on sc7280
- Enabled DSC on msm8998
- Native HDMI output support
- Dropped unused features: regdma, GC, IGC
- Fixed the DSC flush operations
- Simplified QoS handling, removing obsolete and unused features and merging
SSPP and WB code paths
- Reworked dpu_encoder initialisation path
DSI:
- Added support for DSI and 28nm DSI PHY on MSM8226 platform
- Added support for DSI on sm6350 and sm6375 platforms
- Dropped powerup quirks in favour of using pre_enable_prev_first for
downstream bridges
- Fixed 14nm DSI PHY programming
MDP5:
- Added support for display controller on MSM8226 platform
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dave Airlie [Fri, 9 Jun 2023 06:43:35 +0000 (16:43 +1000)]
Merge tag 'drm-intel-gt-next-2023-06-08' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes:
- I915_GEM_CREATE_EXT_SET_PAT for Mesa on Meteorlake.
Driver Changes:
Fixes/improvements/new stuff:
- Use large rings for compute contexts (Chris Wilson)
- Better logging/debug of unexpected GuC communication issues (Michal Wajdeczko)
- Clear out entire reports after reading if not power of 2 size (Ashutosh Dixit)
- Limit lmem allocation size to succeed on SmallBars (Andrzej Hajda)
- perf/OA capture robustness improvements on DG2 (Umesh Nerlige Ramappa)
- Fix error code in intel_gsc_uc_heci_cmd_submit_nonpriv() (Dan Carpenter)
Future platform enablement:
- Add workaround
14016712196 (Tejas Upadhyay)
- HuC loading for MTL (Daniele Ceraolo Spurio)
- Allow user to set cache at BO creation (Fei Yang)
Miscellaneous:
- Use system include style for drm headers (Jani Nikula)
- Drop legacy CTB definitions (Michal Wajdeczko)
- Turn off the timer to sample frequencies when GT is parked (Ashutosh Dixit)
- Make PMU sample array two-dimensional (Ashutosh Dixit)
- Use the correct error value when kernel_context() fails (Andi Shyti)
- Fix second parameter type of pre-gen8 pte_encode callbacks (Nathan Chancellor)
- Fix parameter in gmch_ggtt_insert_{entries, page}() (Nathan Chancellor)
- Fix size_t format specifier in gsccs_send_message() (Nathan Chancellor)
- Use the fdinfo helper (Tvrtko Ursulin)
- Add some missing error propagation (Tvrtko Ursulin)
- Reduce I915_MAX_GT to 2 (Matt Atwood)
- Rename I915_PMU_MAX_GTS to I915_PMU_MAX_GT (Matt Atwood)
- Remove some obsolete definitions (John Harrison)
Merges:
- Merge drm/drm-next into drm-intel-gt-next (Tvrtko Ursulin)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZIH09fqe5v5yArsu@tursulin-desk
Dave Airlie [Fri, 9 Jun 2023 01:46:10 +0000 (11:46 +1000)]
Merge tag 'drm-intel-next-2023-06-05' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
drm/i915 features for v6.5:
Features and functionality:
- Meteorlake (MTL) display enabling (Mika, Radhakrishna, José, Ankit, Clint,
Gustavo, Imre, Anusha, Juha-Pekka, Matt)
- Allow VRR to be toggled during fastsets (Ville)
- Allow arbitrary refresh rates with VRR eDP panels (Ville)
- Support async flips on linear buffers on display ver 12+ (Arun)
- New debugfs for display clock frequencies (Bhanuprakash)
- Taint kernel when force probing unsupported devices (Jani)
- Expose CRTC CTM property on ILK/SNB/VLV (Ville)
DRM subsystem changes:
- EDID changes to support further conversion to struct drm_edid (Jani)
- Move i915 DSC parameter code to common DRM helpers (Dmitry Baryshkov)
Refactoring and cleanups:
- CSC color refactoring (Ville)
- VRR cleanups (Ville)
- Finish i915 conversion to struct drm_edid (Jani)
- Start high level display driver file (Jani)
- Hotplug refactoring (Ville)
- Misc display refactoring and cleanups (Jani, Ville)
- Use device based logging for state checker warnings (Jani)
- Split out hotplug and display irq handling (Jani)
- Move display device info and probe under display/ (Matt)
- HDCP cleanups (Suraj)
- Use localized warning ignores instead of per file (Jani)
- Remove superfluous enum i915_drm_suspend_mode (Maarten)
- PSR, pfit, scaler and chicken register definition cleanups (Ville)
- Constify pointers to hwmon_channel_info (Krzysztof Kozlowski)
- Replace all non-returning strlcpy with strscpy (Azeem Shaikh)
- Refactor VBT aux channel and DDC pin mapping (Ville)
- Include cleanups (Jani)
Fixes:
- Fix modeset locking issue in DP MST HDCP (Suraj)
- Fix disconnected Type-C/DP-alt disable at probe (Imre)
- Fix HDMI PCON DSC usage and color conversions (Ankit)
- Fix g4x HDMI infoframe/audio transmission port usage (Ville)
- Avoid use-after-free when DP connector init fails (Maarten)
- Fix voltage level for 480 MHz CDCLK (Chaitanya)
- Check HPD live state during eDP probe (Ville)
- Fix active port PLL selection for secondary MST streams (Imre)
- Check pipe source size when using SKL+ scalers (Ville)
- Fix MIPI DSI sleep sequences (Hans de Goede)
- Fix DPCD register write order to match 128b/132b requirement (Arun)
- Increase AUX timeout for Type-C (Suraj)
- Communicate display power demands to pcode (Stan)
- Fix potential division by zero in DSC compute config (Nikita Zhandarovich)
- Fix fast wake AUX sync length (Jouni)
- Fix potential oops on intel_get_crtc_new_encoder() (Ville)
Merges:
- drm-next backmerges (Rodrigo, Jani)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87zg5eat32.fsf@intel.com
Dave Airlie [Fri, 9 Jun 2023 01:42:02 +0000 (11:42 +1000)]
Merge tag 'drm-misc-next-2023-06-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v6.5:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
Driver Changes:
* bridge
* imx: Fix module linking
* tc358762: Support reset GPIO
* meson
* Add support for MIPI DSI displays; plus fixes and DT bindings
* panel
* Add Support for Rocktech RK043FN48H; plus DT bindings
* Add support for Starry himax83102-j02; plus DT bindings
* Add support for Starry ili9882t; plus DT bindings
* virtio
* Support sync-object UAPI
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230607085644.GA12673@linux-uq9g
Dave Airlie [Fri, 9 Jun 2023 01:30:37 +0000 (11:30 +1000)]
Merge tag 'drm-habanalabs-next-2023-06-08' of https://git./linux/kernel/git/ogabbay/linux into drm-next
This tag contains additional habanalabs driver changes for v6.5:
- uAPI changes:
- Return 0 when user queries if there was a h/w or f/w error and no such error happened.
Previously we returned an error in such case.
- New features and improvements:
- Add pci health check when we lose connection with the firmware. This can be used to
distinguish between pci link down and firmware getting stuck.
- Add more info to the error print when TPC interrupt occur.
- Reduce amount of code under mutex in the command submission of signal event.
- Firmware related fixes:
- Fixes to the handshake protocol during f/w initialization.
- Display information that the f/w sends us when encountering a DMA error.
- Do soft-reset using a message sent to firmware instead of writing to MMIO.
- Prepare generic code to extract f/w version numbers.
- Bug fixes and code cleanups. Notable fixes are:
- Unsecure certain TPC registers that the user should access.
- Fix handling of QMAN errors
- Fix memory leak when recording errors (to later pass them to the user)
- Multiple fixes to razwi interrupt handling code
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Oded Gabbay <ogabbay@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230608103043.GA2699019@ogabbay-vm-u20.habana-labs.com
Dave Airlie [Fri, 9 Jun 2023 01:16:54 +0000 (11:16 +1000)]
Merge tag 'drm-next-
20230529' of git://git./linux/kernel/git/pinchartl/linux into drm-next
Renesas DRM/KMS drivers:
- Group drivers in renesas subdirectory to prepare for new platform
- Drop deprecated R-Car H3 ES1.x support
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230602111504.GA24855@pendragon.ideasonboard.com
Dmitry Baryshkov [Mon, 10 Apr 2023 16:59:08 +0000 (19:59 +0300)]
drm/msm/a6xx: initialize GMU mutex earlier
Move GMU mutex initialization earlier to make sure that it is always
initialized. a6xx_destroy can be called from ther failure path before
GMU initialization.
This fixes the following backtrace:
------------[ cut here ]------------
DEBUG_LOCKS_WARN_ON(lock->magic != lock)
WARNING: CPU: 0 PID: 58 at kernel/locking/mutex.c:582 __mutex_lock+0x1ec/0x3d0
Modules linked in:
CPU: 0 PID: 58 Comm: kworker/u16:1 Not tainted
6.3.0-rc5-00155-g187c06436519 #565
Hardware name: Qualcomm Technologies, Inc. SM8350 HDK (DT)
Workqueue: events_unbound deferred_probe_work_func
pstate:
60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : __mutex_lock+0x1ec/0x3d0
lr : __mutex_lock+0x1ec/0x3d0
sp :
ffff800008993620
x29:
ffff800008993620 x28:
0000000000000002 x27:
ffff47b253c52800
x26:
0000000001000606 x25:
ffff47b240bb2810 x24:
fffffffffffffff4
x23:
0000000000000000 x22:
ffffc38bba15ac14 x21:
0000000000000002
x20:
ffff800008993690 x19:
ffff47b2430cc668 x18:
fffffffffffe98f0
x17:
6f74616c75676572 x16:
20796d6d75642067 x15:
0000000000000038
x14:
0000000000000000 x13:
ffffc38bbba050b8 x12:
0000000000000666
x11:
0000000000000222 x10:
ffffc38bbba603e8 x9 :
ffffc38bbba050b8
x8 :
00000000ffffefff x7 :
ffffc38bbba5d0b8 x6 :
0000000000000222
x5 :
000000000000bff4 x4 :
40000000fffff222 x3 :
0000000000000000
x2 :
0000000000000000 x1 :
0000000000000000 x0 :
ffff47b240cb1880
Call trace:
__mutex_lock+0x1ec/0x3d0
mutex_lock_nested+0x2c/0x38
a6xx_destroy+0xa0/0x138
a6xx_gpu_init+0x41c/0x618
adreno_bind+0x188/0x290
component_bind_all+0x118/0x248
msm_drm_bind+0x1c0/0x670
try_to_bring_up_aggregate_device+0x164/0x1d0
__component_add+0xa8/0x16c
component_add+0x14/0x20
dsi_dev_attach+0x20/0x2c
dsi_host_attach+0x9c/0x144
devm_mipi_dsi_attach+0x34/0xac
lt9611uxc_attach_dsi.isra.0+0x84/0xfc
lt9611uxc_probe+0x5b8/0x67c
i2c_device_probe+0x1ac/0x358
really_probe+0x148/0x2ac
__driver_probe_device+0x78/0xe0
driver_probe_device+0x3c/0x160
__device_attach_driver+0xb8/0x138
bus_for_each_drv+0x84/0xe0
__device_attach+0x9c/0x188
device_initial_probe+0x14/0x20
bus_probe_device+0xac/0xb0
deferred_probe_work_func+0x8c/0xc8
process_one_work+0x2bc/0x594
worker_thread+0x228/0x438
kthread+0x108/0x10c
ret_from_fork+0x10/0x20
irq event stamp: 299345
hardirqs last enabled at (299345): [<
ffffc38bb9ba61e4>] put_cpu_partial+0x1c8/0x22c
hardirqs last disabled at (299344): [<
ffffc38bb9ba61dc>] put_cpu_partial+0x1c0/0x22c
softirqs last enabled at (296752): [<
ffffc38bb9890434>] _stext+0x434/0x4e8
softirqs last disabled at (296741): [<
ffffc38bb989669c>] ____do_softirq+0x10/0x1c
---[ end trace
0000000000000000 ]---
Fixes:
4cd15a3e8b36 ("drm/msm/a6xx: Make GPU destroy a bit safer")
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/531540/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Kuogee Hsieh [Tue, 23 May 2023 21:52:36 +0000 (14:52 -0700)]
drm/msm/dp: enable HDP plugin/unplugged interrupts at hpd_enable/disable
The internal_hpd flag is set to true by dp_bridge_hpd_enable() and set to
false by dp_bridge_hpd_disable() to handle GPIO pinmuxed into DP controller
case. HDP related interrupts can not be enabled until internal_hpd is set
to true. At current implementation dp_display_config_hpd() will initialize
DP host controller first followed by enabling HDP related interrupts if
internal_hpd was true at that time. Enable HDP related interrupts depends on
internal_hpd status may leave system with DP driver host is in running state
but without HDP related interrupts being enabled. This will prevent external
display from being detected. Eliminated this dependency by moving HDP related
interrupts enable/disable be done at dp_bridge_hpd_enable/disable() directly
regardless of internal_hpd status.
Changes in V3:
-- dp_catalog_ctrl_hpd_enable() and dp_catalog_ctrl_hpd_disable()
-- rewording ocmmit text
Changes in V4:
-- replace dp_display_config_hpd() with dp_display_host_start()
-- move enable_irq() at dp_display_host_start();
Changes in V5:
-- replace dp_display_host_start() with dp_display_host_init()
Changes in V6:
-- squash remove enable_irq() and disable_irq()
Fixes:
cd198caddea7 ("drm/msm/dp: Rely on hpd_enable/disable callbacks")
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Tested-by: Leonard Lausen <leonard@lausen.nl> # on sc7180 lazor
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Tested-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Link: https://lore.kernel.org/r/1684878756-17830-1-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Rob Clark <robdclark@chromium.org>
Dani Liberman [Mon, 22 May 2023 14:15:36 +0000 (17:15 +0300)]
accel/habanalabs: refactor error info reset
Moved error info reset code to single function for future use from
other places in the driver.
Signed-off-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Ofir Bitton [Sun, 21 May 2023 07:24:13 +0000 (10:24 +0300)]
accel/habanalabs: add event queue extra validation
In order to increase reliability of the event queue interface,
we apply to Gaudi2 the same mechanism we have in Gaudi1.
The extra validation is basically checking that the received
event index matches the expected index.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Ofir Bitton [Mon, 22 May 2023 05:52:46 +0000 (08:52 +0300)]
accel/habanalabs: unsecure TSB_CFG_MTRR regs
In order to utilize Engine Barrier padding, user must have access to
this register set.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Oded Gabbay [Thu, 18 May 2023 07:59:38 +0000 (10:59 +0300)]
accel/habanalabs: move ioctl error print to debug level
We don't want to allow users to spam the kernel log and sending
ioctls with bad opcodes is a sure way to do it.
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Reviewed-by: Ofir Bitton <obitton@habana.ai>
Ofir Bitton [Wed, 17 May 2023 17:47:44 +0000 (20:47 +0300)]
accel/habanalabs: fix bug of not fetching addr_dec info
addr_dec info should always be fetched, regardless of cause value.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dani Liberman [Thu, 20 Apr 2023 16:33:34 +0000 (19:33 +0300)]
accel/habanalabs: add description to several info ioctls
Several info ioctls may return success although no data retrieved.
Signed-off-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Oded Gabbay [Mon, 22 May 2023 11:09:21 +0000 (14:09 +0300)]
accel/habanalabs: remove sim code
There were a few places where simulator only code got into the upstream.
Remove those places that can confuse other developers.
Fixes:
2a0a839b6a28 ("habanalabs: extend fatal messages to contain PCI info")
Cc: Moti Haimovski <mhaimovski@habana.ai>
Cc: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dani Liberman [Mon, 8 May 2023 08:06:17 +0000 (11:06 +0300)]
accel/habanalabs: mask part of hmmu page fault captured address
When receiving page fault from hmmu, the captured address is scrambled
both by HW and by driver. The driver part is unscrambled but the HW
part isn't getting unscrambled.
To avoid declaring wrong address, the HW scrambled part will be
masked.
Signed-off-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Koby Elbaz [Wed, 10 May 2023 07:15:22 +0000 (10:15 +0300)]
accel/habanalabs: update state when loading boot fit
Any FW component we load must be followed by a corresponding state
update. However, it seems that so far we skipped doing so for the
bootfit case, so fix that.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Tomer Tayar [Wed, 10 May 2023 10:28:05 +0000 (13:28 +0300)]
accel/habanalabs: print qman data on error only for lower qman
By default, the upper QMANs are not used, and instead engines ARCs
access the lower QMANs directly.
Errors for upper QMANs are therefore not expected, and the debug print
of the PQ entries is not needed.
Modify the QMAN debug data print on errors to include only information
for the lower QMAN.
Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Tomer Tayar [Wed, 10 May 2023 10:34:28 +0000 (13:34 +0300)]
accel/habanalabs: use lower QM in QM errors handling
The QMAN GLBL_ERR_STS_4 register has indications for errors also in the
lower CQ and the ARC CQ, and not just for errors in the lower CP.
Modify the relevant define/struct and the related print to use "lower
QM" instead of "lower CP".
Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dani Liberman [Mon, 8 May 2023 14:24:38 +0000 (17:24 +0300)]
accel/habanalabs: use binning info when handling razwi
When receiving sei interrupt from tpc or decoder, we need to check
the binning mask because if the engine is binned, the razwi info
won't be in the router of the binned engine, instead will be in the
router of the substitute engine.
Signed-off-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Ofir Bitton [Tue, 9 May 2023 11:02:49 +0000 (14:02 +0300)]
accel/habanalabs: remove support for mmu disable
As mmu disable mode is only used for bring-up stages, let's remove this
option and all code related to it.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Koby Elbaz [Tue, 2 May 2023 14:28:56 +0000 (17:28 +0300)]
accel/habanalabs: upon DMA errors, use FW-extracted error cause
Initially, the driver used to read the error cause data directly from
the ASIC. However, the FW now clears it before the driver could read
it. Therefore we should use the error cause data that is extracted by
the FW.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Oded Gabbay [Wed, 3 May 2023 11:47:54 +0000 (14:47 +0300)]
accel/habanalabs: print max timeout value on CS stuck
If a workload got stuck, we print an error to the kernel log about it.
Add to that print the configured max timeout value, as that value is
not fixed between ASICs and in addition it can be configured using
a kernel module parameter.
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Reviewed-by: Ofir Bitton <obitton@habana.ai>
Oded Gabbay [Mon, 1 May 2023 10:19:57 +0000 (13:19 +0300)]
accel/habanalabs: align to latest firmware specs
Update the firmware common interface files with the latest version.
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Reviewed-by: Ofir Bitton <obitton@habana.ai>
Moti Haimovski [Sun, 16 Apr 2023 15:36:17 +0000 (18:36 +0300)]
accel/habanalabs: fix mem leak in capture user mappings
This commit fixes a memory leak caused when clearing the user_mappings
info when a new context is opened immediately after user_mapping is
captured and a hard reset is performed.
Signed-off-by: Moti Haimovski <mhaimovski@habana.ai>
Reviewed-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Oded Gabbay [Mon, 1 May 2023 10:12:22 +0000 (13:12 +0300)]
accel/habanalabs: set unused bit as reserved
Get latest f/w gaudi2 interface file which marks unused
bist_need_iatu_config bit in cold_rst_data structure as reserved bit.
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Reviewed-by: Ofir Bitton <obitton@habana.ai>
Koby Elbaz [Tue, 16 May 2023 06:56:18 +0000 (09:56 +0300)]
accel/habanalabs: rename security functions related arguments
Make the argument names specify the registers array represent
registers that should be unsecured so the user can access them.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dan Carpenter [Mon, 15 May 2023 10:32:18 +0000 (13:32 +0300)]
accel/habanalabs: fix gaudi2_get_tpc_idle_status() return
The gaudi2_get_tpc_idle_status() function returned the incorrect variable
so it always returned true.
Fixes:
d85f0531b928 ("accel/habanalabs: break is_idle function into per-engine sub-routines")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Yang Li [Fri, 12 May 2023 06:46:55 +0000 (14:46 +0800)]
accel/habanalabs: Fix some kernel-doc comments
Make the description of @regs_range_array and @regs_range_array_size
to @user_regs_range_array and @user_regs_range_array_size to silence
the warnings:
drivers/accel/habanalabs/common/security.c:506: warning: Function parameter or member 'user_regs_range_array' not described in 'hl_init_pb_ranges_single_dcore'
drivers/accel/habanalabs/common/security.c:506: warning: Function parameter or member 'user_regs_range_array_size' not described in 'hl_init_pb_ranges_single_dcore'
drivers/accel/habanalabs/common/security.c:506: warning: Excess function parameter 'regs_range_array' description in 'hl_init_pb_ranges_single_dcore'
drivers/accel/habanalabs/common/security.c:506: warning: Excess function parameter 'regs_range_array_size' description in 'hl_init_pb_ranges_single_dcore'
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=4940
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Ofir Bitton [Mon, 24 Apr 2023 11:17:03 +0000 (14:17 +0300)]
accel/habanalabs: always fetch pci addr_dec error info
Due to missing indication of address decode source (LBW/HBW bus),
we should always try and fetch extended information.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Koby Elbaz [Thu, 20 Apr 2023 11:17:31 +0000 (14:17 +0300)]
accel/habanalabs: fix a static warning - 'dubious: x & !y'
Use a straight forward approach to get a conditional result.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Koby Elbaz [Mon, 27 Mar 2023 08:56:16 +0000 (11:56 +0300)]
accel/habanalabs: poll for device status update following WFE cmd
Currently, we rely on COMMS protocol's ack to verify that WFE command
has been acknowledged by the FW. However, this does not guarantee that
the device status has been updated.
Although unlikely, this could trigger a race since the driver expects
the device to be halted at that stage, but it might not be.
Therefore, we increase WFE's robustness by polling on the status
register that will be updated once the device is actually halted.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Tomer Tayar [Sun, 19 Mar 2023 19:46:44 +0000 (21:46 +0200)]
accel/habanalabs: expose debugfs files later
Currently the debugfs root folder and files for a device are created at
an early step, before the device initialization and before the char
device and sysfs files are exposed to user.
As there is no real reason not to do it together with the device
creation, postpone it to be done right afterwards.
The initialization of the debugfs entry structure is left in its
current position because it is used before creating the files.
Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Ofir Bitton [Tue, 18 Apr 2023 11:48:22 +0000 (14:48 +0300)]
accel/habanalabs: add pci health check during heartbeat
Currently upon a heartbeat failure, we don't know if the failure
is due to firmware hang or due to a bad PCI link. Hence, we
are reading a PCI config space register with a known value (vendor ID)
so we will know which of the two possibilities caused the heartbeat
failure.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dafna Hirschfeld [Mon, 17 Apr 2023 18:24:19 +0000 (21:24 +0300)]
accel/habanalabs: add missing tpc interrupt info
For some reason the last possible tpc interrupt cause in
gaudi2_tpc_interrupts_cause is missing from the code.
Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Koby Elbaz [Sun, 4 Dec 2022 16:37:53 +0000 (18:37 +0200)]
accel/habanalabs: refactor abort of completions and waits
Aborting CS completions should be in command_submission.c but aborting
waiting for user interrupts should be in device.c.
This separation is also for adding more abort operations in the future.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Koby Elbaz [Mon, 17 Apr 2023 12:14:30 +0000 (15:14 +0300)]
accel/habanalabs: minimize encapsulation signal mutex lock time
Sync Stream Encapsulated Signal Handlers can be managed from different
contexts, and as such they are protected via a spin_lock.
However, spin_lock was unnecessarily protecting a larger code section
than really needed, covering a sleepable code section as well.
Since spin_lock disables preemption, it could lead to sleeping in
atomic context.
Signed-off-by: Koby Elbaz <kelbaz@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dan Carpenter [Tue, 6 Jun 2023 08:22:07 +0000 (11:22 +0300)]
drm/i915/gsc: Fix error code in intel_gsc_uc_heci_cmd_submit_nonpriv()
This should return negative -EAGAIN instead of positive EAGAIN.
Fixes:
e5e1e6d28ebc ("drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZH7sr+Vs4zOQoouU@moroto
Dan Carpenter [Tue, 6 Jun 2023 08:33:03 +0000 (11:33 +0300)]
drm/msm/dpu: tidy up some error checking
The "vsync_hz" variable is unsigned int so it can't be less
than zero. The dpu_kms_get_clk_rate() function used to return a u64
but I previously changed it to return an unsigned long and zero on
error so it matches clk_get_rate().
Change the "vsync_hz" type to unsigned long as well and change the
error checking to check for zero instead of negatives. This change
does not affect runtime at all. It's just a clean up.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/541225/
Link: https://lore.kernel.org/r/ZH7vP2Swu8CYpgUL@moroto
[DB: fixed debug message]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Abhinav Kumar [Tue, 6 Jun 2023 20:11:12 +0000 (13:11 -0700)]
drm/msm/dpu: add DSC blocks to the catalog of MSM8998
MSM8998 doesn't have DSC blocks declared in the catalog. Complete DSC
1.1 support for all platforms by adding the missing blocks to MSM8998.
Changes in v9:
-- add MSM8998 and SC8180x to commit title
Changes in v10:
-- fix grammar at commit text
Changes in v12:
-- fix "titil" with "title" at changes in v9
Changes in v14:
-- "dsc" tp "DSC" at commit title
Changes in v15:
-- fix merge conflicts at dpu_5_1_sc8180x.h
Changes in v16
-- fix cherry-pick error by deleting both redundant .dsc and .dsc_count
assignment from dpu_5_1_sc8180x.h
Changes in v17
-- remove sc8180x from both commit title and text
-- remove Reviewed-by
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541371/
Link: https://lore.kernel.org/r/1686082272-22191-1-git-send-email-quic_khsieh@quicinc.com
[DB: fixed commit message as agreed in the email discussion]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:44:00 +0000 (14:44 +0200)]
drm/msm: mdss: Add SM6375 support
Add support for MDSS on SM6375.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541295/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-9-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:58 +0000 (14:43 +0200)]
drm/msm: mdss: Add SM6350 support
Add support for MDSS on SM6350.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541291/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-7-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:59 +0000 (14:43 +0200)]
drm/msm/dpu: Add SM6375 support
Add basic SM6375 support to the DPU1 driver to enable display output.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541293/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-8-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:57 +0000 (14:43 +0200)]
drm/msm/dpu: Add SM6350 support
Add SM6350 support to the DPU1 driver to enable display output.
It's worth noting that one entry dpu_qos_lut_entry was trimmed off:
{.fl = 0, .lut = 0x0011223344556677 },
due to the lack of support for selecting between portrait and landscape
LUT settings (for danger and safe LUTs) and no full support for
qseed/non-qseed usescases (for QoS LUT).
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541287/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-6-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:56 +0000 (14:43 +0200)]
dt-bindings: display/msm: Add SM6375 MDSS
Document the SM6375 MDSS.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541289/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-5-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:55 +0000 (14:43 +0200)]
dt-bindings: display/msm: Add SM6350 MDSS
Document the SM6350 MDSS.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541286/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-4-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:54 +0000 (14:43 +0200)]
dt-bindings: display/msm: sc7180-dpu: Describe SM6350 and SM6375
SC7180, SM6350 and SM6375 use a rather similar hw setup for DPU, with
the main exception being that the last one requires an additional
throttle clock.
It is not well understood yet, but failing to toggle it on makes the
display hardware stall and not output any frames.
Document SM6350 and SM6375 DPU.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541283/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-3-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:53 +0000 (14:43 +0200)]
dt-bindings: display/msm: dsi-controller-main: Add SM6375
Add the DSI host found on SM6375.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541285/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-2-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Konrad Dybcio [Tue, 6 Jun 2023 12:43:52 +0000 (14:43 +0200)]
dt-bindings: display/msm: dsi-controller-main: Add SM6350
Add the DSI host found on SM6350.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/541281/
Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-1-dee6a882571b@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dmitry Baryshkov [Sun, 4 Jun 2023 03:13:08 +0000 (06:13 +0300)]
drm/msm/dpu: use PINGPONG_NONE to unbind WB from PP
Currently the driver passes the PINGPONG index to
dpu_hw_wb_ops::bind_pingpong_blk() callback and uses separate boolean
flag to tell whether WB should be bound or unbound. Simplify this by
passing PINGPONG_NONE in case of unbinding and drop the flag completely.
Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/540969/
Link: https://lore.kernel.org/r/20230604031308.894274-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Dmitry Baryshkov [Sun, 4 Jun 2023 03:13:07 +0000 (06:13 +0300)]
drm/msm/dpu: use PINGPONG_NONE to unbind INTF from PP
Currently the driver passes the PINGPONG index to
dpu_hw_intf_ops::bind_pingpong_blk() callback and uses separate boolean
flag to tell whether INTF should be bound or unbound. Simplify this by
passing PINGPONG_NONE in case of unbinding and drop the flag completely.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/540968/
Link: https://lore.kernel.org/r/20230604031308.894274-1-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Umesh Nerlige Ramappa [Mon, 5 Jun 2023 19:39:23 +0000 (12:39 -0700)]
i915/perf: Do not add ggtt offset to hw_tail
ggtt offset for hw_tail is not required for the calculations, so drop
it.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230605193923.1836048-3-umesh.nerlige.ramappa@intel.com
Umesh Nerlige Ramappa [Mon, 5 Jun 2023 19:39:22 +0000 (12:39 -0700)]
i915/perf: Drop the aging_tail logic in perf OA
On DG2, capturing OA reports while running heavy render workloads
sometimes results in invalid OA reports where 64-byte chunks inside
reports have stale values. Under memory pressure, high OA sampling rates
(13.3 us) and heavy render workload, occasionally, the OA HW TAIL
pointer does not progress as fast as the sampling rate. When these
glitches occur, the TAIL pointer takes approx. 200us to progress. While
this is expected behavior from the HW perspective, invalid reports are
not expected.
In oa_buffer_check_unlocked(), when we execute the if condition, we are
updating the oa_buffer.tail to the aging tail and then setting pollin
based on this tail value, however, we do not have a chance to rewind and
validate the reports prior to setting pollin. The validation happens
in a subsequent call to oa_buffer_check_unlocked(). If a read occurs
before this validation, then we end up reading reports up until this
oa_buffer.tail value which includes invalid reports. Though found on
DG2, this affects all platforms.
The aging tail logic is no longer necessary since we are explicitly
checking for landed reports.
Start by dropping the aging tail logic.
v2:
- Drop extra blank line
- Add reason to drop aging logic (Ashutosh)
- Add bug links (Ashutosh)
- rename aged_tail to read_tail
- Squash patches 3 and 1
v3: (Ashutosh)
- Remove extra spaces
- Remove gtt_offset from the pollin calculation
- s/Bug:/Link/ in commit message (checkpatch)
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7484
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7757
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230605193923.1836048-2-umesh.nerlige.ramappa@intel.com
Fei Yang [Tue, 6 Jun 2023 10:00:42 +0000 (12:00 +0200)]
drm/i915: Allow user to set cache at BO creation
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a default (platform dependent) cache setting for all objects.
However this is not optimal for performance tuning. The patch extends
the existing gem_create uAPI to let user set PAT index for the object
at creation time.
The new extension is platform independent, so UMD's can switch to using
this extension for older platforms as well, while {set, get}_caching are
still supported on these legacy paltforms for compatibility reason.
However, since PAT index was not clearly defined for platforms prior to
GEN12 (TGL), so we are limiting this externsion to GEN12+ platforms
only. See ext_set_pat() in for the implementation details.
The documentation related to the PAT/MOCS tables is currently available
for Tiger Lake here:
https://www.intel.com/content/www/us/en/docs/graphics-for-linux/developer-reference/1-0/tiger-lake.html
The documentation for other platforms is currently being updated.
BSpec: 45101
Mesa support has been submitted in this merge request:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878
The media driver supprt has bin submitted in this merge request:
https://github.com/intel/media-driver/pull/1680
The IGT test related to this change is
igt@gem_create@create-ext-set-pat
Signed-off-by: Fei Yang <fei.yang@intel.com>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Carl Zhang <carl.zhang@intel.com>
Tested-by: Lihao Gu <lihao.gu@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Slawomir Milczarek <slawomir.milczarek@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606100042.482345-2-andi.shyti@linux.intel.com
Dario Binacchi [Wed, 7 Jun 2023 06:31:38 +0000 (08:31 +0200)]
drm/panel: simple: add support for Rocktech RK043FN48H panel
Add support for Rocktech RK043FN48H 4.3" (480x272) LCD-TFT panel.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/
202306020343.jNTWeM0P-lkp@intel.com/
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230607063139.621351-6-dario.binacchi@amarulasolutions.com
Dario Binacchi [Wed, 7 Jun 2023 06:31:37 +0000 (08:31 +0200)]
dt-bindings: display: simple: add Rocktech RK043FN48H
Add compatible to panel-simple for Rocktech Displays Limited
RK043FN48H 4.3" 480x272 LCD-TFT panel.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230607063139.621351-5-dario.binacchi@amarulasolutions.com
John Harrison [Wed, 31 May 2023 15:59:42 +0000 (08:59 -0700)]
drm/i915/guc: Remove some obsolete definitions
There were a bunch of defines and structures left over from an API
update a very long time ago. Remove them.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531155942.441862-1-John.C.Harrison@Intel.com
Matt Atwood [Fri, 2 Jun 2023 23:17:54 +0000 (16:17 -0700)]
drm/i915: rename I915_PMU_MAX_GTS to I915_PMU_MAX_GT
_GTS as an abbreviation here leads to some confusion, match other
definitions and drop the s.
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@linux.intel.com>
Cc: Andi Shyti <andy.shyti@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230602231754.1596433-3-matthew.s.atwood@intel.com
Matt Atwood [Fri, 2 Jun 2023 23:17:53 +0000 (16:17 -0700)]
drm/i915: Reduce I915_MAX_GT to 2
According to Ashutosh there is no current or planned product in i915 for
I915_MAX_GT to be 4 anymore.
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@linux.intel.com>
Cc: Andi Shyti <andy.shyti@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230602231754.1596433-2-matthew.s.atwood@intel.com
Tvrtko Ursulin [Mon, 5 Jun 2023 13:11:35 +0000 (14:11 +0100)]
drm/i915/selftests: Add some missing error propagation
Add some missing error propagation in live_parallel_switch.
To avoid needlessly burdening the various backport processes, note I am
not marking it as a fix against any patches and not copying stable since
it is debug/selftests only code.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Fixes:
50d16d44cce4 ("drm/i915/selftests: Exercise context switching in parallel")
Fixes:
6407cf533217 ("drm/i915/selftests: Stop using kthread_stop()")
Link: https://patchwork.freedesktop.org/patch/msgid/20230605131135.396854-1-tvrtko.ursulin@linux.intel.com
Tvrtko Ursulin [Mon, 5 Jun 2023 12:32:24 +0000 (13:32 +0100)]
drm/i915: Use the fdinfo helper
Use the common fdinfo helper for printing the basics. Remove now unused
client id allocation code.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Rob Clark <robdclark@chromium.org>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230605123224.373633-1-tvrtko.ursulin@linux.intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:15 +0000 (16:54 -0700)]
drm/i915/huc: define HuC FW version for MTL
Follow the same logic as DG2, so just a meu binary with no version number.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-8-daniele.ceraolospurio@intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:14 +0000 (16:54 -0700)]
drm/i915/mtl/huc: Use the media gt for the HuC getparam
On MTL, for obvious reasons, HuC is only available on the media tile.
We already disable SW support for HuC on the root gt due to the
absence of VCS engines, but we also need to update the getparam to point
to the HuC struct in the media GT.
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-7-daniele.ceraolospurio@intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:13 +0000 (16:54 -0700)]
drm/i915/mtl/huc: auth HuC via GSC
The full authentication via the GSC requires an heci packet submission
to the GSC FW via the GSC CS. The GSC has new PXP command for this
(literally called NEW_HUC_AUTH).
The intel_huc_auth function is also updated to handle both authentication
types.
v2: check that the GuC auth for clear media has completed before
proceding with the full auth
v3: use a define for the object size (Alan)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-6-daniele.ceraolospurio@intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:12 +0000 (16:54 -0700)]
drm/i915/huc: differentiate the 2 steps of the MTL HuC auth flow
Before we add the second step of the MTL HuC auth (via GSC), we need to
have the ability to differentiate between them. To do so, the huc
authentication check is duplicated for GuC and GSC auth, with
GSC-enabled binaries being considered fully authenticated only after
the GSC auth step.
To report the difference between the 2 auth steps, a new case is added
to the HuC getparam. This way, the clear media driver can start
submitting before full auth, as partial auth is enough for those
workloads.
v2: fix authentication status check for DG2
v3: add a better comment at the top of the HuC file to explain the
different approaches to load and auth (John)
v4: update call to intel_huc_is_authenticated in the pxp code to check
for GSC authentication
v5: drop references to meu and esclamation mark in huc_auth print (John)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> #v2
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-5-daniele.ceraolospurio@intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:11 +0000 (16:54 -0700)]
drm/i915/huc: Load GSC-enabled HuC via DMA xfer if the fuse says so
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between "GSC-enabled binary" and
"loaded by GSC", so the former case has been renamed to "has GSC headers"
for clarity, while the latter is now based on the fuse instead of the
binary format. This way, all the legacy load paths are automatically
taken (including the auth by GuC) without having to implement further
code changes.
v2: s/is_meu_binary/has_gsc_headers/, clearer logs (John)
v3: split check for GSC access, better comments (John)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-4-daniele.ceraolospurio@intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:10 +0000 (16:54 -0700)]
drm/i915/huc: Parse the GSC-enabled HuC binary
The new binaries that support the 2-step authentication contain the
legacy-style binary, which we can use for loading the HuC via DMA. To
find out where this is located in the image, we need to parse the
manifest of the GSC-enabled HuC binary. The manifest consist of a
partition header followed by entries, one of which contains the offset
we're looking for.
Note that the DG2 GSC binary contains entries with the same names, but
it doesn't contain a full legacy binary, so we need to skip assigning
the dma offset in that case (which we can do by checking the ccs).
Also, since we're now parsing the entries, we can extract the HuC
version that way instead of using hardcoded offsets.
Note that the GSC binary uses the same structures in its binary header,
so they've been added in their own header file.
v2: fix structure names to match meu defines (s/CPT/CPD/), update commit
message, check ccs validity, drop old version location defines.
v3: drop references to the MEU tool to reduce confusion, fix log (John)
v4: fix log for real (John)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> #v2
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-3-daniele.ceraolospurio@intel.com
Daniele Ceraolo Spurio [Wed, 31 May 2023 23:54:09 +0000 (16:54 -0700)]
drm/i915/uc: perma-pin firmwares
Now that each FW has its own reserved area, we can keep them always
pinned and skip the pin/unpin dance on reset. This will make things
easier for the 2-step HuC authentication, which requires the FW to be
pinned in GGTT after the xfer is completed.
Since the vma is now valid for a long time and not just for the quick
pin-load-unpin dance, the name "dummy" is no longer appropriare and has
been replaced with vma_res. All the functions have also been updated to
operate on vma_res for consistency.
Given that we pin the vma behind the allocator's back (which is ok
because we do the pinning in an area that was previously reserved for
thus purpose), we do need to explicitly re-pin on resume because the
automated helper won't cover us.
v2: better comments and commit message, s/dummy/vma_res/
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531235415.1467475-2-daniele.ceraolospurio@intel.com
Masahiro Yamada [Mon, 5 Jun 2023 12:00:21 +0000 (21:00 +0900)]
drm/bridge: imx: turn imx8{qm,qxp}-ldb into single-object modules
With the previous fix, these modules are built from a single C file.
Rename the source files so they match the module names.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230605120021.1774711-2-masahiroy@kernel.org
Masahiro Yamada [Mon, 5 Jun 2023 12:00:20 +0000 (21:00 +0900)]
drm/bridge: imx: fix mixed module-builtin object
With CONFIG_DRM_IMX8QM_LDB=m and CONFIG_DRM_IMX8QXP_LDB=y (or vice
versa), imx-ldb-helper.o is linked to a module and also to vmlinux
even though the expected CFLAGS are different between builtins and
modules.
This is the same situation as fixed by commit
637a642f5ca5 ("zstd:
Fixing mixed module-builtin objects").
Split imx-ldb-helper.c into a separate module.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230605120021.1774711-1-masahiroy@kernel.org
Moti Haimovski [Thu, 13 Apr 2023 10:54:40 +0000 (13:54 +0300)]
accel/habanalabs: call to HW/FW err returns 0 when no events exist
This commit modifies the call to retrieve HW or FW error events to
return success when no events are pending, as done in the calls to
other events.
Signed-off-by: Moti Haimovski <mhaimovski@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Ofir Bitton [Thu, 13 Apr 2023 08:22:06 +0000 (11:22 +0300)]
accel/habanalabs: unsecure TPC bias registers
User needs to be able to perform downcast / upcast of fp8_143 dtype.
Hence bias register needs to be accessed by the user.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dafna Hirschfeld [Wed, 8 Feb 2023 14:16:08 +0000 (16:16 +0200)]
accel/habanalabs: do soft-reset using cpucp packet
This is done depending on the FW version. The cpucp method is
preferable and saves scratchpads resource.
Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dafna Hirschfeld [Tue, 18 Apr 2023 08:39:44 +0000 (11:39 +0300)]
accel/habanalabs: check fw version using sw version
The fw inner version is less trustable, instead use the fw general
sw release version.
Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Dafna Hirschfeld [Thu, 16 Mar 2023 08:20:44 +0000 (10:20 +0200)]
accel/habanalabs: extract and save the FW's SW major/minor/sub-minor
It is not always possible to know the FW's SW version from the inner FW
version. Therefore we should extract the general SW version in addition
to the FW version and use it in functions like
'hl_is_fw_ver_below_1_9' etc.
Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>