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Alex Denisov [Fri, 2 Feb 2018 19:20:37 +0000 (19:20 +0000)]
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324123
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Sanjay Patel [Fri, 2 Feb 2018 19:08:12 +0000 (19:08 +0000)]
[InstCombine] simplify logic for swapMayExposeCSEOpportunities; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324122
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Sanjay Patel [Fri, 2 Feb 2018 18:39:05 +0000 (18:39 +0000)]
[InstCombine] fix typos, formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324118
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Amara Emerson [Fri, 2 Feb 2018 18:03:30 +0000 (18:03 +0000)]
[AArch64][GlobalISel] Use getRegClassForTypeOnBank() in selectCopy.
Differential Revision: https://reviews.llvm.org/D42832
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324110
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Sanjay Patel [Fri, 2 Feb 2018 17:43:16 +0000 (17:43 +0000)]
[InstCombine] add baseline tests for unsigned saturated sub (D41480); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324109
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Craig Topper [Fri, 2 Feb 2018 17:02:58 +0000 (17:02 +0000)]
[X86] Remove checks for FeatureAVX512 from the X86 assembly parser. Remove mcpu/mattr from assembly test command lines.
Summary:
We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode.
I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features.
Fixes PR36202
Reviewers: RKSimon, echristo, bkramer
Reviewed By: echristo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324106
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Fangrui Song [Fri, 2 Feb 2018 16:41:07 +0000 (16:41 +0000)]
Make utils/UpdateTestChecks/common.py Python 2/3 compatible and fix print statements.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42674
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324104
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Yaxun Liu [Fri, 2 Feb 2018 16:07:16 +0000 (16:07 +0000)]
[AMDGPU] Switch to the new addr space mapping by default
This requires corresponding clang change.
Differential Revision: https://reviews.llvm.org/D40955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324101
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Clement Courbet [Fri, 2 Feb 2018 15:54:17 +0000 (15:54 +0000)]
Add llc tests for comparison chains.
See https://reviews.llvm.org/D42793#996098 for context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324099
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James Henderson [Fri, 2 Feb 2018 15:09:31 +0000 (15:09 +0000)]
Fix type sizes that were causing incorrect string formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324096
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George Rimar [Fri, 2 Feb 2018 15:06:09 +0000 (15:06 +0000)]
[ThinLTO] - Add comment. NFC.
Was requested during review of D42798.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324095
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Simon Pilgrim [Fri, 2 Feb 2018 14:55:20 +0000 (14:55 +0000)]
[X86][SSE] Force double domain for SHUFPD stack folding tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324094
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Ivan A. Kosarev [Fri, 2 Feb 2018 14:09:22 +0000 (14:09 +0000)]
[Analysis] Support aggregate access types in TBAA
This patch implements analysis for new-format TBAA access tags
with aggregate types as their final access types.
Differential Revision: https://reviews.llvm.org/D41501
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324092
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James Henderson [Fri, 2 Feb 2018 12:45:57 +0000 (12:45 +0000)]
Add missing new files from r324077
Differential Revision: https://reviews.llvm.org/D42481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324078
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James Henderson [Fri, 2 Feb 2018 12:35:52 +0000 (12:35 +0000)]
[DWARF v5] Add limited support for dumping .debug_rnglists
This change adds support to llvm-dwarfdump for dumping DWARF5
.debug_rnglists sections in regular ELF files.
It is not complete, in that several DW_RLE_* encodings are currently
not supported, but does dump the headert and the basic ranges for
DW_RLE_start_length and DW_RLE_start_end encodings.
Obvious next steps are to add verbose dumping that dumps the raw
encodings, rather than the interpreted contents, to add -verify support
of the section (e.g. to show that the correct number of offsets are
specified), add dumping of .debug_rnglists.dwo, and to add support for
other encodings.
Reviewed by: dblaikie, JDevlieghere
Differential Revision: https://reviews.llvm.org/D42481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324077
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George Rimar [Fri, 2 Feb 2018 12:21:26 +0000 (12:21 +0000)]
[LTO] - Simplify. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324076
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George Rimar [Fri, 2 Feb 2018 12:17:33 +0000 (12:17 +0000)]
[ThinLTO] - Fix for "ThinLTO inlines variables that should be discarded".
This fixes PR36187.
Patch teaches ThinLTO to drop non-prevailing variables,
just like we recently did for functions (in r323633).
Differential revision: https://reviews.llvm.org/D42798
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324075
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Sjoerd Meijer [Fri, 2 Feb 2018 11:51:06 +0000 (11:51 +0000)]
[ARM] fixed some tabs/whitespaces in test. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324074
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Mikael Holmen [Fri, 2 Feb 2018 10:34:13 +0000 (10:34 +0000)]
[GlobalOpt] Include padding in debug fragments
Summary:
When creating the debug fragments for a SRA'd variable, use the types'
allocation sizes. This fixes issues where the pass would emit too small
fragments, placed at the wrong offset, for padded types.
An example of this is long double on x86. The type is represented using
x86_fp80, which is 10 bytes, but the value is aligned to 12/16 bytes.
The padding is included in the type's DW_AT_byte_size attribute;
therefore, the fragments should also include that. Newer GCC releases
(I tested 7.2.0) emit 12/16-byte pieces for long double. Earlier
releases, e.g. GCC 5.5.0, behaved as LLVM did, i.e. by emitting a
10-byte piece, followed by an empty 2/6-byte piece for the padding.
Failing to cover all `DW_AT_byte_size' bytes of a value with non-empty
pieces results in the value being printed as <optimized out> by GDB.
Patch by: David Stenberg
Reviewers: aprantl, JDevlieghere
Reviewed By: aprantl, JDevlieghere
Subscribers: llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D42807
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324066
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Jonas Paulsson [Fri, 2 Feb 2018 08:48:02 +0000 (08:48 +0000)]
[SelectionDAG] Consider endianness in scalarizeVectorStore().
When handling vectors with non byte-sized elements, reverse the order of the
elements in the built integer if the target is Big-Endian.
SystemZ tests updated.
Review: Eli Friedman, Ulrich Weigand.
https://reviews.llvm.org/D42786
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324063
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Jonas Paulsson [Fri, 2 Feb 2018 08:21:53 +0000 (08:21 +0000)]
[SelectionDAG] Add an assert in getNode() for EXTRACT_VECTOR_ELT.
When getNode() is called to create an EXTRACT_VECTOR_ELT, assert that
the result VT is at least as wide as the vector element type.
Review: Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324061
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Jonas Paulsson [Fri, 2 Feb 2018 07:52:02 +0000 (07:52 +0000)]
[SystemZ] Update test case (NFC)
test/CodeGen/SystemZ/vec-trunc-to-i1.ll was marked as a temporary
FAIL when it was previously updated when it needed one more COPY.
This was however wrong, since the loop body had been reduced
significantly, and it was actually an improvement.
Review: Ulrich Weigand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324060
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Shiva Chen [Fri, 2 Feb 2018 06:01:02 +0000 (06:01 +0000)]
[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature
llvm-objdump could get C feature by ELF::EF_RISCV_RVC e_flag,
so then we don't have to add -mattr=+c on the command line.
Differential Revision: https://reviews.llvm.org/D42629
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324058
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Craig Topper [Fri, 2 Feb 2018 05:59:33 +0000 (05:59 +0000)]
[X86] Legalize (v64i1 (bitcast (i64 X))) on 32-bit targets by extracting 32-bit halves from i32, bitcasting each to v32i1, and concatenating.
This prevents the scalarization that would otherwise occur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324057
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Craig Topper [Fri, 2 Feb 2018 05:59:31 +0000 (05:59 +0000)]
[X86] Legalize (i64 (bitcast (v64i1 X))) on 32-bit targets by extracting to v32i1 and bitcasting to i32.
This saves a trip through memory and seems to open up other combining opportunities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324056
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Shiva Chen [Fri, 2 Feb 2018 02:43:23 +0000 (02:43 +0000)]
[RISCV] Fix c.addi and c.addi16sp immediate constraints which should be non-zero
Differential Revision: https://reviews.llvm.org/D42782
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324055
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Shiva Chen [Fri, 2 Feb 2018 02:43:18 +0000 (02:43 +0000)]
[RISCV] Define getSetCCResultType for setting vector setCC type
To avoid trigger "No default SetCC type for vectors!" Assertion
Differential Revision: https://reviews.llvm.org/D42675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324054
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Amara Emerson [Fri, 2 Feb 2018 02:14:42 +0000 (02:14 +0000)]
[AArch64][GlobalISel] Fix old use of % sigil in test.
My rebase had missed the new $ sigil we're using.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324051
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Amara Emerson [Fri, 2 Feb 2018 01:49:59 +0000 (01:49 +0000)]
Fix debug spelling in ResetMachineFunction pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324048
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Amara Emerson [Fri, 2 Feb 2018 01:44:43 +0000 (01:44 +0000)]
[GlobalISel] Constrain the dest reg of IMPLICT_DEF.
This fixes a crash where the user is a COPY, which deliberately does not
constrain its source operands, resulting in a vreg without a reg class escaping
selection.
Differential Revision: https://reviews.llvm.org/D42697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324047
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David Blaikie [Fri, 2 Feb 2018 00:33:50 +0000 (00:33 +0000)]
Remove non-modular header containing static utility functions
The one place that uses these functions isn't particularly
long/complicated, so it's easier to just have these inline at that
location than trying to split it out into a true header. (in part also
because of the use of the DEBUG macros, which make this not really a
standalone header even if the static functions were made inline instead)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324044
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David Blaikie [Fri, 2 Feb 2018 00:11:09 +0000 (00:11 +0000)]
Add missing includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324040
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Matthias Braun [Fri, 2 Feb 2018 00:08:19 +0000 (00:08 +0000)]
SplitKit: Fix liveness recomputation in some remat cases.
Example situation:
```
BB0:
%0 = ...
use %0
; ...
condjump BB1
jmp BB2
BB1:
%0 = ... ; rematerialized def from above (from earlier split step)
jmp BB2
BB2:
; ...
use %0
```
%0 will have a live interval with 3 value numbers (for the BB0, BB1 and
BB2 parts). Now SplitKit tries and succeeds in rematerializing the value
number in BB2 (This only works because it is a secondary split so
SplitKit is can trace this back to a single original def).
We need to recompute all live ranges affected by a value number that we
rematerialize. The case that we missed before is that when the value
that is rematerialized is at a join (Phi VNI) then we also have to
recompute liveness for the predecessor VNIs.
rdar://
35699130
Differential Revision: https://reviews.llvm.org/D42667
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324039
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Vlad Tsyrklevich [Fri, 2 Feb 2018 00:07:14 +0000 (00:07 +0000)]
Fix broken builds due to mismatched min/max types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324038
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Vlad Tsyrklevich [Thu, 1 Feb 2018 23:45:18 +0000 (23:45 +0000)]
[cfi-verify] Add blame context printing, and improved print format.
Summary:
This update now allows users to specify `--blame-context` and `--blame-context-all` to print source file blame information for the source of the blame.
Also updates the inline printing to correctly identify the top of the inlining stack for blame information.
Patch by Mitch Phillips!
Reviewers: vlad.tsyrklevich
Subscribers: llvm-commits, kcc, pcc
Differential Revision: https://reviews.llvm.org/D40111
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324035
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Craig Topper [Thu, 1 Feb 2018 23:21:20 +0000 (23:21 +0000)]
[X86] Separate the call to LowerVectorAllZeroTest from EmitTest. NFCI
Every instruction that has the word TEST in its name seems to have been buried into EmitTest. But that code is largely concerned with trying to reuse the flags from instructions that update flags in a pretty normal way.
PTEST/TESTP/KTEST do not update flags in a normal way. They only update Z and C and the C flag update is non-standard. Rather than try to bend EmitTest's already complex logic to accomodate this, just move the call up to LowerSETCC and replicate the few pre-checks that are needed.
While there add a FIXME for using the C flag for checking for all 1s which we definitely couldn't do from EmitTEST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324029
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Amara Emerson [Thu, 1 Feb 2018 23:10:57 +0000 (23:10 +0000)]
[GlobalISel][Legalizer] Relax a legalization loop detecting assert.
Legalizing vectors may keep the element type the same but change the number of
elements, the assert didn't take this into account.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324028
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Simon Pilgrim [Thu, 1 Feb 2018 22:32:41 +0000 (22:32 +0000)]
Fix check-prefixes typo and line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324024
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Simon Pilgrim [Thu, 1 Feb 2018 22:05:44 +0000 (22:05 +0000)]
[X86][SSE] Add SSE41 to variable permute tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324017
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Simon Pilgrim [Thu, 1 Feb 2018 21:57:37 +0000 (21:57 +0000)]
[X86][XOP] Add XOP to variable permute tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324015
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Sanjay Patel [Thu, 1 Feb 2018 21:55:53 +0000 (21:55 +0000)]
[InstCombine] allow multi-use values in canEvaluate* if all uses are in 1 inst
This is the enhancement suggested in D42536 to fix a shortcoming in
regular InstCombine's canEvaluate* functionality.
When we have multiple uses of a value, but they're all in one instruction, we can
allow that expression to be narrowed or widened for the same cost as a single-use
value.
AFAICT, this can only matter for multiply: sub/and/or/xor/select would be simplified
away if the operands are the same value; add becomes shl; shifts with a variable shift
amount aren't handled.
Differential Revision: https://reviews.llvm.org/D42739
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324014
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Nemanja Ivanovic [Thu, 1 Feb 2018 21:09:04 +0000 (21:09 +0000)]
[PowerPC] Tell VSX swap removal that scalar conversions are lane-sensitive
This is a rather non-controversial change. We were missing these instructions
from the list of instructions that are lane-sensitive. These two put the result
into lane 0 (BE) or 3 (LE) regardless of the input. This patch fixes PR36068.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324005
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David Blaikie [Thu, 1 Feb 2018 21:03:35 +0000 (21:03 +0000)]
Coding Standards: Document library layering requirements & header isolation.
(I suppose these two pieces could be separated - but seemed related
enough)
As discussed on llvm-dev, this documents the general expectation of how
library layering should be handled. There are a few existing cases where
these constraints are not met, but as with most style guide things -
this is forward looking and provides guidance when cleaning up existing
code, it doesn't immediately require that all previous code be cleaned
up to match. (see: naming conventions, etc)
Differential Revision: https://reviews.llvm.org/D42771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324004
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Craig Topper [Thu, 1 Feb 2018 20:48:50 +0000 (20:48 +0000)]
[DAGCombiner] When folding (insert_subvector undef, (bitcast (extract_subvector N1, Idx)), Idx) -> (bitcast N1) make sure that N1 has the same total size as the original output
We were only checking the element count, but not the total width. This could cause illegal bitcasts to be created if for example the output was 512-bits, but N1 is 256 bits, and the extraction size was 128-bits.
Fixes PR36199
Differential Revision: https://reviews.llvm.org/D42809
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324002
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Amara Emerson [Thu, 1 Feb 2018 20:47:03 +0000 (20:47 +0000)]
[GlobalISel] Fix assert failure when legalizing non-power-2 loads.
Until we support extending loads properly we're going to fall back for these.
We already handle stores in the same way, so this is just being consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324001
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Brock Wyma [Thu, 1 Feb 2018 20:37:38 +0000 (20:37 +0000)]
[CodeView] Class record member counts should include base classes and ...
Increment the field list member count for base classes and virtual base
classes.
Differential Revision: https://reviews.llvm.org/D41874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324000
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Benjamin Kramer [Thu, 1 Feb 2018 20:28:33 +0000 (20:28 +0000)]
[ADT] Replace sys::MemoryFence with standard atomics.
This is a bit faster in theory, in practice it's cold code that's only
active in !NDEBUG, so it probably doesn't make a difference. This is one
of the last users of our homegrown Atomic.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323999
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Sanjay Patel [Thu, 1 Feb 2018 19:59:33 +0000 (19:59 +0000)]
[AArch64] remove bogus comment; NFC
I added this comment with D42323, but as discussed in D42806, the architecture
does the right thing for denorms. We don't even need the select on 0.0 here?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323996
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Easwaran Raman [Thu, 1 Feb 2018 19:40:35 +0000 (19:40 +0000)]
Remove CallGraphTraits and use equivalent methods in GraphTraits
Summary:
D42698 adds child_edge_{begin|end} and children_edges to GraphTraits
which are used here. The reason for this change is to make it easy to
use count propagation on ModulesummaryIndex. As it stands,
CallGraphTraits is in Analysis while ModuleSummaryIndex is in IR.
Reviewers: davidxl, dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323994
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Geoff Berry [Thu, 1 Feb 2018 18:54:01 +0000 (18:54 +0000)]
[MachineCopyPropagation] Extend pass to do COPY source forwarding
Summary:
This change extends MachineCopyPropagation to do COPY source forwarding
and adds an additional run of the pass to the default pass pipeline just
after register allocation.
This version of this patch uses the newly added
MachineOperand::isRenamable bit to avoid forwarding registers is such a
way as to violate constraints that aren't captured in the
Machine IR (e.g. ABI or ISA constraints).
This change is a continuation of the work started in D30751.
Reviewers: qcolombet, javed.absar, MatzeB, jonpa, tstellar
Subscribers: tpr, mgorny, mcrosier, nhaehnle, nemanjai, jyknight, hfinkel, arsenm, inouehrs, eraman, sdardis, guyblank, fedor.sergeev, aheejin, dschuff, jfb, myatsina, llvm-commits
Differential Revision: https://reviews.llvm.org/D41835
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323991
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Easwaran Raman [Thu, 1 Feb 2018 18:53:23 +0000 (18:53 +0000)]
[GraphTraits] Add support for iterating over children edges.
Summary:
This change is mostly adding comments to GraphTraits describing
interfaces to iterate over children edges of a node. These will
have to be implemented by specializations of GraphTraits. The
non-comment change is the addition of children_edges template
function that returns an iterator range.
The motivation for this is to use it in synthetic count propagation
algorithm and remove the CallGraphTraits class that provide similar
interfaces.
Reviewers: dberlin, davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323990
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Changpeng Fang [Thu, 1 Feb 2018 18:41:33 +0000 (18:41 +0000)]
AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the target has UnpackedD16VMem feature.
Reviewers:
Matt and Brian
Differential Revision:
https://reviews.llvm.org/D42548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323988
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Simon Pilgrim [Thu, 1 Feb 2018 18:10:30 +0000 (18:10 +0000)]
[X86][SSE] LowerBUILD_VECTORAsVariablePermute - add support for scaling index vectors
This allows us to use PSHUFB for v8i16/v4i32 and VPERMD/PERMPS for v4i64/v4f64 variable shuffles.
Differential Revision: https://reviews.llvm.org/D42487
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323987
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Sanjay Patel [Thu, 1 Feb 2018 17:57:45 +0000 (17:57 +0000)]
[AArch64] add tests with sqrt estimate and ieee denorms; NFC
As noted in D42323, we're not checking for denorms as we should.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323985
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Sanjay Patel [Thu, 1 Feb 2018 17:44:50 +0000 (17:44 +0000)]
[AArch64] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323984
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Craig Topper [Thu, 1 Feb 2018 17:08:41 +0000 (17:08 +0000)]
[X86] Remove custom lowering vXi1 extending loads and truncating stores.
Summary: Now that v2i1/v4i1 are legal without VLX. And v32i1 is legalized by splitting rather than widening. And isVectorLoadExtDesirable returns false for vXi1. It appears this handling is dead because the operations simply don't exist.
Reviewers: RKSimon, zvi, guyblank, delena, spatel
Reviewed By: delena
Subscribers: llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D42781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323983
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Craig Topper [Thu, 1 Feb 2018 17:08:39 +0000 (17:08 +0000)]
[X86] Turn X86ISD::AND nodes that have no flag users back into ISD::AND just before isel to enable test instruction matching
Summary:
EmitTest sometimes creates X86ISD::AND specifically to hide the AND from DAG combine. But this prevents isel patterns that look for (cmp (and X, Y), 0) from being able to see it. So we end up with an AND and a TEST. The TEST gets removed by compare instruction optimization during the peephole pass.
This patch attempts to fix this by converting X86ISD::AND with no flag users back into ISD::AND during the DAG preprocessing just before isel.
In order to do this correctly I had to make the X86ISD::AND node created by EmitTest in this case really have a flag output. Which arguably it should have had anyway so that the number of operands would be consistent for the opcode in all cases. Then I had to modify the ReplaceAllUsesWith to understand that we might be looking at an instruction with 2 outputs. Though in this case there are no uses to replace since we just created the node, but that's what the code did before so I just made it keep working.
Reviewers: spatel, RKSimon, niravd, deadalnix
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42764
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323982
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Sanjay Patel [Thu, 1 Feb 2018 16:57:18 +0000 (16:57 +0000)]
[DAGCombiner] filter out denorm inputs when calculating sqrt estimate (PR34994)
As shown in the example in PR34994:
https://bugs.llvm.org/show_bug.cgi?id=34994
...we can return a very wrong answer (inf instead of 0.0) for square root when
using a reciprocal square root estimate instruction.
Here, I've conditionalized the filtering out of denorms based on the function
having "denormal-fp-math"="ieee" in its attributes. The other options for this
attribute are 'preserve-sign' and 'positive-zero'.
So we don't generate this extra code by default with just '-ffast-math' (because
then there's no denormal attribute string at all), but it works if you specify
'-ffast-math -fdenormal-fp-math=ieee' from clang.
As noted in the review, there may be other problems in clang that affect the
results depending on platform (Linux x86 at least), but this should allow
creating the desired codegen.
Differential Revision: https://reviews.llvm.org/D42323
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323981
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Nirav Dave [Thu, 1 Feb 2018 16:11:59 +0000 (16:11 +0000)]
[SelectionDAG] Fix UpdateChains handling of TokenFactors
Summary:
In Instruction Selection UpdateChains replaces all matched Nodes'
chain references including interior token factors and deletes them.
This may allow nodes which depend on these interior nodes but are not
part of the set of matched nodes to be left with a dangling dependence.
Avoid this by doing the replacement for matched non-TokenFactor nodes.
Fixes PR36164.
Reviewers: jonpa, RKSimon, bogner
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D42754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323977
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Simon Pilgrim [Thu, 1 Feb 2018 15:30:02 +0000 (15:30 +0000)]
[X86][SSE] Add PR26491 horizontal add test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323973
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Simon Pilgrim [Thu, 1 Feb 2018 14:44:50 +0000 (14:44 +0000)]
[X86][AVX512DQ] Add DQ var permute 256 tests as requested on D42487
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323970
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Sjoerd Meijer [Thu, 1 Feb 2018 13:48:40 +0000 (13:48 +0000)]
[ARM] FullFP16 LowerReturn Fix
Commit r323512 introduced an optimisation in LowerReturn for half-precision
return values. A missing check caused a crash when the return value is "undef"
(i.e. a node that has no operands).
Differential Revision: https://reviews.llvm.org/D42743
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323968
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David Green [Thu, 1 Feb 2018 13:05:25 +0000 (13:05 +0000)]
Revert commit rL323951
Looks like it's causing timeouts out on at least ppc64le
buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323959
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Aleksandar Beserminji [Thu, 1 Feb 2018 12:53:26 +0000 (12:53 +0000)]
[mips] Include EVA instructions in Std2MicroMips mapping tables
This patch includes EVA instructions in the Std2MicroMips mapping
tables, which is required for direct object emission.
Differential Revision: https://reviews.llvm.org/D41771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323958
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Clement Courbet [Thu, 1 Feb 2018 12:12:01 +0000 (12:12 +0000)]
[AArch64][NFC] Make all ProcResource definitions include their SchedModel.
This makes targets ExynosM1,ExynosM3,ThunderX2T99 consistent with all
other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323955
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Yvan Roux [Thu, 1 Feb 2018 12:06:57 +0000 (12:06 +0000)]
[ARM] Add support for unpredictable MVN instructions.
This fixes bugzilla 33011
https://bugs.llvm.org/show_bug.cgi?id=33011
Defines bits {19-16} as zero or unpredictable as specified by the ARM ARM in
sections A8.8.116 and A8.8.117.
It fixes also the usage of PC register as destination register for MVN
register-shifted register version as specified in A8.8.117.
Differential Revision: https://reviews.llvm.org/D41905
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323954
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David Green [Thu, 1 Feb 2018 11:06:18 +0000 (11:06 +0000)]
[InstCombine] Allow common type conversions to i8/i16/i32
This, in instcombine, allows conversions to i8/i16/i32 (very
common cases) even if the resulting type is not legal according
to the data layout. This can often open up extra combine
opportunities.
Differential Revision: https://reviews.llvm.org/D42424
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323951
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Jonas Devlieghere [Thu, 1 Feb 2018 10:19:56 +0000 (10:19 +0000)]
[NFC] 'DWARFv5' -> 'DWARF v5'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323950
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Yvan Roux [Thu, 1 Feb 2018 08:39:58 +0000 (08:39 +0000)]
Test commit: Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323947
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Mikael Holmen [Thu, 1 Feb 2018 06:38:34 +0000 (06:38 +0000)]
[LSR] Don't force bases of foldable formulae to the final type.
Summary:
Before emitting code for scaled registers, we prevent
SCEVExpander from hoisting any scaled addressing mode
by emitting all the bases first. However, these bases
are being forced to the final type, resulting in some
odd code.
For example, if the type of the base is an integer and
the final type is a pointer, we will emit an inttoptr
for the base, a ptrtoint for the scale, and then a
'reverse' GEP where the GEP pointer is actually the base
integer and the index is the pointer. It's more intuitive
to use the pointer as a pointer and the integer as index.
Patch by: Bevin Hansson
Reviewers: atrick, qcolombet, sanjoy
Reviewed By: qcolombet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42103
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323946
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Dean Michael Berris [Thu, 1 Feb 2018 02:21:54 +0000 (02:21 +0000)]
[XRay][compiler-rt+llvm] Update XRay register stashing semantics
Summary:
This change expands the amount of registers stashed by the entry and
`__xray_CustomEvent` trampolines.
We've found that since the `__xray_CustomEvent` trampoline calls can show up in
situations where the scratch registers are being used, and since we don't
typically want to affect the code-gen around the disabled
`__xray_customevent(...)` intrinsic calls, that we need to save and restore the
state of even the scratch registers in the handling of these custom events.
Reviewers: pcc, pelikan, dblaikie, eizan, kpw, echristo, chandlerc
Reviewed By: echristo
Subscribers: chandlerc, echristo, hiraditya, davide, dblaikie, llvm-commits
Differential Revision: https://reviews.llvm.org/D40894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323940
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Rafael Espindola [Thu, 1 Feb 2018 00:25:19 +0000 (00:25 +0000)]
[MC] Fix assembler infinite loop on EH table using LEB padding.
Fix the infinite loop reported in PR35809. It can occur with GCC-style
EH table assembly, where the compiler relies on the assembler to
calculate the offsets in the EH table.
Also see https://sourceware.org/bugzilla/show_bug.cgi?id=4029 for the
equivalent issue in the GNU assembler.
Patch by Ryan Prichard!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323934
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Amara Emerson [Wed, 31 Jan 2018 23:56:07 +0000 (23:56 +0000)]
[GlobalOpt] Improve common case efficiency of static global initializer evaluation
For very, very large global initializers which can be statically evaluated, the
code would create vectors of temporary Constants, modifying them in place,
before committing the resulting Constant aggregate to the global's initializer
value. This had effectively O(n^2) complexity in the size of the global
initializer and would cause memory and non-termination issues compiling some
workloads.
This change performs the static initializer evaluation and creation in batches,
once for each global in the evaluated IR memory. The existing code is maintained
as a last resort when the initializers are more complex than simple values in a
large aggregate. This should theoretically by NFC, no test as the example case
is massive. The existing test cases pass with this, as well as the llvm test
suite.
To give an example, consider the following C++ code adapted from the clang
regression tests:
struct S {
int n = 10;
int m = 2 * n;
S(int a) : n(a) {}
};
template<typename T>
struct U {
T *r = &q;
T q = 42;
U *p = this;
};
U<S> e;
The global static constructor for 'e' will need to initialize 'r' and 'p' of
the outer struct, while also initializing the inner 'q' structs 'n' and 'm'
members. This batch algorithm will simply use general CommitValueTo() method
to handle the complex nested S struct initialization of 'q', before
processing the outermost members in a single batch. Using CommitValueTo() to
handle member in the outer struct is inefficient when the struct/array is
very large as we end up creating and destroy constant arrays for each
initialization.
For the above case, we expect the following IR to be generated:
%struct.U = type { %struct.S*, %struct.S, %struct.U* }
%struct.S = type { i32, i32 }
@e = global %struct.U { %struct.S* gep inbounds (%struct.U, %struct.U* @e,
i64 0, i32 1),
%struct.S { i32 42, i32 84 }, %struct.U* @e }
The %struct.S { i32 42, i32 84 } inner initializer is treated as a complex
constant expression, while the other two elements of @e are "simple".
Differential Revision: https://reviews.llvm.org/D42612
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323933
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Matt Arsenault [Wed, 31 Jan 2018 23:54:16 +0000 (23:54 +0000)]
DAG: Fix not truncating when promoting bswap/bitreverse
These need to convert back to the original type, like any
other promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323932
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Evgeniy Stepanov [Wed, 31 Jan 2018 22:55:19 +0000 (22:55 +0000)]
Revert "[ARM] Lower lower saturate to 0 and lower saturate to -1 using bit-operations"
Miscompiles code. Testcase pending.
This reverts commit r323869.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323929
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Matt Arsenault [Wed, 31 Jan 2018 22:54:37 +0000 (22:54 +0000)]
Utils: Fix DomTree update for entry block
If SplitBlockPredecessors was used on a function entry block,
it wouldn't update the dominator tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323928
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Matt Arsenault [Wed, 31 Jan 2018 22:54:27 +0000 (22:54 +0000)]
AMDGPU: Fix missing SCC def from s_xor_b64_term
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323927
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Amjad Aboud [Wed, 31 Jan 2018 22:39:05 +0000 (22:39 +0000)]
[AggressiveInstCombine] Fixed TruncCombine class to handle TruncInst leaf node correctly.
This covers the case where TruncInst leaf node is a constant expression.
See PR36121 for more details.
Differential Revision: https://reviews.llvm.org/D42622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323926
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Craig Topper [Wed, 31 Jan 2018 22:26:31 +0000 (22:26 +0000)]
[X86] Make the type checks in detectAVX512USatPattern more robust
This code currently uses isSimple and getSizeInBits in an attempt to prune types. But isSimple will return true for any type that any target supports natively. I don't think that's a good way to prune types. I also don't think the dest element type checks are very robust since we didn't do an isSimple check on the dest type.
This patch adds a check for the input type being legal to the one caller that didn't already check that. Then we explicitly check the element types for the destination are i8, i16, or i32
Differential Revision: https://reviews.llvm.org/D42706
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323924
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Max Moroz [Wed, 31 Jan 2018 22:13:07 +0000 (22:13 +0000)]
[llvm-cov] Fix incorrect usage of .precision specifier in format() call.
Summary: Existing version doesn't work on Windows as it always prints 0.00.
Reviewers: Dor1s
Reviewed By: Dor1s
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323923
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Puyan Lotfi [Wed, 31 Jan 2018 22:04:26 +0000 (22:04 +0000)]
Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html
In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323922
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Krzysztof Parzyszek [Wed, 31 Jan 2018 21:17:03 +0000 (21:17 +0000)]
[Hexagon] Rename HexagonISelLowering::getNode to getInstr, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323916
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Chandler Carruth [Wed, 31 Jan 2018 20:56:37 +0000 (20:56 +0000)]
[x86] Make the retpoline thunk insertion a machine function pass.
Summary:
This removes the need for a machine module pass using some deeply
questionable hacks. This should address PR36123 which is a case where in
full LTO the memory usage of a machine module pass actually ended up
being significant.
We should revert this on trunk as soon as we understand and fix the
memory usage issue, but we should include this in any backports of
retpolines themselves.
Reviewers: echristo, MatzeB
Subscribers: sanjoy, mcrosier, mehdi_amini, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D42726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323915
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Krzysztof Parzyszek [Wed, 31 Jan 2018 20:49:24 +0000 (20:49 +0000)]
[Hexagon] Implement HVX codegen for vector shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323914
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Marek Olsak [Wed, 31 Jan 2018 20:49:19 +0000 (20:49 +0000)]
[SeparateConstOffsetFromGEP] Fix up addrspace in the AMDGPU test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323913
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Krzysztof Parzyszek [Wed, 31 Jan 2018 20:48:11 +0000 (20:48 +0000)]
[Hexagon] Handle ANY_EXTEND_VECTOR_INREG in lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323912
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Krzysztof Parzyszek [Wed, 31 Jan 2018 20:46:55 +0000 (20:46 +0000)]
[Hexagon] Handle SETCC on vector pairs in lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323911
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Eli Friedman [Wed, 31 Jan 2018 20:42:25 +0000 (20:42 +0000)]
[GlobalOpt] Fix exponential compile-time with selects.
If you have a long chain of select instructions created from something
like `int* p = &g; if (foo()) p += 4; if (foo2()) p += 4;` etc., a naive
recursive visitor will recursively visit each select twice, which is
O(2^N) in the number of select instructions. Use the visited set to cut
off recursion in this case.
(No testcase because this doesn't actually change the behavior, just the
time.)
Differential Revision: https://reviews.llvm.org/D42451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323910
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Marek Olsak [Wed, 31 Jan 2018 20:18:11 +0000 (20:18 +0000)]
AMDGPU: Fold inline offset for loads properly in moveToVALU on GFX9
Summary:
This enables load merging into x2, x4, which is driven by inline offsets.
6500 shaders are affected:
Code Size in affected shaders: -15.14 %
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D42078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323909
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Marek Olsak [Wed, 31 Jan 2018 20:18:04 +0000 (20:18 +0000)]
AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D41663
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323908
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Marek Olsak [Wed, 31 Jan 2018 20:17:52 +0000 (20:17 +0000)]
[SeparateConstOffsetFromGEP] Preserve metadata when splitting GEPs
Summary:
!amdgpu.uniform needs to be preserved for AMDGPU, otherwise bad things
happen.
Reviewers: arsenm, nhaehnle, jingyue, broune, majnemer, bjarke.roune, dblaikie
Subscribers: wdng, tpr, llvm-commits
Differential Revision: https://reviews.llvm.org/D42744
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323907
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Geoff Berry [Wed, 31 Jan 2018 20:15:16 +0000 (20:15 +0000)]
[MachineOutliner] Freeze registers in new functions
Summary:
Call MRI.freezeReservedRegs() on functions created during outlining so
that calls to isReserved() by the verifier called after this pass won't
assert.
Reviewers: MatzeB, qcolombet, paquette
Subscribers: mcrosier, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D42749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323905
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Sam Clegg [Wed, 31 Jan 2018 19:50:14 +0000 (19:50 +0000)]
[WebAssembly] MC: Remove unused code for handling of wasm globals
For now, we are not using wasm globals, except for modeling of
the stack points.
Alos, factor out common struct WasmGlobalType, which matches the
name for that tuple in the Wasm spec and rename methods
to "isBindingGlobal", "isTypeGlobal" to avoid ambiguity.
Patch by Nicholas Wilson!
Differential Revision: https://reviews.llvm.org/D42750
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323901
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Sam Clegg [Wed, 31 Jan 2018 19:28:47 +0000 (19:28 +0000)]
[WebAssembly] MC: Resolve aliases when creating provisional table entries
This change is useful for the upcoming addition of the symbol
table (D41954) since in that world aliases for given function
all share the same function index.
This change does not effect lld because it essentially ignores
the wasm "table". The table exists only to the wasm objects
will validate and disassembly meaningfully.
Patch by Nicholas Wilson!
Differential Revision: https://reviews.llvm.org/D42095
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323900
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Amaury Sechet [Wed, 31 Jan 2018 19:20:06 +0000 (19:20 +0000)]
[X86] Generate testl instruction through truncates.
Summary:
This was introduced in D42646 but ended up being reverted because the original implementation was buggy.
Depends on D42646
Reviewers: craig.topper, niravd, spatel, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323899
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Chih-Hung Hsieh [Wed, 31 Jan 2018 19:12:50 +0000 (19:12 +0000)]
[Analysis] Disable calls to *_finite and other glibc-only functions on Android.
Since r322087, glibc's finite lib calls are generated when possible.
However, they are not supported on Android. This change also
disables other functions not available on Android.
Differential Revision: http://reviews.llvm.org/D42668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323898
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Max Moroz [Wed, 31 Jan 2018 17:37:21 +0000 (17:37 +0000)]
[llvm-cov] Improvements for summary report generated in HTML format.
Summary:
This commit adds the following changes:
1) coverage numbers are aligned to the left and padded with spaces in order to
provide better readability for percentage values, e.g.:
```
file1 | 89.13% (123 / 2323) | 100.00% (55 / 55) | 9.33% (14545 / 234234)
file_asda | 1.78% ( 23 / 4323) | 32.31% (555 / 6555) | 67.89% (1545 / 2234)
fileXXX | 100.00% (12323 / 12323) | 100.00% (555 / 555) | 100.00% (12345 / 12345)
```
2) added "hover" attribute to CSS for highlighting table row under mouse cursor
see screenshot attached to the phabricator review page
{
F5764813}
3) table title row and "totals" row now use bold text
Reviewers: vsk, morehouse
Reviewed By: vsk
Subscribers: kcc, llvm-commits
Differential Revision: https://reviews.llvm.org/D42093
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323892
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Daniel Neilson [Wed, 31 Jan 2018 17:24:53 +0000 (17:24 +0000)]
[CodeGenPrepare] Improve source and dest alignments of memory intrinsics independently
Summary:
This change is part of step five in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. In particular, this changes the
CodeGenPrepare pass to be more aggressive in improving the source and destination alignments
of memcpy/memmove/memset by exploiting our new ability to record independent alignments
for each argument.
Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API. ( rC323617 )
Step 4) Update Polly to use the new IRBuilder API. ( rL323618 )
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use [get|set]DestAlignment()
and [get|set]SourceAlignment() instead. ( rL323886 )
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323891
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Krzysztof Parzyszek [Wed, 31 Jan 2018 16:52:15 +0000 (16:52 +0000)]
[Hexagon] Handle BUILD_VECTOR from undef values in buildHvxVectorReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323889
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Amaury Sechet [Wed, 31 Jan 2018 16:48:54 +0000 (16:48 +0000)]
[X86] Avoid using high register trick for test instruction
Summary:
It seems it's main effect is to create addition copies when values are inr register that do not support this trick, which increase register pressure and makes the code bigger.
Reviewers: craig.topper, niravd, spatel, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42646
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323888
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