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Hiroshi Inoue [Mon, 22 Jan 2018 05:54:46 +0000 (05:54 +0000)]
[NFC] fix trivial typos in comments
"the the" -> "the"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323074
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Lang Hames [Mon, 22 Jan 2018 03:00:31 +0000 (03:00 +0000)]
[ORC] Add orc::SymbolResolver, a Orc/Legacy API interop header, and an
orc::SymbolResolver to JITSymbolResolver adapter.
The new orc::SymbolResolver interface uses asynchronous queries for better
performance. (Asynchronous queries with bulk lookup minimize RPC/IPC overhead,
support parallel incoming queries, and expose more available work for
distribution). Existing ORC layers will soon be updated to use the
orc::SymbolResolver API rather than the legacy llvm::JITSymbolResolver API.
Because RuntimeDyld still uses JITSymbolResolver, this patch also includes an
adapter that wraps an orc::SymbolResolver with a JITSymbolResolver API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323073
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Sanjay Patel [Sun, 21 Jan 2018 16:14:51 +0000 (16:14 +0000)]
[InstCombine] (X << Y) / X -> 1 << Y
...when the shift is known to not overflow with the matching
signed-ness of the division.
This closes an optimization gap caused by canonicalizing mul
by power-of-2 to shl as shown in PR35709:
https://bugs.llvm.org/show_bug.cgi?id=35709
Patch by Anton Bikineev!
Differential Revision: https://reviews.llvm.org/D42032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323068
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Sanjay Patel [Sun, 21 Jan 2018 15:36:15 +0000 (15:36 +0000)]
[InstSimplify] add baseline tests for (X << Y) % X -> 0; NFC
This is the 'rem' counterpart to D42032 and would be folded by
D42341.
Patch by Anton Bikineev.
Differential Revision: https://reviews.llvm.org/D42342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323067
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Eugene Leviant [Sun, 21 Jan 2018 10:22:19 +0000 (10:22 +0000)]
Temporarily revert r323062 to investigate buildbot failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323065
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Eugene Leviant [Sun, 21 Jan 2018 08:49:07 +0000 (08:49 +0000)]
An attempt to fix buildbot after rL323062
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323063
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Eugene Leviant [Sun, 21 Jan 2018 07:27:32 +0000 (07:27 +0000)]
[ThinLTO] Implement summary visualizer
Differential revision: https://reviews.llvm.org/D41297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323062
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Lang Hames [Sun, 21 Jan 2018 03:20:39 +0000 (03:20 +0000)]
[ORC] Add a lookupFlags method to VSO.
lookupFlags returns a SymbolFlagsMap for the requested symbols, along with a
set containing the SymbolStringPtr for any symbol not found in the VSO.
The JITSymbolFlags for each symbol will have been stripped of its transient
JIT-state flags (i.e. NotMaterialized, Materializing).
Calling lookupFlags does not trigger symbol materialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323060
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Lang Hames [Sun, 21 Jan 2018 03:20:36 +0000 (03:20 +0000)]
[ORC] More cleanup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323059
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Jakub Kuderski [Sun, 21 Jan 2018 03:07:16 +0000 (03:07 +0000)]
[Dominators] Remove misleading double-deletion test
Summary:
It's generally not safe to perform multiple DomTree updates without using the incremental API.
Although it is supposed to work in this particular case, the testcase is misleading/confusing, and it's better to remove it.
Reviewers: dberlin, brzycki, davide, grosser
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42333
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323058
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Lang Hames [Sun, 21 Jan 2018 02:24:45 +0000 (02:24 +0000)]
[ORC] Cleanup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323057
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Philip Reames [Sun, 21 Jan 2018 02:10:54 +0000 (02:10 +0000)]
[DSE] Factor out common code [NFC]
We already had the pointer being stored to in the MemLoc, reuse that code. In merging cases, it turned out the interface of the getLocForWrite had become inconsitent with other related utilities. Fix that by making sure the input passes hasAnalyzableWrite as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323056
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Philip Reames [Sun, 21 Jan 2018 01:44:33 +0000 (01:44 +0000)]
[DSE] Minor rename for clarity sake [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323055
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Don Hinton [Sun, 21 Jan 2018 00:29:00 +0000 (00:29 +0000)]
[cmake] Don't build Native llvm-config when cross compiling if passed by user.
Summary:
Rename LLVM_CONFIG_EXE to LLVM_CONFIG_PATH, and avoid building it if
passed in by user. This is the same way CLANG_TABLEGEN and
LLVM_TABLEGEN are handled, e.g., when -DLLVM_OPTIMIZED_TABLEGEN=ON is
passed.
Differential Revision: https://reviews.llvm.org/D41806
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323053
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Florian Hahn [Sat, 20 Jan 2018 19:52:16 +0000 (19:52 +0000)]
[ValueLattice] Use union to shave off ptr size bytes from elements.
By using a union for Constant* and ConstantRange we can shave off ptr
size bytes off lattice elements. On 64 bit systems, it brings down the
size to 40 bytes from 48 bytes.
Initialization of Range happens on-demand using placement new, if the
state changes to constantrange from non-constantrange. Similarly, the
Range object is destroyed if the state changes from constantrange to
non-constantrange.
Reviewers: reames, anna, davide
Reviewed By: reames, davide
Differential Revision: https://reviews.llvm.org/D41903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323049
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Craig Topper [Sat, 20 Jan 2018 18:50:09 +0000 (18:50 +0000)]
[X86] Add an override of targetShrinkDemandedConstant to limit the damage that shrinkdemandedbits can do to zext_in_reg operations
Summary:
This patch adds an implementation of targetShrinkDemandedConstant that tries to keep shrinkdemandedbits from removing bits that would otherwise have been recognized as a movzx.
We still need a follow patch to stop moving ands across srl if the and could be represented as a movzx before the shift but not after. I think this should help with some of the cases that D42088 ended up removing during isel.
Reviewers: spatel, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323048
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Simon Pilgrim [Sat, 20 Jan 2018 17:16:01 +0000 (17:16 +0000)]
[X86][SSE] Check for out of bounds PEXTR/PINSR indices during faux shuffle combining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323045
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Jonas Paulsson [Sat, 20 Jan 2018 16:57:06 +0000 (16:57 +0000)]
Move new test from Generic to SystemZ.
A few build bots failed with r323042 because they are not configured to
build the SystemZ target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323044
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Sanjay Patel [Sat, 20 Jan 2018 16:13:40 +0000 (16:13 +0000)]
[InstCombine] add baseline tests for (X << Y) / X -> 1 << Y; NFC
This fold is proposed in D42032.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323043
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Jonas Paulsson [Sat, 20 Jan 2018 16:05:10 +0000 (16:05 +0000)]
[SelectionDAG] Fix codegen of vector stores with non byte-sized elements.
This was completely broken, but hopefully fixed by this patch.
In cases where it is needed, a vector with non byte-sized elements is stored
by extracting, zero-extending, shift:ing and or:ing the elements into an
integer of the same width as the vector, which is then stored.
Review: Eli Friedman, Ulrich Weigand
https://reviews.llvm.org/D42100#inline-369520
https://bugs.llvm.org/show_bug.cgi?id=35520
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323042
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Martin Storsjo [Sat, 20 Jan 2018 11:44:32 +0000 (11:44 +0000)]
[COFF] Keep the underscore on exported decorated stdcall functions in MSVC mode
This (together with the corresponding LLD commit, that contains the
testcase updates) fixes PR35733.
Differential Revision: https://reviews.llvm.org/D41631
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323035
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David Green [Sat, 20 Jan 2018 10:29:37 +0000 (10:29 +0000)]
[Dominators] Fix some edge cases for PostDomTree updating
These fix some odd cfg cases where batch-updating the post
dom tree fails. Usually around infinite loops and roots
ending up being different.
Differential Revision: https://reviews.llvm.org/D42247
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323034
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Craig Topper [Sat, 20 Jan 2018 08:13:35 +0000 (08:13 +0000)]
[X86] Add some more v32i1 shuffle tests with shuffles between mask creation and mask usage rather than being just shuffling input arguments.
The existing tests just tested shuffles of v32i1 inputs, but arguments are promoted to v32i8. So it wasn't a good demonstration of v32i1 shuffle handling.
The new test cases use compares and selects to get k-register operations around the shuffle.
This is prep work for demonstrating changes from D42031.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323031
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Craig Topper [Sat, 20 Jan 2018 07:50:57 +0000 (07:50 +0000)]
[X86] Add test cases for failures to use movzx due to various issues with demanded bits.
D42265 and D42313 should help with some of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323030
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Saleem Abdulrasool [Sat, 20 Jan 2018 01:26:46 +0000 (01:26 +0000)]
test: fix ARM tests harder
Remove the missed check update for the removal of the x86 specific
vector call on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323023
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Saleem Abdulrasool [Sat, 20 Jan 2018 01:03:11 +0000 (01:03 +0000)]
test: move ARM test from x86
The ARM backend is not guaranteed to be present on x86, move the test to
the ARM tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323021
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Saleem Abdulrasool [Sat, 20 Jan 2018 00:28:02 +0000 (00:28 +0000)]
CodeGen: handle llvm.used properly for COFF
`llvm.used` contains a list of pointers to named values which the
compiler, assembler, and linker are required to treat as if there is a
reference that they cannot see. Ensure that the symbols are preserved
by adding an explicit `-include` reference to the linker command.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323017
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Craig Topper [Sat, 20 Jan 2018 00:26:12 +0000 (00:26 +0000)]
[X86] Teach X86 codegen to use vector width preference to avoid promoting to 512-bit types when VLX is enabled and the preference is for a smaller size.
This change applies to places where we would turn 128/256-bit code into 512-bit in order to get a wider element type through sext/zext. Any 512-bit types that already existed in the IR/DAG will be left that way.
The width preference has no effect on codegen behavior when the target does not have AVX512 enabled. So AVX/AVX2 codegen cannot be limited via this mechanism yet.
If the preference is lower than 256 we may still use a 256 bit type to do the operation. Constraining to 128 bits makes it much more difficult to support some operations. For many of these cases we need to change element width while keeping element count constant which is easiest done by switching between 256 and 128 bit.
The preference is only obeyed when AVX512 and VLX are available. This means the preference is not obeyed for KNL, but is obeyed for SKX, Cannonlake, and Icelake. For KNL, the only way to do masked operation is on 512-bit registers so we would have to completely disable masking to obey the preference. We would also lose support for gather, scatter, ctlz, vXi64 multiplies, etc. This may change in the future, but this simplifies the initial implementation.
Differential Revision: https://reviews.llvm.org/D41895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323016
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Craig Topper [Sat, 20 Jan 2018 00:26:08 +0000 (00:26 +0000)]
[X86] Add support for passing 'prefer-vector-width' function attribute into X86Subtarget and exposing via X86's getRegisterWidth TTI interface.
This will cause the vectorizers to do some limiting of the vector widths they create. This is not a strict limit. There are reasons I know of that the loop vectorizer will generate larger vectors for.
I've written this in such a way that the interface will only return a properly supported width(0/128/256/512) even if the attribute says something funny like 384 or 10.
This has been split from D41895 with the remainder in a follow up commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323015
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Derek Schuff [Sat, 20 Jan 2018 00:01:18 +0000 (00:01 +0000)]
[WebAssembly] Fix MSVC build
nullptr_t can't be used left of boolean &&
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323012
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Akira Hatanaka [Fri, 19 Jan 2018 23:51:13 +0000 (23:51 +0000)]
[ObjCARC] Do not turn a call to @objc_autoreleaseReturnValue into a call
to @objc_autorelease if its operand is a PHI and the PHI has an
equivalent value that is used by a return instruction.
For example, ARC optimizer shouldn't replace the call in the following
example, as doing so breaks the AutoreleaseRV/RetainRV optimization:
%v1 = bitcast i32* %v0 to i8*
br label %bb3
bb2:
%v3 = bitcast i32* %v2 to i8*
br label %bb3
bb3:
%p = phi i8* [ %v1, %bb1 ], [ %v3, %bb2 ]
%retval = phi i32* [ %v0, %bb1 ], [ %v2, %bb2 ] ; equivalent to %p
%v4 = tail call i8* @objc_autoreleaseReturnValue(i8* %p)
ret i32* %retval
Also, make sure ObjCARCContract replaces @objc_autoreleaseReturnValue's
operand uses with its value so that the call gets tail-called.
rdar://problem/
15894705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323009
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Abderrazek Zaafrani [Fri, 19 Jan 2018 23:10:56 +0000 (23:10 +0000)]
[AArch64] Add ARMv8.2-A FP16 scalar intrinsics
https://reviews.llvm.org/D41792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323005
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Rui Ueyama [Fri, 19 Jan 2018 22:56:04 +0000 (22:56 +0000)]
Fix -Wunused-variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323004
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Sanjay Patel [Fri, 19 Jan 2018 22:47:49 +0000 (22:47 +0000)]
[x86] add tests for sqrt estimate that should respect denorms; NFC (PR34994)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323003
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Lang Hames [Fri, 19 Jan 2018 22:24:13 +0000 (22:24 +0000)]
[ORC] Re-apply r322913 with a fix for a read-after-free error.
ExternalSymbolMap now stores the string key (rather than using a StringRef),
as the object file backing the key may be removed at any time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323001
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Craig Topper [Fri, 19 Jan 2018 22:04:20 +0000 (22:04 +0000)]
[X86] Autogenerate complete checks on a couple tests. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322997
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Jakub Kuderski [Fri, 19 Jan 2018 21:27:24 +0000 (21:27 +0000)]
[Dominators] Visit affected node candidates found at different root levels
Summary:
This patch attempts to fix the DomTree incremental insertion bug found here [[ https://bugs.llvm.org/show_bug.cgi?id=35969 | PR35969 ]] .
When performing an insertion into a piece of unreachable CFG, we may find the same not at different levels. When this happens, the node can turn out to be affected when we find it starting from a node with a lower level in the tree. The level at which we start visitation affects if we consider a node affected or not.
This patch tracks the lowest level at which each node was visited during insertion and allows it to be visited multiple times, if it can cause it to be considered affected.
Reviewers: brzycki, davide, dberlin, grosser
Reviewed By: brzycki
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42231
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322993
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Jessica Paquette [Fri, 19 Jan 2018 21:21:49 +0000 (21:21 +0000)]
Add optional DICompileUnit to DIBuilder + make outliner debug info use it
Previously, the DIBuilder didn't expose functionality to set its compile unit
in any other way than calling createCompileUnit. This meant that the outliner,
which creates new functions, had to create a new compile unit for its debug
info.
This commit adds an optional parameter in the DIBuilder's constructor which
lets you set its CU at construction.
It also changes the MachineOutliner so that it keeps track of the DISubprograms
for each outlined sequence. If debugging information is requested, then it
uses one of the outlined sequence's DISubprograms to grab a CU. It then uses
that CU to construct the DISubprogram for the new outlined function.
The test has also been updated to reflect this change.
See https://reviews.llvm.org/D42254 for more information. Also see the e-mail
discussion on D42254 in llvm-commits for more context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322992
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Ulrich Weigand [Fri, 19 Jan 2018 20:56:04 +0000 (20:56 +0000)]
[SystemZ] Prefer LOCHI over generating IPM sequences
On current machines we have load-on-condition instructions that can be
used to directly implement the SETCC semantics. If we have those, it is
always preferable to use them instead of generating the IPM sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322989
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Ulrich Weigand [Fri, 19 Jan 2018 20:54:18 +0000 (20:54 +0000)]
[SystemZ] Directly use CC result of compare-and-swap
In order to implement a test whether a compare-and-swap succeeded, the
SystemZ back-end currently emits a rather inefficient sequence of first
converting the CC result into an integer, and then testing that integer
against zero. This commit changes the back-end to simply directly test
the CC value set by the compare-and-swap instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322988
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Ulrich Weigand [Fri, 19 Jan 2018 20:52:04 +0000 (20:52 +0000)]
[SystemZ] Rework IPM sequence generation
The SystemZ back-end uses a sequence of IPM followed by arithmetic
operations to implement the SETCC primitive. This is currently done
early during SelectionDAG. This patch moves generating those sequences
to much later in SelectionDAG (during PreprocessISelDAG).
This doesn't change much in generated code by itself, but it allows
further enhancements that will be checked-in as follow-on commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322987
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Ulrich Weigand [Fri, 19 Jan 2018 20:49:05 +0000 (20:49 +0000)]
[SystemZ] Implement computeKnownBitsForTargetNode
This provides a computeKnownBits implementation for SystemZ target
nodes. Currently only SystemZISD::SELECT_CCMASK is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322986
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Ulrich Weigand [Fri, 19 Jan 2018 20:47:14 +0000 (20:47 +0000)]
[SelectionDAG] Teach computeKnownBits about ATOMIC_CMP_SWAP_WITH_SUCCESS boolean return value
The second return value of ATOMIC_CMP_SWAP_WITH_SUCCESS is known to be a
boolean, and should therefore be treated by computeKnownBits just like
the second return values of SMULO / UMULO.
Differential Revision: https://reviews.llvm.org/D42067
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322985
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Ulrich Weigand [Fri, 19 Jan 2018 19:51:38 +0000 (19:51 +0000)]
[SystemZ] Run branch-12.ll test only if long tests enabled
This avoids excessive test run times e.g. with expensive checks enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322983
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Sam Clegg [Fri, 19 Jan 2018 18:57:01 +0000 (18:57 +0000)]
[WebAssembly] MC: Start table at offset 1 rather than 0
Summary:
For consistency with the output of lld.
This is useful in runnable binaries as can them be sure the
null function pointer will never be a valid argument
call_indirect.
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D42284
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322978
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Simon Pilgrim [Fri, 19 Jan 2018 17:50:25 +0000 (17:50 +0000)]
[X86][SSE] Add SSE2 gather tests
Check codegen without PEXTRD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322974
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Michal Gorny [Fri, 19 Jan 2018 17:47:03 +0000 (17:47 +0000)]
[cmake] Include LLVM_LIBXML2_ENABLED in LLVMConfig.cmake, PR36006
Include the LLVM_LIBXML2_ENABLED cache variable in LLVMConfig.cmake
in order to make it available for other LLVM packages to query. This
is necessary to fix stand-alone testing of LLD.
Differential Revision: https://reviews.llvm.org/D42252
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322973
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Joel Galenson [Fri, 19 Jan 2018 17:46:27 +0000 (17:46 +0000)]
[ARM] Fix perf regression in compare optimization.
Fix a performance regression caused by r322737.
While trying to make it easier to replace compares with existing adds and
subtracts, I accidentally stopped it from doing so in some cases. This should
fix that. I'm also fixing another potential bug in that commit.
Differential Revision: https://reviews.llvm.org/D42263
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322972
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Derek Schuff [Fri, 19 Jan 2018 17:45:54 +0000 (17:45 +0000)]
[WebAssembly] Fix libcall signature lookup
RuntimeLibcallSignatures previously manually initialized all the libcall
names into an array and searched it linearly for the first match to lookup
the corresponding index.
r322802 switched that to initializing a map keyed by the libcall name.
Neither of these approaches works correctly because some libcall numbers use
the same name on different platforms (e.g. the "l" suffixed functions
use f80 or f128 or ppcf128).
This change fixes that by ensuring that each name only goes into the map
once. It also adds tests.
Differential Revision: https://reviews.llvm.org/D42271
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322971
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Daniel Neilson [Fri, 19 Jan 2018 17:32:33 +0000 (17:32 +0000)]
Additional fixes for docs in addition to r322968.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322969
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Daniel Neilson [Fri, 19 Jan 2018 17:24:21 +0000 (17:24 +0000)]
Fix docs build break caused by r322965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322968
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Dan Gohman [Fri, 19 Jan 2018 17:16:24 +0000 (17:16 +0000)]
[WebAssembly] Make sign-extension opcodes a distinct feature.
Sign-extension opcodes have been split into a separate proposal from
the main threads proposal, so switch them to their own target
feature. See:
https://github.com/WebAssembly/sign-extension-ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322966
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Daniel Neilson [Fri, 19 Jan 2018 17:13:12 +0000 (17:13 +0000)]
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
Summary:
This is a resurrection of work first proposed and discussed in Aug 2015:
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
and initially landed (but then backed out) in Nov 2015:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.
This change is the first in a series that allows source and dest to each
have their own alignments by using the alignment attribute on their arguments.
In this change we:
1) Remove the alignment argument.
2) Add alignment attributes to the source & dest arguments. We, temporarily,
require that the alignments for source & dest be equal.
For example, code which used to read:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)
Downstream users may have to update their lit tests that check for
@llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script
may help with updating the majority of your tests, but it does not catch all possible
patterns so some manual checking and updating will be required.
s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g
The remaining changes in the series will:
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments.
Step 3) Update Clang to use the new IRBuilder API.
Step 4) Update Polly to use the new IRBuilder API.
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use
getDestAlignment() and getSourceAlignment() instead.
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reviewers: pete, hfinkel, lhames, reames, bollu
Reviewed By: reames
Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits
Differential Revision: https://reviews.llvm.org/D41675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322965
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Petr Hosek [Fri, 19 Jan 2018 17:10:55 +0000 (17:10 +0000)]
Fallback option for colorized output when terminfo isn't available
Try to detect the terminal color support by checking the value of the
TERM environment variable. This is not great, but it's better than
nothing when terminfo library isn't available, which may still be the
case on some Linux distributions.
Differential Revision: https://reviews.llvm.org/D42055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322962
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Sanjay Patel [Fri, 19 Jan 2018 17:09:28 +0000 (17:09 +0000)]
[x86] add RUN line and auto-generate checks
There were checks for a 32-bit target here, but no RUN line
corresponding to that prefix. I don't know what the intent
of these tests is, but at least now we can see what happens
for both targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322961
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Sanjay Patel [Fri, 19 Jan 2018 17:05:16 +0000 (17:05 +0000)]
[x86] regenerate complete checks; NFC
D42265 will improve something here, but it's not obvious how without more checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322960
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Don Hinton [Fri, 19 Jan 2018 17:02:12 +0000 (17:02 +0000)]
[cmake] Fix typo in LLVM_UTILS_INSTALL_DIR definition.
Differential Revision: https://reviews.llvm.org/D41804
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322959
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Carey Williams [Fri, 19 Jan 2018 16:55:23 +0000 (16:55 +0000)]
Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322958
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Sanjay Patel [Fri, 19 Jan 2018 16:37:25 +0000 (16:37 +0000)]
[x86] shrink 'and' immediate values by setting the high bits (PR35907)
Try to reverse the constant-shrinking that happens in SimplifyDemandedBits()
for 'and' masks when it results in a smaller sign-extended immediate.
We are also able to detect dead 'and' ops here (the mask is all ones). In
that case, we replace and return without selecting the 'and'.
Other targets might want to share some of this logic by enabling this under a
target hook, but I didn't see diffs for simple cases with PowerPC or AArch64,
so they may already have some specialized logic for this kind of thing or have
different needs.
This should solve PR35907:
https://bugs.llvm.org/show_bug.cgi?id=35907
Differential Revision: https://reviews.llvm.org/D42088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322957
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Sanjay Patel [Fri, 19 Jan 2018 16:12:55 +0000 (16:12 +0000)]
[InstSimplify] use m_Specific and commutative matcher to reduce code; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322955
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Nirav Dave [Fri, 19 Jan 2018 15:37:57 +0000 (15:37 +0000)]
[X86] Extend load-op-store fusion merge to ADC/SBB.
Summary: Add handling of EFLAG input to X86 Load-op-store fusion checking.
Reviewers: craig.topper, RKSimon
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D42128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322952
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Sander de Smalen [Fri, 19 Jan 2018 15:22:00 +0000 (15:22 +0000)]
[AArch64][SVE] Asm: Add support for RDVL/ADDVL/ADDPL instructions
Reviewers: fhahn, rengolin, t.p.northover, echristo, olista01, SjoerdMeijer
Reviewed By: SjoerdMeijer
Subscribers: SjoerdMeijer, aemerson, javed.absar, tschuett, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D41900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322951
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Simon Pilgrim [Fri, 19 Jan 2018 14:55:22 +0000 (14:55 +0000)]
[X86][AVX] Add more variable permute tests for source vectors smaller than destination
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322948
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Alexey Bataev [Fri, 19 Jan 2018 14:40:13 +0000 (14:40 +0000)]
[SLP] Fix vectorization for tree with trunc to minimum required bit width.
Summary:
If the vectorized tree has truncate to minimum required bit width and
the vector type of the cast operation after the truncation is the same
as the vector type of the cast operands, count cost of the vector cast
operation as 0, because this cast will be later removed.
Also, if the vectorization tree root operations are integer cast operations, do not consider them as candidates for truncation. It will just create extra number of the same vector/scalar operations, which will be removed by instcombiner.
Reviewers: RKSimon, spatel, mkuper, hfinkel, mssimpso
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41948
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322946
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Klaus Kretzschmar [Fri, 19 Jan 2018 14:17:53 +0000 (14:17 +0000)]
[Support] - Check nullptr after allocation with malloc in MallocAllocator - Differential Revision: reviews.llvm.org/D34753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322944
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Dmitry Preobrazhensky [Fri, 19 Jan 2018 13:49:53 +0000 (13:49 +0000)]
[AMDGPU][MC] Corrected parsing of image modifiers and encoding of image atomics
See bugs
35962: https://bugs.llvm.org/show_bug.cgi?id=35962
35963: https://bugs.llvm.org/show_bug.cgi?id=35963
Differential Revision: https://reviews.llvm.org/D42184
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322942
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Simon Pilgrim [Fri, 19 Jan 2018 12:09:17 +0000 (12:09 +0000)]
Fix line endings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322940
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Simon Pilgrim [Fri, 19 Jan 2018 12:07:44 +0000 (12:07 +0000)]
[X86] Add KNL target to slow PMULLD tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322939
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Simon Pilgrim [Fri, 19 Jan 2018 12:06:49 +0000 (12:06 +0000)]
[X86] Add RDPID schedule test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322938
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Simon Pilgrim [Fri, 19 Jan 2018 12:05:58 +0000 (12:05 +0000)]
[X86] Regenerate RDPMC intrinsic test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322937
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Francis Visoiu Mistrih [Fri, 19 Jan 2018 11:44:42 +0000 (11:44 +0000)]
[CodeGen] Unify printing format of debug-location in both MIR and -debug
Use "debug-location" instead of "; dbg:" in MI::print.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322936
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Hiroshi Inoue [Fri, 19 Jan 2018 10:55:29 +0000 (10:55 +0000)]
[NFC] fix trivial typos in comments
"the the" -> "the"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322934
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Florian Hahn [Fri, 19 Jan 2018 10:32:48 +0000 (10:32 +0000)]
[ValueLattice] Use getters instead of direct accesses (NFC).
Reviewers: reames, davide, anna
Reviewed By: reames, davide
Differential Revision: https://reviews.llvm.org/D42270
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322933
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Alina Sbirlea [Fri, 19 Jan 2018 10:26:40 +0000 (10:26 +0000)]
[ModRefInfo] Return NoModRef for Must and NoModRef.
Summary:
In ModRefInfo "Must" was introduced to track presence of MustAlias, but we still want to return NoModRef when there is neither Mod or Ref, even when MustAlias is found. Patch has small fixes to ensure this happens.
Minor cleanup to remove nesting for 2 if statements when calling getModRefInfo for 2 ImmutableCallSites.
Reviewers: sanjoy
Subscribers: jlebar, llvm-commits
Differential Revision: https://reviews.llvm.org/D42209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322932
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John Brawn [Fri, 19 Jan 2018 10:05:15 +0000 (10:05 +0000)]
[InstCombine] Make foldSelectOpOp able to handle two-operand getelementptr
Three (or more) operand getelementptrs could plausibly also be handled, but
handling only two-operand fits in easily with the existing BinaryOperator
handling.
Differential Revision: https://reviews.llvm.org/D39958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322930
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Matthias Braun [Fri, 19 Jan 2018 06:46:10 +0000 (06:46 +0000)]
Split MachineLICM into EarlyMachineLICM and MachineLICM; NFC
This avoids playing games with pseudo pass IDs and avoids using an
unreliable MRI::isSSA() check to determine whether register allocation
has happened.
Note that this renames:
- MachineLICMID -> EarlyMachineLICM
- PostRAMachineLICMID -> MachineLICMID
to be consistent with the EarlyTailDuplicate/TailDuplicate naming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322927
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Matthias Braun [Fri, 19 Jan 2018 06:08:17 +0000 (06:08 +0000)]
Split TailDuplicatePass into pre- and post-RA variant; NFC
Split TailDuplicatePass into EarlyTailDuplicate and TailDuplicate. This
avoids playing games with fake pass IDs and using MRI::isSSA() to
determine pre-/post-RA state.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322926
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Matthias Braun [Fri, 19 Jan 2018 06:08:15 +0000 (06:08 +0000)]
Move tests to the correct place
test/CodeGen/MIR is for testing the MIR parser/printer. Tests for passes
and targets belong to test/CodeGen/TARGETNAME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322925
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Craig Topper [Fri, 19 Jan 2018 05:47:32 +0000 (05:47 +0000)]
[X86] Make better use of instregex for cmovcc/setcc/jcc instructions in the Intel scheduler models.
Combine all the separate condition codes into a singular expression when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322924
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Serguei Katkov [Fri, 19 Jan 2018 04:52:39 +0000 (04:52 +0000)]
Revert [CGP] Re-enable Select in complex addressing mode
One of buildbots failed. Revert for now till fix the issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322923
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Matthias Braun [Fri, 19 Jan 2018 03:16:36 +0000 (03:16 +0000)]
AArch64: Fix emergency spillslot being out of reach for large callframes
Re-commit of r322200: The testcase shouldn't hit machineverifiers
anymore with r322917 in place.
Large callframes (calls with several hundreds or thousands or
parameters) could lead to situations in which the emergency spillslot is
out of range to be addressed relative to the stack pointer.
This commit forces the use of a frame pointer in the presence of large
callframes.
This commit does several things:
- Compute max callframe size at the end of instruction selection.
- Add mirFileLoaded target callback. Use it to compute the max callframe size
after loading a .mir file when the size wasn't specified in the file.
- Let TargetFrameLowering::hasFP() return true if there exists a
callframe > 255 bytes.
- Always place the emergency spillslot close to FP if we have a frame
pointer.
- Note that `useFPForScavengingIndex()` would previously return false
when a base pointer was available leading to the emergency spillslot
getting allocated late (that's the whole effect of this callback).
Which made no sense to me so I took this case out: Even though the
emergency spillslot is technically not referenced by FP in this case
we still want it allocated early.
Differential Revision: https://reviews.llvm.org/D40876
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322919
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Matthias Braun [Fri, 19 Jan 2018 02:45:38 +0000 (02:45 +0000)]
AArch64: Omit callframe setup/destroy when not necessary
Do not create CALLSEQ_START/CALLSEQ_END when there is no callframe to
setup and the callframe size is 0.
- Fixes an invalid callframe nesting for byval arguments, which would
look like this before this patch (as in `big-byval.ll`):
...
ADJCALLSTACKDOWN 32768, 0, ... # Setup for extfunc
...
ADJCALLSTACKDOWN 0, 0, ... # setup for memcpy
...
BL &memcpy ...
ADJCALLSTACKUP 0, 0, ... # destroy for memcpy
...
BL &extfunc
ADJCALLSTACKUP 32768, 0, ... # destroy for extfunc
- Saves us two instructions in the common case of zero-sized stackframes.
- Remove an unnecessary scheduling barrier (hence the small unittest
changes).
Differential Revision: https://reviews.llvm.org/D42006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322917
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Sam Clegg [Fri, 19 Jan 2018 01:40:52 +0000 (01:40 +0000)]
[WebAssembly] Add test expectations for gcc C++ tests (gcc/testsuite/g++.dg)
Differential Revision: https://reviews.llvm.org/D42226
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322915
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Lang Hames [Fri, 19 Jan 2018 01:40:26 +0000 (01:40 +0000)]
[ORC] Revert r322913 while I investigate an ASan failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322914
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Lang Hames [Fri, 19 Jan 2018 01:12:40 +0000 (01:12 +0000)]
[ORC] Redesign the JITSymbolResolver interface to support bulk queries.
Bulk queries reduce IPC/RPC overhead for cross-process JITing and expose
opportunities for parallel compilation.
The two new query methods are lookupFlags, which finds the flags for each of a
set of symbols; and lookup, which finds the address and flags for each of a
set of symbols. (See doxygen comments for more details.)
The existing JITSymbolResolver class is renamed LegacyJITSymbolResolver, and
modified to extend the new JITSymbolResolver class using the following scheme:
- lookupFlags is implemented by calling findSymbolInLogicalDylib for each of the
symbols, then returning the result of calling getFlags() on each of these
symbols. (Importantly: lookupFlags does NOT call getAddress on the returned
symbols, so lookupFlags will never trigger materialization, and lookupFlags will
never call findSymbol, so only symbols that are part of the logical dylib will
return results.)
- lookup is implemented by calling findSymbolInLogicalDylib for each symbol and
falling back to findSymbol if findSymbolInLogicalDylib returns a null result.
Assuming a symbol is found its getAddress method is called to materialize it and
the result (if getAddress succeeds) is stored in the result map, or the error
(if getAddress fails) is returned immediately from lookup. If any symbol is not
found then lookup returns immediately with an error.
This change will break any out-of-tree derivatives of JITSymbolResolver. This
can be fixed by updating those classes to derive from LegacyJITSymbolResolver
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322913
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Craig Topper [Thu, 18 Jan 2018 23:52:31 +0000 (23:52 +0000)]
[X86] Add intrinsic support for the RDPID instruction
This adds a new instrinsic to support the rdpid instruction. The implementation is a bit weird because the intrinsic is defined as always returning 32-bits, but the assembler support thinks the instruction produces a 64-bit register in 64-bit mode. But really it zeros the upper 32 bits. So I had to add separate patterns where 64-bit mode uses an extract_subreg.
Differential Revision: https://reviews.llvm.org/D42205
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322910
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Sanjay Patel [Thu, 18 Jan 2018 23:11:24 +0000 (23:11 +0000)]
[InstSimplify] regenerate checks and add tests for commutes; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322907
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Changpeng Fang [Thu, 18 Jan 2018 22:57:57 +0000 (22:57 +0000)]
AMDGPU/SI: Fix typos in d16 support patch the buffer intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322906
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Reid Kleckner [Thu, 18 Jan 2018 22:55:43 +0000 (22:55 +0000)]
[CodeView] Add line numbers for inlined call sites
We did this for inline call site line tables, but we hadn't done it for
regular function line tables yet. This patch copies that logic from
encodeInlineLineTable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322905
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Reid Kleckner [Thu, 18 Jan 2018 22:55:14 +0000 (22:55 +0000)]
[CodeView] Sink complex inline functions to .cpp file, NFC
I'm cleaning up this code before I attempt to fix a line table bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322904
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Changpeng Fang [Thu, 18 Jan 2018 22:08:53 +0000 (22:08 +0000)]
AMDGPU/SI: Add d16 support for image intrinsics.
Summary:
This patch implements d16 support for image load, image store and image sample intrinsics.
Reviewers:
Matt, Brian.
Differential Revision:
https://reviews.llvm.org/D3991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322903
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Eric Christopher [Thu, 18 Jan 2018 21:45:51 +0000 (21:45 +0000)]
Typo fix SIBABRT -> SIGABRT.
Based on a patch by Henry Wong!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322902
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Martin Storsjo [Thu, 18 Jan 2018 21:21:48 +0000 (21:21 +0000)]
[test] Actually check the common parts in CodeGen/ARM/global-merge-external.ll. NFC.
Previously, these parts weren't ever checked. The label patterns
need to be extended to match successfully on macho.
Differential Revision: https://reviews.llvm.org/D42126
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322900
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Peter Collingbourne [Thu, 18 Jan 2018 20:49:33 +0000 (20:49 +0000)]
Support: Add missing #include.
This #include is necessary to provide the definitions of _fpclass
and _FPCLASS_NZ when building with libc++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322885
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Paul Robinson [Thu, 18 Jan 2018 20:33:35 +0000 (20:33 +0000)]
[DWARFv5] Number the line-table's directory array correctly.
The compilation directory has always been #0, but as of DWARF v5 it is
explicitly listed in the line-table section instead of implicitly
being a reference to the compile_unit DIE's DW_AT_comp_dir attribute.
This means the dumper should number the dumped array starting with 0
or 1 depending on the DWARF version of the line table.
References in the generated DWARF are correct, it's just the dumper
that was wrong. Also some assembler-coded tests were similarly
confused about directory numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322884
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Sylvestre Ledru [Thu, 18 Jan 2018 19:57:35 +0000 (19:57 +0000)]
we have now https support for apt.llvm.org. Updating the URL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322881
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Dimitry Andric [Thu, 18 Jan 2018 19:30:30 +0000 (19:30 +0000)]
Follow-up to rL322875 by initializing the do_libcxxabi variable properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322879
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Amara Emerson [Thu, 18 Jan 2018 19:21:27 +0000 (19:21 +0000)]
[AArch64][GlobalISel] Add isel support for global values in the large code model.
Fixes PR35958.
Differential Revision: https://reviews.llvm.org/D42175
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322878
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Simon Pilgrim [Thu, 18 Jan 2018 19:17:26 +0000 (19:17 +0000)]
[X86][SSE] Regenerate vector promotion tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322877
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Ana Pazos [Thu, 18 Jan 2018 18:54:05 +0000 (18:54 +0000)]
[RISCV] Fixed setting predicates for compressed instructions.
Summary:
Fixed setting predicates for compressed instructions.
Some instructions were being generated with C extension
enabled only, without proper checks for the other
required extensions like F, D and 32 and 64-bit target checks.
Affected instructions:
C_FLD, C_FLW, C_LD, C_FSD, C_FSW, C_SD,
C_JAL, C_ADDIW, C_SUBW, C_ADDW,
C_FLDSP, C_FLWSP, C_LDSP, C_FSDSP, C_FSWSP, C_SDSP
Reviewers: asb, shiva0217
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, llvm-commits
Differential Revision: https://reviews.llvm.org/D42132
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322876
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