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Davide Italiano [Thu, 11 May 2017 19:58:52 +0000 (19:58 +0000)]
[AMDGPU] Placate unused variable warning in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302821
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Vadzim Dambrouski [Thu, 11 May 2017 19:56:14 +0000 (19:56 +0000)]
[MSP430] Generate EABI-compliant libcalls
Updates the MSP430 target to generate EABI-compatible libcall names.
As a byproduct, adjusts the hardware multiplier options available in
the MSP430 target, adds support for promotion of the ISD::MUL operation
for 8-bit integers, and correctly marks R11 as used by call instructions.
Patch by Andrew Wygle.
Differential Revision: https://reviews.llvm.org/D32676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302820
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Davide Italiano [Thu, 11 May 2017 19:37:43 +0000 (19:37 +0000)]
[LiveVariables] Switch Kill/Defs sets to be DenseSet(s).
The testcase in PR32984 shows a non linear compile time increase
after a change that made the LoopUnroll pass more aggressive
(increasing the threshold).
My profiling shows all the time of PHI elimination goes to
llvm::LiveVariables::addNewBlock. This is because we keep
Defs/Kills registers in a SmallSet and vfind(const T &V); is O(N).
Switching to a DenseSet reduces the time spent in the pass from
297 seconds to 97 seconds. Profiling still shows a lot of time is
spent iterating the data structure, so I guess there's room for
improvement.
Dan tells me GCC uses real set operations for live registers and
it takes no-time on this testcase. Matthias points out we might
want to switch all this to LiveIntervalAnalysis so it's not entirely
sure if a rewrite is worth it.
Differential Revision: https://reviews.llvm.org/D33088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302819
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Craig Topper [Thu, 11 May 2017 18:40:53 +0000 (18:40 +0000)]
[APInt] Remove an APInt copy from the return of APInt::multiplicativeInverse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302816
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Craig Topper [Thu, 11 May 2017 17:57:43 +0000 (17:57 +0000)]
[APInt] Fix typo in comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302815
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Matt Arsenault [Thu, 11 May 2017 17:38:33 +0000 (17:38 +0000)]
AMDGPU: Remove tfe bit from flat instruction definitions
We don't use it and it was removed in gfx9, and the encoding
bit repurposed.
Additionally actually using it requires changing the output register
class, which wasn't done anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302814
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Matt Arsenault [Thu, 11 May 2017 17:26:25 +0000 (17:26 +0000)]
AMDGPU: Pull fneg out of extract_vector_elt
This allows folding source modifiers in more f16 cases.
Makes it easier to select per-component packed neg modifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302813
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Stanislav Mekhanoshin [Thu, 11 May 2017 17:16:55 +0000 (17:16 +0000)]
[AMDGPU] Fix incorrect register pressure calculation
Earlier fix D32572 introduced a bug where live-ins were calculated
for basic block instead of scheduling region. This change fixes it.
Differential Revision: https://reviews.llvm.org/D33086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302812
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Adam Nemet [Thu, 11 May 2017 17:06:17 +0000 (17:06 +0000)]
[SLP] Emit optimization remarks
The approach I followed was to emit the remark after getTreeCost concludes
that SLP is profitable. I initially tried emitting them after the
vectorizeRootInstruction calls in vectorizeChainsInBlock but I vaguely
remember missing a few cases for example in HorizontalReduction::tryToReduce.
ORE is placed in BoUpSLP so that it's available from everywhere (notably
HorizontalReduction::tryToReduce).
We use the first instruction in the root bundle as the locator for the remark.
In order to get a sense how far the tree is spanning I've include the size of
the tree in the remark. This is not perfect of course but it gives you at
least a rough idea about the tree. Then you can follow up with -view-slp-tree
to really see the actual tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302811
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Nemanja Ivanovic [Thu, 11 May 2017 16:54:23 +0000 (16:54 +0000)]
[PowerPC] Eliminate integer compare instructions - vol. 1
This patch is the first in a series of patches to provide code gen for
doing compares in GPRs when the compare result is required in a GPR.
It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64
extensions. This first patch handles equality comparison on i32 operands with
the result sign or zero extended.
Differential Revision: https://reviews.llvm.org/D31847
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302810
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Simon Pilgrim [Thu, 11 May 2017 16:40:44 +0000 (16:40 +0000)]
[DAGCombine] Use SelectionDAG::getAnyExtOrTrunc helper. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302808
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Hans Wennborg [Thu, 11 May 2017 15:32:47 +0000 (15:32 +0000)]
Fix -DLLVM_ENABLE_THREADS=OFF build after r302748
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302806
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Simon Pilgrim [Thu, 11 May 2017 15:02:49 +0000 (15:02 +0000)]
[X86][AVX] Added zeroall/zeroupper scheduler tests
Missing on SandyBridge and Btver2 models
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302804
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Tim Northover [Thu, 11 May 2017 14:51:43 +0000 (14:51 +0000)]
Modules: fix modules build.
A recent commit made GlobalVariable.h depend on intrinsics generation, so (I
think) it needs to be in the lower-level module. I'll confirm with others, but
this should fix the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302803
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Javed Absar [Thu, 11 May 2017 12:28:08 +0000 (12:28 +0000)]
[IR] Allow attributes with global variables
This patch extends llvm-ir to allow attributes to be set on global variables.
An RFC was sent out earlier by my colleague James Molloy: http://lists.llvm.org/pipermail/cfe-dev/2017-March/053100.html
A key part of that proposal was to extend LLVM-IR to carry attributes on global variables.
This generic feature could be useful for multiple purposes.
In our present context, it would be useful to carry user specified sections for bss/rodata/data.
Reviewed by: Jonathan Roelofs, Reid Kleckner
Differential Revision: https://reviews.llvm.org/D32009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302794
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Igor Breger [Thu, 11 May 2017 12:15:03 +0000 (12:15 +0000)]
[GlobalISel][X86] Remove hand-written G_FADD/F_SUB selection.
Now it handle by TableGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302793
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Ayman Musa [Thu, 11 May 2017 11:51:12 +0000 (11:51 +0000)]
[X86] Moving X86Local namespace from .cpp to .h file to use it in memory folding TableGen backend.
Differential Revision: https://reviews.llvm.org/D32797
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302791
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Ayal Zaks [Thu, 11 May 2017 11:36:33 +0000 (11:36 +0000)]
[LV] Refactor ILV.vectorize{Loop}() by introducing LVP.executePlan(); NFC
Introduce LoopVectorizationPlanner.executePlan(), replacing ILV.vectorize() and
refactoring ILV.vectorizeLoop(). Method collectDeadInstructions() is moved from
ILV to LVP. These changes facilitate building VPlans and using them to generate
code, following https://reviews.llvm.org/D28975 and its tentative breakdown.
Method ILV.createEmptyLoop() is renamed ILV.createVectorizedLoopSkeleton() to
improve clarity; it's contents remain intact.
Differential Revision: https://reviews.llvm.org/D32200
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302790
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Alexander Potapenko [Thu, 11 May 2017 11:07:48 +0000 (11:07 +0000)]
[msan] Fix PR32842
It turned out that MSan was incorrectly calculating the shadow for int comparisons: it was done by truncating the result of (Shadow1 OR Shadow2) to i1, effectively rendering all bits except LSB useless.
This approach doesn't work e.g. in the case where the values being compared are even (i.e. have the LSB of the shadow equal to zero).
Instead, if CreateShadowCast() has to cast a bigger int to i1, we replace the truncation with an ICMP to 0.
This patch doesn't affect the code generated for SPEC 2006 binaries, i.e. there's no performance impact.
For the test case reported in PR32842 MSan with the patch generates a slightly more efficient code:
orq %rcx, %rax
jne .LBB0_6
, instead of:
orl %ecx, %eax
testb $1, %al
jne .LBB0_6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302787
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Chandler Carruth [Thu, 11 May 2017 10:52:16 +0000 (10:52 +0000)]
[x86] Fix a failure to select with AVX-512 when the type legalizer
manages to form a VSELECT with a non-i1 element type condition. Those
are technically allowed in SDAG (at least, the generic type legalization
logic will form them and I wouldn't want to try to audit everything te
preclude forming them) so we need to be able to lower them.
This isn't too hard to implement. We mark VSELECT as custom so we get
a chance in C++, add a fast path for i1 conditions to get directly
handled by the patterns, and a fallback when we need to manually force
the condition to be an i1 that uses the vptestm instruction to turn
a non-mask into a mask.
This, unsurprisingly, generates awful code. But it at least doesn't
crash. This was actually impacting open source packages built with LLVM
for AVX-512 in the wild, so quickly landing a patch that at least stops
the immediate bleeding.
I think I've found where to fix the codegen quality issue, but less
confident of that change so separating it out from the thing that
doesn't change the result of any existing test case but causes mine to
not crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302785
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Simon Pilgrim [Thu, 11 May 2017 10:03:05 +0000 (10:03 +0000)]
Strip trailing whitespace. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302784
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Diana Picus [Thu, 11 May 2017 09:45:57 +0000 (09:45 +0000)]
[ARM][GlobalISel] Legalize narrow scalar ops by widening
This is the same as r292827 for AArch64: we widen 8- and 16-bit ADD, SUB
and MUL to 32 bits since we only have TableGen patterns for 32 bits.
See the commit message for r292827 for more details.
At this point we could just remove some of the tests for regbankselect
and instruction-select, since we're not going to see any narrow
operations at those levels anymore. Instead I decided to update them
with G_ANYEXT/G_TRUNC operations, so we can validate the full sequences
generated by the legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302782
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Serge Guelton [Thu, 11 May 2017 08:53:00 +0000 (08:53 +0000)]
Remove spurious cast of nullptr. NFC.
Conversion rules allow automatic casting of nullptr to any pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302780
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Serge Guelton [Thu, 11 May 2017 08:46:02 +0000 (08:46 +0000)]
Remove now useless trailing nullptr in StructType::get
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302779
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Diana Picus [Thu, 11 May 2017 08:28:31 +0000 (08:28 +0000)]
[ARM][GlobalISel] Support for G_ANYEXT
G_ANYEXT can be introduced by the legalizer when widening scalars. Add
support for it in the register bank info (same mapping as everything
else) and in the instruction selector.
When selecting it, we treat it as a COPY, just like G_TRUNC. On this
occasion we get rid of some assertions in selectCopy so we can reuse it.
This shouldn't be a problem at the moment since we're not supporting any
complicated cases (e.g. FPR, different register banks). We might want to
separate the paths when we do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302778
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Igor Breger [Thu, 11 May 2017 07:17:40 +0000 (07:17 +0000)]
[GlobalISel][X86] G_ICMP support.
Summary: support G_ICMP for scalar types i8/i16/i64.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: rovka, kristof.beyls, llvm-commits, krytarowski
Differential Revision: https://reviews.llvm.org/D32995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302774
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Craig Topper [Thu, 11 May 2017 07:10:43 +0000 (07:10 +0000)]
[APInt] Remove an unneeded extra temporary APInt from toString.
Turns out udivrem can write its output to the same location as one of its inputs so the extra temporary isn't needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302772
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Craig Topper [Thu, 11 May 2017 07:02:04 +0000 (07:02 +0000)]
[APInt] Use negate() instead of copying an APInt to negate it and then writing back over the original value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302770
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Craig Topper [Thu, 11 May 2017 06:48:54 +0000 (06:48 +0000)]
[SCEV] Reduce possible APInt allocations a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302769
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Craig Topper [Thu, 11 May 2017 06:48:51 +0000 (06:48 +0000)]
[SCEV] Remove unneeded 'using namespace APIntOps'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302768
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Igor Breger [Thu, 11 May 2017 06:36:37 +0000 (06:36 +0000)]
[X86] Move getX86ConditionCode() from X86FastISel.cpp to X86InstrInfo.cpp. NFC
Summary:
Move getX86ConditionCode() from X86FastISel.cpp to X86InstrInfo.cpp so it can be used by GloabalIsel instruction selector.
This is a pre-commit for a patch I'm working on to support G_ICMP. NFC.
Reviewers: zvi, guyblank, delena
Reviewed By: guyblank, delena
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302767
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NAKAMURA Takumi [Thu, 11 May 2017 06:35:51 +0000 (06:35 +0000)]
SupportTests: Suppress ParallelTests on mingw for now. Investigating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302766
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Paul Robinson [Thu, 11 May 2017 02:07:08 +0000 (02:07 +0000)]
Remove redundant initialization. NFC
Post-commit review of r301940 by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302756
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Eric Fiselier [Thu, 11 May 2017 01:44:30 +0000 (01:44 +0000)]
Add temporary workaround to allow in-tree libc++ builds on Windows
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302753
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Zachary Turner [Thu, 11 May 2017 00:22:18 +0000 (00:22 +0000)]
Final (hopefully) fix for the build bots.
This time it actually occurred to me to change the #defines
to actually test the pre-processed out codepath. Hopefully
this time it works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302752
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Zachary Turner [Thu, 11 May 2017 00:18:52 +0000 (00:18 +0000)]
Try again to fix the buildbots.
TaskGroup and Latch need to be in llvm::parallel::detail, not
in llvm::detail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302751
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Zachary Turner [Thu, 11 May 2017 00:09:30 +0000 (00:09 +0000)]
Fix build errors with Parallel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302749
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Zachary Turner [Thu, 11 May 2017 00:03:52 +0000 (00:03 +0000)]
[Support] Move Parallel algorithms from LLD to LLVM.
Differential Revision: https://reviews.llvm.org/D33024
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302748
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Kostya Serebryany [Wed, 10 May 2017 23:59:03 +0000 (23:59 +0000)]
[libFuzzer] fix a compiler warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302747
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David L. Jones [Wed, 10 May 2017 23:56:21 +0000 (23:56 +0000)]
Revert "[SDAG] Relax conditions under stores of loaded values can be merged"
This reverts r302712.
The change fails with ASAN enabled:
ERROR: AddressSanitizer: use-after-poison on address ... at ...
READ of size 2 at ... thread T0
#0 ... in llvm::SDNode::getNumValues() const <snip>/include/llvm/CodeGen/SelectionDAGNodes.h:855:42
#1 ... in llvm::SDNode::hasAnyUseOfValue(unsigned int) const <snip>/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:7270:3
#2 ... in llvm::SDValue::use_empty() const <snip> include/llvm/CodeGen/SelectionDAGNodes.h:1042:17
#3 ... in (anonymous namespace)::DAGCombiner::MergeConsecutiveStores(llvm::StoreSDNode*) <snip>/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:12944:7
Reviewers: niravd
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302746
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Eugene Zelenko [Wed, 10 May 2017 23:53:40 +0000 (23:53 +0000)]
[IR] Rollback changes in r302744 which caused buildbots failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302745
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Eugene Zelenko [Wed, 10 May 2017 23:41:30 +0000 (23:41 +0000)]
[IR] Fix some Clang-tidy modernize-use-using warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302744
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Davide Italiano [Wed, 10 May 2017 23:13:26 +0000 (23:13 +0000)]
[PHIElimination] Use the same name for DEBUG_TYPE and pass name.
In an attempt to reduce the confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302742
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Sanjay Patel [Wed, 10 May 2017 21:33:55 +0000 (21:33 +0000)]
[InstCombine] remove fold that swaps xor/or with constants; NFCI
// (X ^ C1) | C2 --> (X | C2) ^ (C1&~C2)
This canonicalization was added at:
https://reviews.llvm.org/rL7264
By moving xors out/down, we can more easily combine constants. I'm adding
tests that do not change with this patch, so we can verify that those kinds
of transforms are still happening.
This is no-functional-change-intended because there's a later fold:
// (X^C)|Y -> (X|Y)^C iff Y&C == 0
...and demanded-bits appears to guarantee that any fold that would have
hit the fold we're removing here would be caught by that 2nd fold.
Similar reasoning was used in:
https://reviews.llvm.org/rL299384
The larger motivation for removing this code is that it could interfere with
the fix for PR32706:
https://bugs.llvm.org/show_bug.cgi?id=32706
Ie, we're not checking if the 'xor' is actually a 'not', so we could reverse
a 'not' optimization and cause an infinite loop by altering an 'xor X, -1'.
Differential Revision: https://reviews.llvm.org/D33050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302733
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Matt Arsenault [Wed, 10 May 2017 21:29:33 +0000 (21:29 +0000)]
AMDGPU: Make some packed shuffles free
VOP3P instructions can encode access to either
half of the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302730
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Matt Arsenault [Wed, 10 May 2017 21:19:05 +0000 (21:19 +0000)]
AMDGPU: Add new subtarget features for gfx9 flat instructions
Flat instructions gain an immediate offset, and 2 new
sets of segment specific flat instructions are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302729
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Craig Topper [Wed, 10 May 2017 20:01:48 +0000 (20:01 +0000)]
[ConstantRange] Fix the early out in ConstantRange::multiply for positive numbers to really do what the comment says
r271020 added an early out to skip the signed multiply portion of ConstantRange::multiply. The comment says we don't need to do signed multiply if the range is only positive numbers, but the implemented check only ensures that the start of the range is positive. It doesn't look at the end of the range.
This patch checks the end of the range instead. Because Upper is one more than the end we have to see if its positive or if its one past the last positive number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302717
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Craig Topper [Wed, 10 May 2017 20:01:38 +0000 (20:01 +0000)]
[APInt] Add negate helper method to implement twos complement. Use it to shorten code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302716
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Davide Italiano [Wed, 10 May 2017 19:57:43 +0000 (19:57 +0000)]
[NewGVN] Introduce a definesNoMemory() helper and use it.
This is nice as is, but it will be used in my next patch to
fix a bug. Suggested by Daniel Berlin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302714
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Nirav Dave [Wed, 10 May 2017 19:53:41 +0000 (19:53 +0000)]
[SDAG] Relax conditions under stores of loaded values can be merged
Summary:
Allow consecutive stores whose values come from consecutive loads to
merged in the presense of other uses of the loads. Previously this was
disallowed as in general the merged load cannot be shared with the
other uses. Merging N stores into 1 may cause as many as N redundant
loads. However in the context of caching this should have neglible
affect on memory pressure and reduce instruction count making it
almost always a win.
Fixes PR32086.
Reviewers: spatel, jyknight, andreadb, hfinkel, efriedma
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D30471
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302712
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Teresa Johnson [Wed, 10 May 2017 18:52:16 +0000 (18:52 +0000)]
Ensure non-null ProfileSummaryInfo passed to ModuleSummaryIndex builder
This fixes a ubsan bot failure after r302597, which made getProfileCount
non-static, but ended up invoking it on a null ProfileSummaryInfo object
in some cases from buildModuleSummaryIndex.
Most testing passed because the non-static getProfileCount currently
doesn't access any member variables, but I found this when testing a
follow on patch (D32877) that adds a member variable access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302705
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Craig Topper [Wed, 10 May 2017 18:15:24 +0000 (18:15 +0000)]
[APInt] Make toString use udivrem instead of calling the divide helper method directly. Do a better job of reusing allocations while looping. NFCI
This lets toString take advantage of the degenerate case checks in udivrem and is just generally cleaner.
One minor downside of this is that the divisor APInt now needs to be the same size as Tmp which requires an additional allocation. But we were doing a poor job of reusing allocations before so the new code should still be an improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302704
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Craig Topper [Wed, 10 May 2017 18:15:20 +0000 (18:15 +0000)]
[APInt] Use uint32_t instead of unsigned for the storage type throughout the divide code. Use Lo_32/Hi_32/Make_64 helpers instead of casts and shifts. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302703
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Craig Topper [Wed, 10 May 2017 18:15:17 +0000 (18:15 +0000)]
[APInt] Use getRawData to slightly simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302702
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Craig Topper [Wed, 10 May 2017 18:15:14 +0000 (18:15 +0000)]
[APInt] Remove check for single word since single word was handled earlier in the function. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302701
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Craig Topper [Wed, 10 May 2017 18:15:06 +0000 (18:15 +0000)]
[ConstantRange] Add test case showing a case where we pick too large of a range for multiply after r271020.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302700
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Amaury Sechet [Wed, 10 May 2017 17:58:28 +0000 (17:58 +0000)]
Small refactoring in DAGCombine. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302699
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Sanjay Patel [Wed, 10 May 2017 15:57:47 +0000 (15:57 +0000)]
[InstSimplify, InstCombine] move 'or' simplification tests; NFC
Surprisingly, I don't think these are redundant for InstSimplify.
They were just misplaced as InstCombine tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302684
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Simon Pilgrim [Wed, 10 May 2017 15:52:59 +0000 (15:52 +0000)]
[X86][SSE] Check vec_set BUILD_VECTOR tests on both 32 and 64-bit targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302683
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Quentin Colombet [Wed, 10 May 2017 15:19:41 +0000 (15:19 +0000)]
[AArch64][RegisterBankInfo] Change the default mapping of fp stores.
For stores, check if the stored value is defined by a floating point
instruction and if yes, we return a default mapping with FPR instead
of GPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302679
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Amara Emerson [Wed, 10 May 2017 15:15:38 +0000 (15:15 +0000)]
[AArch64] Enable use of reduction intrinsics.
The new experimental reduction intrinsics can now be used, so I'm enabling this
for AArch64. We will need this for SVE anyway, so it makes sense to do this for
NEON reductions as well.
The existing code to match shufflevector patterns are replaced with a direct
lowering of the reductions to AArch64-specific nodes. Tests updated with the
new, simpler, representation.
Differential Revision: https://reviews.llvm.org/D32247
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302678
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Sanjay Patel [Wed, 10 May 2017 14:54:49 +0000 (14:54 +0000)]
[InstCombine] remove redundant tests
The first test in this file is duplicated exactly in and.ll -> test33.
We have commuted and vector variants there too.
The second test is a composite of 2 folds. The first fold is tested
independently in add.ll -> flip_and_mask (including vector variant).
After that transform fires, the IR is identical to the first transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302676
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Sanjay Patel [Wed, 10 May 2017 14:40:04 +0000 (14:40 +0000)]
[InstCombine] fix auto-generated FileCheck-captured variable refs
The script at utils/update_test_checks.py has (had?) a bug when variables
start with the same sequence of letters (clearly, not all of the time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302674
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Sanjay Patel [Wed, 10 May 2017 14:25:23 +0000 (14:25 +0000)]
[InstCombine] fix typo in test comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302669
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Ulrich Weigand [Wed, 10 May 2017 14:20:15 +0000 (14:20 +0000)]
[SystemZ] Add miscellaneous instructions
This adds a few missing instructions for the assembler and
disassembler. Those should be the last missing general-
purpose (Chapter 7) instructions for the z10 ISA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302667
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Ulrich Weigand [Wed, 10 May 2017 14:18:47 +0000 (14:18 +0000)]
[SystemZ] Add missing arithmetic instructions
This adds the remaining general arithmetic instructions
for assembler / disassembler use. Most of these are not
useful for codegen; a few might be, and those are listed
in the README.txt for future improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302665
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Sam Clegg [Wed, 10 May 2017 14:18:11 +0000 (14:18 +0000)]
[llvm-readobj] Improve errors on invalid binary
The previous code was discarding the error message from
createBinary() by calling errorToErrorCode().
This meant that such error were always reported unhelpfully
as "Invalid data was encountered while parsing the file".
Other tools such as llvm-objdump already produce a more
the error message in this case.
Differential Revision: https://reviews.llvm.org/D32985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302664
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Michael Zuckerman [Wed, 10 May 2017 14:00:57 +0000 (14:00 +0000)]
chang type from 'int' to 'size_t'. This will fix revision number 302652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302660
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Sanjay Patel [Wed, 10 May 2017 13:56:52 +0000 (13:56 +0000)]
[InstCombine] add (ashr (shl i32 X, 31), 31), 1 --> and (not X), 1
This is another step towards favoring 'not' ops over random 'xor' in IR:
https://bugs.llvm.org/show_bug.cgi?id=32706
This transformation may have occurred in longer IR sequences using computeKnownBits,
but that could be much more expensive to calculate.
As the scalar result shows, we do not currently favor 'not' in all cases. The 'not'
created by the transform is transformed again (unnecessarily). Vectors don't have
this problem because vectors are (wrongly) excluded from several other combines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302659
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Serge Guelton [Wed, 10 May 2017 13:24:17 +0000 (13:24 +0000)]
Use explicit false instead of casted nullptr. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302656
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Serge Guelton [Wed, 10 May 2017 13:23:47 +0000 (13:23 +0000)]
Use clang++-3.5 compatible initializer_list constructor
Otherwise, a warning is issued.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302655
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Michael Zuckerman [Wed, 10 May 2017 13:08:11 +0000 (13:08 +0000)]
[LLVM][inline-asm] Altmacro string escape character '!'
This patch is the fourth patch in a series of reviews for the Altmacro feature.
This patch introduces a new escape character '!' and it depends on D32701.
according to https://sourceware.org/binutils/docs/as/Altmacro.html:
"single-character string escape
To include any single character literally in a string (even if the character would otherwise have some special meaning), you can prefix the character with !' (an exclamation mark). For example, you can write <4.3 !> 5.4!!>' to get the literal text `4.3 > 5.4!'. "
Differential Revision: https://reviews.llvm.org/D32792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302652
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Simon Pilgrim [Wed, 10 May 2017 13:06:26 +0000 (13:06 +0000)]
[DAGCombiner] Dropped explicit (sra 0, x) -> 0 and (sra -1, x) -> 0 folds.
These are both handled (and tested) by the earlier ComputeNumSignBits == EltSizeInBits fold.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302651
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Mikael Holmen [Wed, 10 May 2017 13:06:13 +0000 (13:06 +0000)]
[IfConversion] Add missing check in IfConversion/canFallThroughTo
Summary:
When trying to figure out if MBB could fallthrough to ToMBB (possibly by
falling through a bunch of other MBBs) we didn't actually check if there
was fallthrough between the last two blocks in the chain.
Reviewers: kparzysz, iteratee, MatzeB
Reviewed By: kparzysz, iteratee
Subscribers: javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D32996
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302650
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Jonas Paulsson [Wed, 10 May 2017 13:03:25 +0000 (13:03 +0000)]
[SystemZ] Implement getRepRegClassFor()
This method must return a valid register class, or the list-ilp isel
scheduler will crash. For MVT::Untyped nullptr was previously returned, but
now ADDR128BitRegClass is returned instead. This is needed just as long as
list-ilp (and probably also list-hybrid) is still there.
Review: Ulrich Weigand, A Trick
https://reviews.llvm.org/D32802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302649
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Dmitry Preobrazhensky [Wed, 10 May 2017 13:00:28 +0000 (13:00 +0000)]
[AMDGPU][MC] Corrected v_madak/madmk to avoid printing "_e32" in disassembler output
See bug 32927: https://bugs.llvm.org//show_bug.cgi?id=32927
Reviewers: vpykhtin, artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D32913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302648
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Igor Breger [Wed, 10 May 2017 12:58:31 +0000 (12:58 +0000)]
[GlobalISel][X86] Split test file. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302647
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Ulrich Weigand [Wed, 10 May 2017 12:42:45 +0000 (12:42 +0000)]
[SystemZ] Add decimal integer instructions
This adds the set of decimal integer (BCD) instructions for
assembler / disassembler use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302646
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Ulrich Weigand [Wed, 10 May 2017 12:42:00 +0000 (12:42 +0000)]
[SystemZ] Add crypto instructions
This adds the set of message-security assist instructions for
assembler / disassembler use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302645
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Ulrich Weigand [Wed, 10 May 2017 12:41:12 +0000 (12:41 +0000)]
[SystemZ] Add translate/convert instructions
This adds the set of character-set translate and convert instructions
for assembler / disassembler use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302644
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Ulrich Weigand [Wed, 10 May 2017 12:40:15 +0000 (12:40 +0000)]
[SystemZ] Add missing memory/string instructions
This adds a number of missing memory and string instructions
for assembler / disassembler use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302643
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Ulrich Weigand [Wed, 10 May 2017 12:39:11 +0000 (12:39 +0000)]
[SystemZ] Reformat assembler/disassembler tests
The assembler and disassmebler test cases started out formatted and
sorted in a particular way, but this got lost over time as patches
were added. Reformat them again. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302642
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Simon Pilgrim [Wed, 10 May 2017 12:34:27 +0000 (12:34 +0000)]
[DAGCombiner] Add vector support to fold (shl/srl 0, x) -> 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302641
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Chandler Carruth [Wed, 10 May 2017 12:30:07 +0000 (12:30 +0000)]
Revert r301950: SpeculativeExecution: Stop using whitelist for costs
This pass doesn't correctly handle testing for when it is legal to hoist
arbitrary instructions. The whitelist happens to make it safe, so before
it is removed the pass's legality checks will need to be enhanced.
Details have been added to the code review thread for the patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302640
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Martin Storsjo [Wed, 10 May 2017 10:51:32 +0000 (10:51 +0000)]
[AArch64] Fix a comment to match the code. NFC.
For the ELF case, the default/preferred form is the generic one, not
the short one as used for Apple - fix the comment to say so. Currently
it is a copy-paste typo.
Make the comments on the darwin default a bit more verbose.
Use enum names instead of literal 0/1 to further increase readability
and reduce fragility.
Differential Revision: https://reviews.llvm.org/D32963
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302634
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Amara Emerson [Wed, 10 May 2017 09:42:49 +0000 (09:42 +0000)]
Add a late IR expansion pass for the experimental reduction intrinsics.
This pass uses a new target hook to decide whether or not to expand a particular
intrinsic to the shuffevector sequence.
Differential Revision: https://reviews.llvm.org/D32245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302631
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Craig Topper [Wed, 10 May 2017 07:50:17 +0000 (07:50 +0000)]
[APInt] Fix indentation of tcDivide. Combine variable declaration and initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302626
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Craig Topper [Wed, 10 May 2017 07:50:15 +0000 (07:50 +0000)]
[APInt] Use getNumWords function in udiv/urem/udivrem instead of reimplementinging it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302625
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Igor Breger [Wed, 10 May 2017 06:52:58 +0000 (06:52 +0000)]
[GlobalISel][X86] G_ZEXT i1 to i32/i64 support.
Summary: Support G_ZEXT i1 to i32/i64 instruction selection.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D32965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302623
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Mikael Holmen [Wed, 10 May 2017 06:33:43 +0000 (06:33 +0000)]
[UnreachableBlockElim] Check return value of constrainRegClass().
Summary:
MachineRegisterInfo::constrainRegClass() can fail if two register classes
don't have a common subclass or if the register class doesn't contain
enough registers. Check the return value before trying to remove Phi nodes,
and if we can't constrain, we output a COPY instead of simply replacing
registers.
Reviewers: kparzysz, david2050, wmi
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302622
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Ahmed Bougacha [Wed, 10 May 2017 00:56:00 +0000 (00:56 +0000)]
[CodeGen] Don't require AA in TwoAddress at -O0.
This is a follow-up to r302611, which moved an -O0 computation of DT
from SDAGISel to TwoAddress.
Don't use it here either, and avoid computing it completely. The only
use was forwarding the analysis as an optional argument to utility
functions.
Differential Revision: https://reviews.llvm.org/D32766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302612
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Ahmed Bougacha [Wed, 10 May 2017 00:39:30 +0000 (00:39 +0000)]
[CodeGen] Don't require AA in SDAGISel at -O0.
Before r247167, the pass manager builder controlled which AA
implementations were used, exporting them all in the AliasAnalysis
analysis group.
Now, AAResultsWrapperPass always uses BasicAA, but still uses other AA
implementations if made available in the pass pipeline.
But regardless, SDAGISel is required at O0, and really doesn't need to
be doing fancy optimizations based on useful AA results.
Don't require AA at CodeGenOpt::None, and only use it otherwise.
This does have a functional impact (and one testcase is pessimized
because we can't reuse a load). But I think that's desirable no matter
what.
Note that this alone doesn't result in less DT computations: TwoAddress
was previously able to reuse the DT we computed for SDAG. That will be
fixed separately.
Differential Revision: https://reviews.llvm.org/D32766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302611
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Ahmed Bougacha [Wed, 10 May 2017 00:39:25 +0000 (00:39 +0000)]
[CodeGen] Compute DT/LI lazily in SafeStackLegacyPass. NFC.
We currently require SCEV, which requires DT/LI. Those are expensive to
compute, but the pass only runs for functions that have the safestack
attribute.
Compute DT/LI to build SCEV lazily, only when the pass is actually going
to transform the function.
Differential Revision: https://reviews.llvm.org/D31302
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302610
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Ahmed Bougacha [Wed, 10 May 2017 00:39:22 +0000 (00:39 +0000)]
[CodeGen] Split SafeStack into a LegacyPass and a utility. NFC.
This lets the pass focus on gathering the required analyzes, and the
utility class focus on the transformation.
Differential Revision: https://reviews.llvm.org/D31303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302609
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Ahmed Bougacha [Wed, 10 May 2017 00:39:17 +0000 (00:39 +0000)]
[CodeGen] Add an -O0 backend pipeline test. NFC.
This should hopefully makes changes to the O0 pipeline obvious; it's
easy to require expensive passes, and this helps make informed
decisions.
Case in point: in the few weeks separating the time when I initially
wrote this patch to the time when I committed, the test regressed as
r302103 added another use of DT!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302608
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Sam Clegg [Wed, 10 May 2017 00:14:04 +0000 (00:14 +0000)]
[WebAssembly] Fix build error in wasm YAML code
This warning didn't show up on my local build
but is causing the bots to fail. Seems like a
bad idea to have types and variables with the
same name anyhow.
Differential Revision: https://reviews.llvm.org/D33022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302606
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Sanjay Patel [Wed, 10 May 2017 00:07:16 +0000 (00:07 +0000)]
[InstCombine] add helper function for add X, C folds; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302605
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Sam Clegg [Tue, 9 May 2017 23:48:41 +0000 (23:48 +0000)]
[WebAssembly] Improve libObject support for wasm imports and exports
Previously we had only supported the importing and
exporting of functions and globals.
Also, add usefull overload of getWasmSymbol() and
getNumberOfSymbols() in support of lld port.
Differential Revision: https://reviews.llvm.org/D33011
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302601
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Sanjay Patel [Tue, 9 May 2017 23:40:13 +0000 (23:40 +0000)]
[InstCombine] add tests for andn; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302599
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Easwaran Raman [Tue, 9 May 2017 23:21:10 +0000 (23:21 +0000)]
[ProfileSummary] Make getProfileCount a non-static member function.
This change is required because the notion of count is different for
sample profiling and getProfileCount will need to determine the
underlying profile type.
Differential revision: https://reviews.llvm.org/D33012
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302597
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