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Xinliang David Li [Thu, 20 Apr 2017 21:40:22 +0000 (21:40 +0000)]
Use basicblock split block utility function
Instead of calling BasicBlock::SplitBasicBlock directly in
CodeExtractor.
Differential Revision: https://reviews.llvm.org/D32308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300899
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Sanjay Patel [Thu, 20 Apr 2017 21:33:02 +0000 (21:33 +0000)]
[InstCombine] allow shl demanded bits folds with splat constants
More fixes are needed to enable the helper SimplifyShrShlDemandedBits().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300898
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Craig Topper [Thu, 20 Apr 2017 21:24:37 +0000 (21:24 +0000)]
[InstCombine] Use APInt::intersects and APInt::isSubsetOf to improve a few more places in SimplifyDemandedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300896
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Chad Rosier [Thu, 20 Apr 2017 21:11:17 +0000 (21:11 +0000)]
[AArch64] Whitespace/ordering fixes for Falkor machine description. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300893
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Chad Rosier [Thu, 20 Apr 2017 21:11:09 +0000 (21:11 +0000)]
[AArch64] Refine Falkor machine description for pre/post-inc and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300892
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Sanjay Patel [Thu, 20 Apr 2017 20:59:02 +0000 (20:59 +0000)]
[InstCombine] allow ashr/lshr demanded bits folds with splat constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300888
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Craig Topper [Thu, 20 Apr 2017 20:47:35 +0000 (20:47 +0000)]
[InstCombine] Use APInt::isSubsetOf to simplify some code in SimplifyDemandedBits. NFC
This allows us to use less temporary APInt for And and Invert operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300885
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Sanjay Patel [Thu, 20 Apr 2017 20:44:54 +0000 (20:44 +0000)]
[InstCombine] add tests for demanded bits ashr/lshr splat constants; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300884
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Adrian Prantl [Thu, 20 Apr 2017 20:42:33 +0000 (20:42 +0000)]
Don't emit locations that need a DW_OP_stack_value in DWARF 2 & 3.
https://bugs.llvm.org/show_bug.cgi?id=32382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300883
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Benjamin Kramer [Thu, 20 Apr 2017 20:28:18 +0000 (20:28 +0000)]
[Support] Make asan poisoning for recyclers more aggressive by also poisoning the 'next' pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300882
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Benjamin Kramer [Thu, 20 Apr 2017 20:03:36 +0000 (20:03 +0000)]
Remove stray ^S. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300880
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Paul Robinson [Thu, 20 Apr 2017 20:03:03 +0000 (20:03 +0000)]
[DWARF] Fix a couple of typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300879
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Tim Northover [Thu, 20 Apr 2017 19:54:02 +0000 (19:54 +0000)]
ARM: handle post-indexed NEON ops where the offset isn't the access width.
Before, we assumed that any ConstantInt offset was precisely the access width,
so we could use the "[rN]!" form. ISelLowering only ever created that kind, but
further simplification during combining could lead to unexpected constants and
incorrect codegen.
Should fix PR32658.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300878
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Adrian McCarthy [Thu, 20 Apr 2017 19:34:06 +0000 (19:34 +0000)]
VarStreamArrayIterator needed non-const operator* overload.
Without this change, the operator-> provided by iterator_facade lost type
qualifiers.
Differential Revision: https://reviews.llvm.org/D32235
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300877
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Craig Topper [Thu, 20 Apr 2017 19:31:22 +0000 (19:31 +0000)]
[InstCombine] Remove redundant code from SimplifyDemandedBits handling for Or. The code above it is equivalent if you work through the bitwise math.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300876
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Paul Robinson [Thu, 20 Apr 2017 19:16:51 +0000 (19:16 +0000)]
[DWARF] Versioning for DWARF constants; verify FORMs
Associate the version-when-defined with definitions of standard DWARF
constants. Identify the "vendor" for DWARF extensions.
Use this information to verify FORMs in .debug_abbrev are defined as
of the DWARF version specified in the associated unit.
Removed two tests that had specified DWARF v1 (which essentially does
not exist).
Differential Revision: http://reviews.llvm.org/D30785
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300875
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Benjamin Kramer [Thu, 20 Apr 2017 19:06:11 +0000 (19:06 +0000)]
[go bindings] Rmove duplicated conversion function definitions after r300843.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300872
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Chad Rosier [Thu, 20 Apr 2017 18:50:21 +0000 (18:50 +0000)]
[AArch64] Improve scheduling of logical operations on Falkor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300871
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Weiming Zhao [Thu, 20 Apr 2017 18:37:14 +0000 (18:37 +0000)]
[Thumb-1] Fix corner cases for compressed jump tables
Summary:
When synthesized TBB/TBH is expanded, we need to avoid the case of:
BaseReg is redefined after the load of branching target. E.g.:
%R2 = tLEApcrelJT <jt#1>
%R1 = tLDRr %R1, %R2 ==> %R2 = tLEApcrelJT <jt#1>
%R2 = tLDRspi %SP, 12 %R2 = tLDRspi %SP, 12
tBR_JTr %R1 tTBB_JT %R2, %R1
`
Reviewers: jmolloy
Reviewed By: jmolloy
Subscribers: llvm-commits, rengolin
Differential Revision: https://reviews.llvm.org/D32250
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300870
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Davide Italiano [Thu, 20 Apr 2017 18:33:40 +0000 (18:33 +0000)]
[CodeExtractor] Remove a bunch of unneeded constructors.
Differential Revision: https://reviews.llvm.org/D32305
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300869
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Benjamin Kramer [Thu, 20 Apr 2017 18:29:37 +0000 (18:29 +0000)]
[Recycler] Add asan/msan annotations.
This enables use after free and uninit memory checking for memory
returned by a recycler. SelectionDAG currently relies on the opcode of a
free'd node being ISD::DELETED_NODE, so poke a hole in the asan poison
for SDNode opcodes. This means that we won't find some issues, but only
in SDag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300868
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Benjamin Kramer [Thu, 20 Apr 2017 18:29:14 +0000 (18:29 +0000)]
Fix use-after-frees on memory allocated in a Recycler.
This will become asan errors once the patch lands that poisons the
memory after free. The x86 change is a hack, but I don't see how to
solve this properly at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300867
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Artyom Skrobov [Thu, 20 Apr 2017 18:20:02 +0000 (18:20 +0000)]
Fixing outdated comment [NFC]
Since r32105 back in 2006, RegisterPass doesn't support
passes without a default constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300866
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Andrew Kaylor [Thu, 20 Apr 2017 18:18:36 +0000 (18:18 +0000)]
Fix formatting of constrained FP intrinsic documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300865
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Yaxun Liu [Thu, 20 Apr 2017 18:15:34 +0000 (18:15 +0000)]
CodeGen: Let frame index value type match alloca addr space
Recently alloca address space has been added to data layout. Due to this
change, pointer returned by alloca may have different size as pointer in
address space 0.
However, currently the value type of frame index is assumed to be of the
same size as pointer in address space 0.
This patch fixes that.
Most targets assume alloca returning pointer in address space 0, which
is the default alloca address space. Therefore it is NFC for them.
AMDGCN target with amdgiz environment requires this change since it
assumes alloca returning pointer to addr space 5 and its size is 32,
which is different from the size of pointer in addr space 0 which is 64.
Differential Revision: https://reviews.llvm.org/D32021
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300864
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Reid Kleckner [Thu, 20 Apr 2017 18:08:36 +0000 (18:08 +0000)]
Remove duplicate AttributeList::removeAttributes implementation
Have the AttributeList overload delegate to the AttrBuilder one.
Simplify the AttrBuilder overload by avoiding getSlotAttributes, which
creates temporary AttributeLists.
Simplify `AttrBuilder::removeAttributes(AttributeList, unsigned)` by
using getAttributes instead of manually iterating over slots.
Extracted from https://reviews.llvm.org/D32262
NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300863
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Sanjay Patel [Thu, 20 Apr 2017 18:02:27 +0000 (18:02 +0000)]
[DAGCombiner] use more local variables in isAlias(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300860
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Sam Clegg [Thu, 20 Apr 2017 17:18:15 +0000 (17:18 +0000)]
[WebAssembly] Add known failures for wasm object file backend
Subscribers: jfb, dschuff
Differential Revision: https://reviews.llvm.org/D32300
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300859
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Zachary Turner [Thu, 20 Apr 2017 16:56:54 +0000 (16:56 +0000)]
Resubmit "[BitVector] Add operator<<= and operator>>=."
This was failing due to the use of assigning a Mask to an
unsigned, rather than to a BitWord. But most systems do not
have sizeof(unsigned) == sizeof(unsigned long), so the mask
was getting truncated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300857
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Craig Topper [Thu, 20 Apr 2017 16:56:25 +0000 (16:56 +0000)]
[APInt] Rename getSignBit to getSignMask
getSignBit is a static function that creates an APInt with only the sign bit set. getSignMask seems like a better name to convey its functionality. In fact several places use it and then store in an APInt named SignMask.
Differential Revision: https://reviews.llvm.org/D32108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300856
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Amara Emerson [Thu, 20 Apr 2017 16:54:49 +0000 (16:54 +0000)]
[SVE] Fix mismatched sign comparison warning in unit test from r300842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300855
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Sanjay Patel [Thu, 20 Apr 2017 16:36:37 +0000 (16:36 +0000)]
[DAGCombiner] fix variable names in isAlias(); NFCI
We started with zero-based params and switched to one-based locals...
Also, variables start with a capital and functions do not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300854
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Zachary Turner [Thu, 20 Apr 2017 16:35:22 +0000 (16:35 +0000)]
Revert "[BitVector] Add operator<<= and operator>>=."
This is causing test failures on Linux / BSD systems. Reverting
while I investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300852
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Craig Topper [Thu, 20 Apr 2017 16:17:13 +0000 (16:17 +0000)]
[APInt] Add isSubsetOf method that can check if one APInt is a subset of another without creating temporary APInts
This question comes up in many places in SimplifyDemandedBits. This makes it easy to ask without allocating additional temporary APInts.
The BitVector class provides a similar functionality through its (IMHO badly named) test(const BitVector&) method. Though its output polarity is reversed.
I've provided one example use case in this patch. I plan to do more as a follow up.
Differential Revision: https://reviews.llvm.org/D32258
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300851
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Sanjay Patel [Thu, 20 Apr 2017 16:15:08 +0000 (16:15 +0000)]
[DAGCombiner] give names to repeated calcs in isAlias(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300850
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Craig Topper [Thu, 20 Apr 2017 16:14:58 +0000 (16:14 +0000)]
In SimplifyDemandedUseBits, use computeKnownBits directly to handle Constants
Currently we don't explicitly process ConstantDataSequential, ConstantAggregateZero, or ConstantVector, or Undef before applying the Depth limit. Instead they occur after the depth check in the non-instruction path.
For the constant types that we do handle, the code is replicated from computeKnownBits.
This patch fixes the missing constant handling and the reduces the amount of code by just using computeKnownBits directly for any type of Constant.
Differential Revision: https://reviews.llvm.org/D32123
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300849
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Zachary Turner [Thu, 20 Apr 2017 15:57:58 +0000 (15:57 +0000)]
[BitVector] Add operator<<= and operator>>=.
Differential Revision: https://reviews.llvm.org/D32244
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300848
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Daniel Sanders [Thu, 20 Apr 2017 15:46:12 +0000 (15:46 +0000)]
[globalisel] Enable tracing the legalizer with --debug-only=legalize-mir
Reviewers: t.p.northover, ab, qcolombet, aditya_nandakumar, rovka, kristof.beyls
Reviewed By: kristof.beyls
Subscribers: dberris, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D31750
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300847
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Amaury Sechet [Thu, 20 Apr 2017 14:22:47 +0000 (14:22 +0000)]
Introduce LLVMDIBuilderRef
Summary:
This patch adds a definition of `LLVMDIBuilderRef` that represents an `llvm::DIBuilder`.
Authored by Harlan Haskins
Reviewers: deadalnix, aprantl, probinson, dblaikie, echristo, whitequark
Reviewed By: deadalnix, whitequark
Subscribers: CodaFi, loladiro
Differential Revision: https://reviews.llvm.org/D32122
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300843
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Amara Emerson [Thu, 20 Apr 2017 13:54:09 +0000 (13:54 +0000)]
[MVT][SVE] Scalable vector MVTs (3/3)
Adds MVT::ElementCount to represent the length of a
vector which may be scalable, then adds helper functions
that work with it.
Patch by Graham Hunter.
Differential Revision: https://reviews.llvm.org/D32019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300842
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Amara Emerson [Thu, 20 Apr 2017 13:36:58 +0000 (13:36 +0000)]
[MVT][SVE] Scalable vector MVTs (2/3)
Adds scalable vector machine value types, and updates
the switch statements required for tablegen.
Patch by Graham Hunter.
Differential Revision: https://reviews.llvm.org/D32018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300840
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Petar Jovanovic [Thu, 20 Apr 2017 13:26:46 +0000 (13:26 +0000)]
[mips][msa] Mask vectors holding shift amounts
Masked vectors which hold shift amounts when creating the following nodes:
ISD::SHL, ISD::SRL or ISD::SRA.
Instructions that use said nodes, which have had their arguments altered are
sll, srl, sra, bneg, bclr and bset.
For said instructions, the shift amount or the bit position that is
specified in the corresponding vector elements will be interpreted as the
shift amount/bit position modulo the size of the element in bits.
The problem lies in compiling with -O2 enabled, where the instructions for
formats .w and .d are not generated, but are instead optimized away.
In this case, having shift amounts that are either negative or greater than
the element bit size results in generation of incorrect results when
constant folding.
We remedy this by masking the operands for the nodes mentioned above before
actually creating them, so that the final result is correct before placed
into the constant pool.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D31331
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300839
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Amara Emerson [Thu, 20 Apr 2017 13:08:17 +0000 (13:08 +0000)]
[MVT][SVE] Scalable vector MVTs (1/3)
This patch adds a few helper functions to obtain new vector
value types based on existing ones without needing to care
about whether they are scalable or not.
I've confined their use to a few common locations right now,
and targets that don't have scalable vectors should never
need to care about these.
Patch by Graham Hunter.
Differential Revision: https://reviews.llvm.org/D32017
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300838
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John Brawn [Thu, 20 Apr 2017 10:18:13 +0000 (10:18 +0000)]
[ARM] Fix handling of mapping symbols when changing sections
ChangeSection incorrectly registers LastEMSInfo as belonging to the previous
section, not the current section. This happens to work when changing sections
using .section, as the previous section is set to the current section before
the call to ChangeSection, but not when using .popsection.
Differential Revision: https://reviews.llvm.org/D32225
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300831
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John Brawn [Thu, 20 Apr 2017 10:13:54 +0000 (10:13 +0000)]
[AArch64] Fix handling of zero immediate in fmov instructions
Currently fmov #0 with a vector destination is handle incorrectly and results in
fmov #-1.9375 being emitted but should instead give an error. This is due to the
way we cope with fmov #0 with a scalar destination being an alias of fmov zr, so
fix this by actually doing it through an alias.
Differential Revision: https://reviews.llvm.org/D31949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300830
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John Brawn [Thu, 20 Apr 2017 10:10:10 +0000 (10:10 +0000)]
[AArch64] Fix handling of integer fp immediates
When an integer is used as an fp immediate we're failing to check the return
value of getFP64Imm, so invalid values are silently permitted. Fix this by
merging together the integer and real handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300828
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Diana Picus [Thu, 20 Apr 2017 09:38:25 +0000 (09:38 +0000)]
[ARM] Rename HW div feature to HW div Thumb. NFCI.
The hardware div feature refers only to Thumb, but because of its name
it is tempting to use it to check for hardware division in general,
which may cause problems in ARM mode. See https://reviews.llvm.org/D32005.
This patch adds "Thumb" to its name, to make its scope clear. One
notable place where I haven't made the change is in the feature flag
(used with -mattr), which is still hwdiv. Changing it would also require
changes in a lot of tests, including clang tests, and it doesn't seem
like it's worth the effort.
Differential Revision: https://reviews.llvm.org/D32160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300827
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Craig Topper [Thu, 20 Apr 2017 06:04:03 +0000 (06:04 +0000)]
[APInt] In slt/sgt(uint64_t), only call getMinSignedBits if the APInt is not a single word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300824
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Craig Topper [Thu, 20 Apr 2017 06:04:01 +0000 (06:04 +0000)]
[APInt] Call the slow case counting methods directly in isMask/isShiftedMask. We already handled the single word case. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300823
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Craig Topper [Thu, 20 Apr 2017 04:55:01 +0000 (04:55 +0000)]
[SelectionDAG] Fix another place that was passing a large value to APInt::lshrInPlace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300821
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Craig Topper [Thu, 20 Apr 2017 04:23:43 +0000 (04:23 +0000)]
[SelectionDAG] Use getActiveBits() and countTrailingZeros() to avoid creating temporary APInts with lshr and trunc. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300819
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Craig Topper [Thu, 20 Apr 2017 03:49:18 +0000 (03:49 +0000)]
Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."
This includes a fix to clamp a right shift of larger than BitWidth in DAG combining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300816
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Craig Topper [Thu, 20 Apr 2017 02:46:21 +0000 (02:46 +0000)]
Revert r300811 "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."
This is failing a self host debug build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300813
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Craig Topper [Thu, 20 Apr 2017 02:11:27 +0000 (02:11 +0000)]
[APInt] Implement APInt::intersects without creating a temporary APInt in the multiword case
Summary: This is a simple question we should be able to answer without creating a temporary to hold the AND result. We can also get an early out as soon as we find a word that intersects.
Reviewers: RKSimon, hans, spatel, davide
Reviewed By: hans, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32253
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300812
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Craig Topper [Thu, 20 Apr 2017 02:03:09 +0000 (02:03 +0000)]
[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth.
The underlying tcShiftRight/tcShiftLeft functions support the larger bit widths but the APInt interface shouldn't rely on that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300811
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Serge Pavlov [Thu, 20 Apr 2017 01:34:04 +0000 (01:34 +0000)]
Do not run frame verification if target does not use frame instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300807
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Ahmed Bougacha [Thu, 20 Apr 2017 00:16:13 +0000 (00:16 +0000)]
Revert "[libFuzzer] XFAIL fuzzer-oom.test on Darwin."
This reverts commit r300127.
r300759 implemented StopTheWorld for Darwin, so the test passes again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300801
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Kostya Serebryany [Wed, 19 Apr 2017 23:58:05 +0000 (23:58 +0000)]
[libFuzzer] extend help for -minimize_crash to cover ASAN_OPTIONS=dedup_token_length=3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300800
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Craig Topper [Wed, 19 Apr 2017 23:57:51 +0000 (23:57 +0000)]
[APInt] Implement operator==(uint64_t) similar to ugt/ult(uint64_t) to remove one of the out of line EqualsSlowCase methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300799
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Craig Topper [Wed, 19 Apr 2017 23:55:48 +0000 (23:55 +0000)]
[APInt] Don't call getActiveBits() in ult/ugt(uint64_t) if its a single word.
The compiled code already needs to check single/multi word for the countLeadingZeros call inside of getActiveBits, but it isn't able to optimize out the leadingZeros call in the single word case that can't produce a value larger than 64.
This shrank the opt binary by about 5-6k on my local x86-64 build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300798
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Sanjoy Das [Wed, 19 Apr 2017 23:55:03 +0000 (23:55 +0000)]
Statepoint Docs: fix incorrect uses of it's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300797
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Craig Topper [Wed, 19 Apr 2017 23:52:59 +0000 (23:52 +0000)]
[APInt] Use ugt(uint64_t) for the compare in getLimitedValue(uint64_t) since the code is identical to it. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300796
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Reid Kleckner [Wed, 19 Apr 2017 23:45:45 +0000 (23:45 +0000)]
[DAE] Simplify attribute list creation, NFC
Removes a use of getSlotAttributes, which I intend to change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300795
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Kuba Mracek [Wed, 19 Apr 2017 23:44:33 +0000 (23:44 +0000)]
Revert r300789: There are Windows bot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300794
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Adrian Prantl [Wed, 19 Apr 2017 23:42:25 +0000 (23:42 +0000)]
Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations
- introduced in r300522 and found via the Swift LLDB testsuite.
The fix is to set the location kind to memory whenever an FrameIndex
location is emitted.
rdar://problem/
31707602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300793
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Adrian Prantl [Wed, 19 Apr 2017 23:42:17 +0000 (23:42 +0000)]
Revert "Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations"
This reverts commit r300790.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300792
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Kannan Narayanan [Wed, 19 Apr 2017 23:39:19 +0000 (23:39 +0000)]
Revert earlier change. ds permute operations affect lgkm counter.
Differential Revision: https://reviews.llvm.org/D32254
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300791
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Adrian Prantl [Wed, 19 Apr 2017 23:34:14 +0000 (23:34 +0000)]
Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locations
- introduced in r300522 and found via the Swift LLDB testsuite.
The fix is to set the location kind to memory whenever an FrameIndex
location is emitted.
rdar://problem/
31707602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300790
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Kuba Mracek [Wed, 19 Apr 2017 23:34:08 +0000 (23:34 +0000)]
[libFuzzer] Always build libFuzzer
There are two reasons why users might want to build libfuzzer:
- To fuzz LLVM itself
- To get the libFuzzer.a archive file, so that they can attach it to their code
This change always builds libfuzzer, and supports the second use case if the specified flag is set.
The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler.
Differential Revision: https://reviews.llvm.org/D32096
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300789
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Reid Kleckner [Wed, 19 Apr 2017 23:26:44 +0000 (23:26 +0000)]
[GlobalOpt] Simplify attribute code stripping nest, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300787
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Reid Kleckner [Wed, 19 Apr 2017 23:17:47 +0000 (23:17 +0000)]
Simplify test for sret attribute in instcombine
This change is correct because the verifier requires that at most one
argument be marked 'sret'.
NFC, removes a use of AttributeList slot APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300784
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Galina Kistanova [Wed, 19 Apr 2017 23:16:14 +0000 (23:16 +0000)]
Temporarily revert r299221 to fix nondeterminism in ThinLTO builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300783
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Philip Reames [Wed, 19 Apr 2017 23:16:13 +0000 (23:16 +0000)]
Refresh the statepoint docs a bit
The documentation had gotten a bit stale. The revised one are by no means perfect, but I tried to remove the obvious incorrect or misleading statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300782
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Matthias Braun [Wed, 19 Apr 2017 23:10:43 +0000 (23:10 +0000)]
X86FrameLowering: Fix getFrameIndexReference() for 'fixed' objects
Debug information is calculated with getFrameIndexReference() which was
missing some logic for the fixed object cases (= parameters on the stack).
rdar://
24557797
Differential Revision: https://reviews.llvm.org/D32204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300781
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Eugene Zelenko [Wed, 19 Apr 2017 23:02:10 +0000 (23:02 +0000)]
[Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300779
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Kostya Serebryany [Wed, 19 Apr 2017 22:42:11 +0000 (22:42 +0000)]
[sanitizer-coverage] remove some more stale code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300778
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Evgeniy Stepanov [Wed, 19 Apr 2017 22:27:23 +0000 (22:27 +0000)]
Remove two unused variables (-Werror).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300777
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Craig Topper [Wed, 19 Apr 2017 22:11:05 +0000 (22:11 +0000)]
[APInt] Cast more calls to add/sub/mul overflow functions to void. I missed the unittests in r300758.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300773
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Sanjay Patel [Wed, 19 Apr 2017 22:00:00 +0000 (22:00 +0000)]
[DAG] add splat vector support for 'or' in SimplifyDemandedBits
I've changed one of the tests to not fold away, but we didn't and still don't do the transform
that the comment claims we do (and I don't know why we'd want to do that).
Follow-up to:
https://reviews.llvm.org/rL300725
https://reviews.llvm.org/rL300763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300772
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Kostya Serebryany [Wed, 19 Apr 2017 21:48:09 +0000 (21:48 +0000)]
[sanitizer-coverage] remove stale code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300769
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Kostya Serebryany [Wed, 19 Apr 2017 21:34:58 +0000 (21:34 +0000)]
[libFuzzer] remove -output_csv option. It duplicates the default output and got out of sync
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300768
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Sanjay Patel [Wed, 19 Apr 2017 21:23:09 +0000 (21:23 +0000)]
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits
This allows forming more 'not' ops, so we get improvements for ISAs that have and-not.
Follow-up to:
https://reviews.llvm.org/rL300725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300763
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Matthias Braun [Wed, 19 Apr 2017 21:11:44 +0000 (21:11 +0000)]
ARMFrameLowering: Reserve emergency spill slot for large arguments
Re-commit after revert in r300668. Changed getMaxFPOffset() to a
more conservative heuristic instead of trying to be clever and missing
for some exotic calling conventions.
We need to reserve an emergency spill slot in cases with large argument
types that could overflow immediate offsets for FP relative address
calculations.
rdar://
31317893
Differential Revision: https://reviews.llvm.org/D31643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300761
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Craig Topper [Wed, 19 Apr 2017 21:09:45 +0000 (21:09 +0000)]
[APInt] Cast calls to add/sub/mul overflow methods to void if only their overflow bool out param is used.
This is preparation for a clang change to improve the [[nodiscard]] warning to not be ignored on methods that return a class marked [[nodiscard]] that are defined in the class itself. See D32207.
We should consider adding wrapper methods to APInt that return the overflow flag directly and discard the APInt result. This would eliminate the void casts and the need to create a bool before the call to pass to the out param.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300758
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Simon Pilgrim [Wed, 19 Apr 2017 21:09:19 +0000 (21:09 +0000)]
[InstCombine] Add frem constant folding test (PR3316)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300757
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Matt Arsenault [Wed, 19 Apr 2017 20:53:07 +0000 (20:53 +0000)]
AMDGPU: Custom lower illegal small select types
Promote them to i32 vectors to avoid unpacking and re-packing
the vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300754
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Dehao Chen [Wed, 19 Apr 2017 20:52:21 +0000 (20:52 +0000)]
Code style change as suggested in https://reviews.llvm.org/D32177 (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300753
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Eli Friedman [Wed, 19 Apr 2017 20:50:57 +0000 (20:50 +0000)]
[ARM] Remove redundant computeKnownBits helper.
Move the BFI logic to computeKnownBitsForTargetNode, and delete
the redundant CMOV logic.
This is intended as a cleanup, but it's probably possible to construct
a case where moving the BFI logic allows more combines.
Differential Revision: https://reviews.llvm.org/D31795
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300752
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Aditya Nandakumar [Wed, 19 Apr 2017 20:48:50 +0000 (20:48 +0000)]
[GISEL]: Move getConstantVReg to Utils
NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300751
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Simon Pilgrim [Wed, 19 Apr 2017 20:47:58 +0000 (20:47 +0000)]
[InstCombine] Add frem constant folding test (PR32177)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300750
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Eli Friedman [Wed, 19 Apr 2017 20:39:39 +0000 (20:39 +0000)]
[ARM] Use TableGen patterns to select vtbl. NFC.
Differential Revision: https://reviews.llvm.org/D32103
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300749
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Craig Topper [Wed, 19 Apr 2017 20:32:11 +0000 (20:32 +0000)]
[APInt] Use SignExtend64 instead of reinventing it. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300747
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Eli Friedman [Wed, 19 Apr 2017 20:19:58 +0000 (20:19 +0000)]
[SCEV] Make SCEV or modeling more aggressive.
Use haveNoCommonBitsSet to figure out whether an "or" instruction
is equivalent to addition. This handles more cases than just
checking for a constant on the RHS.
Differential Revision: https://reviews.llvm.org/D32239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300746
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Dehao Chen [Wed, 19 Apr 2017 20:09:38 +0000 (20:09 +0000)]
Using address range map to speedup finding inline stack for address.
Summary:
In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places:
* linear search for the top-level DIE
* recursive linear traverse the DIE tree to find the path to the leaf DIE
In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead.
Reviewers: dblaikie
Reviewed By: dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300742
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Dehao Chen [Wed, 19 Apr 2017 20:08:14 +0000 (20:08 +0000)]
Update the madd.ll test with utils/update_llc_test_checks.py (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300740
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Dehao Chen [Wed, 19 Apr 2017 19:50:34 +0000 (19:50 +0000)]
PR32710: Disable using PMADDWD for unsigned short.
Summary: PMADDWD can only handle signed short.
Reviewers: mkuper, wmi
Reviewed By: mkuper
Subscribers: andreadb, llvm-commits
Differential Revision: https://reviews.llvm.org/D32236
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300737
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Matt Arsenault [Wed, 19 Apr 2017 19:38:10 +0000 (19:38 +0000)]
AMDGPU: Don't emit amd_kernel_code_t for callable functions
This is inserted directly in the text section. The relocation
for the function ends up resolving to the beginning of the
amd_kernel_code_t header rather than the actual function
entry point.
Also skip some of the comments for initialization
that only makes sense for kernels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300736
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Aditya Nandakumar [Wed, 19 Apr 2017 19:14:20 +0000 (19:14 +0000)]
[tblgen] GCC/MS builtin to target intrisics map.
Patch by Ettore Speziale
Allow TableGen to generate static functions to perform GCC/MS builtin name to
target specific intrinsic ID mapping.
https://reviews.llvm.org/D31150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300735
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Artem Tamazov [Wed, 19 Apr 2017 19:12:06 +0000 (19:12 +0000)]
[AMDGPU][mc][tests][NFC] Update bulk ISA tests for Gfx7 and Gfx8
Added approx. 1100 gfx7 and 1040 gfx8 test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300734
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Matt Arsenault [Wed, 19 Apr 2017 18:29:07 +0000 (18:29 +0000)]
StructurizeCFG: Directly invert cmp instructions
The most common case for a branch condition is
a single use compare. Directly invert the branch
predicate rather than adding a lot of xor i1 true
which the DAG will have to fold later.
This produces nicer to read structurizer output.
This produces some random changes in codegen
due to the DAG swapping branch conditions itself,
and then does a poor job of dealing with those
inverts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300732
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