OSDN Git Service
Matthias Braun [Thu, 28 Apr 2016 20:35:26 +0000 (20:35 +0000)]
LiveIntervalAnalysis: No need to deal with dead subregister defs anymore.
The DetectDeadLaneMask already ensures that we have no dead subregister
definitions making the special handling in LiveIntervalAnalysis
unnecessary. This reverts most of r248335.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267937
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Krzysztof Parzyszek [Thu, 28 Apr 2016 20:33:33 +0000 (20:33 +0000)]
[RDF] Improve handling of inline-asm
- Keep implicit defs from inline-asm instructions.
- Treat register references from inline-asm as fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267936
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Zachary Turner [Thu, 28 Apr 2016 20:26:30 +0000 (20:26 +0000)]
Add parentheses to silence -Wparentheses warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267934
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Krzysztof Parzyszek [Thu, 28 Apr 2016 20:17:06 +0000 (20:17 +0000)]
[RDF] Add option to keep dead phi nodes in DFG
Dead phi nodes are needed for code motion (such as copy propagation),
where a new use would be placed in a location that would be dominated
by a dead phi. Such a transformation is not legal for copy propagation,
and the existence of the phi would prevent it, but if the phi is not
there, it may appear to be valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267932
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Chris Bieneman [Thu, 28 Apr 2016 20:14:19 +0000 (20:14 +0000)]
[CMake] [Darwin] Use libtool instead of ar && ranlib
Summary: Using libtool instead of ar and ranlib on Darwin shaves a minute off my clang build. This is because on Darwin libtool is optimized to give hints to the kernel about filesystem interactions that allow it to be faster.
Reviewers: bogner, pete
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19611
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267930
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Kevin Enderby [Thu, 28 Apr 2016 20:14:13 +0000 (20:14 +0000)]
Update llvm-objdump for disassembly of ARM Mach-O files to always include the opcode bytes.
As this is the expected behavior of the old darwin otool(1) for ARM Mach-O files.
rdar://
25896249
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267929
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Zachary Turner [Thu, 28 Apr 2016 20:05:18 +0000 (20:05 +0000)]
Read the rest of the DBI substreams, and parse source info.
We now read out the rest of the substreams from the DBI streams. One of
these substreams, the FileInfo substream, contains information about which
source files contribute to each module (aka compiland). This patch
additionally parses out the file information from that substream, and
dumps it in llvm-pdbdump.
Differential Revision: http://reviews.llvm.org/D19634
Reviewed by: ruiu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267928
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Kit Barton [Thu, 28 Apr 2016 20:00:42 +0000 (20:00 +0000)]
This reverts commit r265505.
Revert "[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance".
This patch has caused a functional regression in SPEC2k6 namd, and a performance regression in mesa-pipe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267927
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Krzysztof Parzyszek [Thu, 28 Apr 2016 19:49:18 +0000 (19:49 +0000)]
[Hexagon] Add instruction aliases for vector unsigned compare-equal
Unsigned compare-equal instructions are mapped to signed compare-equal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267925
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Matt Arsenault [Thu, 28 Apr 2016 19:37:35 +0000 (19:37 +0000)]
AMDGPU: Emit error if too much LDS is used
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267922
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Yaron Keren [Thu, 28 Apr 2016 19:21:30 +0000 (19:21 +0000)]
Remove doInitialization() and doFinalization() member declarations without definitions.
Visual C++ 2015 flags this in the IDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267919
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Krzysztof Parzyszek [Thu, 28 Apr 2016 19:17:44 +0000 (19:17 +0000)]
Reset the TopRPTracker's position in ScheduleDAGMILive::initQueues
ScheduleDAGMI::initQueues changes the RegionBegin to the first non-debug
instruction. Since it does not track register pressure, it does not affect
any RP trackers. ScheduleDAGMILive inherits initQueues from ScheduleDAGMI,
and it does reset the TopTPTracker in its schedule method. Any derived,
target-specific scheduler will need to do it as well, but the TopRPTracker
is only exposed as a "const" object to derived classes. Without the ability
to modify the tracker directly, this leaves a derived scheduler with a
potential of having the TopRPTracker out-of-sync with the CurrentTop.
The symptom of the problem:
void llvm::ScheduleDAGMILive::scheduleMI(llvm::SUnit *, bool):
Assertion `TopRPTracker.getPos() == CurrentTop && "out of sync"' failed.
Differential Revision: http://reviews.llvm.org/D19438
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267918
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Matt Arsenault [Thu, 28 Apr 2016 18:38:48 +0000 (18:38 +0000)]
AMDGPU: Fix mishandling array allocations when promoting alloca
The canonical form for allocas is a single allocation of the array type.
In case we see a non-canonical array alloca, make sure we aren't
replacing this with an array N times smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267916
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Eugene Zelenko [Thu, 28 Apr 2016 18:27:35 +0000 (18:27 +0000)]
Fix builds broken in r267910.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267915
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Sriraman Tallam [Thu, 28 Apr 2016 18:15:44 +0000 (18:15 +0000)]
Add "PIE Level" metadata to module flags.
http://reviews.llvm.org/D19671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267911
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Eugene Zelenko [Thu, 28 Apr 2016 18:04:41 +0000 (18:04 +0000)]
Fix some Clang-tidy modernize and Include What You Use warnings.
Differential revision: http://reviews.llvm.org/D19673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267910
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Rong Xu [Thu, 28 Apr 2016 17:49:56 +0000 (17:49 +0000)]
[PGO] Fix incorrect Twine usage in emitting optimization remarks.
Should not store Twine objects to local variables. This is fixed the test
failures with r267815 in VS2015 X64 build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267908
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Rong Xu [Thu, 28 Apr 2016 17:31:22 +0000 (17:31 +0000)]
Minor format change and fixing typos in the comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267905
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Krzysztof Parzyszek [Thu, 28 Apr 2016 16:43:16 +0000 (16:43 +0000)]
[Hexagon] Define certain aliases for vector instructions
Specifically:
Vd = #0 -> Vd = vxor(Vd, Vd)
Vdd = #0 -> Vdd.w = vsub(Vdd.w, Vdd.w)
Vdd = Vss -> Vdd = vcombine(Vss.H, Vss.L)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267901
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Simon Dardis [Thu, 28 Apr 2016 16:26:43 +0000 (16:26 +0000)]
[mips][atomics] Fix partword atomic binary operation implementation
Currently Mips::emitAtomicBinaryPartword() does not properly respect the
width of pointers. For MIPS64 this causes the memory address that the ll/sc
sequence uses to be truncated. At runtime this causes a segmentation fault.
This can be fixed by applying similar changes as r266204, so that a full 64bit
pointer is loaded.
Reviewers: dsanders
Differential Review: http://reviews.llvm.org/D19651
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267900
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Arch D. Robison [Thu, 28 Apr 2016 16:11:45 +0000 (16:11 +0000)]
[SLPVectorizer] Extend SLP Vectorizer to deal with aggregates.
The refactoring portion part was done as r267748.
http://reviews.llvm.org/D14185
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267899
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Chad Rosier [Thu, 28 Apr 2016 16:00:15 +0000 (16:00 +0000)]
[GVN] Minor code cleanup. NFC.
Differential Revision: http://reviews.llvm.org/D18828
Patch by Aditya Kumar!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267898
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Krzysztof Parzyszek [Thu, 28 Apr 2016 15:54:48 +0000 (15:54 +0000)]
[Hexagon] Handle double-vector registers as new-value producers
Patch by Colin LeMahieu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267897
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Adrian Prantl [Thu, 28 Apr 2016 15:37:52 +0000 (15:37 +0000)]
Debug Info: Restore the pre-r240853 behavior for DWARF2 bitfields.
The DWARF2 specification of DW_AT_bit_offset is ambiguous for
little-endian machines, but by restoring to the old behavior
we match what debuggers expect and what other popular compilers
generate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267896
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Adrian Prantl [Thu, 28 Apr 2016 15:37:48 +0000 (15:37 +0000)]
Debug info: Support DWARF4 bitfields via DW_AT_data_bit_offset.
The DWARF2 specification of DW_AT_bit_offset was written from the perspective of
a big-endian machine with unclear semantics for other systems. DWARF4
deprecated DW_AT_bit_offset and introduced a new attribute DW_AT_data_bit_offset
that simply counts the number of bits from the beginning of the containing
entity regardless of endianness.
After this patch LLVM emits DW_AT_bit_offset for DWARF 2 or 3 and
DW_AT_data_bit_offset when DWARF 4 or later is requested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267895
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Geoff Berry [Thu, 28 Apr 2016 15:22:37 +0000 (15:22 +0000)]
[EarlyCSE] Change LoadValue field Value *Data to Instruction *Inst. NFC.
Made in preparation for adding MemorySSA support to EarlyCSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267893
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Kostya Serebryany [Thu, 28 Apr 2016 15:19:05 +0000 (15:19 +0000)]
[libFuzzer] Improve documentation
Reviewers: kcc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267892
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Krzysztof Parzyszek [Thu, 28 Apr 2016 15:09:19 +0000 (15:09 +0000)]
[RDF] Handle undefined registers in RDF copy propagation
When updating the graph, make sure that new uses without reaching defs
are handled correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267891
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Geoff Berry [Thu, 28 Apr 2016 14:59:27 +0000 (14:59 +0000)]
[EarlyCSE] Sort includes. NFC.
Reviewers: mcrosier
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D19617
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267890
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Yaron Keren [Thu, 28 Apr 2016 14:49:44 +0000 (14:49 +0000)]
Rangify for loops, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267889
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Chad Rosier [Thu, 28 Apr 2016 14:47:23 +0000 (14:47 +0000)]
[Inliner] Formatting. NFC.
Patch by Aditya Kumar!
Differential Revision: http://reviews.llvm.org/D19047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267888
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Ahmed Bougacha [Thu, 28 Apr 2016 14:36:07 +0000 (14:36 +0000)]
[InstCombine] Remove trailing whitespace. NFC.
r267873.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267887
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Simon Pilgrim [Thu, 28 Apr 2016 12:22:53 +0000 (12:22 +0000)]
[InstCombine][SSE] Add MOVMSK support to SimplifyDemandedUseBits
The MOVMSK instructions copies a vector elements' sign bits to the low bits of a scalar register and zeros the high bits.
This patch adds MOVMSK support to SimplifyDemandedUseBits so that its aware that the upper bits are known to be zero. It also removes the call to MOVMSK if none of the lower bits are actually required and just returns zero.
Differential Revision: http://reviews.llvm.org/D19614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267873
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Craig Topper [Thu, 28 Apr 2016 05:58:46 +0000 (05:58 +0000)]
[X86] Remove unused operand from a function and all its callers. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267854
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Craig Topper [Thu, 28 Apr 2016 03:34:31 +0000 (03:34 +0000)]
[CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267853
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Matthias Braun [Thu, 28 Apr 2016 03:07:16 +0000 (03:07 +0000)]
CodeGen: Add DetectDeadLanes pass.
The DetectDeadLanes pass performs a dataflow analysis of used/defined
subregister lanes across COPY instructions and instructions that will
get lowered to copies. It detects dead definitions and uses reading
undefined values which are obscured by COPY and subregister usage.
These dead definitions cause trouble in the register coalescer which
cannot deal with definitions suddenly becoming dead after coalescing
COPY instructions.
For now the pass only adds dead and undef flags to machine operands. It
should be possible to extend it in the future to remove the dead
instructions and redo the analysis for the affected virtual
registers.
Differential Revision: http://reviews.llvm.org/D18427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267851
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Matthias Braun [Thu, 28 Apr 2016 03:07:11 +0000 (03:07 +0000)]
TableGen: Produce CoveredBySubRegs summary for register classes
This will be used in the upcoming "DetectDeadLanes" pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267850
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Matthias Braun [Thu, 28 Apr 2016 03:07:07 +0000 (03:07 +0000)]
TargetRegisterInfo: Introduce reverseComposeSubRegIndexLaneMask()
This function performs the reverse computation of
composeSubRegIndexLaneMask().
It will be used in the upcoming "DetectDeadLanes" pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267849
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Matthias Braun [Thu, 28 Apr 2016 03:07:04 +0000 (03:07 +0000)]
TableGen: Support lanemasks for classes without subregisters
Previously using lanemasks on registers without any subregisters was not
well defined. This commit extends TargetRegisterInfo/tablegen to:
- Report a lanemask of 1 for regclasses without subregisters
- Do the right thing when mapping a 0/1 lanemask from a class without
subregisters into a class with subregisters in
TargetRegisterInfo::composeSubRegIndexLaneMasks().
This will be used in the upcoming "DetectDeadLanes" patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267848
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Matthias Braun [Thu, 28 Apr 2016 02:11:49 +0000 (02:11 +0000)]
LiveIntervalAnalysis: Fix handleMove() using wrong value numbers
handleMove() was incorrectly swapping two value numbers. This was missed
before because the problem only occured when moving subregister definitions
and needed -verify-machineinstrs to be detected.
I cannot add a testcase as long as I cannot reapply r260905/r260806.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267840
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Craig Topper [Thu, 28 Apr 2016 01:58:21 +0000 (01:58 +0000)]
[AArch64] Expand CTTZ for all vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267837
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Richard Smith [Thu, 28 Apr 2016 00:57:14 +0000 (00:57 +0000)]
Fix bogus documentation for StringRef::slice in the End < Start case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267831
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Chaoren Lin [Thu, 28 Apr 2016 00:49:37 +0000 (00:49 +0000)]
Use llvm:Twine instead of std::to_string.
std::to_string is not available from the Android NDK.
Reviewers: lhames, ovyalov, chandlerc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267829
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Sanjay Patel [Thu, 28 Apr 2016 00:29:27 +0000 (00:29 +0000)]
Update test to use FileCheck
Also, add some metadata to show what that currently looks like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267827
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Bryan Chan [Thu, 28 Apr 2016 00:17:23 +0000 (00:17 +0000)]
[SystemZ] Support Swift Calling Convention
Summary:
Port rL265480, rL264754, rL265997 and rL266252 to SystemZ, in order to enable the Swift port on the architecture. SwiftSelf and SwiftError are assigned to R10 and R9, respectively, which are normally callee-saved registers. For more information, see:
RFC: Implementing the Swift calling convention in LLVM and Clang
https://groups.google.com/forum/#!topic/llvm-dev/epDd2w93kZ0
Reviewers: kbarton, manmanren, rjmccall, uweigand
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19414
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267823
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Peter Collingbourne [Wed, 27 Apr 2016 23:48:11 +0000 (23:48 +0000)]
LTO: Don't bother trying to mangle unnamed globals, as they can't be preserved with MustPreserveSymbols.
Summary: Should fix sanitizer-windows bot.
Reviewers: joker.eph
Subscribers: llvm-commits, joker.eph
Differential Revision: http://reviews.llvm.org/D19635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267820
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Kevin Enderby [Wed, 27 Apr 2016 23:43:00 +0000 (23:43 +0000)]
Fix bugs in llvm-objdump printing the last word for -section in non i386 and x86 files.
Two problems, 1) for the last 4 bytes it would print them as separate bytes not a word
and 2) it would print the same last byte for those bytes less than a word.
rdar://
25938224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267819
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Zachary Turner [Wed, 27 Apr 2016 23:41:42 +0000 (23:41 +0000)]
Parse module information from DBI stream.
This gets more data out of the DBI strema of the PDB. In
particular it extracts the metadata for the list of modules
(compilands) that this PDB contains info about, and adds support
for dumping these fields to llvm-pdbdump.
Differential Revision: http://reviews.llvm.org/D19570
Reviewed By: ruiu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267818
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Quentin Colombet [Wed, 27 Apr 2016 23:26:40 +0000 (23:26 +0000)]
[ImplicitNullChecks] Properly update the live-in of the block of the memory operation.
We basically replace:
HoistBB:
cond_br NullBB, NotNullBB
NullBB:
...
NotNullBB:
<reg> = load
into
HoistBB
<reg> = load_faulting_op NullBB
uncond_br NotNullBB
NullBB:
...
NotNullBB: ## <reg> is now live-in of NotNullBB
...
This partially fixes the machine verifier error for
test/CodeGen/X86/implicit-null-check.ll, but it still fails because
of the implicit CFG structure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267817
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Rong Xu [Wed, 27 Apr 2016 23:23:53 +0000 (23:23 +0000)]
more buildbot failure fix to r267792
__llvm_prf_nm length is embedded in llvm_used. Relax llvm_used check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267816
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Rong Xu [Wed, 27 Apr 2016 23:20:27 +0000 (23:20 +0000)]
[PGO] Promote indirect calls to conditional direct calls with value-profile
This patch implements the transformation that promotes indirect calls to
conditional direct calls when the indirect-call value profile meta-data is
available.
Differential Revision: http://reviews.llvm.org/D17864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267815
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Sanjay Patel [Wed, 27 Apr 2016 23:14:12 +0000 (23:14 +0000)]
[SimplifyCFG] propagate branch metadata when creating select
There's no existing test for this path, and I don't know how to expose
it in a regression test, but I'm assuming there's some reason this
path exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267813
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Lang Hames [Wed, 27 Apr 2016 22:54:03 +0000 (22:54 +0000)]
[RuntimeDyld] Propagate another dropped error in RuntimeDyldELF.
This should fix the PPC64 bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267810
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Mitch Bodart [Wed, 27 Apr 2016 22:52:35 +0000 (22:52 +0000)]
[X86] Enable the post-RA-scheduler for clang's default 32-bit cpu.
For compilations with no explicit cpu specified, this exhibits
nice gains on Silvermont, with neutral performance on big cores.
Differential Revision: http://reviews.llvm.org/D19138
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267809
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Kevin Enderby [Wed, 27 Apr 2016 22:36:18 +0000 (22:36 +0000)]
Fix a bug in llvm-objdump printing of 32-bit addresses for -section in non i386 and x86 files.
rdar://
25896202
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267807
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Quentin Colombet [Wed, 27 Apr 2016 22:33:42 +0000 (22:33 +0000)]
[X86][FastISel] Make sure we use the right register class when we select stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267806
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Rong Xu [Wed, 27 Apr 2016 22:06:35 +0000 (22:06 +0000)]
Fix buildbot failure due to r267792
Relax the test check as some targets do not have name compression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267803
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Colin LeMahieu [Wed, 27 Apr 2016 21:37:44 +0000 (21:37 +0000)]
[Hexagon] Merging nops in to previous packet rather than always creating a new one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267798
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Quentin Colombet [Wed, 27 Apr 2016 21:37:37 +0000 (21:37 +0000)]
[X86] Fix the lowering of TLS calls.
The callseq_end node must be glued with the TLS calls, otherwise,
the generic code will miss the uses of the returned value and will
mark it dead.
Moreover, TLSCall 64-bit pseudo must not set an implicit-use on RDI,
the pseudo uses the symbol address at this point not RDI and the
lowering will do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267797
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Colin LeMahieu [Wed, 27 Apr 2016 21:26:13 +0000 (21:26 +0000)]
[MCAssembler] Allow backend to finalize layout post-relaxation.
Differential revision: http://reviews.llvm.org/D19429
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267796
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Rong Xu [Wed, 27 Apr 2016 21:17:30 +0000 (21:17 +0000)]
[PGO] Prohibit address recording if the function is both internal and COMDAT
Differential Revision: http://reviews.llvm.org/D19515
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267792
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Matt Arsenault [Wed, 27 Apr 2016 21:05:08 +0000 (21:05 +0000)]
AMDGPU: Account for globals in AMDGPUPromoteAlloca pass
Patch by Bas Nieuwenhuizen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267791
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Lang Hames [Wed, 27 Apr 2016 20:54:49 +0000 (20:54 +0000)]
[RuntimeDyld] Add missing include - <string> is requried for std::to_string.
This should fix the compile error that showed up in build:
http://lab.llvm.org:8011/builders/lldb-x86_64-ubuntu-14.04-buildserver/builds/6754/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267790
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Lang Hames [Wed, 27 Apr 2016 20:51:58 +0000 (20:51 +0000)]
[RuntimeDyld] Propagate Errors from findPPC64TOCSection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267789
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Kevin Enderby [Wed, 27 Apr 2016 20:37:06 +0000 (20:37 +0000)]
Add a test case for the crash fixed with r267037. David Blaikie said it would be nice to have!
This was crashing llvm-objdump with -macho -objc-meta-data when trying dump a non-existent section.
So the test binary is simply created from an empty .s file compiled with: clang -arch armv7 empty.s -c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267782
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Ahmed Bougacha [Wed, 27 Apr 2016 20:33:07 +0000 (20:33 +0000)]
[ARM] Set AddPristinesAndCSRs to expandCMP_SWAP LivePhysRegs.
We run after PEI.
Found via inspection; no obvious testcase.
Follow-up to r266679.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267781
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Ahmed Bougacha [Wed, 27 Apr 2016 20:33:05 +0000 (20:33 +0000)]
[AArch64] Set AddPristinesAndCSRs to expandCMP_SWAP LivePhysRegs.
We run after PEI.
Found via inspection; no obvious testcase.
Follow-up to r266339.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267780
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Ahmed Bougacha [Wed, 27 Apr 2016 20:33:02 +0000 (20:33 +0000)]
[AArch64] Set correct successors in CMPXCHG pseudo expansion.
transferSuccessors() would LoadCmpBB a successor of DoneBB,
whereas it should be a successor of the original MBB.
Follow-up to r266339.
Unfortunately, it's tricky to catch this in the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267779
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Ahmed Bougacha [Wed, 27 Apr 2016 20:32:54 +0000 (20:32 +0000)]
[ARM] Set correct successors in CMPXCHG pseudo expansion.
transferSuccessors() would LoadCmpBB a successor of DoneBB, whereas
it should be a successor of the original MBB.
The testcase changes are caused by Thumb2SizeReduction, which
was previously confused by the broken CFG.
Follow-up to r266679.
Unfortunately, it's tricky to catch this in the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267778
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Simon Pilgrim [Wed, 27 Apr 2016 20:25:34 +0000 (20:25 +0000)]
[InstCombine][AVX2] Add AVX2 per-element vector shift tests
At the moment we don't simplify PSRAV/PSRLV/PSLLV intrinsics to generic IR for constant shift amounts, but we could.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267777
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Lang Hames [Wed, 27 Apr 2016 20:24:48 +0000 (20:24 +0000)]
[RuntimeDyld] Plumb Error/Expected through the internals of RuntimeDyld.
Also replaces a number of calls to report_fatal_error with Error returns.
The plumbing will make it easier to return errors originating in libObject.
Replacing report_fatal_errors with Error returns will give JIT clients the
opportunity to recover gracefully when the JIT is unable to produce/relocate
code, as well as providing meaningful error messages that can be used to file
bug reports.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267776
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Than McIntosh [Wed, 27 Apr 2016 20:07:02 +0000 (20:07 +0000)]
Fix build failure under NDEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267774
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Kevin B. Smith [Wed, 27 Apr 2016 19:58:03 +0000 (19:58 +0000)]
[X86]: Quit promoting 16 bit loads to 32 bit.
Differential Revision: http://reviews.llvm.org/D19592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267773
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Kostya Serebryany [Wed, 27 Apr 2016 19:52:56 +0000 (19:52 +0000)]
[libFuzzer] disable leak detection if we have tried it for 1000 times w/o finding a leak [part 2]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267771
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Kostya Serebryany [Wed, 27 Apr 2016 19:52:34 +0000 (19:52 +0000)]
[libFuzzer] disable leak detection if we have tried it for 1000 times w/o finding a leak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267770
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Andrew Kaylor [Wed, 27 Apr 2016 19:39:32 +0000 (19:39 +0000)]
Add optimization bisect opt-in calls for PowerPC passes
Differential Revision: http://reviews.llvm.org/D19554
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267769
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David Majnemer [Wed, 27 Apr 2016 19:36:38 +0000 (19:36 +0000)]
[CodeGenPrepare] Don't sink a cast past its user
The sink cast machinery is supposed to sink casts as close to their user
as possible. However, an EH pad is the first instruction in it's basic
block. Don't sink if the user is an EH pad.
This fixes PR27536.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267767
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Than McIntosh [Wed, 27 Apr 2016 19:26:25 +0000 (19:26 +0000)]
Refactor debugging code, NFC.
Summary:
Refactor debugging routines to reduce code duplication. Remove a couple
of #include's that were not needed. Don't require MachineDominator as a
prereq for this pass (not needed).
These changes split off from http://reviews.llvm.org/D18827.
Reviewers: wmi, gbiv, qcolombet
Subscribers: llvm-commits, davidxl, jevinskie
Differential Revision: http://reviews.llvm.org/D18992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267766
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Justin Lebar [Wed, 27 Apr 2016 19:13:37 +0000 (19:13 +0000)]
[NVPTX] Run NVVMReflect at the beginning of IR passes.
Summary:
Currently the NVVMReflect pass is run at the beginning of our backend
passes. But really, it should be run as early as possible, as it's
simply resolving an "if" statement in code. So copy it into
TargetMachine::addEarlyAsPossiblePasses.
We still run it at the beginning of the backend passes, since it's
needed for correctness when lowering to nvptx.
(Specifically, NVVMReflect changes each call to the __nvvm_reflect
function or llvm.nvvm.reflect intrinsic into an integer constant, based
on the pass's configuration. Clearly we miss many optimization
opportunities if we perform this transformation at the beginning of
codegen.)
Reviewers: rnk
Subscribers: tra, llvm-commits, jholewinski
Differential Revision: http://reviews.llvm.org/D18616
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267765
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Justin Lebar [Wed, 27 Apr 2016 19:08:24 +0000 (19:08 +0000)]
Add TargetMachine::addEarlyAsPossiblePasses, and call it from opt.
Summary:
This is a hook to allow TargetMachine to install passes at the
EP_EarlyAsPossible PassManagerBuilder extension point.
Reviewers: chandlerc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18614
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267763
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Ahmed Bougacha [Wed, 27 Apr 2016 19:04:50 +0000 (19:04 +0000)]
[LIR] Set attributes on memset_pattern16.
"inferattrs" will deduce the attribute, but it will be too late for
many optimizations. Set it ourselves when creating the call.
Differential Revision: http://reviews.llvm.org/D17598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267762
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Ahmed Bougacha [Wed, 27 Apr 2016 19:04:46 +0000 (19:04 +0000)]
[LIR] Reuse variable. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267761
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Ahmed Bougacha [Wed, 27 Apr 2016 19:04:43 +0000 (19:04 +0000)]
[InferAttrs] Mark memset_pattern16 params nocapture.
Differential Revision: http://reviews.llvm.org/D19471
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267760
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Ahmed Bougacha [Wed, 27 Apr 2016 19:04:40 +0000 (19:04 +0000)]
[TLI] Unify LibFunc attribute inference. NFCI.
Now the pass is just a tiny wrapper around the util. This lets us reuse
the logic elsewhere (done here for BuildLibCalls) instead of duplicating
it.
The next step is to have something like getOrInsertLibFunc that also
sets the attributes.
Differential Revision: http://reviews.llvm.org/D19470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267759
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Ahmed Bougacha [Wed, 27 Apr 2016 19:04:35 +0000 (19:04 +0000)]
[TLI] Unify LibFunc signature checking. NFCI.
I tried to be as close as possible to the strongest check that
existed before; cleaning these up properly is left for future work.
Differential Revision: http://reviews.llvm.org/D19469
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267758
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Ahmed Bougacha [Wed, 27 Apr 2016 19:04:29 +0000 (19:04 +0000)]
[TLI] Fix indentation. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267757
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Sjoerd Meijer [Wed, 27 Apr 2016 18:35:02 +0000 (18:35 +0000)]
Clean up to avoid compiler warnings for casting away const qualifiers.
Differential Revision: http://reviews.llvm.org/D19598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267753
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Chad Rosier [Wed, 27 Apr 2016 18:29:11 +0000 (18:29 +0000)]
Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD."
This reverts commit r267733 due to a -Werror,-Wunused-function error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267752
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Matthew Simpson [Wed, 27 Apr 2016 18:21:36 +0000 (18:21 +0000)]
[LV] Reallow positive-stride interleaved load groups with gaps
We previously disallowed interleaved load groups that may cause us to
speculatively access memory out-of-bounds (r261331). We did this by ensuring
each load group had an access corresponding to the first and last member.
Instead of bailing out for these interleaved groups, this patch enables us to
peel off the last vector iteration, ensuring that we execute at least one
iteration of the scalar remainder loop. This solution was proposed in the
review of the previous patch.
Differential Revision: http://reviews.llvm.org/D19487
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267751
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Arch D. Robison [Wed, 27 Apr 2016 17:46:25 +0000 (17:46 +0000)]
[SLPVectorizer] Refactor where MinVecRegSize and MaxVecRegSize live.
This is the first of two commits for extending SLP Vectorizer to deal with aggregates.
This commit merely refactors existing logic.
http://reviews.llvm.org/D14185
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267748
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Gerolf Hoflehner [Wed, 27 Apr 2016 17:27:16 +0000 (17:27 +0000)]
[DAGCombiner] Follow coding convention for function name (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267745
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Marcin Koscielnicki [Wed, 27 Apr 2016 17:21:49 +0000 (17:21 +0000)]
[Mips] Add support for llvm.thread.pointer intrinsic.
This will be used to implement __builtin_thread_pointer in clang.
Differential Revision: http://reviews.llvm.org/D19569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267743
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Gerolf Hoflehner [Wed, 27 Apr 2016 17:19:54 +0000 (17:19 +0000)]
[InstCombine] Sharpended test case in pr21210.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267742
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Reid Kleckner [Wed, 27 Apr 2016 16:46:33 +0000 (16:46 +0000)]
Silence a -Wdangling-else
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267737
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Matthew Simpson [Wed, 27 Apr 2016 16:25:04 +0000 (16:25 +0000)]
Add parentheses to silence buildbot warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267734
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Artem Tamazov [Wed, 27 Apr 2016 16:20:23 +0000 (16:20 +0000)]
[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.
Added support of TTMP quads.
Reworked M0 exclusion machinery for SMRD and similar instructions
to enable usage of TTMP registers in those instructions as destinations.
Tests added.
Differential Revision: http://reviews.llvm.org/D19342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267733
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Reid Kleckner [Wed, 27 Apr 2016 16:10:29 +0000 (16:10 +0000)]
[PDB] Fix function names for private symbols in PDBs
Summary:
llvm-symbolizer wants to get linkage names of functions for historical
reasons. Linkage names are only recorded in the PDB for public symbols,
and the linkage name is apparently stored separately in some "public
symbol" record. We had a workaround in PDBContext which would look for
such symbols when the user requested linkage names.
However, when given an address that was truly in a private function and
public funciton, we would accidentally find nearby public symbols and
return those function names. The fix is to look for both function
symbols and public symbols and only prefer the public symbol name if the
addresses of the symbols agree.
Fixes PR27492
Reviewers: zturner
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267732
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Nicolai Haehnle [Wed, 27 Apr 2016 15:46:01 +0000 (15:46 +0000)]
AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic
Summary:
So it appears that to guarantee some of the ordering requirements of a GLSL
memoryBarrier() executed in the shader, we need to emit an s_waitcnt.
(We can't use an s_barrier, because memoryBarrier() may appear anywhere in
the shader, in particular it may appear in non-uniform control flow.)
Reviewers: arsenm, mareko, tstellarAMD
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D19203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267729
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Matthew Simpson [Wed, 27 Apr 2016 15:20:21 +0000 (15:20 +0000)]
[TTI] Add hook for vector extract with extension
This change adds a new hook for estimating the cost of vector extracts followed
by zero- and sign-extensions. The motivating example for this change is the
SMOV and UMOV instructions on AArch64. These instructions move data from vector
to general purpose registers while performing the corresponding extension
(sign-extend for SMOV and zero-extend for UMOV) at the same time. For these
operations, TargetTransformInfo can assume the extensions are free and only
report the cost of the vector extract. The SLP vectorizer has been updated to
make use of the new hook.
Differential Revision: http://reviews.llvm.org/D18523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267725
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Artem Tamazov [Wed, 27 Apr 2016 15:17:03 +0000 (15:17 +0000)]
[AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers.
Possibility to specify code of hardware register kept.
Disassemble to symbolic name, if name is known.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19335
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267724
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