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Sam Clegg [Tue, 25 Apr 2017 17:11:56 +0000 (17:11 +0000)]
[WebAssembly] Read global index in init expression as LEB
Subscribers: jfb, dschuff
Differential Revision: https://reviews.llvm.org/D32462
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301330
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Craig Topper [Tue, 25 Apr 2017 17:01:32 +0000 (17:01 +0000)]
[InstSimplify] Handle (~A & ~B) | (~A ^ B) -> ~A ^ B
The code Sanjay Patel moved over from InstCombine doesn't work properly if the 'and' has both inputs as nots because we used a commuted op matcher on the 'and' first. But this will bind to the first 'not' on 'and' when there could be two 'not's. InstCombine could rely on DeMorgan to ensure the 'and' wouldn't have two 'not's eventually, but InstSimplify can't rely on that.
This patch matches the xor first then checks for the ands and allows a not of either operand of the xor.
Differential Revision: https://reviews.llvm.org/D32458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301329
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Davide Italiano [Tue, 25 Apr 2017 16:54:45 +0000 (16:54 +0000)]
[PM] Run IndirectCallPromotion only when PGO is enabled.
Differential Revision: https://reviews.llvm.org/D32465
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301327
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Craig Topper [Tue, 25 Apr 2017 16:48:19 +0000 (16:48 +0000)]
[InstCombine] Remove superfluous curly braces around a single line if body. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301326
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Craig Topper [Tue, 25 Apr 2017 16:48:14 +0000 (16:48 +0000)]
[ValueTracking] Use APInt::operator|=(uint64_t) instead of creating a temporary APInt. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301325
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Craig Topper [Tue, 25 Apr 2017 16:48:09 +0000 (16:48 +0000)]
[ValueTracking] Use APInt instead of auto. NFC
This is a pre-commit for a patch I'm working on to turn KnownZero/One into a struct. Once I do that the type here will be less obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301324
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Craig Topper [Tue, 25 Apr 2017 16:48:03 +0000 (16:48 +0000)]
[ValueTracking] Use BitWidth local variable instead of re-reading it from KnownZero. NFC
This is a pre-commit for a patch that I'm working on to merge KnownZero/KnownOne into a KnownBits struct which would have had to touch this line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301323
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Simon Pilgrim [Tue, 25 Apr 2017 16:41:28 +0000 (16:41 +0000)]
[SelectionDAG] Added getBuildVector(ArrayRef<SDUse>) helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301322
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Simon Pilgrim [Tue, 25 Apr 2017 16:16:03 +0000 (16:16 +0000)]
[DAGCombiner] Refactor to make it easy to add support for vectors in a future patch. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301320
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Andrew Ng [Tue, 25 Apr 2017 15:39:57 +0000 (15:39 +0000)]
Resubmit r301309: [DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch reapplies r301309 with the fix to the MIR test to fix the assertion
triggered by r301309. Had trimmed a little bit too much from the MIR!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301317
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Craig Topper [Tue, 25 Apr 2017 15:19:04 +0000 (15:19 +0000)]
[InstCombine] Add missing commute handling to (A | B) & (B ^ (~A)) -> (A & B)
The matching here wasn't able to handle all the possible commutes. It always assumed the not would be on the left of the xor, but that's not guaranteed.
Differential Revision: https://reviews.llvm.org/D32474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301316
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Simon Pilgrim [Tue, 25 Apr 2017 15:10:47 +0000 (15:10 +0000)]
[SelectionDAG] Use getBuildVector helper where possible. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301314
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Dylan McKay [Tue, 25 Apr 2017 15:09:04 +0000 (15:09 +0000)]
[AVR] Support the LDWRdPtr instruction with the same Src+Dst register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301313
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Andrew Ng [Tue, 25 Apr 2017 14:36:01 +0000 (14:36 +0000)]
Revert "[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler."
This reverts commit r301309 which is causing buildbot assertion failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301312
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Daniel Sanders [Tue, 25 Apr 2017 14:27:27 +0000 (14:27 +0000)]
Bring back the ability opt out of padding zero-byte functions by not providing a nop instruction.
Summary: No test case since I'm not aware of an in-tree target that needs this.
Reviewers: hans
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32398
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301311
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Andrew Ng [Tue, 25 Apr 2017 13:39:49 +0000 (13:39 +0000)]
[DebugInfo][X86] Fix handling of DBG_VALUE's in post-RA scheduler.
This patch fixes a bug with the updating of DBG_VALUE's in
BreakAntiDependencies. Previously, it would only attempt to update the first
DBG_VALUE following the instruction whose register is being changed,
potentially leaving DBG_VALUE's referring to the wrong register. Now the code
will update all DBG_VALUE's that immediately follow the instruction.
This issue was detected as a result of an optimized codegen difference with
"-g" where an X86 byte/word fixup was not performed due to a DBG_VALUE
referencing the wrong register.
Differential Revision: https://reviews.llvm.org/D31755
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301309
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Simon Pilgrim [Tue, 25 Apr 2017 13:39:07 +0000 (13:39 +0000)]
[SelectionDAG] Pull out repeated getValueType calls. NFCI.
Noticed in D32391.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301308
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Simon Pilgrim [Tue, 25 Apr 2017 12:40:45 +0000 (12:40 +0000)]
[DAGCombiner] Add vector support for (srl (trunc (srl x, c1)), c2) combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301305
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Andrew Ng [Tue, 25 Apr 2017 12:36:14 +0000 (12:36 +0000)]
[SimplifyLibCalls] Fix infinite loop with fast-math optimization.
One of the fast-math optimizations is to replace calls to standard double
functions with their float equivalents, e.g. exp -> expf. However, this can
cause infinite loops for the following:
float expf(float val) { return (float) exp((double) val); }
A similar inline declaration exists in the MinGW-w64 math.h header file which
when compiled with -O2/3 and fast-math generates infinite loops.
So this fix checks that the calling function to the standard double function
that is being replaced does not match the float equivalent.
Differential Revision: https://reviews.llvm.org/D31806
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301304
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Simon Pilgrim [Tue, 25 Apr 2017 12:29:07 +0000 (12:29 +0000)]
[SelectionDAG] Recognise splat vector isKnownToBeAPowerOfTwo one/sign bit shift cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301303
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Simon Pilgrim [Tue, 25 Apr 2017 10:47:35 +0000 (10:47 +0000)]
[DAGCombiner] Use SDValue::getConstantOperandVal helper where possible. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301300
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Sanjoy Das [Tue, 25 Apr 2017 06:53:25 +0000 (06:53 +0000)]
[IVUsers] Don't bail out of normalizing non-affine add recs
Summary:
In a previous change I changed SCEV's normalization / denormalization
to work with non-affine add recs. So the bailout in IVUsers can be
removed.
Reviewers: atrick, efriedma
Reviewed By: atrick
Subscribers: davide, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D32105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301298
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Craig Topper [Tue, 25 Apr 2017 06:47:49 +0000 (06:47 +0000)]
[InstCombine] Add test cases for missing commute handling in ((A ^ C) ^ B) & (B ^ A) -> (B ^ A) & ~C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301297
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Craig Topper [Tue, 25 Apr 2017 06:22:17 +0000 (06:22 +0000)]
[InstCombine] Add test cases showing failures to handle commuted patterns after tricking the operand complexity sorting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301296
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Craig Topper [Tue, 25 Apr 2017 06:02:11 +0000 (06:02 +0000)]
[InstCombine] Use commutable matchers to reduce some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301294
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Gil Rapaport [Tue, 25 Apr 2017 05:57:22 +0000 (05:57 +0000)]
[LV] Remove redundant basic block split
This patch is part of D28975's breakdown.
Genreating the control-flow to guard predicated instructions modified to
only use SplitBlockAndInsertIfThen() for producing the if-then construct.
Differential Revision: https://reviews.llvm.org/D32224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301293
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Serge Guelton [Tue, 25 Apr 2017 05:45:37 +0000 (05:45 +0000)]
Update doc of the variadic version of getOrInsertFunction
It no longer needs a null terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301292
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Xinliang David Li [Tue, 25 Apr 2017 04:51:19 +0000 (04:51 +0000)]
[CodeExtractor]: Fixup use refs of the old phi.
Differential Revision: http://reviews.llvm.org/D32468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301291
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Akira Hatanaka [Tue, 25 Apr 2017 04:06:35 +0000 (04:06 +0000)]
[ObjCARC] Do not sink an objc_retain past a clang.arc.use.
We need to do this to prevent a miscompile which sinks an objc_retain
past an objc_release that releases the object objc_retain retains. This
happens because the top-down and bottom-up traversals each determines
the insert point for retain or release individually without knowing
where the other instruction is moved.
For example, when the following IR is fed to the ARC optimizer, the
top-down traversal decides to insert objc_retain right before
objc_release and the bottom-up traversal decides to insert objc_release
right after clang.arc.use.
(IR before ARC optimizer)
%11 = call i8* @objc_retain(i8* %10)
call void (...) @clang.arc.use(%0* %5)
call void @llvm.dbg.value(...)
call void @objc_release(i8* %6)
This reverses the order of objc_release and objc_retain, which causes
the object to be destructed prematurely.
(IR after ARC optimizer)
call void (...) @clang.arc.use(%0* %5)
call void @objc_release(i8* %6)
call void @llvm.dbg.value(...)
%11 = call i8* @objc_retain(i8* %10)
rdar://problem/
30530580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301289
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Davide Italiano [Tue, 25 Apr 2017 03:48:47 +0000 (03:48 +0000)]
[SimplifyLibCalls] Remove a cl::opt that's been `true` for a long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301288
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Sanjoy Das [Tue, 25 Apr 2017 00:09:19 +0000 (00:09 +0000)]
Teach SCEV normalization to de/normalize non-affine add recs
Summary:
Before this change, SCEV Normalization would incorrectly normalize
non-affine add recurrences. To work around this there was (still is)
a check in place to make sure we only tried to normalize affine add
recurrences.
We recently found a bug in aforementioned check to bail out of
normalizing non-affine add recurrences. However, instead of fixing
the bailout, I have decided to teach SCEV normalization to work
correctly with non-affine add recurrences, making the bailout
unnecessary (I'll remove it in a subsequent change).
I've also added some unit tests (which would have failed before this
change).
Reviewers: atrick, sunfish, efriedma
Reviewed By: atrick
Subscribers: mcrosier, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32104
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301281
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Matt Arsenault [Mon, 24 Apr 2017 23:42:41 +0000 (23:42 +0000)]
InferAddressSpaces: Use reference arguments instead of pointers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301276
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Eugene Zelenko [Mon, 24 Apr 2017 23:21:38 +0000 (23:21 +0000)]
[Object] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301275
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Matt Arsenault [Mon, 24 Apr 2017 23:02:57 +0000 (23:02 +0000)]
InferAddressSpaces: Remove redundant assert
This is just asserting all the operations are handled in the
switch, which the unreachable already handles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301270
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Sanjay Patel [Mon, 24 Apr 2017 22:42:34 +0000 (22:42 +0000)]
[ARM, x86] add more vector tests for bool math; NFC
I'm proposing a fold for increment-of-sexted-bool in:
https://reviews.llvm.org/D31944
...so we need to know what happens in more cases like these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301269
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Reid Kleckner [Mon, 24 Apr 2017 22:26:46 +0000 (22:26 +0000)]
[git-llvm] Remove CR from middle of svn propget output
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301268
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Reid Kleckner [Mon, 24 Apr 2017 22:25:02 +0000 (22:25 +0000)]
Make getSlotAttributes return an AttributeSet instead of a wrapper list
Remove the temporary, poorly named getSlotSet method which did the same
thing. Also remove getSlotNode, which is a hold-over from when we were
dealing with AttributeSetNode* instead of AttributeSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301267
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Reid Kleckner [Mon, 24 Apr 2017 22:09:08 +0000 (22:09 +0000)]
[git-llvm] Make `push` work on CRLF files with svn:eol-style=native
Summary:
`git apply` on Windows doesn't work for files that SVN checks out as
CRLF. There is no way to force SVN to check everything out with Unix
line endings on Windows. Files with svn:eol-style=native will always
come out with CRLF, breaking `git apply`, which wants Unix line endings.
My workaround is to list all files with this property set in the change,
and run `dos2unix` on them. SVN doesn't commit a massive line ending
change because the svn:eol-style property indicates that these are text
files.
Tested on r301245.
Reviewers: zturner, jlebar
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32452
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301262
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Sanjay Patel [Mon, 24 Apr 2017 21:52:39 +0000 (21:52 +0000)]
[InstSimplify] use ConstantRange to simplify more and-of-icmps
We can simplify (and (icmp X, C1), (icmp X, C2)) to one of the icmps in many cases.
I had to check some of these with Alive to prove to myself it's right, but everything
seems to check out. Eg, the code in instcombine was completely ignoring predicates with
mismatched signedness.
Handling or-of-icmps would be a follow-up step.
Differential Revision: https://reviews.llvm.org/D32143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301260
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Simon Pilgrim [Mon, 24 Apr 2017 21:43:21 +0000 (21:43 +0000)]
[DAGCombiner] Use APInt::intersects to avoid tmp variable. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301258
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Matt Arsenault [Mon, 24 Apr 2017 21:08:32 +0000 (21:08 +0000)]
AMDGPU: Slightly simplify prolog reserved register handling
Rely on MachineRegisterInfo's knowledge of used physical
registers.
Move flat_scratch initialization earlier, so the uses are visible
when making these decisions.
This will make it easier to add another reserved register
at the end for the stack pointer rather than handling another
special case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301254
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Galina Kistanova [Mon, 24 Apr 2017 21:06:29 +0000 (21:06 +0000)]
Cosmetic change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301253
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Saleem Abdulrasool [Mon, 24 Apr 2017 21:05:05 +0000 (21:05 +0000)]
ProfileData: clean up some stale declarations (NFC)
These were removed in SVN r300381. Remove the declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301252
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Galina Kistanova [Mon, 24 Apr 2017 20:48:40 +0000 (20:48 +0000)]
Small addition on how to add a builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301248
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Artem Tamazov [Mon, 24 Apr 2017 20:42:27 +0000 (20:42 +0000)]
[AMDGPU][mc][tests][NFC] Bulk ISA tests: update for Gfx7/Gfx8, add for Gfx9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301247
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Reid Kleckner [Mon, 24 Apr 2017 20:38:30 +0000 (20:38 +0000)]
[Bitcode] Refactor attribute group writing to avoid getSlotAttributes
Summary:
That API creates a temporary AttributeList to carry an index and a
single AttributeSet. We need to carry the index in addition to the set,
because that is how attribute groups are currently encoded.
NFC
Reviewers: pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301245
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Teresa Johnson [Mon, 24 Apr 2017 20:30:42 +0000 (20:30 +0000)]
Update profile during memory instrinsic optimization
Summary:
Ensure that the new merge BB (which contains the rest of the original BB
after the mem op being optimized) gets a profile frequency, in case
there are additional mem ops later in the BB. Otherwise they get skipped
as the merge BB looks cold.
Reviewers: davidxl, xur
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D32447
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301244
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Matt Arsenault [Mon, 24 Apr 2017 20:25:01 +0000 (20:25 +0000)]
Revert "StructurizeCFG: Directly invert cmp instructions"
This reverts commit r300732. This breaks a few tests.
I think the problem is related to adding more uses of
the condition that don't yet exist at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301242
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Davide Italiano [Mon, 24 Apr 2017 20:17:38 +0000 (20:17 +0000)]
[LoopUnroll] Remove spurious newline.
Eli pointed out in the review, but I didn't squash the two commits
correctly. Pointy-hat to me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301241
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Frederich Munch [Mon, 24 Apr 2017 20:16:01 +0000 (20:16 +0000)]
Revert "Refactor DynamicLibrary so searching for a symbol will have a defined order"
The i686-mingw32-RA-on-linux bot is still having errors.
This reverts commit r301236.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301240
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Davide Italiano [Mon, 24 Apr 2017 20:14:11 +0000 (20:14 +0000)]
[LoopUnroll] Don't try to unroll non canonical loops.
The current Loop Unroll implementation works with loops having a
single latch that contains a conditional branch to a block outside
the loop (the other successor is, by defition of latch, the header).
If this precondition doesn't hold, avoid unrolling the loop as
the code is not ready to handle such circumstances.
Differential Revision: https://reviews.llvm.org/D32261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301239
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Sanjoy Das [Mon, 24 Apr 2017 20:12:10 +0000 (20:12 +0000)]
[LIR] Obey non-integral pointer semantics
Summary: See http://llvm.org/docs/LangRef.html#non-integral-pointer-type
Reviewers: haicheng
Reviewed By: haicheng
Subscribers: mcrosier, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301238
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Saleem Abdulrasool [Mon, 24 Apr 2017 20:01:03 +0000 (20:01 +0000)]
Avoid unnecessary copies in some for loops
Use constant references rather than `const auto` which will cause the
copy constructor. These particular cases cause issues for the swift
compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301237
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Frederich Munch [Mon, 24 Apr 2017 19:55:16 +0000 (19:55 +0000)]
Refactor DynamicLibrary so searching for a symbol will have a defined order and
libraries are properly unloaded when llvm_shutdown is called.
Summary:
This was mostly affecting usage of the JIT, where storing the library handles in
a set made iteration unordered/undefined. This lead to disagreement between the
JIT and native code as to what the address and implementation of particularly on
Windows with stdlib functions:
JIT: putenv_s("TEST", "VALUE") // called msvcrt.dll, putenv_s
JIT: getenv("TEST") -> "VALUE" // called msvcrt.dll, getenv
Native: getenv("TEST") -> NULL // called ucrt.dll, getenv
Also fixed is the issue of DynamicLibrary::getPermanentLibrary(0,0) on Windows
not giving priority to the process' symbols as it did on Unix.
Reviewers: chapuni, v.g.vassilev, lhames
Reviewed By: lhames
Subscribers: danalbert, srhines, mgorny, vsk, llvm-commits
Differential Revision: https://reviews.llvm.org/D30107
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301236
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Krzysztof Parzyszek [Mon, 24 Apr 2017 19:51:12 +0000 (19:51 +0000)]
Move value type list from TargetRegisterClass to TargetRegisterInfo
Differential Revision: https://reviews.llvm.org/D31937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301234
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Krzysztof Parzyszek [Mon, 24 Apr 2017 19:48:51 +0000 (19:48 +0000)]
Revert r301231: Accidentally committed stale files
I forgot to commit local changes before commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301232
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Krzysztof Parzyszek [Mon, 24 Apr 2017 19:43:45 +0000 (19:43 +0000)]
Move value type list from TargetRegisterClass to TargetRegisterInfo
Differential Revision: https://reviews.llvm.org/D31937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301231
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Matt Arsenault [Mon, 24 Apr 2017 19:40:59 +0000 (19:40 +0000)]
AMDGPU: Select scratch mubuf offsets when pointer is a constant
In call sequence setups, there may not be a frame index base
and the pointer is a constant offset from the frame
pointer / scratch wave offset register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301230
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Matt Arsenault [Mon, 24 Apr 2017 19:40:51 +0000 (19:40 +0000)]
AMDGPU: Set StackGrowsUp in MCAsmInfo
Not sure what this does though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301229
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Stanislav Mekhanoshin [Mon, 24 Apr 2017 19:37:54 +0000 (19:37 +0000)]
[AMDGPU] Merge M0 initializations
Merges equivalent initializations of M0 and hoists them into a common
dominator block. Technically the same code can be used with any
register, physical or virtual.
Differential Revision: https://reviews.llvm.org/D32279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301228
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Piotr Padlewski [Mon, 24 Apr 2017 19:37:17 +0000 (19:37 +0000)]
Handle invariant.group.barrier in BasicAA
Summary:
llvm.invariant.group.barrier returns pointer that mustalias
pointer it takes. It can't be marked with `returned` attribute,
because it would be remove easily. The other reason is that
only Alias Analysis can know about this, because if any other
pass would know it, then the result would be replaced with it's
argument, which would be invalid.
We can think about returned pointer as something that mustalias, but
it doesn't have to be bitwise the same as the argument.
Reviewers: dberlin, chandlerc, hfinkel, sanjoy
Subscribers: reames, nlewycky, rsmith, anna, amharc
Differential Revision: https://reviews.llvm.org/D31585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301227
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Evgeniy Stepanov [Mon, 24 Apr 2017 19:34:13 +0000 (19:34 +0000)]
[asan] Let the frontend disable gc-sections optimization for asan globals.
Also extend -asan-globals-live-support flag to all binary formats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301226
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Mandeep Singh Grang [Mon, 24 Apr 2017 19:20:45 +0000 (19:20 +0000)]
[SimplifyCFG] Fix for non-determinism in codegen
Summary: This patch fixes issues in codegen uncovered due to https://reviews.llvm.org/D26718
Reviewers: majnemer, chenli, davide
Reviewed By: davide
Subscribers: davide, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D26726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301222
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Krzysztof Parzyszek [Mon, 24 Apr 2017 18:55:33 +0000 (18:55 +0000)]
Move size and alignment information of regclass to TargetRegisterInfo
1. RegisterClass::getSize() is split into two functions:
- TargetRegisterInfo::getRegSizeInBits(const TargetRegisterClass &RC) const;
- TargetRegisterInfo::getSpillSize(const TargetRegisterClass &RC) const;
2. RegisterClass::getAlignment() is replaced by:
- TargetRegisterInfo::getSpillAlignment(const TargetRegisterClass &RC) const;
This will allow making those values depend on subtarget features in the
future.
Differential Revision: https://reviews.llvm.org/D31783
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301221
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Dimitry Andric [Mon, 24 Apr 2017 18:54:48 +0000 (18:54 +0000)]
Don't test setting sticky bits on files for modern BSDs
Summary: In rL297945, jhenderson added methods for setting permissions
to sys::fs, but some of the unittests that attempt to set sticky bits
(01000) on files fail on modern BSDs, such as FreeBSD, NetBSD and
OpenBSD. This is because those systems do not allow regular users to
set sticky bits on files, only on directories. Fix it by disabling
these particular tests on modern BSDs.
Reviewers: emaste, brad, jhenderson
Reviewed By: jhenderson
Subscribers: joerg, krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D32120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301220
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Adrian Prantl [Mon, 24 Apr 2017 18:45:59 +0000 (18:45 +0000)]
Don't emit CFI instructions at the end of a function
When functions are terminated by unreachable instructions, the last
instruction might trigger a CFI instruction to be generated. However,
emitting it would be be illegal since the function (and thus the FDE
the CFI is in) has already ended with the previous instruction.
Darwin's dwarfdump --verify --eh-frame complains about this and the
specification supports this.
Relevant bits from the DWARF 5 standard (6.4 Call Frame Information):
"[The] address_range [field in an FDE]: The number of bytes of
program instructions described by this entry."
"Row creation instructions: [...]
The new location value is always greater than the current one."
The first quotation implies that a CFI cannot describe a target
address outside of the enclosing FDE's range.
rdar://problem/
26244988
Differential Revision: https://reviews.llvm.org/D32246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301219
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George Karpenkov [Mon, 24 Apr 2017 18:39:52 +0000 (18:39 +0000)]
Updates documentation for a syntax sugar libfuzzer flag,
as implemented in https://reviews.llvm.org/D32193
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301217
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Yaxun Liu [Mon, 24 Apr 2017 18:26:27 +0000 (18:26 +0000)]
CodeGen: Add a hook for getFenceOperandTy
Currently the operand type for ATOMIC_FENCE assumes value type of a pointer in address space 0.
This is fine for most targets. However for amdgcn target, the size of pointer in address space 0
depends on triple environment. For amdgiz environment, it is 64 bit but for other environment it is
32 bit. On the other hand, amdgcn target expects 32 bit fence operands independent of the target
triple environment. Therefore a hook is need in target lowering for getting the fence operand type.
This patch has no effect on targets other than amdgcn.
Differential Revision: https://reviews.llvm.org/D32186
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301215
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Evgeniy Stepanov [Mon, 24 Apr 2017 18:25:07 +0000 (18:25 +0000)]
Revert "Compute safety information in a much finer granularity."
Use-after-free in llvm::isGuaranteedToExecute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301214
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Sanjay Patel [Mon, 24 Apr 2017 18:24:36 +0000 (18:24 +0000)]
[InstSimplify] move (A & ~B) | (A ^ B) -> (A ^ B) from InstCombine
This is a straight cut and paste, but there's a bigger problem: if this
fold exists for simplifyOr, there should be a DeMorganized version for
simplifyAnd. But more than that, we have a patchwork of ad hoc logic
optimizations in InstCombine. There should be some structure to ensure
that we're not missing sibling folds across and/or/xor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301213
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Matthias Braun [Mon, 24 Apr 2017 18:15:00 +0000 (18:15 +0000)]
X86RegisterInfo: eliminateFrameIndex: Avoid code duplication; NFC
Re-Commit of r300922 and r300923 with less aggressive assert (see
discussion at the end of https://reviews.llvm.org/D32205)
X86RegisterInfo::eliminateFrameIndex() and
X86FrameLowering::getFrameIndexReference() both had logic to compute the
base register. This consolidates the code.
Also use MachineInstr::isReturn instead of manually enumerating tail
call instructions (return instructions were not included in the previous
list because they never reference frame indexes).
Differential Revision: https://reviews.llvm.org/D32206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301211
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Adrian Prantl [Mon, 24 Apr 2017 18:11:42 +0000 (18:11 +0000)]
Use DW_OP_stack_value when reconstructing variable values with arithmetic.
When the location description of a source variable involves arithmetic
on the value itself, it needs to be marked with DW_OP_stack_value since it
is not describing the variable's location, but rather its value.
This is a follow-up to r297971 and fixes the source testcase quoted in
the comment in debuginfo-dce.ll.
rdar://problem/
30725338
This reapplies r301093 without modifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301210
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Adrian Prantl [Mon, 24 Apr 2017 18:11:38 +0000 (18:11 +0000)]
Add a testcase for DIExpression(DW_OP_stack_value)
and relax the assertion that prohibited its emission.
This fixes the assertion failure uncovered by r301093.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301209
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Matt Arsenault [Mon, 24 Apr 2017 18:05:16 +0000 (18:05 +0000)]
AMDGPU: Add StackPtr and FramePtr registers to MFI
These will be necessary for setting up call sequences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301208
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Matt Arsenault [Mon, 24 Apr 2017 17:49:13 +0000 (17:49 +0000)]
AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.
Also happens to stop emitting a nop in the case
debug trap is not supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301206
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Davide Italiano [Mon, 24 Apr 2017 17:48:44 +0000 (17:48 +0000)]
[DomPrinter] Add a way to programmatically dump a dot representation.
Differential Revision: https://reviews.llvm.org/D32145
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301205
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Zachary Turner [Mon, 24 Apr 2017 17:47:52 +0000 (17:47 +0000)]
[llvm-pdbdump] Merge functionality of graphical and text dumpers.
The *real* difference between these two was that
a) The "graphical" dumper could recurse, while the text one could
not.
b) The "text" dumper could display nested types and functions,
while the graphical one could not.
Merge these two so that there is only one dumper that can recurse
arbitrarily deep and optionally display nested types or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301204
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Zachary Turner [Mon, 24 Apr 2017 17:47:24 +0000 (17:47 +0000)]
[llvm-pdbdump] Re-write the record layout code to be more resilient.
This reworks the way virtual bases are handled, and also the way
padding is detected across multiple levels of aggregates, producing
a much more accurate result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301203
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Craig Topper [Mon, 24 Apr 2017 17:37:10 +0000 (17:37 +0000)]
[APInt] Simplify the zext and sext methods
This replaces a hand written copy loop with a call to memcpy for both zext and sext.
For sext, it replaces multiple if/else blocks propagating sign information forward. Now we just do a copy, a sign extension on the last copied word, a memset, and clearUnusedBits.
Differential Revision: https://reviews.llvm.org/D32417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301201
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George Karpenkov [Mon, 24 Apr 2017 17:28:32 +0000 (17:28 +0000)]
Testing commit credentials
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301200
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Matt Arsenault [Mon, 24 Apr 2017 17:24:37 +0000 (17:24 +0000)]
InstCombine: Fix assert when reassociating fsub with undef
There is logic to track the expected number of instructions
produced. It thought in this case an instruction would
be necessary to negate the result, but here it folded
into a ConstantExpr fneg when the non-undef value operand
was cancelled out by the second fsub.
I'm not sure why we don't fold constant FP ops with undef currently,
but I think that would also avoid this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301199
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Craig Topper [Mon, 24 Apr 2017 17:18:47 +0000 (17:18 +0000)]
[APInt] Add ashrInPlace method and rewrite ashr to make a copy and then call ashrInPlace.
This patch adds an in place version of ashr to match lshr and shl which were recently added.
I've tried to make this similar to the lshr code with additions to handle the sign extension. I've also tried to do this with less if checks than the current ashr code by sign extending the original result to a word boundary before doing any of the shifting. This removes a lot of the complexity of determining where to fill in sign bits after the shifting.
Differential Revision: https://reviews.llvm.org/D32415
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301198
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Nicolai Haehnle [Mon, 24 Apr 2017 17:17:36 +0000 (17:17 +0000)]
AMDGPU: Move v_readlane lane select from VGPR to SGPR
Summary:
Fix a compiler bug when the lane select happens to end up in a VGPR.
Clarify the semantic of the corresponding intrinsic to be that of
the corresponding GLSL: the lane select must be uniform across a
wave front, otherwise results are undefined.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D32343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301197
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Xin Tong [Mon, 24 Apr 2017 17:12:22 +0000 (17:12 +0000)]
Compute safety information in a much finer granularity.
Summary:
Instead of keeping a variable indicating whether there are early exits
in the loop. We keep all the early exits. This improves LICM's ability to
move instructions out of the loop based on is-guaranteed-to-execute.
I am going to update compilation time as well soon.
Reviewers: hfinkel, sanjoy, efriedma, mkuper
Reviewed By: hfinkel
Subscribers: llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D32433
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301196
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Nicolai Haehnle [Mon, 24 Apr 2017 17:08:43 +0000 (17:08 +0000)]
InstCombine/AMDGPU: Fix constant folding of llvm.amdgcn.{icmp,fcmp}
Summary:
The return value of these intrinsics should always have 0 bits for
inactive threads. This means that when all arguments are constant
and the comparison evaluates to true, the intrinsic should return
the current exec mask.
Fixes some GL_ARB_shader_ballot tests.
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D32344
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301195
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Igor Breger [Mon, 24 Apr 2017 17:05:52 +0000 (17:05 +0000)]
[GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Summary: [GlobalISel][X86] Lower FormalArgument/Ret using G_MERGE_VALUES/G_UNMERGE_VALUES.
Reviewers: zvi, t.p.northover, guyblank
Reviewed By: t.p.northover
Subscribers: dberris, rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D32288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301194
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Simon Pilgrim [Mon, 24 Apr 2017 17:05:14 +0000 (17:05 +0000)]
[DAGCombiner] Updated bswap byte offset variable names to be more descriptive. NFC
As discussed on D32039, use MaskByteOffset to describe the variable and also pull out repeated getOpcode() calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301193
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Craig Topper [Mon, 24 Apr 2017 17:00:22 +0000 (17:00 +0000)]
[APInt] Fix repeated word in comments. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301192
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Nicolai Haehnle [Mon, 24 Apr 2017 16:53:52 +0000 (16:53 +0000)]
AMDGPU: Fix crash when scheduling non-memory SMRD instructions
Summary: Fixes piglit spec/arb_shader_clock/execution/*
Reviewers: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D32345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301191
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Nirav Dave [Mon, 24 Apr 2017 15:37:20 +0000 (15:37 +0000)]
[SDAG] Teach Chain Analysis about BaseIndexOffset addressing.
While we use BaseIndexOffset in FindBetterNeighborChains to
appropriately realize they're almost the same address and should be
improved concurrently we do not use it in isAlias using the non-index
understanding FindBaseOffset instead. Adding a BaseIndexOffset check
in isAlias like should allow indexed stores to be merged.
FindBaseOffset to be excised in subsequent patch.
Reviewers: jyknight, aditya_nandakumar, bogner
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31987
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301187
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Simon Pilgrim [Mon, 24 Apr 2017 14:26:30 +0000 (14:26 +0000)]
[X86][AVX] Add scheduling latency/throughput tests for missing AVX1 instructions
Had to split btver2/znver1 checks as only btver2 suppresses zeroupper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301181
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Jonas Paulsson [Mon, 24 Apr 2017 12:40:28 +0000 (12:40 +0000)]
[SystemZ] Update kill-flag in splitMove().
EarlierMI needs to clear the kill flag on the first operand in case of a store.
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301177
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Renato Golin [Mon, 24 Apr 2017 12:37:11 +0000 (12:37 +0000)]
[DWARF] Move test to x86 directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301176
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Philip Pfaffe [Mon, 24 Apr 2017 11:54:37 +0000 (11:54 +0000)]
[RegionInfo] Fix dangling references created by moving RegionInfo objects
Summary: Region objects capture the address of the creating RegionInfo instance. Because the RegionInfo class is movable, moving a RegionInfo object creates dangling references. This patch fixes these references by walking the Regions post-move, and updating references to the new parent.
Reviewers: Meinersbur, grosser
Reviewed By: Meinersbur, grosser
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31719
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301175
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Ismail Donmez [Mon, 24 Apr 2017 11:18:29 +0000 (11:18 +0000)]
Add SUSE vendor
Summary: SUSE's ARM triples end with -gnueabi even though they are hard-float. This requires special handling of SUSE ARM triples. Hence we need a way to differentiate the SUSE as vendor. This CL adds that.
Reviewers: chandlerc, compnerd, echristo, rengolin
Reviewed By: rengolin
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: https://reviews.llvm.org/D32426
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301174
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Nitesh Jain [Mon, 24 Apr 2017 10:36:46 +0000 (10:36 +0000)]
[LLVM][MIPS] Fix different definition of off_t in LLDB and LLVM.
Reviewers: beanz
Subscribers: jaydeep, bhushan, lldb-commits, slthakur, llvm-commits, krytarowski, emaste
Differential Revision: https://reviews.llvm.org/D32125
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301171
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George Rimar [Mon, 24 Apr 2017 10:19:45 +0000 (10:19 +0000)]
[DWARF] - Take relocations in account when extracting ranges from .debug_ranges
I found this when investigated "Bug 32319 - .gdb_index is broken/incomplete" for LLD.
When we have object file with .debug_ranges section it may be filled with zeroes.
Relocations are exist in file to relocate this zeroes into real values later, but until that
a pair of zeroes is treated as terminator. And DWARF parser thinks there is no ranges at all
when I am trying to collect address ranges for building .gdb_index.
Solution implemented in this patch is to take relocations in account when parsing ranges.
Differential revision: https://reviews.llvm.org/D32228
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301170
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Diana Picus [Mon, 24 Apr 2017 09:12:19 +0000 (09:12 +0000)]
[ARM] GlobalISel: Legalize s8 and s16 G_(S|U)DIV
We have to widen the operands to 32 bits and then we can either use
hardware division if it is available or lower to a libcall otherwise.
At the moment it is not enough to set the Legalizer action to
WidenScalar, since for libcalls it won't know what to do (it won't be
able to find what size to widen to, because it will find Libcall and not
Legal for 32 bits). To hack around this limitation, we request Custom
lowering, and as part of that we widen first and then we run another
legalizeInstrStep on the widened DIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301166
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Sjoerd Meijer [Mon, 24 Apr 2017 08:22:20 +0000 (08:22 +0000)]
[Arch64AsmParser] better diagnostic for isb
Instruction isb takes as an operand either 'sy' or an immediate value. This
improves the diagnostic when the string is not 'sy' and adds a test case for
this which was missing. This also adds tests to check invalid inputs for dsb
and dmb.
Differential Revision: https://reviews.llvm.org/D32227
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301165
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Diana Picus [Mon, 24 Apr 2017 08:20:05 +0000 (08:20 +0000)]
[ARM] GlobalISel: Support G_(S|U)DIV for s32
Add support for both targets with hardware division and without. For
hardware division we have to add support throughout the pipeline
(legalizer, reg bank select, instruction select). For targets without
hardware division, we only need to mark it as a libcall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301164
91177308-0d34-0410-b5e6-
96231b3b80d8