OSDN Git Service
Vadim Girlin [Sun, 25 Aug 2013 14:52:17 +0000 (18:52 +0400)]
r600g: fix color exports when we have no CBs
We need to export at least one color if the shader writes it,
even when nr_cbufs==0.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vinson Lee [Sat, 13 Jul 2013 06:56:06 +0000 (23:56 -0700)]
nvc0/ir: Initialize NVC0LegalizePostRA member variables.
Fixes "Uninitialized pointer field" defects reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Roland Scheidegger [Thu, 29 Aug 2013 23:30:29 +0000 (01:30 +0200)]
gallivm: support per-pixel min/mag filter in SoA path
Since we can have per-pixel lod we should also honor the filter per-pixel
(in fact we didn't honor it per quad neither in the multiple quad case).
Do this by running the linear path and simply beating the weights into shape
(the sample with the higher weight is the one which should have been chosen
with nearest filtering hence adjust filter weight to 1.0/0.0 based on that).
If all pixels use nearest filter (either min and mag) then still run just a
nearest filter as this is way cheaper (probably around 4 times faster for 2d,
more for 3d case) and it should be relatively rare that pixels really need
different filtering. OTOH if all pixels would require linear don't do anything
special since the linear path with filter adjustments shouldn't really be all
that much more expensive than ordinary linear, and we think it's rare that
min/mag filters are configured differently so there doesn't seem much value
in trying to optimize this further.
This does not yet fix the AoS path (though currently AoS is only used for
single quads hence it could be considered less broken, just never honoring
per-pixel filter decision but doing it per quad).
v2: simplify code a bit (unify min linear and min nearest cases)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Thu, 29 Aug 2013 01:58:18 +0000 (03:58 +0200)]
gallivm: don't calculate square root of rho if we use accurate rho method
While a sqrt here and there shouldn't hurt much (depending on the cpu) it is
possible to completely omit it since rho is only used for calculating lod and
there log2(x) == 0.5*log2(x^2). Depending on the exact path taken for
calculating lod this means we get a simple mul instead of sqrt (in case of
nearest mip filter in fact we don't need to replace the sqrt with something
else at all), only in some not very useful path this doesn't work (combined
brilinear calculation of int level and fractional lod, accurate rho calc but
brilinear filtering seems odd).
Apart from being faster as an added bonus this should increase our crappy
fractional accuracy of lod, since fast_log2 is only good for ~3bits and this
should increase accuracy by one bit (though not used if dimension is just one
as we'd need an extra mul there as we never had the squared rho in the first
place).
v2: use separate ilog2_sqrt function if we have squared rho.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Wed, 28 Aug 2013 14:26:43 +0000 (16:26 +0200)]
gallivm: refactor num_lods handling
This is just preparation for per-pixel (or per-quad in case of multiple quads)
min/mag filter since some assumptions about number of miplevels being equal
to number of lods no longer holds true.
This change does not change behavior yet (though theoretically when forcing
per-element path it might be slower with different min/mag filter since the
code will respect this setting even when there's no mip maps now in this case,
so some lod calcs will be done per-element just ultimately still the same
filter used for all pixels).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Vinson Lee [Thu, 29 Aug 2013 20:13:02 +0000 (13:13 -0700)]
radeonsi: Early return if no depth or stencil on release builds.
Fixes "Missing break in switch" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Thu, 29 Aug 2013 21:26:16 +0000 (17:26 -0400)]
freedreno: pipe loader for either kgsl or msm
The downstream android kernel driver is "kgsl", the upstream drm/kms
driver is called "msm". Since libdrm_freedreno handles the differences
between the two, we need to load the same thing for either device.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 29 Aug 2013 21:24:33 +0000 (17:24 -0400)]
freedreno: updates for msm drm/kms driver
There where some small API tweaks in libdrm_freedreno to enable support
for msm drm/kms driver.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 27 Aug 2013 23:24:53 +0000 (19:24 -0400)]
freedreno/a3xx/compiler: handle sync flags better
We need to set the flag on all the .xyzw components that are written by
the instruction, not just on .x. Otherwise a later use of rN.y (for
example) will not trigger the appropriate sync bit to be set.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 24 Aug 2013 21:30:50 +0000 (17:30 -0400)]
freedreno/a3xx/compiler: better const handling
Seems like most/all instructions have some restrictions about const src
registers. In seems like the 2 src (cat2) instructions can take at most
one const, and the 3 src (cat3) instructions can take at most one const
in the first 2 arguments. And so on. Handle this properly now.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Anuj Phogat [Tue, 27 Aug 2013 01:21:03 +0000 (18:21 -0700)]
glsl: Allow precision qualifiers for sampler types
GLSL 1.30 doesn't allow precision qualifiers on sampler types,
but in GLSL ES, sampler types are also allowed. This seems like
an oversight (since the intention of including these in GLSL 1.30
is to allow compatibility with ES shaders).
Currently, Mesa allows "default" precision qualifiers to be set for
sampler types in GLSL (commit
d5948f2). This patch makes it follow
GLSL ES rules and also allow declaring sampler variables with a
precision qualifier in GLSL 1.30 (and later). e.g.
uniform lowp sampler2D sampler;
This fixes a shader compilation error in Khronos OpenGL conformance
test "depth_texture_mipmap".
V2: Update comments.
Signed-off-by: Ian Romanick <idr@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <idr@lists.freedesktop.org>
Cc: <mesa-stable@lists.freedesktop.org>
Matt Turner [Sun, 4 Aug 2013 21:01:30 +0000 (14:01 -0700)]
glsl: Add heuristics to print floating-point numbers better.
v2: Fix *.expected files to match.
Reviewed-by: Paul Berry <strereotype441@gmail.com>
Jonathan Gray [Thu, 18 Jul 2013 13:05:13 +0000 (23:05 +1000)]
radeonsi: Make sure libdrm_radeon headers are picked up from the right place
And remove libdrm/ from a winsys include statement.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Brian Paul [Wed, 28 Aug 2013 23:13:11 +0000 (17:13 -0600)]
draw: fix point/line/triangle determination in draw_need_pipeline()
The previous point/line/triangle() functions didn't handle GS primitives.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Christian König [Wed, 28 Aug 2013 16:55:56 +0000 (18:55 +0200)]
radeon/uvd: fix MPEG2/4 ref frame index limit
Otherwise the first few frames have an incorrect reference index.
Signed-off-by: Christian König <christian.koenig@amd.com>
Vinson Lee [Sat, 17 Aug 2013 22:23:15 +0000 (15:23 -0700)]
nouveau: Copy m4x4 and m8x8 separately.
Silences Coverity "Out-of-bounds access" defect.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Kenneth Graunke [Mon, 26 Aug 2013 04:38:29 +0000 (21:38 -0700)]
i965: Allocate just enough space for user clip planes in uniform arrays.
Previously, we allocated space in brw_vs_prog_data's params and
pull_params arrays for MAX_CLIP_PLANES vec4s---even when it wasn't
necessary.
On a 64-bit architecture, this used 0.5 kB of space (8 clip planes *
4 floats per plane * 8 bytes per float pointer * 2 arrays of pointers =
512 bytes). Since this cost was per-vertex shader, it added up.
Conveniently, we already store the number of clip plane constants in the
program key. By using that, we can allocate the exact amount of space
needed. For the common case where user clipping is disabled, this means
0 bytes.
While we're here, mention exactly what code requires this extra space,
since it wasn't obvious.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Chad Versace [Tue, 27 Aug 2013 22:08:00 +0000 (15:08 -0700)]
i965: Silence unused variable warning in release build
Use `(void) success;` to silence this warning:
i965/brw_vs.c:481:12:
warning: unused variable 'success' [-Wunused-variable]
bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Brian Paul [Wed, 28 Aug 2013 00:57:35 +0000 (18:57 -0600)]
docs: minor fixes for 9.2 release notes
Fix incorrect </li> tag, fix language.
(cherry picked from commit
2377205bcb3bb0b5db48772224f5f80f2cf9abf7)
Ian Romanick [Tue, 27 Aug 2013 23:38:09 +0000 (16:38 -0700)]
docs: Add news item for 9.2 release
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Ian Romanick [Tue, 27 Aug 2013 23:37:13 +0000 (16:37 -0700)]
docs: Import 9.2 release notes
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Fabian Bieler [Sat, 25 May 2013 11:33:42 +0000 (13:33 +0200)]
mesa/main: Check for 0 size draws after validation.
When validating draw parameters move check for 0 draw count last
(drawing with count 0 is not an error), so that other parameters (e.g.: the
primitive type) are validated and the correct errors (if applicable) are
generated.
>From the OpenGL 3.3 spec page 33 (page 48 of the PDF):
"[Regarding DrawArraysOneInstance, in terms of which other draw operations
are defined:]
If count is negative, an INVALID_VALUE error is generated."
This patch also changes the bahavior of MultiDrawElements to perform the draw
operation if some primitive's index counts are zero.
Signed-off-by: Fabian Bieler <fabianbieler@fastmail.fm>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Matt Turner [Wed, 7 Aug 2013 04:45:30 +0000 (21:45 -0700)]
glsl: Add built-ins from ARB_shader_bit_encoding to ARB_gpu_shader5.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Matt Turner [Fri, 2 Aug 2013 17:28:16 +0000 (10:28 -0700)]
i965/vs: Add support for translating ir_triop_fma into MAD.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Wed, 24 Apr 2013 00:32:26 +0000 (17:32 -0700)]
i965/fs: Add support for translating ir_triop_fma into MAD.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Tue, 27 Aug 2013 05:01:17 +0000 (22:01 -0700)]
i965/fs: Assert that ir_expressions are usable by 3-src instructions.
MAD will be generated directly from ir_triop_fma, so this assertion
checks that all ir_expressions are usable.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Matt Turner [Wed, 24 Apr 2013 00:19:06 +0000 (17:19 -0700)]
glsl: Add support for new fma built-in in ARB_gpu_shader5.
v2: Add constant folding support.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Wed, 24 Apr 2013 00:10:20 +0000 (17:10 -0700)]
glsl: Add new fma built-in IR and prototype from ARB_gpu_shader5.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Marek Olšák [Sun, 11 Aug 2013 00:15:12 +0000 (02:15 +0200)]
r300g: enable MSAA on r300-r400, be careful about using color compression
MSAA was tested by one user on RS690 and it works for him with color
compression (CMASK) disabled. Our theory is that his chipset lacks CMASK RAM.
Since we don't have hardware documentation about which chipsets actually have
CMASK RAM, I had to take a guess based on the presence of HiZ.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Fabio Pedretti [Mon, 12 Aug 2013 11:48:04 +0000 (13:48 +0200)]
configure.ac: Bump Wayland requirement to 1.2.0
Since
8d29b52 wayland 1.2.0 is required.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Roland Scheidegger [Fri, 23 Aug 2013 21:08:43 +0000 (23:08 +0200)]
draw: clean up setting stream out information a bit
In particular noone is interested in the vertex count, so drop that,
and also drop the duplicated num_primitives_generated /
so.primitives_storage_needed variables in drivers. I am unable for now to figure
out if primitives_storage_needed in SO stats (used for d3d10) should
increase if SO is disabled, though the equivalent num_primitives_generated
used for OpenGL definitely should increase. In any case we were only counting
when SO is active both in softpipe and llvmpipe anyway so don't pretend there's
an independent num_primitives_generated counter which would count always.
(This means the PIPE_QUERY_PRIMITIVES_GENERATED count will still be wrong just
as before, should eventually fix this by doing either separate counting for this
query or adjust the code so it always counts this even if SO is inactive depending
on what's correct for d3d10.)
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Fri, 23 Aug 2013 19:25:01 +0000 (21:25 +0200)]
llvmpipe: support nested/overlapping queries for all query types
There's just no way resetting the counters is working with nested/overlapping
queries.
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Fri, 23 Aug 2013 19:23:07 +0000 (21:23 +0200)]
softpipe: support nested/overlapping queries for all query types
There's just no way resetting the counters is working with nested/overlapping
queries.
Reviewed-by: Brian Paul <brianp@vmware.com>
Matt Turner [Mon, 26 Aug 2013 21:14:03 +0000 (14:14 -0700)]
glsl: Disallow uniform block layout qualifiers on non-uniform block vars.
Cc: 9.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68460
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kristian Lehmann [Mon, 26 Aug 2013 19:19:50 +0000 (21:19 +0200)]
Fixed and/or order mistake, resulting in compiling llvmpipe without llvm installed
Cc: 9.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68544
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Thu, 22 Aug 2013 02:37:30 +0000 (19:37 -0700)]
i915: Optimize SEQ and SNE when two operands are uniforms
SEQ and SNE are not native i915 instructions, so they each generate at
least 3 instructions. If both operands are uniforms or constants, we
get 5 instructions like:
U[1] = MOV CONST[1]
U[0].xyz = SGE CONST[0].xxxx, U[1]
U[1] = MOV CONST[1].-x-y-z-w
R[0].xyz = SGE CONST[0].-x-x-x-x, U[1]
R[0].xyz = MUL R[0], U[0]
This code is stupid. Instead of having the individual calls to
i915_emit_arith generate the moves to utemps, do it in the caller. This
results in code like:
U[1] = MOV CONST[1]
U[0].xyz = SGE CONST[0].xxxx, U[1]
R[0].xyz = SGE CONST[0].-x-x-x-x, U[1].-x-y-z-w
R[0].xyz = MUL R[0], U[0]
This allows fs-temp-array-mat2-index-col-wr and
fs-temp-array-mat2-index-row-wr to fit in hardware limits (instead of
falling back to software rasterization).
NOTE: Without pending patches to the piglit tests, these tests will now
fail. This is an unrelated, pre-existing issue.
v2: Copy most of the body of the commit message into comments in the
code. Suggested by Eric.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tom Stellard [Tue, 27 Aug 2013 00:52:47 +0000 (17:52 -0700)]
clover: Don't use PIPE_TRANSFER_UNSYNCHRONIZED for blocking copies
CC: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Niels Ole Salscheider [Fri, 9 Aug 2013 09:59:26 +0000 (11:59 +0200)]
st/clover: Add event to deps even if it has been triggered
The command is submitted once the event has been triggered, but it might not
have completed yet. Therefore, we have to add it to deps in order to wait on it.
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Niels Ole Salscheider [Fri, 9 Aug 2013 09:59:25 +0000 (11:59 +0200)]
st/clover: Profiling support
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Acked-by: Francisco Jerez <currojerez@riseup.net>
Dave Airlie [Tue, 13 Aug 2013 00:13:12 +0000 (10:13 +1000)]
tgsi_build: fix order of arguments for ind register build
This was broken when arrayid was added.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 12 Aug 2013 07:34:27 +0000 (17:34 +1000)]
tgsi: finish declaration parsing for arrays.
I previously fixed this partly in
9e8400f4c95bde1f955c7977066583b507159a10,
however I didn't go far enough in testing it, now when I parse a TGSI shader
with arrays in it my iterator can see the ArrayID set to the proper value.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Brian Paul [Mon, 26 Aug 2013 21:49:16 +0000 (15:49 -0600)]
svga: replace 0 with PIPE_OK in a few places
Brian Paul [Fri, 23 Aug 2013 21:33:14 +0000 (15:33 -0600)]
swrast: init i0, i1 values to silence warnings
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Brian Paul [Fri, 23 Aug 2013 21:32:28 +0000 (15:32 -0600)]
mesa: init dst values in COPY_CLEAN_4V_TYPE_AS_FLOAT()
to silence gcc 4.8.1 warnings. And improve the ASSERT(0) call.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Brian Paul [Fri, 23 Aug 2013 21:12:07 +0000 (15:12 -0600)]
glsl: init limit=0 to silence uninitialized var warning
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Wed, 21 Aug 2013 23:27:11 +0000 (16:27 -0700)]
i965/vs: Allocate register set once at context creation.
Now that we use a fixed set of register classes, we can set up the
register set and conflict graphs once, at context creation, rather than
on every VS compile. This is obviously less expensive, and also what
we already do in the FS backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 22 Aug 2013 05:06:15 +0000 (22:06 -0700)]
i965/vs: Move base_reg_count computation to brw_alloc_reg_set().
We're soon going to be calling brw_alloc_reg_set() from outside of the
visitor, where we don't have the precomputed "max_grf" variable handy.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Thu, 22 Aug 2013 04:55:40 +0000 (21:55 -0700)]
i965/vs: Expose the payload registers to the register allocator.
For now, nothing else can get allocated over them. That may change at
some point in the future.
This also means that base_reg_count can be computed without knowing the
number of registers used for the payload, which is required if we want
to allocate the register set once at context creation time.
See commit
551e1cd44f6857f7e29ea4c8f892da5a97844377, which implemented
virtually identical code in the FS backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Kenneth Graunke [Wed, 21 Aug 2013 23:01:45 +0000 (16:01 -0700)]
i965/vs: Use a fixed set of register classes.
Arrays, structures, and matrices use large VGRFs of arbitrary sizes.
However, split_virtual_grfs() breaks those down into VGRFs of size 1.
For reference, commit
5d90b988791e51cfb6413109271ad102fd7a304c is the
analogous change to the FS backend.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Paul Berry [Fri, 23 Aug 2013 20:19:19 +0000 (13:19 -0700)]
i965: Allow C++ type safety in the use of enum brw_urb_write_flags.
(From a suggestion by Francisco Jerez)
If an enum represents a bitfield of flags, e.g.:
enum E {
A = 1,
B = 2,
C = 4,
D = 8,
};
then C++ normally prohibits statements like this:
enum E x = A | B;
because A and B are implicitly converted to ints before OR-ing them,
and an int can't be stored in an enum without a type cast. C, on the
other hand, allows an int to be implicitly converted to an enum
without casting.
In the past we've dealt with this situation by storing flag bitfields
as ints. This avoids ugly casting at the expense of some type safety
that C++ would normally have offered (e.g. we get no warning if we
accidentally use the wrong enum type).
However, we can get the best of both worlds if we override the |
operator. The ugly casting is confined to the operator overload, and
we still get the benefit of C++ making sure we don't use the wrong
enum type.
v2: Remove unnecessary comment and unnecessary use of "enum" keyword.
Use static_cast.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Paul Berry [Fri, 23 Aug 2013 00:15:04 +0000 (17:15 -0700)]
i965: Remove redundant (and uninitialized) field vec4_generator::ctx.
We never noticed that this field was uninitialized because it is only
used in an error path that reports internal Mesa errors.
But it's silly to have it around anyway because &brw->ctx is
equivalent.
Should fix Coverity defect CID
1063351: Uninitialized pointer field
(UNINIT_CTOR) /src/mesa/drivers/dri/i965/brw_vec4_emit.cpp: 148
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Paul Berry [Fri, 23 Aug 2013 18:43:26 +0000 (11:43 -0700)]
i965: Don't try to fall back when creating unrecognized program targets.
If brwNewProgram is asked to create a program for an unrecognized
target, don't bother falling back on _mesa_new_program(). That just
hides bugs.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
v2: Use assert() rather than _mesa_problem().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Michel Dänzer [Fri, 23 Aug 2013 12:55:45 +0000 (14:55 +0200)]
radeonsi: Also set the depth component mask bit for stencil-only exports
The stencil values come out wrong without this for some reason.
50 more little piglits.
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Fri, 23 Aug 2013 23:03:03 +0000 (16:03 -0700)]
glsl: Add built-in function prototypes for GLSL 3.30
330.frag is a direct copy of 150.frag.
330.glsl is 150.glsl combined with ARB_shader_bit_encoding.glsl.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Fri, 23 Aug 2013 23:52:07 +0000 (16:52 -0700)]
glsl: Bump standalone compiler versions to 3.30.
These are necessary in order to compile the built-in functions.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Fri, 23 Aug 2013 17:35:34 +0000 (10:35 -0700)]
mesa: Set query->EverBound in glQueryCounter().
glIsQuery is supposed to return false for names returned by glGenQueries
until their first use. BeginQuery is a use, but QueryCounter is also a
use.
From the ARB_timer_query spec:
"A timer query object is created with the command
void QueryCounter(uint id, enum target);
[...] If <id> is an unused query object name, the
name is marked as used [...]"
Fixes Piglit's spec/ARB_timer_query/query-lifetime.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Cc: mesa-stable@lists.freedesktop.org
Henri Verbeet [Sat, 24 Aug 2013 19:45:44 +0000 (21:45 +0200)]
r600g: Implement the new float comparison instructions for Cayman as well.
I assume this should have been part of commit
7727fbb7c5d64348994bce6682e681d6181a91e9. This (obviously) fixes a lot tests.
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Ilia Mirkin [Mon, 19 Aug 2013 10:49:45 +0000 (06:49 -0400)]
nv30: add forgotten PIPE_CAP_CUBE_MAP_ARRAY cap to list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Sat, 24 Aug 2013 04:50:52 +0000 (00:50 -0400)]
nouveau/video: avoid overwriting base codec init with template
Commit
53e20b8b introduced the use of a template to initialize some
common fields. Move this copying of fields to before the common vp3
fields are initialized.
Reported-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christian König <christian.koenig@amd.com>
Rob Clark [Tue, 18 Jun 2013 00:11:54 +0000 (20:11 -0400)]
freedreno/a3xx: don't leak so much
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 24 Aug 2013 17:02:53 +0000 (13:02 -0400)]
freedreno/a3xx/compiler: fix SGT/SLT/etc
The cmps.f.* instruction doesn't actually seem to give a float 1.0 or
0.0 output. It either needs a cov.u16f16 or add.s + sel.f16. This
makes SGT/SLT/etc more similar to CMP, so handle them in trans_cmp().
This fixes a bunch of piglit tests.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 24 Aug 2013 17:00:07 +0000 (13:00 -0400)]
freedreno/a3xx/compiler: bit of re-arrange/cleanup
It seems there are a number of cases where instructions have limitations
about taking reading src's from const register file, so make
get_unconst() a bit easier to use.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 24 Aug 2013 16:56:22 +0000 (12:56 -0400)]
freedreno/a3xx/compiler: make compiler errors more useful
We probably should get rid of assert() entirely, but at this stage it is
more useful for things to crash where we can catch it in a debugger.
With compile_error() we have a single place to set an error flag (to
bail out and return an error on the next instruction) so that will be a
small change later when enough of the compiler bugs are sorted.
But re-arrange/cleanup the error/assert stuff so we at least get a dump
of the TGSI that triggered it. So we see some useful output in piglit
logs.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 21 Aug 2013 17:20:05 +0000 (13:20 -0400)]
freedreno: fix segfault when no color buffer bound
Don't crash when no color buffer bound. Something caught when starting
to run piglit, fixes a hanful of piglit tests.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 20 Aug 2013 17:57:22 +0000 (13:57 -0400)]
freedreno/a3xx/compiler: cat4 cannot use const reg as src
Category 4 instructions (rsq, rcp, sqrt, etc) seem to be unable to take
a const register as src. In these cases we need to move the src to a
temporary gpr first.
This is the second case of such a restriction, where the instruction
encoding appears to support a const src, but in fact the hw appears to
ignore that bit. So split things out into a helper that can be re-used
for any instructions which have this limitation.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 20 Aug 2013 17:54:01 +0000 (13:54 -0400)]
freedreno/a3xx/compiler: use max_reg rather than file_count
Our current (rather naive) register assignment is based on mapping
different register files (INPUT, OUTPUT, TEMP, CONST, etc) based on the
max register index of the preceding file. But in some cases, the lowest
used register in a file might not be zero. In which case
file_count[file] != file_max[file] + 1.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 20 Aug 2013 17:51:35 +0000 (13:51 -0400)]
freedreno/a3xx/compiler: handle saturate on dst
Sometimes things other than color dst need saturating, like if there is
a 'clamp(foo, 0.0, 1.0)'. So for saturated dst add the extra
instructions to fix up dst.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 20 Aug 2013 17:46:30 +0000 (13:46 -0400)]
freedreno/a3xx/compiler: fix CMP
The 1st src to add.s needs (r) flag (repeat), otherwise it will end up:
add.s dst.xyzw, tmp.xxxx -1
instead of:
add.s dst.xyzw, tmp.xyzw, -1
Also, if we are using a temporary dst to avoid clobbering one of the src
registers, we actually need to use that as the dst for the sel
instruction.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 5 Aug 2013 22:03:33 +0000 (18:03 -0400)]
freedreno/a3xx: some texture fixes
Stop hard coding bits that indicate texture type (2d/3d/cube/etc).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 5 Aug 2013 21:57:24 +0000 (17:57 -0400)]
freedreno: update register headers
resync w/ rnndb database
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 29 May 2013 14:16:33 +0000 (10:16 -0400)]
freedreno: add debug option to disable scissor optimization
Useful for testing and debugging.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 13 Jul 2013 17:08:22 +0000 (13:08 -0400)]
freedreno/a3xx: fix viewport on gmem->mem resolve
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sat, 13 Jul 2013 17:07:46 +0000 (13:07 -0400)]
freedreno/a3xx: fix color inversion on mem->gmem restore
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Niels Ole Salscheider [Fri, 9 Aug 2013 09:59:30 +0000 (11:59 +0200)]
radeonsi: Handle additional PIPE_COMPUTE_CAP_*
This patch adds support for:
PIPE_COMPUTE_CAP_MAX_INPUT_SIZE
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE
Return the values reported by the closed source driver for now.
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Niels Ole Salscheider [Fri, 9 Aug 2013 09:59:29 +0000 (11:59 +0200)]
radeonsi: copy r600_get_timestamp
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Niels Ole Salscheider [Fri, 9 Aug 2013 09:59:28 +0000 (11:59 +0200)]
radeonsi: Implement PIPE_QUERY_TIMESTAMP
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Roland Scheidegger [Fri, 23 Aug 2013 02:33:32 +0000 (04:33 +0200)]
gallivm: fix min/mag switchover point for nearest/none mip filter
Previously, the min/mag switchover point when using nearest/none mip
filter was effectively -0.5 which can't be right. Looks like new OpenGL
thinks it's ok if it's always 0.0 (older versions required 0.5 in some
cases), let's hope everybody else thinks that's fine too.
Refactor this slightly and get the per-quad/per-pixel min/mag decision
values further down to sampling, though still only the first component
is used yet.
While here also fix code trying to skip lod bias application etc. when
mipfilter is none, as this is still needed for determining min/mag filter.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Jon Severinsson [Fri, 23 Aug 2013 09:19:01 +0000 (11:19 +0200)]
gallium/osmesa: Link, not copy, the shared library to the LIB_DIR.
Just like all other mesa libraries...
CC: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jon Severinsson [Fri, 23 Aug 2013 09:19:00 +0000 (11:19 +0200)]
gallium/osmesa: Always link with the c++ linker.
Just like all other gallium targets...
CC: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jon Severinsson [Fri, 23 Aug 2013 09:18:59 +0000 (11:18 +0200)]
gallium/osmesa: Make and install an osmesa.pc.
As of "
2f142d59 build: Add --enable-gallium-osmesa flag." the pkgconfig
file from classic osmesa is no longer installed when building gallium
osmesa, so copy it to gallium osmesa and install the copy instead.
CC: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Fri, 22 Mar 2013 19:34:19 +0000 (12:34 -0700)]
i965/gs: Add a data structure for tracking VS output VUE map.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Tue, 11 Jun 2013 21:23:12 +0000 (14:23 -0700)]
i965/vec4: Make a function for setting up vec4 program key clip info.
This functionality will need to be reused by geometry shaders.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Wed, 27 Mar 2013 19:39:37 +0000 (12:39 -0700)]
i965: Make prim_to_hw_prim accessible outside brw_draw.c.
We will need access to this array in order to configure the geometry
shader.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Tue, 19 Feb 2013 15:31:16 +0000 (07:31 -0800)]
i965/gs: add GS visitors.
This patch introduces the vec4_gs_visitor class, which translates
geometry shaders from GLSL IR to back-end opcodes.
This class is derived from vec4_visitor (which is also the base class
for vec4_vs_visitor), so as a result most of the back end code is
shared. The only parts that differ are:
- Geometry shaders use a different input payload organization, since
the inputs need to match up with the outputs of the previous
pipeline stage (vec4_gs_visitor::setup_payload() and
vec4_gs_visitor::setup_varying_inputs()).
- Geometry shader input array dereferences need a special stride
computation, since all geometry shader inputs are interleaved into
one giant array (vec4_gs_visitor::compute_array_stride()).
- There are no geometry shader system values
(vec4_gs_visitor::make_reg_for_system_value()).
- At the beginning of a geometry shader, extra data in R0 needs to be
zeroed out, and a vertex counter needs to be initialized
(vec4_gs_visitor::emit_prolog()).
- When EmitVertex() appears in the shader, the current contents of
output variables need to be emitted to the URB, and the vertex
counter needs to be incremented
(vec4_gs_visitor::visit(ir_emit_vertex *)).
- When generating a URB_WRITE message to output vertex data, the
current state of the vertex counter needs to be used to store a
write offset in the message header
(vec4_gs_visitor::emit_urb_write_header()).
- The URB_WRITE message that outputs vertex data needs to be sent
using GS_OPCODE_URB_WRITE, since VS_OPCODE_URB_WRITE would overwrite
the offsets in the message header
(vec4_gs_visitor::emit_urb_write_opcode()).
- At the end of a geometry shader, the final vertex count needs to be
delivered using a URB WRITE message
(vec4_gs_visitor::emit_thread_end()).
- EndPrimitive() functionality is not implemented yet
(vec4_gs_visitor::visit(ir_end_primitive *)).
- There is no support for assembly shaders
(vec4_gs_visitor::emit_program_code()).
v2: Make num_input_vertices const. Refer to registers as rN rather
than gN, for consistency with the PRM. Fix misspelling. Improve
comment in the ir_emit_vertex visitor explaining why we emit vertices
inside a conditional. Enclose the conditional code in the
ir_emit_vertex visitor between curly braces.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Tue, 19 Feb 2013 15:31:16 +0000 (07:31 -0800)]
i965/gs: Add GS_OPCODE_SET_DWORD_2_IMMED.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sat, 23 Mar 2013 15:18:43 +0000 (08:18 -0700)]
i965/gs: Add GS_OPCODE_SET_VERTEX_COUNT.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sat, 23 Mar 2013 14:59:13 +0000 (07:59 -0700)]
i965/gs: Add GS_OPCODE_SET_WRITE_OFFSET.
v2: Added a comment to vec4_generator::generate_gs_set_write_offset().
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sat, 23 Mar 2013 14:42:32 +0000 (07:42 -0700)]
i965/gs: Add GS_OPCODE_THREAD_END.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Thu, 21 Mar 2013 16:11:12 +0000 (09:11 -0700)]
i965/gs: Add GS_OPCODE_URB_WRITE.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Thu, 21 Mar 2013 16:11:12 +0000 (09:11 -0700)]
i965/gs: Add a flag allowing URB write messages to use a per-slot offset.
This will be used by geometry shaders to implement the EmitVertex()
function, since it requires writing data to a dynamically-determined
offset within the geometry shader's URB entry.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sun, 11 Aug 2013 04:13:33 +0000 (21:13 -0700)]
i965: Combine 4 boolean args of brw_urb_WRITE into a flags bitfield.
The arguments to brw_urb_WRITE() were getting pretty unwieldy, and we
have to add more flags to support geometry shaders anyhow.
Also plumb these flags through brw_clip_emit_vue(),
brw_set_urb_message(), and the vec4_instruction class.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Tue, 2 Jul 2013 15:02:47 +0000 (08:02 -0700)]
i965/gs: Add a case to brwNewProgram() for geometry shaders.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Tue, 19 Feb 2013 15:31:16 +0000 (07:31 -0800)]
i965/gs: Create structs for use by GS program compilation.
v2: Make id "unsigned" rather than "GLuint".
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Tue, 2 Jul 2013 14:48:04 +0000 (07:48 -0700)]
i965/gs: Add a case to brwBindProgram() for geometry shaders.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Fri, 22 Mar 2013 19:49:11 +0000 (12:49 -0700)]
i965/gs: Add brw->geometry_program.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sat, 13 Jul 2013 16:03:18 +0000 (09:03 -0700)]
i965/vec4: Virtualize setup_payload instead of setup_attributes.
When I initially generalized the vec4_visitor class in preparation for
geometry shaders, I assumed that the setup_attributes() function would
need to be different between vertex and geometry shaders, but its
caller, setup_payload(), could be shared. So I made
setup_attributes() a virtual function.
It turns out this isn't true; setup_payload() needs to be different
too, since the geometry shader payload sometimes includes an extra
register (primitive ID) that has to come before uniforms.
So setup_payload() needs to be the virtual function instead of
setup_attributes().
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Sat, 13 Jul 2013 14:09:54 +0000 (07:09 -0700)]
i965/vec4: Allow for dispatch_grf_start_reg to vary.
Both 3DSTATE_VS and 3DSTATE_GS have a dispatch_grf_start_reg control,
which determines the register where the hardware delivers data sourced
from the URB (push constants followed by per-vertex input data).
For vertex shaders, we always set dispatch_grf_start_reg to 1, since
R1 is always the first register available for push constants in vertex
shaders.
For geometry shaders, we'll need the flexibility to set
dispatch_grf_start_reg to different values depending on the behvaiour
of the geometry shader; if it accesses gl_PrimitiveIDIn, we'll need to
set it to 2 to allow the primitive ID to be delivered to the thread in
R1.
This patch eliminates the assumption that dispatch_grf_start_reg is
always 1. In vec4_visitor, we record the regnum that was passed to
vec4_visitor::setup_uniforms() in prog_data for later use. In
vec4_generator, we consult this value when converting an abstract
UNIFORM register to a concrete hardware register. And in the code
that emits 3DSTATE_VS, we set dispatch_grf_start_reg based on the
value recorded in prog_data.
This will allow us to set dispatch_grf_start_reg to the appropriate
value when compiling geometry shaders. Vertex shaders will continue
to always use a dispatch_grf_start_reg of 1.
v2: Make dispatch_grf_start_reg "unsigned" rather than "GLuint".
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Thu, 15 Aug 2013 00:20:04 +0000 (17:20 -0700)]
i965/vec4: Move vec4 data structures and functions to brw_vec4.{cpp,h}.
This patch moves the following things into brw_vec4.{cpp,h}:
- struct brw_vec4_compile
- struct brw_vec4_prog_key
- brw_vec4_prog_data_compare()
- brw_vec4_prog_data_free()
This will allow us to avoid having to include brw_vs.h in
geometry-shader-specific files.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Wed, 21 Aug 2013 14:53:42 +0000 (07:53 -0700)]
i965: Make brw_{shader,vec4}.h safe to include from C.
The patch that follows will move the definition of struct
brw_vec4_prog_key from brw_vs.h to brw_vec4.h, making it necessary for
brw_vs.h to include brw_vec4.h (because brw_vs.h defines struct
brw_vs_prog_key, which contains brw_vec4_prog_key as a member). Since
brw_vs.h is included from C source files, that means that brw_vec4.h
will need to be safe to include from C. Same for brw_shader.h, since
it is included by brw_vec4.h.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Paul Berry [Wed, 20 Mar 2013 18:54:33 +0000 (11:54 -0700)]
i965: Stop including brw_vs.h from brw_vec4.h.
This is backwards from what we are going to want in the long term, which is:
- brw_vec4.h declares general-purpose vec4 infrastructure needed by
both VS and GS
- brw_vs.h includes brw_vec4.h and adds VS-specific parts.
- brw_gs.h includes brw_vec4.h and adds GS-specific parts.
Note that at the moment brw_vec.h contains a fair amount of
VS-specific declarations--I plan to address that in a later patch.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>