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Peter Zotov [Wed, 6 Apr 2016 22:21:29 +0000 (22:21 +0000)]
[llvm-c] Add LLVMGetValueKind.
Patch by Nicole Mazzuca <npmazzuca@gmail.com>.
Differential Revision: http://reviews.llvm.org/D18729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265608
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Kevin Enderby [Wed, 6 Apr 2016 22:14:09 +0000 (22:14 +0000)]
Thread Expected<...> up from createMachOObjectFile() to allow llvm-objdump to produce a real error message
Produce the first specific error message for a malformed Mach-O file describing
the problem instead of the generic message for object_error::parse_failed of
"Invalid data was encountered while parsing the file”. Many more good error
messages will follow after this first one.
This is built on Lang Hames’ great work of adding the ’Error' class for
structured error handling and threading Error through MachOObjectFile
construction. And making createMachOObjectFile return Expected<...> .
So to to get the error to the llvm-obdump tool, I changed the stack of
these methods to also return Expected<...> :
object::ObjectFile::createObjectFile()
object::SymbolicFile::createSymbolicFile()
object::createBinary()
Then finally in ParseInputMachO() in MachODump.cpp the error can
be reported and the specific error message can be printed in llvm-objdump
and can be seen in the existing test case for the existing malformed binary
but with the updated error message.
Converting these interfaces to Expected<> from ErrorOr<> does involve
touching a number of places. To contain the changes for now use of
errorToErrorCode() and errorOrToExpected() are used where the callers
are yet to be converted.
Also there some were bugs in the existing code that did not deal with the
old ErrorOr<> return values. So now with Expected<> since they must be
checked and the error handled, I added a TODO and a comment:
“// TODO: Actually report errors helpfully” and a call something like
consumeError(ObjOrErr.takeError()) so the buggy code will not crash
since needed to deal with the Error.
Note there is one fix also needed to lld/COFF/InputFiles.cpp that goes along
with this that I will commit right after this. So expect lld not to built
after this commit and before the next one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265606
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Michael Zolotukhin [Wed, 6 Apr 2016 21:47:12 +0000 (21:47 +0000)]
[LoopUnroll] Fix the way we update DT after complete unrolling.
Updating dominators for exit-blocks of the unrolled loops is not enough,
as shown in PR27157. The proper way is to update dominators for all
dominance-children of original loop blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265605
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Quentin Colombet [Wed, 6 Apr 2016 21:37:22 +0000 (21:37 +0000)]
[RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.
This will be used by the register bank select pass to assign register banks
for generic virtual registers.
This was originally committed as r265573 but broke at least one windows bot.
The problem with the windows bot was that it was using a copy constructor for
the InstructionMappings class and could not synthesize it. Actually, the fact
that this class is not copy constructable is expected and the compiler should
use the move assignment constructor. Marking the problematic assignment
explicitly as using the move constructor has its own problems.
Indeed, with recent clang we get a warning that we may prevent the elision of
the copy by the compiler. A proper fix for both compilers would be to change the
API of getPossibleInstrMapping to take a InstructionMappings as input/output
parameter. This does not feel natural and since GISel is not used on windows
yet, I chose to workaround the problem by not compiling the problematic code on
windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265604
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JF Bastien [Wed, 6 Apr 2016 21:19:33 +0000 (21:19 +0000)]
NFC: make AtomicOrdering an enum class
Summary:
In the context of http://wg21.link/lwg2445 C++ uses the concept of
'stronger' ordering but doesn't define it properly. This should be fixed
in C++17 barring a small question that's still open.
The code currently plays fast and loose with the AtomicOrdering
enum. Using an enum class is one step towards tightening things. I later
also want to tighten related enums, such as clang's
AtomicOrderingKind (which should be shared with LLVM as a 'C++ ABI'
enum).
This change touches a few lines of code which can be improved later, I'd
like to keep it as NFC for now as it's already quite complex. I have
related changes for clang.
As a follow-up I'll add:
bool operator<(AtomicOrdering, AtomicOrdering) = delete;
bool operator>(AtomicOrdering, AtomicOrdering) = delete;
bool operator<=(AtomicOrdering, AtomicOrdering) = delete;
bool operator>=(AtomicOrdering, AtomicOrdering) = delete;
This is separate so that clang and LLVM changes don't need to be in sync.
Reviewers: jyknight, reames
Subscribers: jyknight, llvm-commits
Differential Revision: http://reviews.llvm.org/D18775
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265602
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Haicheng Wu [Wed, 6 Apr 2016 20:38:20 +0000 (20:38 +0000)]
[MBP] Remove an unused function parameter
NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265596
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Ehsan Amiri [Wed, 6 Apr 2016 20:12:29 +0000 (20:12 +0000)]
[PPC] Use VSX/FP Facility integer load when an integer load's only users are conversion to FP
http://reviews.llvm.org/D18405
When the integer value loaded is never used directly as integer we should use VSX
or Floating Point Facility integer loads and avoid extra direct move
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265593
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Sanjay Patel [Wed, 6 Apr 2016 19:58:06 +0000 (19:58 +0000)]
regenerate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265591
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James Y Knight [Wed, 6 Apr 2016 19:52:32 +0000 (19:52 +0000)]
Put quotes around #error string.
GCC reports "missing terminating ' character", even when it's being
skipped by preprocessing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265590
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Nicolai Haehnle [Wed, 6 Apr 2016 19:40:20 +0000 (19:40 +0000)]
AMDGPU: Add a shader calling convention
This makes it possible to distinguish between mesa shaders
and other kernels even in the presence of compute shaders.
Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Differential Revision: http://reviews.llvm.org/D18559
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265589
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Quentin Colombet [Wed, 6 Apr 2016 19:04:58 +0000 (19:04 +0000)]
Revert "[RegisterBankInfo] Add methods to get the possible mapping of an
instruction on a register bank. This will be used by the register bank select
pass to assign register banks for generic virtual registers." and the follow-on
commits while I find out a way to fix the win7 bot:
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882
This reverts commit r265578, r265581, r265584, and r265585.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265587
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Davide Italiano [Wed, 6 Apr 2016 18:46:39 +0000 (18:46 +0000)]
[IRVerifier] Don't crash on invalid DIFile inside DISubprogram.
r265515, this time with the correct fix. file inside DISubprogram is not
mandatory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265586
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Quentin Colombet [Wed, 6 Apr 2016 18:43:46 +0000 (18:43 +0000)]
[RegisterBankInfo] Get rid of the assert in the constructor of InstructionMapping.
The default constructor now uses the regular constructor and the assert
is not valid anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265585
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Quentin Colombet [Wed, 6 Apr 2016 18:37:44 +0000 (18:37 +0000)]
[RegisterBankInfo] Call the other constructor of InstructionMapping from the
default constructor, instead of relying on the default constructor of
unique_ptr.
Second attempt at fixing the windows bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265584
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Evgeniy Stepanov [Wed, 6 Apr 2016 18:32:13 +0000 (18:32 +0000)]
[gold] Save bitcode for module partitions (save-temps + split codegen).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265583
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Quentin Colombet [Wed, 6 Apr 2016 18:24:34 +0000 (18:24 +0000)]
[RegisterBankInfo] Provide a default constructor for InstructionMapping
helper class.
The default constructor creates invalid (isValid() == false) instances
and may be used to communicate that a mapping was not found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265581
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Davide Italiano [Wed, 6 Apr 2016 18:13:44 +0000 (18:13 +0000)]
[IRVerifier] Prefer dyn_cast<> over isa<> + cast<>.
Thanks to Rafael for the suggestion!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265579
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Quentin Colombet [Wed, 6 Apr 2016 18:04:35 +0000 (18:04 +0000)]
[RegisterBankInfo] Add an helper function to get the size of a register.
The previous method to get the size was too simple and could fail for
physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265578
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Duncan P. N. Exon Smith [Wed, 6 Apr 2016 17:56:08 +0000 (17:56 +0000)]
IR: Use DenseSet instead of DenseMap for ConstantUniqueMap; NFC
Use a DenseSet instead of a DenseMap for constants in LLVMContextImpl.
Last time I looked at this was some time before r223588, when
DenseSet<V> had no advantage over DenseMap<V,char>. After r223588,
there's a 50% memory savings.
This is all mechanical. There were little bits of missing API from
DenseSet so I added the trivial implementations:
- iterator::operator++(int)
- template <class LookupKeyT> insert_as(ValueTy, LookupKeyT)
There should be no functionality change, just reduced memory consumption
(this wasn't on a profile or anything; just a cleanup I stumbled on).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265577
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Duncan P. N. Exon Smith [Wed, 6 Apr 2016 17:56:05 +0000 (17:56 +0000)]
IR: Stop explicitly clearing the MDStringCache
The MDStringCache doesn't need to be explicitly cleared before
destruction. The destructor handles it at least as efficiently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265576
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Quentin Colombet [Wed, 6 Apr 2016 17:51:41 +0000 (17:51 +0000)]
[RegisterBankInfo] Add a method to get the mapping RegClass -> RegBank.
This should be TableGen'ed at some point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265574
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Quentin Colombet [Wed, 6 Apr 2016 17:45:40 +0000 (17:45 +0000)]
[RegisterBankInfo] Add methods to get the possible mapping of an instruction on a register bank.
This will be used by the register bank select pass to assign register banks
for generic virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265573
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Saleem Abdulrasool [Wed, 6 Apr 2016 17:42:16 +0000 (17:42 +0000)]
vim: add missing keyword
`source_filename` was introduced as a keyword in SVN r264884, but the syntax
file was not updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265572
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Quentin Colombet [Wed, 6 Apr 2016 17:38:12 +0000 (17:38 +0000)]
[AArch64] Change the CMake to avoid to build GlobalISel related APIs
when GISel is not built.
The positive side effects are:
- We do not have to define dummy implementation
- We do not have to do weird gymnastic to avoid like issues (like
missing constructor or vtable for the base classes)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265570
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Quentin Colombet [Wed, 6 Apr 2016 17:26:03 +0000 (17:26 +0000)]
[AArch64] Teach the subtarget how to get to the RegisterBankInfo.
Rework the access to GlobalISel APIs to contain how much of
the APIs we need to access for the final executable to build when
GlobalISel is not built.
This prevents massive usage of ifdefs in various places. Now, all the
GlobalISel ifdefs will be happing only in AArch64TargetMachine.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265567
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Quentin Colombet [Wed, 6 Apr 2016 17:09:34 +0000 (17:09 +0000)]
[RegisterBankInfo] Make the destructor public... that may be useful!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265565
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Quentin Colombet [Wed, 6 Apr 2016 17:01:43 +0000 (17:01 +0000)]
[RegisterBankInfo] Implement the verify method of the InstructionMapping helper class.
This checks that all the register operands get a proper mapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265563
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Fiona Glaser [Wed, 6 Apr 2016 16:57:25 +0000 (16:57 +0000)]
Loop Unroll: add options and tweak to make Partial unrolling more useful
1. Add FullUnrollMaxCount option that works like MaxCount, but also limits
the unroll count for fully unrolled loops. So if a loop has an iteration
count over this, it won't fully unroll.
2. Add CLI options for MaxCount and the new option, so they can be tested
(plus a test).
3. Make partial unrolling obey MaxCount.
An example use-case (the out of tree one this is originally designed for) is
a target’s TTI can analyze a loop and decide on a max unroll count separate
from the size threshold, e.g. based on register pressure, then constrain
LoopUnroll to not exceed that, regardless of the size of the unrolled loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265562
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Quentin Colombet [Wed, 6 Apr 2016 16:51:04 +0000 (16:51 +0000)]
[MachineRegisterInfo] Document what is the expected metric for the size of generic registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265561
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Hans Wennborg [Wed, 6 Apr 2016 16:44:38 +0000 (16:44 +0000)]
Revert r265450 "[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC."
It caused ASan 32-bit tests to hang (PR27245).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265559
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Fiona Glaser [Wed, 6 Apr 2016 16:43:45 +0000 (16:43 +0000)]
LoopUnroll: only allow non-modulo Partial unrolling when Runtime=true
Patch by Evgeny Stupachenko <evstupac@gmail.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265558
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Quentin Colombet [Wed, 6 Apr 2016 16:40:23 +0000 (16:40 +0000)]
[RegisterBankInfo] Implement the verify method for the ValueMapping helper class.
The method checks that the value is fully defined accross the different partial
mappings and that the partial mappings are compatible between each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265556
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Quentin Colombet [Wed, 6 Apr 2016 16:33:26 +0000 (16:33 +0000)]
[RegisterBankInfo] Add a verify method for the PartialMapping helper class.
This verifies that the PartialMapping can be accomadated into the related
register bank.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265555
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Valery Pykhtin [Wed, 6 Apr 2016 16:30:21 +0000 (16:30 +0000)]
Revert "[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support."
This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265554
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Quentin Colombet [Wed, 6 Apr 2016 16:27:01 +0000 (16:27 +0000)]
[RegisterBankInfo] Add a couple of helper classes for the future cost model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265553
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Hans Wennborg [Wed, 6 Apr 2016 16:10:20 +0000 (16:10 +0000)]
Revert "Re-commit r265039 "[X86] Merge adjacent stack adjustments in eliminateCallFramePseudoInstr (PR27140)""
It seems to be causing ASan tests to crash, probably due to
miscompiling the run-time somehow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265551
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Valery Pykhtin [Wed, 6 Apr 2016 15:55:10 +0000 (15:55 +0000)]
[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.
Differential revision: http://reviews.llvm.org/D16998
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265550
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Quentin Colombet [Wed, 6 Apr 2016 15:53:13 +0000 (15:53 +0000)]
[AArch64] Use the default constructor of RegisterBankInfo when GlobalISel is not built.
This will avoid link-time error as the defautl constructor of RegisterBankInfo is
the only one available when GlobalISel is not built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265549
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Quentin Colombet [Wed, 6 Apr 2016 15:47:17 +0000 (15:47 +0000)]
[RegisterBankInfo] Inline the destructor to avoid link-time error when GlobalISel is not built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265548
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Wei Mi [Wed, 6 Apr 2016 15:41:07 +0000 (15:41 +0000)]
Recommit r265309 after fixed an invalid memory reference bug happened
when DenseMap growed and moved memory. I verified it fixed the bootstrap
problem on x86_64-linux-gnu but I cannot verify whether it fixes
the bootstrap error on clang-ppc64be-linux. I will watch the build-bot
result closely.
Replace analyzeSiblingValues with new algorithm to fix its compile
time issue. The patch is to solve PR17409 and its duplicates.
analyzeSiblingValues is a N x N complexity algorithm where N is
the number of siblings generated by reg splitting. Although it
causes siginificant compile time issue when N is large, it is also
important for performance since it removes redundent spills and
enables rematerialization.
To solve the compile time issue, the patch removes analyzeSiblingValues
and replaces it with lower cost alternatives containing two parts. The
first part creates a new spill hoisting method in postOptimization of
register allocation. It does spill hoisting at once after all the spills
are generated instead of inside every instance of selectOrSplit. The
second part queries the define expr of the original register for
rematerializaiton and keep it always available during register allocation
even if it is already dead. It deletes those dead instructions only in
postOptimization. With the two parts in the patch, it can remove
analyzeSiblingValues without sacrificing performance.
Differential Revision: http://reviews.llvm.org/D15302
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265547
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Silviu Baranga [Wed, 6 Apr 2016 14:06:32 +0000 (14:06 +0000)]
Revert r265535 until we know how we can fix the bots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265541
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Sam Kolton [Wed, 6 Apr 2016 13:29:59 +0000 (13:29 +0000)]
[AMDGPU] AsmParser: disable DPP for unsupported instructions. New dpp tests. Fix v_nop_dpp.
Summary:
1. Disable DPP encoding for instructions that do not support it:
- VOP1:
- v_readfirstlane_b32
- v_clrexcp
- v_movreld_b32
- v_movrels_b32
- v_movrelsd_b32
- VOP2:
- v_madmk_f16/32
- v_madak_f16/32
- VOPC, VINTRP, VOP3
2. Fix DPP for v_nop
3. New DPP tests for VOP1 and VOP2 instructions
Reviewers: nhaustov, tstellarAMD, vpykhtin
Subscribers: tstellarAMD, arsenm
Differential Revision: http://reviews.llvm.org/D18552
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265538
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Chad Rosier [Wed, 6 Apr 2016 13:27:13 +0000 (13:27 +0000)]
Simplify logic. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265537
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Silviu Baranga [Wed, 6 Apr 2016 13:18:26 +0000 (13:18 +0000)]
[SCEV] Introduce a guarded backedge taken count and use it in LAA and LV
Summary:
When the backedge taken codition is computed from an icmp, SCEV can
deduce the backedge taken count only if one of the sides of the icmp
is an AddRecExpr. However, due to sign/zero extensions, we sometimes
end up with something that is not an AddRecExpr.
However, we can use SCEV predicates to produce a 'guarded' expression.
This change adds a method to SCEV to get this expression, and the
SCEV predicate associated with it.
In HowManyGreaterThans and HowManyLessThans we will now add a SCEV
predicate associated with the guarded backedge taken count when the
analyzed SCEV expression is not an AddRecExpr. Note that we only do
this as an alternative to returning a 'CouldNotCompute'.
We use new feature in Loop Access Analysis and LoopVectorize to analyze
and transform more loops.
Reviewers: anemet, mzolotukhin, hfinkel, sanjoy
Subscribers: flyingforyou, mcrosier, atrick, mssimpso, sanjoy, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D17201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265535
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Evgeny Astigeevich [Wed, 6 Apr 2016 11:39:00 +0000 (11:39 +0000)]
[AArch64][CodeGen] NFC refactor AArch64InstrInfo::optimizeCompareInstr to prepare it for fixing a bug in it
AArch64InstrInfo::optimizeCompareInstr has a bug which causes generation of incorrect code (PR#27158).
The patch refactors the function to simplify reviewing the fix of the bug.
1. Function name ‘modifiesConditionCode’ is changed to ‘areCFlagsAccessedBetweenInstrs’
to reflect that the function can check modifying accesses, reading accesses or both.
2. Function ‘AArch64InstrInfo::optimizeCompareInstr’
- Documented the function
- Cmp_NZCV is DeadNZCVIdx to reflect that it is an operand index of dead NZCV
- The code for the case of substituting CmpInstr is put into separate
functions the main of them is ‘substituteCmpInstr’.
Differential Revision: http://reviews.llvm.org/D18609
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265531
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Chuang-Yu Cheng [Wed, 6 Apr 2016 10:48:36 +0000 (10:48 +0000)]
[ppc64] Temporary disable sibling call optimization on ppc64 due to breaking test case
r265506 breaks print-stack-trace.cc test case of compiler-rt in bootstrap
test.
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-multistage/builds/1708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265528
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David Majnemer [Wed, 6 Apr 2016 07:04:53 +0000 (07:04 +0000)]
[SLPVectorizer] Vectorizing the libm sqrt to llvm's sqrt intrinsic requires nnan
To quote the langref "Unlike sqrt in libm, however, llvm.sqrt has
undefined behavior for negative numbers other than -0.0 (which allows
for better optimization, because there is no need to worry about errno
being set). llvm.sqrt(-0.0) is defined to return -0.0 like IEEE sqrt."
This means that it's unsafe to replace sqrt with llvm.sqrt unless the
call is annotated with nnan.
Thanks to Hal Finkel for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265521
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Wed, 6 Apr 2016 06:41:54 +0000 (06:41 +0000)]
IR: Move MDStrings to a BumpPtrAllocator
We never delete any MDString until the context is destroyed. Might as
well throw them onto a BumpPtrAllocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265520
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Wed, 6 Apr 2016 06:38:15 +0000 (06:38 +0000)]
IRMover: Steal arguments when moving functions, NFC
Instead of copying arguments from the source function to the
destination, steal them. This has a few advantages.
- The ValueMap doesn't need to be seeded with (or cleared of)
Arguments.
- Often the destination function won't have created any arguments yet,
so this avoids malloc traffic.
- Argument names don't need to be copied.
Because argument lists are lazy, this required a new
Function::stealArgumentListFrom helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265519
91177308-0d34-0410-b5e6-
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Davide Italiano [Wed, 6 Apr 2016 04:34:38 +0000 (04:34 +0000)]
Revert "[IRVerifier] Don't crash on invalid DIFile inside DISubprogram."
This reverts commit r265515 as lots of tests need to be fixed before
this actually can go in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265517
91177308-0d34-0410-b5e6-
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Richard Trieu [Wed, 6 Apr 2016 04:22:00 +0000 (04:22 +0000)]
Add parentheses to silence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265516
91177308-0d34-0410-b5e6-
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Davide Italiano [Wed, 6 Apr 2016 03:57:47 +0000 (03:57 +0000)]
[IRVerifier] Don't crash on invalid DIFile inside DISubprogram.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265515
91177308-0d34-0410-b5e6-
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Davide Italiano [Wed, 6 Apr 2016 03:07:58 +0000 (03:07 +0000)]
[IRVerifier] Avoid crashing on an invalid compile unit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265514
91177308-0d34-0410-b5e6-
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Matthias Braun [Wed, 6 Apr 2016 02:59:44 +0000 (02:59 +0000)]
AArch64: Fix compile error
Fixed to adapt a use of enterBasicBlock() in my last commit (because I
had follow on patches in my repository that change the code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265513
91177308-0d34-0410-b5e6-
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Matthias Braun [Wed, 6 Apr 2016 02:47:09 +0000 (02:47 +0000)]
RegisterScavenger: Take a reference as enterBasicBlock() argument.
Make it obvious that the argument cannot be nullptr.
Remove an unnecessary nullptr check in initRegState.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265511
91177308-0d34-0410-b5e6-
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Matthias Braun [Wed, 6 Apr 2016 02:46:35 +0000 (02:46 +0000)]
LivePhysRegs: removeReg() must remove aliased registers
We must remove all aliased registers which may be more than the all sub
and super registers combined.
Bug found while reading the code. The bug does not affect any existing
target as the only use of register aliases I could found were control
registers on ARM and Hexagon which are all reserved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265510
91177308-0d34-0410-b5e6-
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Matthias Braun [Wed, 6 Apr 2016 02:46:04 +0000 (02:46 +0000)]
LivePhysRegs: Remove redundant check
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265509
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Wed, 6 Apr 2016 02:25:12 +0000 (02:25 +0000)]
ValueMapper: Fix delayed blockaddress handling after r265273
r265273 added Mapper::mapBlockAddress, which delays mapping a
blockaddress value until the function has a body. The condition was
backwards, and should be checking Function::empty instead of
GlobalValue::isDeclaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265508
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Wed, 6 Apr 2016 02:06:40 +0000 (02:06 +0000)]
AsmParser: Don't crash on unresolved !tbaa
Instead of crashing, give a nice error. As a drive-by, fix the location
associated with the errors for unresolved metadata (the location was off
by one token).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265507
91177308-0d34-0410-b5e6-
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Chuang-Yu Cheng [Wed, 6 Apr 2016 02:04:38 +0000 (02:04 +0000)]
[ppc64] Enable sibling call optimization on ppc64 ELFv1/ELFv2 abi
This patch enable sibling call optimization on ppc64 ELFv1/ELFv2 abi, and
add a couple of test cases. This patch also passed llvm/clang bootstrap
test, and spec2006 build/run/result validation.
Original issue: https://llvm.org/bugs/show_bug.cgi?id=25617
Great thanks to Tom's (tjablin) help, he contributed a lot to this patch.
Thanks Hal and Kit's invaluable opinions!
Reviewers: hfinkel kbarton
http://reviews.llvm.org/D16315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265506
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Chuang-Yu Cheng [Wed, 6 Apr 2016 01:47:02 +0000 (01:47 +0000)]
[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance
This patch implement the following instructions:
- addpcis subpcis
- maddhd maddhdu maddld
- modsw moduw modsd modud
- darn
- extswsli extswsli.
- setb
- dtstsfi dtstsfiq
Total 15 instructions
Reviewers: nemanjai hfinkel tjablin amehsan kbarton
http://reviews.llvm.org/D17885
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265505
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Chuang-Yu Cheng [Wed, 6 Apr 2016 01:46:45 +0000 (01:46 +0000)]
[Power9] Implement copy-paste, msgsync, slb, and stop instructions
This patch implements the following BookII and Book III instructions:
- copy copy_first cp_abort paste paste. paste_last
- msgsync
- slbieg slbsync
- stop
Total 10 instructions
Reviewers: nemanjai hfinkel tjablin amehsan kbarton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265504
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Sanjoy Das [Wed, 6 Apr 2016 01:33:54 +0000 (01:33 +0000)]
[RS4GC] Add a comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265503
91177308-0d34-0410-b5e6-
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Sanjoy Das [Wed, 6 Apr 2016 01:33:49 +0000 (01:33 +0000)]
Lower @llvm.experimental.deoptimize as a noreturn call
While preserving the return value for @llvm.experimental.deoptimize at
the IR level is useful during mid-level optimization, doing so at the
machine instruction level requires generating some extra code and a
return that is non-ideal. This change has LLVM lower
```
%val = call @llvm.experimental.deoptimize
ret %val
```
to effectively
```
call @__llvm_deoptimize()
unreachable
```
instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265502
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Tom Stellard [Wed, 6 Apr 2016 01:29:19 +0000 (01:29 +0000)]
AMDGPU: Document address space mapping
Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.
Patch By: Vedran Miletić
Reviewers: tstellarAMD, arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17046
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265500
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NAKAMURA Takumi [Wed, 6 Apr 2016 01:18:08 +0000 (01:18 +0000)]
AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along LLVM_BUILD_GLOBAL_ISEL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265499
91177308-0d34-0410-b5e6-
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David Majnemer [Wed, 6 Apr 2016 00:14:59 +0000 (00:14 +0000)]
[SLPVectorizer] Vectorize libcalls of sqrt
We didn't realize that we could transform the libcall into a vectorized
intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265493
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Quentin Colombet [Tue, 5 Apr 2016 23:57:25 +0000 (23:57 +0000)]
[RegisterBankInfo] Include RegisterBank.h.
We actually need the definition of a RegisterBank to be able to inline
the implementation of the subscript operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265492
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Quentin Colombet [Tue, 5 Apr 2016 23:43:58 +0000 (23:43 +0000)]
[RegisterBankInfo] Add missing include for assert.
This should appease the linux bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265491
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Davide Italiano [Tue, 5 Apr 2016 23:37:08 +0000 (23:37 +0000)]
[DebugInfo] Fix tests so that each subprogram belongs to a CU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265490
91177308-0d34-0410-b5e6-
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Quentin Colombet [Tue, 5 Apr 2016 23:34:59 +0000 (23:34 +0000)]
[AArch64] Initial implementation of the targeting of the register bank information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265489
91177308-0d34-0410-b5e6-
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Quentin Colombet [Tue, 5 Apr 2016 23:26:39 +0000 (23:26 +0000)]
[RegisterBankInfo] Simplify the API for build a register bank.
As part of the TRI argument of addRegBankCoverage we already have access to
the TargetRegisterClass through the ID of that register class.
Therefore, there is no point in needing a TargetRegisterClass instance,
the ID is enough to get to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265487
91177308-0d34-0410-b5e6-
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Sanjoy Das [Tue, 5 Apr 2016 23:18:53 +0000 (23:18 +0000)]
[RS4GC] NFC cleanup of the DeferredReplacement class
Instead of constructors use clearly named factory methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265486
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Sanjoy Das [Tue, 5 Apr 2016 23:18:35 +0000 (23:18 +0000)]
[RS4GC] Better codegen for deoptimize calls
Don't emit a gc.result for a statepoint lowered from
@llvm.experimental.deoptimize since the call into __llvm_deoptimize is
effectively noreturn. Instead follow the corresponding gc.statepoint
with an "unreachable".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265485
91177308-0d34-0410-b5e6-
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Quentin Colombet [Tue, 5 Apr 2016 23:04:54 +0000 (23:04 +0000)]
[Target] Remove a deprecated comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265484
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Quentin Colombet [Tue, 5 Apr 2016 22:50:40 +0000 (22:50 +0000)]
[Target] Add an accessor to the register bank information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265483
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Manman Ren [Tue, 5 Apr 2016 22:44:44 +0000 (22:44 +0000)]
Swift Calling Convention: swiftcc for ARM.
Differential Revision: http://reviews.llvm.org/D18769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265482
91177308-0d34-0410-b5e6-
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Evgeniy Stepanov [Tue, 5 Apr 2016 22:41:50 +0000 (22:41 +0000)]
Faster stack-protector for Android/AArch64.
Bionic has a defined thread-local location for the stack protector
cookie. Emit a direct load instead of going through __stack_chk_guard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265481
91177308-0d34-0410-b5e6-
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Manman Ren [Tue, 5 Apr 2016 22:41:47 +0000 (22:41 +0000)]
Swift Calling Convention: add swiftcc.
Differential Revision: http://reviews.llvm.org/D17863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265480
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Quentin Colombet [Tue, 5 Apr 2016 22:34:01 +0000 (22:34 +0000)]
[RegisterBank] Implement the verify method to check for the obvious mistakes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265479
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Quentin Colombet [Tue, 5 Apr 2016 21:47:56 +0000 (21:47 +0000)]
[RegisterBankInfo] Add debug print to check how the initialization is going.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265475
91177308-0d34-0410-b5e6-
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George Burgess IV [Tue, 5 Apr 2016 21:40:45 +0000 (21:40 +0000)]
[CFLAA] Fix PR27213; incorrect tagging of args/globals
Prior to this patch, CFLAA wouldn't tag arguments/globals properly if
it didn't find any "interesting" edges on them. This means that, if all
you do is store constants to a global or argument, we would never
actually treat it as a global/argument.
Test case:
define void @foo(i32* %A, i32* %B) #0 {
entry:
store i32 0, i32* %A, align 4
store i32 0, i32* %B, align 4
ret void
}
CFLAA would say that %A can't alias %B, because neither pointer was
used in an interesting way. This patch makes us note whether something
is an argument, global, ... regardless of how interesting CFLAA thinks
its uses are.
(For the record, using a value in an interesting way means loading
from it, using it in a GEP, ...)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265474
91177308-0d34-0410-b5e6-
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Quentin Colombet [Tue, 5 Apr 2016 21:40:43 +0000 (21:40 +0000)]
[RegisterBank] Add printable capabilities for future debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265473
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 21:25:33 +0000 (21:25 +0000)]
Try harder to appease MSVC after r265456
r265465 wasn't good enough. I need to spell out all the moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265470
91177308-0d34-0410-b5e6-
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Quentin Colombet [Tue, 5 Apr 2016 21:20:12 +0000 (21:20 +0000)]
[RegisterBankInfo] Make addRegBankCoverage more capable to ease
targeting jobs.
Now, addRegBankCoverage also adds the subreg-classes not just the
sub-classes of the given register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265469
91177308-0d34-0410-b5e6-
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Junmo Park [Tue, 5 Apr 2016 21:14:31 +0000 (21:14 +0000)]
Minor code cleanups. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265468
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 21:10:45 +0000 (21:10 +0000)]
IR: Introduce ConstantAggregate, NFC
Add a common parent class for ConstantArray, ConstantVector, and
ConstantStruct called ConstantAggregate. These are the aggregate
subclasses of Constant that take operands.
This is mainly a cleanup, adding common `isa` target and removing
duplicated code. However, it also simplifies caching which constants
point transitively at `GlobalValue` (a possible future direction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265466
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 21:07:01 +0000 (21:07 +0000)]
Try to appease MSVC after r265456
I can't remember if adding `= default` will make MSVC happy, or if I
have to spell this out. Let's try the cleaner version first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265465
91177308-0d34-0410-b5e6-
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Quentin Colombet [Tue, 5 Apr 2016 21:06:15 +0000 (21:06 +0000)]
[RegisterBankInfo] Implement the methods to create register banks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265464
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:53:47 +0000 (20:53 +0000)]
IR: Add missing assertion for ConstantVector::ConstantVector
Use the same assertion as ConstantArray. Vectors should have the right
number of elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265463
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Quentin Colombet [Tue, 5 Apr 2016 20:48:32 +0000 (20:48 +0000)]
[RegisterBank] Provide a way to check if a register bank is valid.
Change the default constructor to create invalid object.
The target will have to properly initialize the register banks before
using them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265460
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:45:04 +0000 (20:45 +0000)]
Revert "Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes."
This reverts commit r265454 since it broke the build. E.g.:
http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/22413/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265459
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:31:23 +0000 (20:31 +0000)]
Make constructors for final subclasses of Constant private, NFC
These were `protected` before, but might as well be `private`. Also
marked the classes themselves `final`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265458
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David Blaikie [Tue, 5 Apr 2016 20:26:50 +0000 (20:26 +0000)]
llvm-dwp: Handle GCC's use of multiple debug_types.dwo sections in a single .dwo file
(also includes the .test file missing from my previous commit, r265452)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265457
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Duncan P. N. Exon Smith [Tue, 5 Apr 2016 20:23:21 +0000 (20:23 +0000)]
ValueMapper: Rewrite Mapper::mapMetadata without recursion
This commit completely rewrites Mapper::mapMetadata (the implementation
of llvm::MapMetadata) using an iterative algorithm. The guts of the new
algorithm are in MDNodeMapper::map, the entry function in a new class.
Previously, Mapper::mapMetadata performed a recursive exploration of the
graph with eager "just in case there's a reason" malloc traffic.
The new algorithm has these benefits:
- New nodes and temporaries are not created eagerly.
- Uniquing cycles are not duplicated (see new unit test).
- No recursion.
Given a node to map, it does this:
1. Use a worklist to perform a post-order traversal of the transitively
referenced unmapped nodes.
2. Track which nodes will change operands, and which will have new
addresses in the mapped scheme. Propagate the changes through the
POT until fixed point, to pick up uniquing cycles that need to
change.
3. Map all the distinct nodes without touching their operands. If
RF_MoveDistinctMetadata, they get mapped to themselves; otherwise,
they get mapped to clones.
4. Map the uniqued nodes (bottom-up), lazily creating temporaries for
forward references as needed.
5. Remap the operands of the distinct nodes.
Mehdi helped me out by profiling this with -flto=thin. On his workload
(importing/etc. for opt.cpp), MapMetadata sped up by 15%, contributed
about 50% less to persistent memory, and made about 100x fewer calls to
malloc. The speedup is less than I'd hoped. The profile mainly blames
DenseMap lookups; perhaps there's a way to reduce them (e.g., by
disallowing remapping of MDString).
It would be nice to break the strange remaining recursion on the Value
side: MapValue => materializeInitFor => RemapInstruction => MapValue. I
think we could do this by having materializeInitFor return a worklist of
things to be remapped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265456
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Quentin Colombet [Tue, 5 Apr 2016 20:21:53 +0000 (20:21 +0000)]
[TargetRegisterClass] Improve the comment for how to use getSubClassMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265455
91177308-0d34-0410-b5e6-
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Eugene Zelenko [Tue, 5 Apr 2016 20:19:49 +0000 (20:19 +0000)]
Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes.
Some Include What You Use suggestions were used too.
Use anonymous namespaces in source files.
Differential revision: http://reviews.llvm.org/D18778
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265454
91177308-0d34-0410-b5e6-
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David Blaikie [Tue, 5 Apr 2016 20:16:38 +0000 (20:16 +0000)]
llvm-dwp: Handle dwo files produced by GCC
To start with, handle DW_FORM_string names. Follow up commit will handle
the interesting quirk with type units I was originally aiming for here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265452
91177308-0d34-0410-b5e6-
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Lang Hames [Tue, 5 Apr 2016 20:11:24 +0000 (20:11 +0000)]
[llvm-rtdyld] Fix the return type on ErrorAndExit.
As suggested by Rafael - this function no longer returns a value as of r264425.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265451
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Ahmed Bougacha [Tue, 5 Apr 2016 20:02:57 +0000 (20:02 +0000)]
[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.
We only generate LOCKed versions of add/sub when the result is unused.
It often happens that the result is used, but only by a comparison. We
can optimize those out by reusing EFLAGS, which lets us use the proper
instructions, instead of having to fallback to LXADD.
Instead of doing this as an MI peephole (as we do for the other
non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite
tricky later.
This also makes it eventually possible to stop expanding and/or/xor
if the only user is an icmp (also see D18141).
This uses the LOCK ISD opcodes added by r262244.
Differential Revision: http://reviews.llvm.org/D17633
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265450
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