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Gadi Haber [Tue, 4 Jul 2017 21:51:05 +0000 (21:51 +0000)]
NFC.
Made some updates to the half.ll test under CodeGen to make it friendly to the update_llc_test_checks .py tool as follows:
1.Removing the llc flag -asm-verbose=false
2.Grouping the multiple check-prefix directives
3.Apply update_llc_test_checks.py tool on the test
This change is needed to easily update scheduling changes in an upcoming patch.
Reviewers: zvi, RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D34934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307108
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Craig Topper [Tue, 4 Jul 2017 20:15:24 +0000 (20:15 +0000)]
Recommit r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"
The test check lines have now been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307106
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Andrew Zhogin [Tue, 4 Jul 2017 19:50:22 +0000 (19:50 +0000)]
[ARM][test] Added test/CodeGen/ARM/ror.ll test. NFC precommit for D12833.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307103
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Simon Pilgrim [Tue, 4 Jul 2017 18:11:02 +0000 (18:11 +0000)]
[X86][SSE4A] Add support for combining from non-v16i8 EXTRQI/INSERTQI shuffles
With the improved shuffle decoding we can now combine EXTRQI/INSERTQI shuffles from non-v16i8 vector types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307099
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Simon Pilgrim [Tue, 4 Jul 2017 17:42:01 +0000 (17:42 +0000)]
Fix signed/unsigned comparison warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307098
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Alexander Timofeev [Tue, 4 Jul 2017 17:32:00 +0000 (17:32 +0000)]
[AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307097
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Anna Thomas [Tue, 4 Jul 2017 17:00:03 +0000 (17:00 +0000)]
[LoopDeletion] NFC: Add loop being analyzed debug statement
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307096
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Simon Pilgrim [Tue, 4 Jul 2017 16:53:12 +0000 (16:53 +0000)]
[X86][SSE4A] Generalized EXTRQI/INSERTQI shuffle decodes
The existing decodes only worked for v16i8 vectors, this adds support for any 128-bit vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307095
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Hiroshi Inoue [Tue, 4 Jul 2017 16:35:26 +0000 (16:35 +0000)]
fix trivial typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307094
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Daniel Sanders [Tue, 4 Jul 2017 16:29:38 +0000 (16:29 +0000)]
[globalisel][tablegen] Fix the modules build after r307079
Exclude InstructionSelectorImpl.h since DEBUG_TYPE may vary between includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307093
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Andrew Zhogin [Tue, 4 Jul 2017 15:57:39 +0000 (15:57 +0000)]
[DAGCombiner] Intermediate variables in visitRotate promoted to the function's begin. NFC precommit for D12833.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307091
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Daniel Sanders [Tue, 4 Jul 2017 15:31:50 +0000 (15:31 +0000)]
[globalisel][tablegen] Fix release builds after r307079
Using NumPatternEmitted as a unique id for the tables is not valid on release
builds since the counters don't count in that case.
Also fix an unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307088
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Anna Thomas [Tue, 4 Jul 2017 15:24:08 +0000 (15:24 +0000)]
[FastISel] Move gc intrinsic test to X86 directory
Move from generic to X86 directory since gc intrinsics only supposed in
X86 64 bit.
Add target triple as well.
Fixes build failure in i686-linux-RA caused by rL307084.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307086
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Alexander Kornienko [Tue, 4 Jul 2017 15:13:02 +0000 (15:13 +0000)]
Fix dangling StringRefs found by clang-tidy misc-dangling-handle check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307085
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Anna Thomas [Tue, 4 Jul 2017 15:09:09 +0000 (15:09 +0000)]
[FastISel][SelectionDAG]Teach fastISel about GC intrinsics
Summary:
We are crashing in LLC at O0 when gc intrinsics are present in the block.
The reason being FastISel performs basic block ISel by modifying GC.relocates
to be the first instruction in the block. This can cause us to visit the GC
relocate before it's corresponding GC.statepoint is visited, which is incorrect.
When we lower the statepoint, we record the base and derived pointers, along
with the gc.relocates. After this we can visit the gc.relocate.
This patch avoids fastISel from incorrectly creating the block with gc.relocate
as the first instruction.
Reviewers: qcolombet, skatkov, qikon, reames
Reviewed by: skatkov
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34421
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307084
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Marek Olsak [Tue, 4 Jul 2017 14:43:38 +0000 (14:43 +0000)]
[AMDGPU] Fix latency of MIMG instructions
Patch by cwabbott (Connor Abbott).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307081
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Ilya Biryukov [Tue, 4 Jul 2017 14:41:21 +0000 (14:41 +0000)]
NFC. Removed mention of missing script from build_docker_image.sh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307080
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Daniel Sanders [Tue, 4 Jul 2017 14:35:06 +0000 (14:35 +0000)]
[globalisel][tablegen] Partially fix compile-time regressions by converting matcher to state-machine(s)
Summary:
Replace the matcher if-statements for each rule with a state-machine. This
significantly reduces compile time, memory allocations, and cumulative memory
allocation when compiling AArch64InstructionSelector.cpp.o after r303259 is
recommitted.
The following patches will expand on this further to fully fix the regressions.
Reviewers: rovka, ab, t.p.northover, qcolombet, aditya_nandakumar
Reviewed By: ab
Subscribers: vitalybuka, aemerson, javed.absar, igorb, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D33758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307079
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Anna Thomas [Tue, 4 Jul 2017 14:05:19 +0000 (14:05 +0000)]
[LoopDeletion] NFC: Add debug statements to the optimization
We have a DEBUG option for loop deletion, but no related debug messages.
Added some debug messages to state why loop deletion failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307078
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Hiroshi Inoue [Tue, 4 Jul 2017 13:09:29 +0000 (13:09 +0000)]
fix trivial typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307075
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Simon Pilgrim [Tue, 4 Jul 2017 12:33:53 +0000 (12:33 +0000)]
[X86] Add combine tests for vector rotates
Reference tests for D12833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307073
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NAKAMURA Takumi [Tue, 4 Jul 2017 12:13:27 +0000 (12:13 +0000)]
Revert r307064, "[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC"
Seems confused between %tmpN and unnamed %N to give same name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307070
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NAKAMURA Takumi [Tue, 4 Jul 2017 12:12:37 +0000 (12:12 +0000)]
llvm/ExecutionEngine/Orc/ObjectTransformLayer.h: Add <memory> to appease libstdc++'s std::shared_ptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307069
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Gadi Haber [Tue, 4 Jul 2017 07:18:03 +0000 (07:18 +0000)]
NFC commit.
Converting the Codegen test "extractelement-legalization-store-ordering.ll" to be "update_llc_test_checks" friendly.
The changes to the test are needed for an upcoming scheduling patch.
Reviewers: zvi, RKSimon
Differential Revision: https://reviews.llvm.org/D34935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307066
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Craig Topper [Tue, 4 Jul 2017 06:50:48 +0000 (06:50 +0000)]
[InstCombine] Add TODOs for a couple things that should maybe be in InstSimplify instead. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307065
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Craig Topper [Tue, 4 Jul 2017 06:50:44 +0000 (06:50 +0000)]
[InstCombine] Add test cases demonstrating creation of extra bswap instrinsic calls when when optimizing bswap and bitwise ops when the bswaps have additional uses. NFC
I assume bswap intrinsics are somewhat costly so we should be making sure we are getting rid of them not creating more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307064
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Alexander Shaposhnikov [Tue, 4 Jul 2017 06:16:53 +0000 (06:16 +0000)]
[tablegen] Avoid creating a temporary vector in getInstructionCase
Record::getValues returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector&
that is suboptimal in this case.
Differential revision: https://reviews.llvm.org/D34969
Test plan: make check-all
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307063
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Craig Topper [Tue, 4 Jul 2017 05:46:11 +0000 (05:46 +0000)]
[X86] Add comment string for broadcast loads from the constant pool.
Summary:
When broadcasting from the constant pool its useful to print out the final vector similar to what we do for normal moves from the constant pool.
I changed only a couple tests that were broadcast focused. One of them had been previously hand tweaked after running the script so that it could check the constant pool declaration. But I think this patch makes that unnecessary now since we can check the comment instead.
Reviewers: spatel, RKSimon, zvi
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34923
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307062
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Alexander Shaposhnikov [Tue, 4 Jul 2017 05:37:37 +0000 (05:37 +0000)]
[llvm] Revert "[tablegen] Avoid creating a temporary vector in getInstructionCase"
Revert rL307059 because of the incorrect commit message & patch,
will recommit later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307061
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Craig Topper [Tue, 4 Jul 2017 05:33:19 +0000 (05:33 +0000)]
[X86] Add RDRAND feature to GLM CPU
Summary: I believe this should be supported on GLM since RDSEED is.
Reviewers: m_zuckerman, zvi, RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307060
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Alexander Shaposhnikov [Tue, 4 Jul 2017 05:11:30 +0000 (05:11 +0000)]
[tablegen] Avoid creating a temporary vector in getInstructionCase
Record::getValues returns ArrayRef which has a cast operator
to std::vector, as a result a temporary vector is created
if the type of the variable is const std::vector&
that was suboptimal in this case.
Differential revision: https://reviews.llvm.org/D34969
Test plan: make check-all
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307059
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Lang Hames [Tue, 4 Jul 2017 04:42:30 +0000 (04:42 +0000)]
[Orc] Remove the memory manager argument to addModule, and de-templatize the
symbol resolver argument.
De-templatizing the symbol resolver is part of the ongoing simplification of
ORC layer API.
Removing the memory management argument (and delegating construction of memory
managers for RTDyldObjectLinkingLayer to a functor passed in to the constructor)
allows us to build JITs whose base object layers need not be compatible with
RTDyldObjectLinkingLayer's memory mangement scheme. For example, a 'remote
object layer' that sends fully relocatable objects directly to the remote does
not need a memory management scheme at all (that will be handled by the remote).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307058
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Dylan McKay [Tue, 4 Jul 2017 04:40:06 +0000 (04:40 +0000)]
[AVR] Fix bug which caused assertion errors for some FRMIDX instructions
Previously, if a basic block ended with a FRMIDX instruction, we would
end up doing something like this.
*std::next(MBB.end())
Which would hit an error:
"Assertion `!NodePtr->isKnownSentinel()' failed."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307057
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Dylan McKay [Tue, 4 Jul 2017 02:52:43 +0000 (02:52 +0000)]
[AVR] Add a missing clobber declaration to LPMW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307056
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Nirav Dave [Tue, 4 Jul 2017 02:20:17 +0000 (02:20 +0000)]
[DAG] Fixed predicate for determining when two frame indices
addresses are comparable. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307055
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NAKAMURA Takumi [Tue, 4 Jul 2017 02:14:18 +0000 (02:14 +0000)]
Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"
It broke a testcase.
Failing Tests (1):
LLVM :: CodeGen/AMDGPU/alignbit-pat.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307054
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Anton Yartsev [Tue, 4 Jul 2017 01:08:55 +0000 (01:08 +0000)]
[legalize-types] Clean up softening machinery.
The patch makes SoftenFloatResult/Operand logic just the same as all other legalization routines have: SoftenFloatResult() now fills the SoftenFloats map and SoftenFloatOperand() perform all needed replacements. This prevents softening mashinery from leaving stale entries in SoftenFloats map (that resulted in errors during the legalize type checking) and clarifies softening. The patch replaces https://reviews.llvm.org/D29265.
Differential Revision: https://reviews.llvm.org/D31946
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307053
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Simon Pilgrim [Mon, 3 Jul 2017 20:58:16 +0000 (20:58 +0000)]
[X86][SSE4A] Add support for combining from EXTRQI/INSERTQI shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307048
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Zvi Rackover [Mon, 3 Jul 2017 18:42:47 +0000 (18:42 +0000)]
MathExtras UnitTest: Assert that isPowerOf2(0) is false. NFC.
Summary:
This is a follow-up on D34077. Elena observed that the
correctness of the code relies on isPowerOf2(0) returning false.
Adding a test to cover this corner-case.
Reviewers: delena, davide, craig.topper
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307046
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Simon Pilgrim [Mon, 3 Jul 2017 16:53:11 +0000 (16:53 +0000)]
[X86][SSE4A] Add SSE4A shuffle tests on pre-SSSE3 hardware
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307042
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Simon Pilgrim [Mon, 3 Jul 2017 15:55:54 +0000 (15:55 +0000)]
[X86][SSE4A] Test SSE4A shuffle combining on SSE42 capable target as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307038
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Zvi Rackover [Mon, 3 Jul 2017 15:47:40 +0000 (15:47 +0000)]
DAGCombine: Combine BUILD_VECTOR to TRUNCATE
Summary:
Add a combine for creating a truncate to replace a build_vector composed of extracts with
indices that form a stride-2^N series.
Example:
v8i32 V = ...
v4i32 build_vector((extract_elt V, 0), (extract_elt V, 2), (extract_elt V, 4), (extract_elt V, 6))
-->
v4i32 truncate (bitcast V to v4i64)
Related discussion in llvm-dev about canonicalizing shuffles to
truncates in LLVM IR:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/108936.html.
Reviewers: spatel, RKSimon, efriedma, igorb, craig.topper, wolfgangp, delena
Reviewed By: delena
Subscribers: guyblank, delena, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D34077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307036
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Florian Hahn [Mon, 3 Jul 2017 15:32:00 +0000 (15:32 +0000)]
[LoopInterchange] Add more debug messages to currentLimitations().
Summary: This makes it easier to find out which limitation prevented this pass from doing its work.
Reviewers: karthikthecool, mzolotukhin, efriedma, mcrosier
Reviewed By: mcrosier
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D34940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307035
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Sanjay Patel [Mon, 3 Jul 2017 15:27:19 +0000 (15:27 +0000)]
[x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
There were also over-specifications in the RUN params such as CPU model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307033
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Ilya Biryukov [Mon, 3 Jul 2017 15:16:27 +0000 (15:16 +0000)]
Fixed argument parsing in docker scripts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307031
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Sanjay Patel [Mon, 3 Jul 2017 15:04:05 +0000 (15:04 +0000)]
[x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
There were also several over-specifications in the RUN params such as CPU model or OS requirement
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307028
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Simon Pilgrim [Mon, 3 Jul 2017 15:01:07 +0000 (15:01 +0000)]
[X86][SSE4A] Add tests showing missed opportunities to combine EXTRQI/INSERTQI shuffles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307027
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Alexander Timofeev [Mon, 3 Jul 2017 14:54:11 +0000 (14:54 +0000)]
[AMDGPU] Switch scalarize global loads ON by default
Differential revision: https://reviews.llvm.org/D34407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307026
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Sanjay Patel [Mon, 3 Jul 2017 14:29:45 +0000 (14:29 +0000)]
[x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307024
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Sanjay Patel [Mon, 3 Jul 2017 14:07:40 +0000 (14:07 +0000)]
[InstCombine] move and improve tests for cmp-intrinsic; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307022
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Benjamin Kramer [Mon, 3 Jul 2017 12:23:10 +0000 (12:23 +0000)]
Revert "[GVN] Recommit the patch "Add phi-translate support in scalarpre"."
This reverts commit r306313. This breaks selfhost at -O3 and PR33652.
Let me know if you need additional information on reproducing the issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307021
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Igor Breger [Mon, 3 Jul 2017 11:06:54 +0000 (11:06 +0000)]
[GlobalISel][X86] fix %ptr(p0) = G_CONSTANT selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307019
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Hiroshi Inoue [Mon, 3 Jul 2017 06:32:59 +0000 (06:32 +0000)]
fix trivial typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307004
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Craig Topper [Mon, 3 Jul 2017 05:54:16 +0000 (05:54 +0000)]
[InstCombine] Add a TODO for a probable missing single use check. NFC
Will try to fix it soon, but in case I forget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307003
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Craig Topper [Mon, 3 Jul 2017 05:54:15 +0000 (05:54 +0000)]
[InstCombine] Support BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( BITWISE_OP(x, BSWAP(CONSTANT) ) ) for splat vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307002
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Craig Topper [Mon, 3 Jul 2017 05:54:14 +0000 (05:54 +0000)]
[InstCombine] Add test cases for BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( BITWISE_OP(x, BSWAP(CONSTANT) ) ) with splat vectors. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307001
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Craig Topper [Mon, 3 Jul 2017 05:54:13 +0000 (05:54 +0000)]
[InstCombine] Remove support for BITWISE_OP(CONSTANT, BSWAP(x)) -> BSWAP(OP(BSWAP(CONSTANT), x)).
Constants were already canonicalized to the right hand side before we got here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307000
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Craig Topper [Mon, 3 Jul 2017 05:54:13 +0000 (05:54 +0000)]
[InstCombine] Support BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306999
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Craig Topper [Mon, 3 Jul 2017 05:54:12 +0000 (05:54 +0000)]
[InstCombine] Add test cases showing missed opportunity to fold BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306998
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Craig Topper [Mon, 3 Jul 2017 05:54:11 +0000 (05:54 +0000)]
[InstCombine] Remove an if that should have been guaranteed by the caller. Replace with an assert. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306997
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Matt Arsenault [Sun, 2 Jul 2017 23:21:48 +0000 (23:21 +0000)]
AMDGPU: Add operand target flags serialization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306995
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Simon Pilgrim [Sun, 2 Jul 2017 19:52:20 +0000 (19:52 +0000)]
[X86][AVX512] Test AVX512VPOPCNTDQ CTPOP with/without AVX512BW
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306991
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Simon Pilgrim [Sun, 2 Jul 2017 19:32:37 +0000 (19:32 +0000)]
[X86][AVX512VPOPCNTDQ] Improve support for v16i8/v8i16/v16i16/ CTPOP
Zero extend to v16i32/v8i64, use VPOPCNTDQ instructions and truncate back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306990
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Simon Pilgrim [Sun, 2 Jul 2017 18:51:48 +0000 (18:51 +0000)]
[X86][AVX512] Cleanup tzcnt tests triples and attributes
Avoid use of specific -mcpu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306989
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Simon Pilgrim [Sun, 2 Jul 2017 18:35:22 +0000 (18:35 +0000)]
[X86][AVX512] Cleanup popcnt tests triples and attributes
Avoid use of specific -mcpu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306988
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Craig Topper [Sun, 2 Jul 2017 17:08:44 +0000 (17:08 +0000)]
[IR] Remove unnecessary operator new from ConstantDataArray and ConstantDataVector. They inherit an identical version from ConstantData. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306987
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Simon Pilgrim [Sun, 2 Jul 2017 16:31:16 +0000 (16:31 +0000)]
[InstCombine] Use m_BitReverse pattern match helper. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306986
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Sanjay Patel [Sun, 2 Jul 2017 16:05:11 +0000 (16:05 +0000)]
[InstCombine] fix crash when folding cmp+bswap vector
We assumed the constant was a scalar when creating the replacement operand.
Also, improve tests for this fold and move the tests for this fold to their own file.
I'll move the related and missing tests to this file as a follow-up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306985
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Sanjay Patel [Sun, 2 Jul 2017 15:24:08 +0000 (15:24 +0000)]
[x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306984
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Sanjay Patel [Sun, 2 Jul 2017 15:16:17 +0000 (15:16 +0000)]
[x86] remove unnecessary RUN for test after auto-generating checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306983
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Sanjay Patel [Sun, 2 Jul 2017 15:15:18 +0000 (15:15 +0000)]
[x86] update test to use FileCheck and auto-generate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306982
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Sanjay Patel [Sun, 2 Jul 2017 14:50:35 +0000 (14:50 +0000)]
[x86] auto-generate complete checks for tests; NFC
These all used 'CHECK-NOT' which isn't necessary if we have complete checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306981
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Sanjay Patel [Sun, 2 Jul 2017 14:34:50 +0000 (14:34 +0000)]
[InstCombine] look through bswap/bitreverse for equality comparisons
I noticed this missed bswap optimization in the CGP memcmp() expansion,
and then I saw that we don't have the fold in InstCombine.
Differential Revision: https://reviews.llvm.org/D34763
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306980
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NAKAMURA Takumi [Sun, 2 Jul 2017 14:25:27 +0000 (14:25 +0000)]
llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll: -debug is available in +Asserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306979
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Simon Pilgrim [Sun, 2 Jul 2017 14:16:25 +0000 (14:16 +0000)]
[X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to unary shuffles before bit shifts
We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306978
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Simon Pilgrim [Sun, 2 Jul 2017 13:19:10 +0000 (13:19 +0000)]
[X86][SSE] Attempt to combine 64-bit and 16-bit shuffles to unary shuffles before bit shifts
We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive
The 32-bit shuffles are a bit tricky and will be dealt with in a later patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306977
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Simon Pilgrim [Sun, 2 Jul 2017 12:56:10 +0000 (12:56 +0000)]
[X86][SSE] Add test showing missed opportunity to combine to pshuflw
We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306976
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Hiroshi Inoue [Sun, 2 Jul 2017 12:44:27 +0000 (12:44 +0000)]
fix trivial typos in documents; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306975
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Mohammed Agabaria [Sun, 2 Jul 2017 12:16:15 +0000 (12:16 +0000)]
[X86][CM] update add\sub costs of vectors of 64 in X86\SLM arch
this patch updates the cost of addq\subq (add\subtract of vectors of 64bits)
based on the performance numbers of SLM arch.
Differential Revision: https://reviews.llvm.org/D33983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306974
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Gadi Haber [Sun, 2 Jul 2017 12:01:33 +0000 (12:01 +0000)]
[X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC.
This is NFC after rerunning the "update_llc_test_checks.py" tool on the CodeGen X86 tests in order to submit a patch.
Minor differences due to added "End of Function" lines.
Reviewers: zvi
Differential Revision: https://reviews.llvm.org/D34933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306973
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Igor Breger [Sun, 2 Jul 2017 08:58:29 +0000 (08:58 +0000)]
[GlobalISel][X86] Support G_GLOBAL_VALUE operation.
Summary: Support G_GLOBAL_VALUE operation. For now most of the PIC configurations not implemented yet.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D34738
Conflicts:
test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306972
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Igor Breger [Sun, 2 Jul 2017 08:15:49 +0000 (08:15 +0000)]
[GlobalISel][X86] Support vector type G_UNMERGE_VALUES selection.
Summary:
Support vector type G_UNMERGE_VALUES selection.
For now G_UNMERGE_VALUES marked as legal for any type, so nothing to do in legalizer.
Reviewers: t.p.northover, qcolombet, zvi, guyblank
Reviewed By: guyblank
Subscribers: rovka, kristof.beyls, guyblank, llvm-commits
Differential Revision: https://reviews.llvm.org/D33665
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306971
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Hiroshi Inoue [Sun, 2 Jul 2017 03:24:54 +0000 (03:24 +0000)]
fix trivial typos; NFC
suport -> support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306968
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Craig Topper [Sun, 2 Jul 2017 01:15:51 +0000 (01:15 +0000)]
[InstCombine] Fold (a | b) ^ (~a | ~b) --> ~(a ^ b) and (a & b) ^ (~a & ~b) --> ~(a ^ b)
Summary:
I came across this while thinking about what would happen if one of the operands in this xor pattern was itself a inverted (A & ~B) ^ (~A & B)-> (A^B).
The patterns here assume that the (~a | ~b) will be demorganed to ~(a & b) first. Though I wonder if there's a multiple use case that would prevent the demorgan.
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34870
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306967
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Davide Italiano [Sun, 2 Jul 2017 00:07:18 +0000 (00:07 +0000)]
[CodeExtractor] Remove unneded and commented out debugging stmts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306966
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Simon Pilgrim [Sat, 1 Jul 2017 16:42:16 +0000 (16:42 +0000)]
[X86][RDSEED] Split off i64 intrinsic tests and test i16/i32 on 32-bit target as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306961
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Simon Pilgrim [Sat, 1 Jul 2017 16:41:12 +0000 (16:41 +0000)]
[X86][RDRAND] Split off i64 intrinsic tests and test i16/i32 on 32-bit target as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306960
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Simon Pilgrim [Sat, 1 Jul 2017 16:34:29 +0000 (16:34 +0000)]
[X86] Removed reference to update_test_checks.py
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306959
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Simon Pilgrim [Sat, 1 Jul 2017 16:32:02 +0000 (16:32 +0000)]
[X86][AVX] Remove duplicate autogeneration note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306958
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Hiroshi Inoue [Sat, 1 Jul 2017 07:12:15 +0000 (07:12 +0000)]
fix trivial typos, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306952
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Craig Topper [Sat, 1 Jul 2017 06:46:09 +0000 (06:46 +0000)]
[SelectionDAGBuilder] Use EVT::getVectorVT instead of MVT::getVectorVT to prevent a crash if the type isn't a simple VT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306950
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Dylan McKay [Sat, 1 Jul 2017 05:23:13 +0000 (05:23 +0000)]
[AVR] Remove a bunch of now-obselete tests
The fixups in these instructions are now lowered into relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306947
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Eric Beckmann [Sat, 1 Jul 2017 03:59:54 +0000 (03:59 +0000)]
Revert "Revert "Replace trivial use of external rc.exe by writing our own .res file.""
Summary:
This reverts commit
51931072a7c9a52540baf76fc30ef391d2529a2f.
This revert was originally done because the integrations of the new
WindowsResource library into LLD was causing error in chromium, due to
bugs in how resource sections were handled. These bugs were fixed,
meaning that the features may be reintegrated.
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D34922
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306941
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Eric Christopher [Sat, 1 Jul 2017 03:41:53 +0000 (03:41 +0000)]
Remove the default ARMSubtarget from the ARM TargetMachine.
This enables us to ensure better LTO and code generation in the face of module linking.
Remove a report_fatal_error from the TargetMachine and replace it with an assert in ARMSubtarget - and remove the test that depended on the error. The assertion will still fire in the case that we were reporting before, but error reporting needs to be in front end tools if possible for options parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306939
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Davide Italiano [Sat, 1 Jul 2017 03:29:33 +0000 (03:29 +0000)]
[Cloner] Re-map simplfied cloned instructions.
This commit pretty much rolls back the logic added in r306495
as in the testcase provided we simplify an `icmp` looking through
a PHI that hasn't been mapped yet.
I think instsimplify shouldn't do threading over select/phis or
just looking through phis in general, but this is what we have
now. Also, add a test to prevent this from happening in case somebody
wants to modify this code again.
Briefly discussed with Kyle Butt (thanks Kyle!).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306938
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Teresa Johnson [Sat, 1 Jul 2017 03:24:10 +0000 (03:24 +0000)]
Recommit "r306541 - Add zero-length check to memcpy/memset load store loop expansion""
With fix for use-after-free errors. We can't add the new branch and
remove the old one until we are done with the Builder constructed for
the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306937
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Teresa Johnson [Sat, 1 Jul 2017 03:24:09 +0000 (03:24 +0000)]
Revert "r306473 - re-commit r306336: Enable vectorizer-maximize-bandwidth by default."
This still breaks PPC tests we have. I'll forward reproduction
instructions to dehao.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306936
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Teresa Johnson [Sat, 1 Jul 2017 03:24:08 +0000 (03:24 +0000)]
re-commit r306336: Enable vectorizer-maximize-bandwidth by default.
Differential Revision: https://reviews.llvm.org/D33341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306935
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Teresa Johnson [Sat, 1 Jul 2017 03:24:07 +0000 (03:24 +0000)]
revert r306336 for breaking ppc test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306934
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Teresa Johnson [Sat, 1 Jul 2017 03:24:06 +0000 (03:24 +0000)]
Enable vectorizer-maximize-bandwidth by default.
Summary:
vectorizer-maximize-bandwidth is generally useful in terms of performance. I've tested the impact of changing this to default on speccpu benchmarks on sandybridge machines. The result shows non-negative impact:
spec/2006/fp/C++/444.namd 26.84 -0.31%
spec/2006/fp/C++/447.dealII 46.19 +0.89%
spec/2006/fp/C++/450.soplex 42.92 -0.44%
spec/2006/fp/C++/453.povray 38.57 -2.25%
spec/2006/fp/C/433.milc 24.54 -0.76%
spec/2006/fp/C/470.lbm 41.08 +0.26%
spec/2006/fp/C/482.sphinx3 47.58 -0.99%
spec/2006/int/C++/471.omnetpp 22.06 +1.87%
spec/2006/int/C++/473.astar 22.65 -0.12%
spec/2006/int/C++/483.xalancbmk 33.69 +4.97%
spec/2006/int/C/400.perlbench 33.43 +1.70%
spec/2006/int/C/401.bzip2 23.02 -0.19%
spec/2006/int/C/403.gcc 32.57 -0.43%
spec/2006/int/C/429.mcf 40.35 +0.27%
spec/2006/int/C/445.gobmk 26.96 +0.06%
spec/2006/int/C/456.hmmer 24.4 +0.19%
spec/2006/int/C/458.sjeng 27.91 -0.08%
spec/2006/int/C/462.libquantum 57.47 -0.20%
spec/2006/int/C/464.h264ref 46.52 +1.35%
geometric mean +0.29%
The regression on 453.povray seems real, but is due to secondary effects as all hot functions are bit-identical with and without the flag.
I started this patch to consult upstream opinions on this. It will be greatly appreciated if the community can help test the performance impact of this change on other architectures so that we can decided if this should be target-dependent.
Reviewers: hfinkel, mkuper, davidxl, chandlerc
Reviewed By: chandlerc
Subscribers: rengolin, sanjoy, javed.absar, bjope, dorit, magabari, RKSimon, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D33341
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306933
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