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Eric Engestrom [Thu, 15 Nov 2018 17:48:58 +0000 (17:48 +0000)]
egl: fix bad rebase
I screwed up a rebase over a refactor and didn't notice locally because
the uncommitted refactor hid the issue.
Fixes:
c9733649670243a1a6eb "egl: add missing glvnd entrypoint for EGL_ANDROID_blob_cache"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Sagar Ghuge [Thu, 15 Nov 2018 06:39:43 +0000 (22:39 -0800)]
intel/compiler: Disassemble GEN6_SFID_DATAPORT_SAMPLER_CACHE as dp_sampler
Both BRW_SFID_SAMPLER and GEN6_SFID_DATAPORT_SAMPLER_CACHE are getting
disassembled as "sampler", which is misleading for assembler tool.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Eric Engestrom [Wed, 14 Nov 2018 12:51:38 +0000 (12:51 +0000)]
egl: add missing glvnd entrypoint for EGL_ANDROID_blob_cache
Fixes dEQP-EGL.functional.get_proc_address.extension.egl_android_blob_cache
on builds with glvnd enabled.
Fixes:
6f5b57093b3462a54e9c7 "egl: add support for EGL_ANDROID_blob_cache"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Wed, 14 Nov 2018 13:05:34 +0000 (13:05 +0000)]
gbm: add new entrypoint to symbols check
Fixes:
6328536ff28ca26f2ad4e "gbm: Introduce a helper function for
printing GBM format names."
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Emil Velikov [Wed, 14 Nov 2018 18:49:54 +0000 (18:49 +0000)]
bin/get-pick-list.sh: handle reverts prior to the branchpoint
Currently we detect when a breaking commit:
- has landed in stable, and
- is referenced by a untagged fix in master
Yet we did not consider the case of breaking commit:
- prior to the branchpoint, and
- is referenced by a untagged fix in master
Addressing the latter is extremely slow, due to the size of the lookup.
That said, we can trivially use the existing is_sha_nomination() helper
to catch reverts.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:21 +0000 (15:05 +0000)]
bin/get-pick-list.sh: use test instead of [ ]
Latter is rather picky wrt surrounding white space. The explicit `test`
doesn't have that problem, plus the statements read a bit easier.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:20 +0000 (15:05 +0000)]
bin/get-pick-list.sh: handle unofficial "broken by" tag
We have a number of cases were devs will use a tag "broken by".
While it's not something officially documented or recommended, checking
for it is trivial enough.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:19 +0000 (15:05 +0000)]
bin/get-pick-list.sh: handle fixes tag with missing colon
Every so often, we forget to add the colon after "fixes". Trivially
tweak the script to catch it.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:18 +0000 (15:05 +0000)]
bin/get-pick-list.sh: flesh out is_sha_nomination
Refactor is_fixes_nomination into a is_sha_nomination helper. This way
we can reuse it for more than the usual "Fixes:" tag.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:17 +0000 (15:05 +0000)]
bin/get-pick-list.sh: tweak the commit sha matching pattern
Currently we match on:
- any arbitrary length of,
- any a-z A-Z and 0-9 characters
At the same time, a commit sha consists of lowercase hexadecimal
numbers. Any sha shorter than 8 characters is ambiguous - in some cases
even 11+ are required.
So change the pattern to a-f0-9 and adjust the length to 8-40.
As we're here we could use a single grep, instead of the grep/sed combo.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:16 +0000 (15:05 +0000)]
bin/get-pick-list.sh: handle the fixes tag
Having a separate script to handle the fixes tag, brings a number of
issues, so let's fold it in get-pick-list.sh.
v2:
- pass the sha as argument to the function
- Keep original sed pattern
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:15 +0000 (15:05 +0000)]
bin/get-pick-list.sh: handle "typod" usecase.
As the comment in get-typod-pick-list.sh says, there's little point in
having a duplicate file.
Add the new pattern + tag to get-pick-list.sh and nuke this file.
v2:
- pass the sha as argument to the function
- grep -q instead of using a variable (Eric)
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:14 +0000 (15:05 +0000)]
bin/get-pick-list.sh: prefix output with "[stable] "
With later commits we'll fold all the different scripts into one.
Add the explicit prefix, so that we know the origin of the nomination
v2:
- pass the sha as argument to the function
- swap $tag = none for an else statment (Juan)
- grep -q instead of using a variable (Eric)
- print the tag and commit oneline separately (Eric)
v3:
- drop unused "tag=none" assignment (Juan)
- typo nomination
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (v2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Nov 2018 15:05:13 +0000 (15:05 +0000)]
bin/get-pick-list.sh: simplify git oneline printing
Currently we force disable the pager via "|cat" where --no-pager
exists. Additionally we could use git show instead of git log -n1.
Use those for a slightly more understandable code.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 7 Nov 2018 16:02:59 +0000 (16:02 +0000)]
docs: document the staging branch and add reference to it
A while back we agreed that having a live/staging branch is beneficial.
Sadly we forgot to document that, so here is my first attempt.
Document the caveat that the branch history is not stable.
CC: Andres Gomez <agomez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Emil Velikov [Wed, 7 Nov 2018 16:02:58 +0000 (16:02 +0000)]
docs/submittingpatches.html: correctly handle the <p> tag
As pointed out by the w3c validator.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Emil Velikov [Wed, 7 Nov 2018 16:02:57 +0000 (16:02 +0000)]
docs/releasing.html: polish cherry-picking/testing text
Reword slightly and highlight the important parts of the text.
CC: Andres Gomez <agomez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Guido Günther [Mon, 17 Sep 2018 14:06:57 +0000 (16:06 +0200)]
etnaviv: Make sure rs alignment checks match
etna_resource_alloc and etna_resource_from_handle currently use different checks.
This leads to
etna_resource_from_handle:492: target=2, format=PIPE_FORMAT_B8G8R8X8_UNORM, 1080x1920x1, array_size=1, last_level=0, nr_samples=0, usage=0, bind=8000a, flags=0
etna_resource_from_handle:541: BO stride 4320 is too small for RS engine width padding (4352, format PIPE_FORMAT_B8G8R8X8_UNORM)
since etna_resource_from_handle wants to be aligned to a 16 byte
boundary while the etna_resource_alloc does not.
Adjust the two checks by using a common function.
Broken by
baff59ebf07a114f95ad66d1f54e4b1f409eebee
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Juan A. Suarez Romero [Thu, 15 Nov 2018 13:08:58 +0000 (13:08 +0000)]
docs: update calendar, add news item and link release notes for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Juan A. Suarez Romero [Thu, 15 Nov 2018 13:04:37 +0000 (13:04 +0000)]
docs: add sha256 checksums for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
79be754f9a74a43b5748dc0934241e7701cb9581)
Juan A. Suarez Romero [Thu, 15 Nov 2018 11:58:11 +0000 (11:58 +0000)]
docs: add release notes for 18.2.5
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit
f34bddc325c414cb8ee21666bd307512577efdef)
Marek Olšák [Tue, 13 Nov 2018 23:37:39 +0000 (18:37 -0500)]
radeonsi: fix video APIs on Raven2
This was missed when I added the new enum.
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Andrii Simiklit [Tue, 13 Nov 2018 12:19:30 +0000 (14:19 +0200)]
i965: avoid 'unused variable' warnings
1. brw_pipe_control.c:311:34: warning:
unused variable ‘devinfo’
2. brw_program_binary.c:209:19: warning:
unused variable ‘gen_size’
3. brw_program_binary.c:216:19: warning:
unused variable ‘nir_size’
v2: Changes for unreproducible issues were removed
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Andrii Simiklit [Tue, 13 Nov 2018 12:19:29 +0000 (14:19 +0200)]
compiler: avoid 'unused variable' warnings
1. nir/nir_lower_vars_to_ssa.c:691:21: warning:
unused variable ‘var’
nir_variable *var = path->path[0]->var;
v2: Changes for some part of 'may be used uninitialized'
warnings were removed, seems like it is a compiler issue.
( Eric Engestrom <eric.engestrom@intel.com> )
Possible like this one:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46684
This issue is flagged as duplicate but an
original one is not closed yet.
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Andrii Simiklit [Tue, 13 Nov 2018 12:19:28 +0000 (14:19 +0200)]
intel/tools: avoid 'unused variable' warnings
1. tools/aub_read.c:271:31: warning: unused variable ‘end’
const uint32_t *p = data, *end = data + data_len, *next;
2. tools/aub_mem.c:292:13: warning: unused variable ‘res’
void *res = mmap((uint8_t *)bo.map + map_offset, 4096, PROT_READ,
tools/aub_mem.c:357:13: warning: unused variable ‘res’
void *res = mmap((uint8_t *)bo.map + (page - bo.addr), 4096, PROT_READ,
v2: The i965_disasm.c changes was moved into a separate patch
The 'end' variable declared separately with MAYBE_UNUSED
to avoid effect of it to other variables.
( Eric Engestrom <eric.engestrom@intel.com> )
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Thomas Hellstrom [Fri, 9 Nov 2018 14:27:48 +0000 (15:27 +0100)]
st/xa: Bump minor
Bump minor to signal support for new formats and higher precision
solid pictures.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Thomas Hellstrom [Tue, 13 Nov 2018 13:10:56 +0000 (14:10 +0100)]
st/xa: Support Component Alpha with trivial blending
Support Component Alpha for those composite operations that do not require
per-channel alpha blending.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Tue, 13 Nov 2018 17:24:45 +0000 (18:24 +0100)]
st/xa: Minor renderer cleanups
constify function arguments to clean up the code a bit.
Reported-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Tue, 13 Nov 2018 13:13:38 +0000 (14:13 +0100)]
st/xa: Fix transformations when we have both source and mask samplers
In the case when we had both source and mask samplers, transformations were
typically not applied correctly.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Thomas Hellstrom [Fri, 9 Nov 2018 12:19:12 +0000 (13:19 +0100)]
st/xa: Support a couple of new formats
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Thomas Hellstrom [Wed, 7 Nov 2018 13:55:20 +0000 (14:55 +0100)]
st/xa: Support higher color precision for solid pictures
The only solid fill picture type we supported only had 8 bit color
channels. Add a new solid picture type that supports float channels.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Thomas Hellstrom [Wed, 7 Nov 2018 10:14:04 +0000 (11:14 +0100)]
st/xa: Render update. Better support for solid pictures
Remove unused and obsolete code for gradients and component-alpha
Support solid source- and mask pictures using a variable number
of samplers in the composite pipeline rather than the fixed number
we used before.
Tested using rendercheck for XA.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Gert Wollny [Mon, 12 Nov 2018 08:17:34 +0000 (09:17 +0100)]
nir: Allow to skip integer ops in nir_lower_to_source_mods
Some hardware supports source mods only for float operations. Make it
possible to skip lowering to source mods in these cases.
v2: use option flags instead of a boolean (Jason Ekstrand)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Karol Herbst [Thu, 26 Apr 2018 14:54:26 +0000 (16:54 +0200)]
nir/spirv: cast shift operand to u32
v2: fix for specialization constants as well
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Karol Herbst [Thu, 19 Jul 2018 09:44:31 +0000 (11:44 +0200)]
nir: replace nir_load_system_value calls with appropiate builder functions
this helps reduce the overall code changes when a bit_size parameter is
added to nir_load_system_value
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Karol Herbst [Thu, 19 Jul 2018 09:42:08 +0000 (11:42 +0200)]
nir: add const_index parameters to system value builder function
this allows to replace some nir_load_system_value calls with the specific
system value constructor
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Timothy Arceri [Wed, 7 Nov 2018 04:20:41 +0000 (15:20 +1100)]
radv: make use of nir_move_out_const_to_consumer()
vkpipeline-db results:
Totals from affected shaders:
SGPRS: 28400 -> 28576 (0.62 %)
VGPRS: 27916 -> 27692 (-0.80 %)
Spilled SGPRs: 140 -> 138 (-1.43 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size:
1534456 ->
1520560 (-0.91 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 3541 -> 3582 (1.16 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Lionel Landwerlin [Fri, 2 Nov 2018 10:21:20 +0000 (10:21 +0000)]
anv: move helper function internally
It's only used in anv_image.c
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Tue, 30 Oct 2018 23:44:05 +0000 (23:44 +0000)]
anv: use image aspects rather than computed ones
This shouldn't make any difference but I feel uneasy to use the
expanded aspects that do not represent the image in its entirety. If
we ever change the implementation of the anv_image_aspect_to_plane()
helper, this is safer.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Fri, 26 Oct 2018 13:35:59 +0000 (14:35 +0100)]
anv: associate vulkan formats with aspects
This will make it easier to associate an aspect with a plane number.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Fri, 26 Oct 2018 14:02:06 +0000 (15:02 +0100)]
anv/lower_ycbcr: make sure to set 0s on all components
To play around with debugging, we might want to disable one or the
other component. Having 0s as default values makes this work.
Otherwise we might have NULL components, leading to crashes.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Thu, 1 Nov 2018 16:53:48 +0000 (16:53 +0000)]
anv/image: remove unused parameter
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Thu, 25 Oct 2018 17:35:32 +0000 (18:35 +0100)]
anv: simplify internal address offset
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Engestrom [Thu, 11 Oct 2018 15:00:04 +0000 (16:00 +0100)]
meson: fix wayland-less builds
Those empty variables in the !wayland case are useless and running that
meson.build with them breaks the build:
[287/850] Generating wayland-drm-client-protocol.h with a custom command.
FAILED: src/egl/wayland/wayland-drm/wayland-drm-client-protocol.h
client-header ../src/egl/wayland/wayland-drm/wayland-drm.xml src/egl/wayland/wayland-drm/wayland-drm-client-protocol.h
/bin/sh: client-header: command not found
ninja: build stopped: subcommand failed.
Fixes:
d1992255bb29054fa5176 "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Thu, 11 Oct 2018 15:27:07 +0000 (16:27 +0100)]
gbm: remove unnecessary meson include
`inc_wayland_drm` is only used if wayland is built, and it's already
added in that case a few lines below.
Fixes:
a29869e8720b385d3692f "gbm: Don't traverse backwards for includes"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Thu, 11 Oct 2018 15:21:14 +0000 (16:21 +0100)]
meson: only run vulkan's meson.build when building vulkan
Fixes:
d1992255bb29054fa5176 "meson: Add build Intel "anv" vulkan driver"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Mon, 12 Nov 2018 14:17:35 +0000 (14:17 +0000)]
xmlpool: update translation po files
These files are close to 4 years out of date; a lot's changed since.
Let's just check in a recently-regenerated version.
Changes generated by running `ninja xmlpool-{pot,update-po,gmo}`.
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Wed, 31 Oct 2018 11:09:33 +0000 (11:09 +0000)]
REVIEWERS: add Vulkan reviewer group
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Eric Engestrom [Wed, 31 Oct 2018 11:08:22 +0000 (11:08 +0000)]
REVIEWERS: add Emil as EGL reviewer
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Eric Engestrom [Wed, 31 Oct 2018 11:08:01 +0000 (11:08 +0000)]
REVIEWERS: add include path for EGL
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:12 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen11)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
v4: Added missing engine definition to MI_TOPOLOGY_FILTER.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:11 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen10)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
v4: Added missing engine definition to MI_TOPOLOGY_FILTER.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:10 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen9)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
v4: Added more missing engine definitions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:09 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen8)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
v4: Added missing engine tag for MI_TOPOLOGY_FILTER and MI_LOAD_URB_MEM.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:08 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen75)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:07 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen7)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:06 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen6)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions
v4: Added missing engine to MEDIA_GATEWAY_STATE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:05 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen5)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:04 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen45)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added addition engine definitions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 15:23:03 +0000 (17:23 +0200)]
intel/genxml: Add engine definition to render engine instructions (gen4)
Instructions meant for the render engine now have a definition specifying that
so that can differentiate instructions meant for different engines due to shared
opcodes.
v2: Divided into individual patches for each gen
v3: Added additional engine definitions.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Wed, 7 Nov 2018 14:50:32 +0000 (16:50 +0200)]
intel/decoder: tools: Use engine for decoding batch instructions
The engine to which the batch was sent to is now set to the decoder context when
decoding the batch. This is needed so that we can distinguish between
instructions as the render and video pipe share some of the instruction opcodes.
v2: The engine is now in the decoder context and the batch decoder uses a local
function for finding the instruction for an engine.
v3: Spec uses engine_mask now instead of engine, replaced engine class enums
with the definitions from UAPI.
v4: Fix up aubinator_viewer (Lionel)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 12:41:01 +0000 (14:41 +0200)]
intel/decoder: tools: gen_engine to drm_i915_gem_engine_class
Removed the gen_engine enum and changed the involved functions to use the
drm_i915_gem_engine_class enum from UAPI instead.
v3: Wrong engine was being used for blocks in video ring
v4: Fixed aubinator_viewer.cpp
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Toni Lönnberg [Thu, 8 Nov 2018 12:48:20 +0000 (14:48 +0200)]
intel/decoder: Engine parameter for instructions
Preliminary work for adding handling of different pipes to gen_decoder. Each
instruction needs to have a definition describing which engine it is meant for.
If left undefined, by default, the instruction is defined for all engines.
v2: Changed to use the engine class definitions from UAPI
v3: Changed I915_ENGINE_CLASS_TO_MASK to use BITSET_BIT, change engine to
engine_mask, added check for incorrect engine and added the possibility to
define an instruction to multiple engines using the "|" as a delimiter in the
engine attribute.
v4: Fixed the memory leak.
v5: Removed an unnecessary ralloc_free().
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Gert Wollny [Wed, 12 Sep 2018 09:59:35 +0000 (11:59 +0200)]
virgl: Add command and flags to initiate debugging on the host (v2)
On the host VREND_DEBUG=guestallow must be set to let the guest override
the debug flags.
v2: Send flag string instead of flags, this avoids the need to keep
the flags in sync.
v3: Only request host logging if the host actually understands the command
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Gert Wollny [Mon, 12 Nov 2018 11:34:26 +0000 (12:34 +0100)]
mesa: Reference count shaders that are used by transform feedback objects
Transform feedback objects may hold a pointer to a shader program, and
at least in Gallium, this must be a valid pointer until
ctx->Driver.EndTransformFeedback in glEndTransformFeedback has been called
- which is conform with the spec that any program that is part of a
current rendering state should only be flagged for deletion by glDeleteProgram.
This was not handled properly for the transform feedback objects so that
a call sequence
glUseProgram(x)
glBeginTransformFreedback(...)
glPauseTransformFeedback(...)
glDeleteProgram(x)
glEndTransformFeedback(...)
would result in a use after free bug. With this patch the transform
feedback object also updates the reference count to the used program
thereby keeping the program valid as long as the transform feedback
objects links to it.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108713
Fixes:
654587696b4234d09a6b471b70e9629cf2887c27
mesa: add end_transform_feedback() helper
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Mon, 12 Nov 2018 08:46:14 +0000 (09:46 +0100)]
radv: set optimal OVERWRITE_COMBINER_WATERMARK on GFX9
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 12 Nov 2018 20:59:29 +0000 (21:59 +0100)]
radv: set PA.SC_CONSERVATIVE_RASTERIZATION.NULL_SQUAD_AA_MASK_ENABLE
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 12 Nov 2018 10:37:20 +0000 (11:37 +0100)]
radv: binding streamout buffers doesn't change context regs
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Plamena Manolova [Sun, 11 Nov 2018 20:30:09 +0000 (22:30 +0200)]
nir: Don't lower the local work group size if it's variable.
If the local work group size is variable it won't be available
at compile time so we can't lower it in nir_lower_system_values().
Signed-off-by: Plamena Manolova <plamena.n.manolova@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Matt Turner [Sun, 11 Nov 2018 21:44:41 +0000 (13:44 -0800)]
util/ralloc: Make sizeof(linear_header) a multiple of 8
Prior to this patch sizeof(linear_header) was 20 bytes in a
non-debug build on 32-bit platforms. We do some pointer arithmetic to
calculate the next available location with
ptr = (linear_size_chunk *)((char *)&latest[1] + latest->offset);
in linear_alloc_child(). The &latest[1] adds 20 bytes, so an allocation
would only be 4-byte aligned.
On 32-bit SPARC a 'sttw' instruction (which stores a consecutive pair of
4-byte registers to memory) requires an 8-byte aligned address. Such an
instruction is used to store to an 8-byte integer type, like intmax_t
which is used in glcpp's expression_value_t struct.
As a result of the 4-byte alignment returned by linear_alloc_child() we
would generate a SIGBUS (unaligned exception) on SPARC.
According to the GNU libc manual malloc() always returns memory that has
at least an alignment of 8-bytes [1]. I think our allocator should do
the same.
So, simple fix with two parts:
(1) Increase SUBALLOC_ALIGNMENT to 8 unconditionally.
(2) Mark linear_header with an aligned attribute, which will cause
its sizeof to be rounded up to that alignment. (We already do
this for ralloc_header)
With this done, all Mesa's unit tests now pass on SPARC.
[1] https://www.gnu.org/software/libc/manual/html_node/Aligned-Memory-Blocks.html
Fixes:
47e17586924f ("glcpp: use the linear allocator for most objects")
Bug: https://bugs.gentoo.org/636326
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Sun, 11 Nov 2018 21:36:29 +0000 (13:36 -0800)]
util/ralloc: Switch from DEBUG to NDEBUG
The debug code is all asserts, so protect it with the same thing that
controls assert.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Thu, 8 Nov 2018 04:45:34 +0000 (15:45 +1100)]
nir: add support for removing redundant stores to copy prop var
For example the following type of thing is seen in TCS from
a number of Vulkan and DXVK games:
vec1 32 ssa_557 = deref_var &oPatch (shader_out float)
vec1 32 ssa_558 = intrinsic load_deref (ssa_557) ()
vec1 32 ssa_559 = deref_var &oPatch@42 (shader_out float)
vec1 32 ssa_560 = intrinsic load_deref (ssa_559) ()
vec1 32 ssa_561 = deref_var &oPatch@43 (shader_out float)
vec1 32 ssa_562 = intrinsic load_deref (ssa_561) ()
intrinsic store_deref (ssa_557, ssa_558) (1) /* wrmask=x */
intrinsic store_deref (ssa_559, ssa_560) (1) /* wrmask=x */
intrinsic store_deref (ssa_561, ssa_562) (1) /* wrmask=x */
No shader-db changes on i965 (SKL).
vkpipeline-db results RADV (VEGA):
Totals from affected shaders:
SGPRS: 7832 -> 7728 (-1.33 %)
VGPRS: 6476 -> 6740 (4.08 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 469572 -> 456596 (-2.76 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 989 -> 960 (-2.93 %)
Wait states: 0 -> 0 (0.00 %)
The Max Waves and VGPRS changes here are misleading. What is
happening is a bunch of TCS outputs are being optimised away as
they are now recognised as unused. This results in more varyings
being compacted via nir_compact_varyings() which can result in
more register pressure when they are not packed in an optimal way.
This is an existing problem independent of this patch. I've run
some benchmarks and haven't noticed any performance regressions
in affected games.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Timothy Arceri [Wed, 7 Nov 2018 03:29:18 +0000 (14:29 +1100)]
anv/i965: make use of nir_link_constant_varyings()
shader-db results for SLK:
total instructions in shared programs:
13106498 ->
13091573 (-0.11%)
instructions in affected programs:
1186244 ->
1171319 (-1.26%)
helped: 6186
HURT: 0
total cycles in shared programs:
332062633 ->
331961653 (-0.03%)
cycles in affected programs:
8537165 ->
8436185 (-1.18%)
helped: 5371
HURT: 862
LOST: 6
GAINED: 14
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Anholt [Mon, 29 Oct 2018 16:28:00 +0000 (09:28 -0700)]
egl: Improve the debugging of gbm format matching in DRI configs.
Previously the debug would be:
libEGL debug: No DRI config supports native format 0x20203852
libEGL debug: No DRI config supports native format 0x38385247
but
libEGL debug: No DRI config supports native format R8
libEGL debug: No DRI config supports native format GR88
is a lot easier to understand.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Eric Anholt [Fri, 2 Nov 2018 21:35:06 +0000 (14:35 -0700)]
gbm: Introduce a helper function for printing GBM format names.
This requires that the caller make a little (stack) allocation to store
the string.
v2: Use gbm_format_canonicalize (suggested by Daniel)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Eric Anholt [Thu, 8 Nov 2018 17:57:32 +0000 (09:57 -0800)]
gbm: Move gbm_format_canonicalize() to the core.
I want it for the format name debugging code.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Dylan Baker [Fri, 9 Nov 2018 20:56:00 +0000 (12:56 -0800)]
meson: fix libatomic tests
There are two problems:
1) the extra underscore in MISSING_64BIT_ATOMICS
2) we should link with libatomic if the previous test decided we needed
it
Fixes:
d1992255bb29054fa51763376d125183a9f602f3
("meson: Add build Intel "anv" vulkan driver")
Reviewed-and-Tested-by: Matt Turner <mattst88@gmail.com>
Marek Olšák [Fri, 9 Nov 2018 21:47:46 +0000 (16:47 -0500)]
mesa: mark GL_SR8_EXT non-renderable on GLES
Fixes: dEQP-GLES3.functional.fbo.completeness.renderable.texture.color0.sr8_ext
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Mon, 12 Nov 2018 20:43:58 +0000 (15:43 -0500)]
st/mesa: disable L3 thread pinning
This implementation can have massive drawbacks.
Cc: 18.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Christian Gmeiner [Sat, 1 Sep 2018 19:15:27 +0000 (21:15 +0200)]
nir: add lowering for ffloor
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Alyssa Rosenzweig [Sun, 11 Nov 2018 19:09:40 +0000 (11:09 -0800)]
util: Fix warning in u_cpu_detect on non-x86
regs is only set and used on x86; on other platforms (like ARM), this
code causes a trivial warning, solved by moving the regs declaration to
the architecture-dependent usage.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Dylan Baker [Fri, 9 Nov 2018 21:27:56 +0000 (13:27 -0800)]
meson: Don't set -Wall
meson does this for you with its warn levels, so we don't need to set
it ourselves.
Fixes:
d1992255bb29054fa51763376d125183a9f602f3
("meson: Add build Intel "anv" vulkan driver")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Rob Clark [Sun, 11 Nov 2018 15:41:52 +0000 (10:41 -0500)]
freedreno/drm: fix unused 'entry' warnings
Looks like importing libdrm_freedreno into mesa crossed paths with
e27902a2613.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Lionel Landwerlin [Thu, 8 Nov 2018 17:26:36 +0000 (17:26 +0000)]
i965: add support for sampling from AYUV
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Lionel Landwerlin [Thu, 8 Nov 2018 17:28:20 +0000 (17:28 +0000)]
dri: add AYUV format
v2: Add a AYUV entry android in the android backend (Tapani)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Lionel Landwerlin [Thu, 8 Nov 2018 16:28:20 +0000 (16:28 +0000)]
nir/lower_tex: Add AYUV lowering support
Byte ordering is :
0: V
1: U
2: Y
3: A
v2: Split refactoring of alpha channel (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v2)
Lionel Landwerlin [Fri, 9 Nov 2018 10:33:37 +0000 (10:33 +0000)]
nir/lower_tex: add alpha channel parameter for yuv lowering
We're about to introduce AYUV support which provides its own alpha
channel. So give alpha as a parameter and set it to 1 on exising
formats.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Samuel Pitoiset [Thu, 8 Nov 2018 13:48:31 +0000 (14:48 +0100)]
radv: make use of num_good_cu_per_sh in si_emit_graphics() too
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 8 Nov 2018 13:00:36 +0000 (14:00 +0100)]
radv: clean up setting partial_es_wave for distributed tess on VI
Only needed when the pipeline actually uses tessellation. I don't
think that changes anything, except improving readability.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 8 Nov 2018 13:00:35 +0000 (14:00 +0100)]
radv: cleanup and document a Hawaii bug with offchip buffers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Hanno Böck [Wed, 7 Nov 2018 08:01:42 +0000 (09:01 +0100)]
glsl/test: Fix use after free in test_optpass.
The variable state is free'd and afterwards state->error is used
as the return value, resulting in a use after free bug detected
by memory safety tools like address sanitizer.
Signed-off-by: Hanno Böck <hanno@hboeck.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108636
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Timothy Arceri [Mon, 12 Nov 2018 02:25:27 +0000 (13:25 +1100)]
nir: don't pack varyings ints with floats unless flat
Fixes:
1c9c42d16b4c ("nir: add varying component packing helpers")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Timothy Arceri [Mon, 12 Nov 2018 02:24:42 +0000 (13:24 +1100)]
nir: add glsl_type_is_integer() helper
Fixes:
1c9c42d16b4c ("nir: add varying component packing helpers")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Francisco Jerez [Thu, 8 Nov 2018 22:03:24 +0000 (14:03 -0800)]
intel/fs: Prevent emission of IR instructions not aligned to their own execution size.
This can occur during payload setup of SIMD-split send message
instructions, which can lead to the emission of header setup
instructions with a non-zero channel group and fixed SIMD width. Such
instructions could end up using undefined channel enable signals
except they don't care since they're always marked force_writemask_all.
Not known to affect correctness of any workload at this point, but it
would be trivial to back-port to stable if something comes up.
Reported-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Sagar Ghuge <sagar.ghuge@intel.com>
Timothy Arceri [Fri, 9 Nov 2018 22:20:10 +0000 (09:20 +1100)]
st/mesa: make use of nir_link_constant_varyings()
Shader-db results radeonsi (VEGA):
Totals from affected shaders:
SGPRS: 161464 -> 161368 (-0.06 %)
VGPRS: 86904 -> 86292 (-0.70 %)
Spilled SGPRs: 296 -> 314 (6.08 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size:
3618596 ->
3573852 (-1.24 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 26189 -> 26276 (0.33 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Thu, 8 Nov 2018 22:24:11 +0000 (09:24 +1100)]
nir: add new linking opt nir_link_constant_varyings()
This pass moves constant outputs to the consuming shader stage
where possible.
Reviewed-by: Eric Anholt <eric@anholt.net>
Andre Heider [Tue, 6 Nov 2018 08:27:14 +0000 (09:27 +0100)]
st/nine: clean up thead shutdown sequence a bit
Just break out of the loop instead, it does the same thing.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Andre Heider [Tue, 6 Nov 2018 08:27:13 +0000 (09:27 +0100)]
st/nine: plug thread related leaks
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Andre Heider [Tue, 6 Nov 2018 08:27:12 +0000 (09:27 +0100)]
st/nine: fix stack corruption due to ABI mismatch
This fixes various crashes and hangs when using nine's 'thread_submit'
feature.
On 64bit, the thread function's data argument would just be NULL.
On 32bit, the data argument would be garbage depending on the compiler
flags (in my case -march>=core2).
Fixes:
f3fa7e3068512d ("st/nine: Use WINE thread for threadpool")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Marek Olšák [Fri, 2 Nov 2018 20:09:13 +0000 (16:09 -0400)]
radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET only
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>