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Alex Deucher [Tue, 9 May 2017 16:27:35 +0000 (12:27 -0400)]
drm/amdgpu: add raven gpu_info support
Add support for parsing the gpu info table on raven.
This is required to get the gpu config data for raven.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 15 May 2017 10:08:18 +0000 (18:08 +0800)]
drm/amdgpu: correct emit frame size for vcn dec/enc ring
only mmhub will be invalidated during vcn dec/enc vm flush
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 15 May 2017 09:03:02 +0000 (17:03 +0800)]
drm/amdgpu: correct vmhub for vcn dec/enc ring
This got missed due to differences in the trees
when raven support was merged.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: ken wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kbuild test robot [Thu, 11 May 2017 01:30:28 +0000 (09:30 +0800)]
drm/amd/powerplay: fix array_size.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:75:42-43: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:466:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:468:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:470:20-21: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:473:22-23: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:475:21-22: WARNING: Use ARRAY_SIZE
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/rv_hwmgr.c:477:21-22: WARNING: Use ARRAY_SIZE
Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element
Semantic patch information:
This makes an effort to find cases where ARRAY_SIZE can be used such as
where there is a division of sizeof the array by the sizeof its first
element or by any indexed element or the element type. It replaces the
division of the two sizeofs by ARRAY_SIZE.
Generated by: scripts/coccinelle/misc/array_size.cocci
CC: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 11 May 2017 20:44:56 +0000 (16:44 -0400)]
drm/amdgpu/vcn: remove duplicate mask
Looks like a copy past issue.
Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 11 May 2017 20:31:52 +0000 (16:31 -0400)]
drm/amdgpu: add RAVEN pci id (v2)
Add the RAVEN pci id.
v2: add exp flag for now (Alex)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Wed, 1 Feb 2017 15:12:19 +0000 (10:12 -0500)]
drm/amd: Add DCN ivsrcids (v2)
v2: squash in some updates (Alex)
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 11 May 2017 20:30:31 +0000 (16:30 -0400)]
drm/amdgpu/powerplay/raven: add smu block and enable powerplay
Add the ip block and enable powerplay on raven.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 14 Mar 2017 21:57:35 +0000 (17:57 -0400)]
drm/amdgpu/raven: power up/down VCN via the SMU (v2)
By default VCN is powered down like SDMA, power it up/down
on driver load/unload.
[Rui: Fix to add the parameter 0 to un-gate VCN] v2
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Fri, 10 Mar 2017 06:48:09 +0000 (14:48 +0800)]
drm/amd/powerplay/rv: power up/down sdma via the SMU
sdma is powered down by default in vbios,
need to power up in driver init. Power it down
again on driver tear down.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 11 May 2017 20:38:38 +0000 (16:38 -0400)]
drm/amd/powerplay: add raven support in hwmgr. (v2)
hwmgr handles the GPU power state management.
v2: squash in updates (Alex)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 6 Mar 2017 11:10:08 +0000 (19:10 +0800)]
drm/amd/powerplay: add raven support in smumgr. (v2)
smumgr provides the interface for interacting with the
smu firmware which handles power management.
v2: squash in updates (Alex)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Sun, 5 Feb 2017 10:50:22 +0000 (18:50 +0800)]
drm/amd/powerplay: add ppt_v3 define
defines clock dependencies for raven.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Sun, 5 Feb 2017 06:53:36 +0000 (14:53 +0800)]
drm/amdgpu: add raven related define in pptable.h.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Sat, 4 Feb 2017 06:24:02 +0000 (14:24 +0800)]
drm/amdgpu/powerplay: add header file for smu10. (v2)
Headers define the driver/fw interface for smu10.
v2: squash in updates (Alex)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 20 Apr 2017 02:18:13 +0000 (10:18 +0800)]
drm/amdgpu: enable sw clock gating for vcn
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 20 Apr 2017 01:42:41 +0000 (09:42 +0800)]
drm/amdgpu/vcn: add sw clock gating
Add sw controlled clockgating for VCN.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 30 Mar 2017 16:00:25 +0000 (12:00 -0400)]
drm/amdgpu: update vcn decode create msg
Based on new vcn firmware interface changes
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 29 Mar 2017 18:15:15 +0000 (14:15 -0400)]
drm/amdgpu: add vcn firmware header offset
New firmware add psp header.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 21 Feb 2017 16:24:09 +0000 (11:24 -0500)]
drm/amdgpu: get cs support for AMDGPU_HW_IP_VCN_ENC
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 21 Feb 2017 16:23:28 +0000 (11:23 -0500)]
drm/amdgpu: add AMDGPU_HW_IP_VCN_ENC to info query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 8 May 2017 21:31:31 +0000 (17:31 -0400)]
drm/amdgpu: add vcn enc ib test
Update and enable the vcn encode IB test.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 21 Feb 2017 15:38:42 +0000 (10:38 -0500)]
drm/amdgpu: enable vcn encode ring tests
Wire up the callback and enable them.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 21 Feb 2017 20:19:18 +0000 (15:19 -0500)]
drm/amdgpu: add vcn enc irq support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 21 Feb 2017 15:36:15 +0000 (10:36 -0500)]
drm/amdgpu: add vcn enc ring type and functions
Add the ring function callbacks for the encode rings.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 21 Feb 2017 20:21:18 +0000 (15:21 -0500)]
drm/amdgpu: add vcn enc rings
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 15 Feb 2017 15:16:25 +0000 (10:16 -0500)]
drm/amdgpu: change vcn dec rb command specific for decode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 28 Dec 2016 18:36:00 +0000 (13:36 -0500)]
drm/amdgpu: add vcn ip block to soc15
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 7 Feb 2017 21:11:20 +0000 (16:11 -0500)]
drm/amdgpu: implement new vcn cache window programming
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Sun, 5 Feb 2017 20:19:57 +0000 (15:19 -0500)]
drm/amdgpu: Disable uvd and vce free handles for raven
Not required on raven.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 25 Jan 2017 20:05:53 +0000 (15:05 -0500)]
drm/amdgpu: get cs support of AMDGPU_HW_IP_VCN_DEC
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 25 Jan 2017 20:04:20 +0000 (15:04 -0500)]
drm/amdgpu: add AMDGPU_HW_IP_VCN_DEC to info query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 15 Feb 2017 15:24:55 +0000 (10:24 -0500)]
uapi/drm: add AMDGPU_HW_IP_VCN_ENC for encode CS
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 7 Feb 2017 16:57:08 +0000 (11:57 -0500)]
uapi/drm: add AMDGPU_HW_IP_VCN_DEC for decode CS
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Sun, 5 Feb 2017 17:40:30 +0000 (12:40 -0500)]
drm/amdgpu/vcn: implement ib tests with new message buffer interface
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 25 Jan 2017 19:37:41 +0000 (14:37 -0500)]
drm/amdgpu: implement insert end ring function for vcn decode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 7 Feb 2017 16:52:00 +0000 (11:52 -0500)]
drm/amdgpu: implement vcn start RB command
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 11 May 2017 20:29:08 +0000 (16:29 -0400)]
drm/amdgpu: add a ring func for vcn start command
Needed for the proper command sequence for VCN.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 7 Feb 2017 16:47:12 +0000 (11:47 -0500)]
drm/amdgpu: expose vcn RB command
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 6 Feb 2017 16:52:46 +0000 (11:52 -0500)]
drm/amdgpu: move vcn ring test to amdgpu_vcn.c
Hope it will be generic for vcn later
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 6 Feb 2017 15:52:46 +0000 (10:52 -0500)]
drm/amdgpu: re-group the functions in amdgpu_vcn.c
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 11 May 2017 20:27:33 +0000 (16:27 -0400)]
drm/amdgpu: move amdgpu_vcn structure to vcn header
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 28 Dec 2016 18:04:16 +0000 (13:04 -0500)]
drm/amdgpu: add vcn ip block and type
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 28 Dec 2016 18:22:18 +0000 (13:22 -0500)]
drm/amdgpu: add vcn irq functions
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 5 May 2017 15:40:59 +0000 (11:40 -0400)]
drm/amdgpu: add vcn decode ring type and functions
Add the ring function callbacks for the decode ring.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 28 Dec 2016 17:16:48 +0000 (12:16 -0500)]
drm/amdgpu: add vcn decode ring support
Add the decode ring init.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 28 Dec 2016 16:57:38 +0000 (11:57 -0500)]
drm/amdgpu: add vcn ip block functions (v2)
Fill in the core VCN 1.0 setup functionality.
v2: squash in fixup (Alex)
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 21 Dec 2016 18:56:44 +0000 (13:56 -0500)]
drm/amdgpu: add encode tests for vcn
Add encode ring and ib tests.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Wed, 21 Dec 2016 18:21:52 +0000 (13:21 -0500)]
drm/amdgpu: add initial vcn support and decode tests
VCN is the new media block on Raven. Add core support
and the ring and ib tests for decode.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 11 May 2017 20:26:16 +0000 (16:26 -0400)]
drm/amdgpu/soc15: add psp ip block
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 16 Dec 2016 02:08:48 +0000 (10:08 +0800)]
drm/amdgpu: register the psp v10 function pointers at psp sw_init
Add the psp 10.0 callbacks for PSP.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 16 Dec 2016 02:01:55 +0000 (10:01 +0800)]
drm/amdgpu: add psp v10 ip block
Add the ip block version structure for psp 10.0.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 4 May 2017 19:28:30 +0000 (15:28 -0400)]
drm/amdgpu: add psp v10 function callback for raven
PSP is the security processor. These are the support
functions.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 27 Feb 2017 06:01:55 +0000 (14:01 +0800)]
drm/amdgpu: add nbio MGCG for raven
Add medium grained nbio clockgating implementation.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 May 2017 19:06:25 +0000 (15:06 -0400)]
drm/amdgpu: apply nbio7 for Raven (v3)
nbio handles misc bus io operations. Handle
differences between different nbio bus versions.
v2: switch checks from RAVEN to APU (Alex)
squash in raven rev id fetch
squash in fix uninitalized hdp flush reg index for raven
v3: add some missed RAVEN to APU checks (Alex)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 May 2017 18:59:54 +0000 (14:59 -0400)]
drm/amdgpu: add nbio7 support
NBIO handles misc bus io functions on the chip. This
helper lib has the apppropriate functions for NBIO 7.0.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 5 May 2017 18:29:42 +0000 (14:29 -0400)]
drm/amdgpu: enable sdma power gating for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 28 Feb 2017 08:13:32 +0000 (16:13 +0800)]
drm/amdgpu/sdma4: add dynamic power gating for raven
Add the functions to enable dynamic powergating.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 28 Feb 2017 08:07:48 +0000 (16:07 +0800)]
drm/amdgpu: init sdma power gating for raven
Initialize sdma for powergating.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 5 May 2017 18:28:27 +0000 (14:28 -0400)]
drm/amdgpu: enable sdma v4 MGCG and LS for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 17 Jan 2017 07:09:37 +0000 (15:09 +0800)]
drm/amdgpu: reuse sdma v4 MGCG and LS function for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 05:56:16 +0000 (13:56 +0800)]
drm/amdgpu: add Raven sdma golden setting and chip id case
Add golden settings for SDMA.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 5 May 2017 18:27:23 +0000 (14:27 -0400)]
drm/amdgpu: enable MC MGCG and LS for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 8 Feb 2017 09:07:59 +0000 (17:07 +0800)]
drm/amdgpu: add raven clock gating and light sleep for mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 16 Jan 2017 02:45:50 +0000 (10:45 +0800)]
drm/amdgpu/gmc9: change fb offset sequence so that used wider
Initialize the values earlier.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 15 Dec 2016 03:15:27 +0000 (11:15 +0800)]
drm/amdgpu/gmc9: set mc vm fb offset for raven
APU fb offset is set by sbios, which is different with DGPU.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 03:28:45 +0000 (11:28 +0800)]
drm/amdgpu: add raven case for gmc9 golden setting
Golden settings for GMC9.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 13 Feb 2017 10:45:28 +0000 (18:45 +0800)]
drm/amdgpu/gfx9: allow updating gfx mgpg state
Wire up the functions to control medium grained
powergating.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 13 Feb 2017 10:40:45 +0000 (18:40 +0800)]
drm/amdgpu/gfx9: allow updating gfx cgpg state
Wire up the enable functions to enable coarse
grained powegating.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 13 Feb 2017 10:00:43 +0000 (18:00 +0800)]
drm/amdgpu/gfx9: allow updating sck slowdown and cp pg state
More stuff for gfx pg.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 10 Feb 2017 07:47:28 +0000 (15:47 +0800)]
drm/amdgpu/gfx9: add enable/disable funcs for cp power gating
Used to enable/disable cp powergating.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 10 Feb 2017 07:36:34 +0000 (15:36 +0800)]
drm/amdgpu/gfx9: enable/disable sck slowdown thru rlc-smu handshake
Required for proper powergating operation.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 10 Feb 2017 07:13:17 +0000 (15:13 +0800)]
drm/amdgpu: init gfx power gating on raven
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 10 Feb 2017 06:37:03 +0000 (14:37 +0800)]
drm/amdgpu/gfx9: rlc save&restore list programming
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 13 Feb 2017 05:55:23 +0000 (13:55 +0800)]
drm/amdgpu/gfx9: add rlc bo init/fini
setup the save and restore buffers used for gfx
powergating.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 9 Feb 2017 09:11:54 +0000 (17:11 +0800)]
drm/amdgpu: correct gfx9 csb size
programming pa_sc_raster_config/config1 reg is removed from gfx9 csb
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 9 Feb 2017 06:48:08 +0000 (14:48 +0800)]
drm/amdgpu/gfx9: enable cp interrupt for CGCG/CGLS/MGCG
Required for proper handshaking between the GFX and RLC.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Wed, 8 Feb 2017 10:17:44 +0000 (18:17 +0800)]
drm/amdgpu/gfx9: extend rlc fw setup
Required for gfx powergating.
Change-Id: I5a2f8f41253686d8bb776a92aa68bf90877ebaa8
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 10 Jan 2017 03:04:25 +0000 (11:04 +0800)]
drm/amdgpu: add gfx clock gating for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 03:06:11 +0000 (11:06 +0800)]
drm/amdgpu/gfx9: add raven gfx config
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 02:49:37 +0000 (10:49 +0800)]
drm/amdgpu/gfx9: add chip name for raven when initializing microcode
Fetch the correct ucode for raven.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 02:41:58 +0000 (10:41 +0800)]
drm/amdgpu: add gc9.1 golden setting (v2)
Add the GFX9 golden settings.
v2: squash in updates
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Tue, 13 Dec 2016 07:58:33 +0000 (15:58 +0800)]
drm/amdgpu: add module firmware for raven
Fetch correct firmware for raven for gfx and sdma.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 May 2017 18:54:46 +0000 (14:54 -0400)]
drm/amdgpu: add Raven chip id case for ucode
Set the appropriate ucode loading mechanism. Set to
direct for now.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 18 Jan 2017 10:14:08 +0000 (18:14 +0800)]
drm/amdgpu: enable soc15 clock gating flags for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 18 Jan 2017 10:12:59 +0000 (18:12 +0800)]
drm/amdgpu/soc15: add clock gating functions for raven
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Tue, 27 Dec 2016 13:02:48 +0000 (21:02 +0800)]
drm/amd/amdgpu: fill in raven case in soc15 early init
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 02:16:00 +0000 (10:16 +0800)]
drm/amdgpu/soc15: add Raven golden setting
Add the common golden settings for Raven.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 8 Dec 2016 02:09:13 +0000 (10:09 +0800)]
drm/amdgpu: add Raven ip blocks (v2)
Add the IP blocks for RAVEN.
v2: drop DC for upstream (Alex)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 7 Dec 2016 09:31:19 +0000 (17:31 +0800)]
drm/amdgpu: add RAVEN family id definition
RAVEN is a new APU.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:09:18 +0000 (13:09 -0400)]
drm/amdgpu: add register headers for VCN 1.0
Add registers for Video Controller Next 1.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:08:39 +0000 (13:08 -0400)]
drm/amdgpu: add register headers for THM 10.0
Add registers for THerMal control 10.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:07:58 +0000 (13:07 -0400)]
drm/amdgpu: add register headers for SDMA 4.1
Add registers for SDMA 4.1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:06:58 +0000 (13:06 -0400)]
drm/amdgpu: add register headers for NBIO 7.0
Add registers for NBIO 7.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:05:53 +0000 (13:05 -0400)]
drm/amdgpu: add register headers for MP 10.0
Add registers for MP 10.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:04:55 +0000 (13:04 -0400)]
drm/amdgpu: add register headers for MMHUB 9.1
Add registers for the MultiMedia Hub 9.1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:02:36 +0000 (13:02 -0400)]
drm/amdgpu: add register headers for GC 9.1
Registers for Graphics Controller 9.1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 4 May 2017 17:01:35 +0000 (13:01 -0400)]
drm/amdgpu: add register headers for DCN 1.0
Registers for Display Controller Next 1.0
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 11 May 2017 05:59:15 +0000 (13:59 +0800)]
drm/amdgpu:use job's list instead of check fence
because if the fence is really signaled, it could already
released so the fence pointer is a wild pointer, but if
we use job->base.node we are safe because job will not
be released untill amdgpu_job_timedout finished.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 11 May 2017 05:36:44 +0000 (13:36 +0800)]
drm/amdgpu/SRIOV:implement guilty job TDR for(V2)
1,TDR will kickout guilty job if it hang exceed the threshold
of the given one from kernel paramter "job_hang_limit", that
way a bad command stream will not infinitly cause GPU hang.
by default this threshold is 1 so a job will be kicked out
after it hang.
2,if a job timeout TDR routine will not reset all sched/ring,
instead if will only reset on the givn one which is indicated
by @job of amdgpu_sriov_gpu_reset, that way we don't need to
reset and recover each sched/ring if we already know which job
cause GPU hang.
3,unblock sriov_gpu_reset for AI family.
V2:
1:put kickout guilty job after sched parked.
2:since parking scheduler prior to kickout already occupies a
while, we can do last check on the in question job before
doing hw_reset.
TODO:
1:when a job is considered as guilty, we should mark some flag
in its fence status flag, and let UMD side aware that this
fence signaling is not due to job complete but job hang.
2:if gpu reset cause all video memory lost, we need introduce
a new policy to implement TDR, like drop all jobs not yet
signaled, and all IOCTL on this device will return ERROR
DEVICE_LOST.
this will be implemented later.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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