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Peter Maydell [Fri, 19 Oct 2018 09:08:31 +0000 (10:08 +0100)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-october-2018-part1-v2' into staging
MIPS queue October 2018, part1, v2
# gpg: Signature made Thu 18 Oct 2018 19:39:00 BST
# gpg: using RSA key
D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-october-2018-part1-v2: (28 commits)
target/mips: Add opcodes for nanoMIPS EVA instructions
target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH
target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S>
target/mips: Implement hardware page table walker for MIPS32
target/mips: Add reset state for PWSize and PWField registers
target/mips: Add CP0 PWCtl register
target/mips: Add CP0 PWSize register
target/mips: Add CP0 PWField register
target/mips: Add CP0 PWBase register
target/mips: Add CP0 Config2 to DisasContext
target/mips: Improve DSP R2/R3-related naming
target/mips: Add availability control for DSP R3 ASE
target/mips: Add bit definitions for DSP R3 ASE
target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags)
target/mips: Increase 'supported ISAs/ASEs' flag holder size
target/mips: Add opcode values of MXU ASE
target/mips: Add organizational chart of MXU ASE
target/mips: Add assembler mnemonics list for MXU ASE
target/mips: Add basic description of MXU ASE
target/mips: Add a comment before each CP0 register section in cpu.h
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Dimitrije Nikolic [Wed, 3 Oct 2018 13:10:45 +0000 (15:10 +0200)]
target/mips: Add opcodes for nanoMIPS EVA instructions
Add opcodes for nanoMIPS EVA instructions: CACHEE, LBE, LBUE, LHE,
LHUE, LLE, LLWPE, LWE, PREFE, SBE, SCE, SCWPE, SHE, SWE.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Dimitrije Nikolic <dnikolic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Tue, 16 Oct 2018 14:41:19 +0000 (16:41 +0200)]
target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH
Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by
Coverity (CID
1395627).
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Matthew Fortune [Mon, 8 Oct 2018 15:42:48 +0000 (17:42 +0200)]
target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S>
Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S> instructions.
Their handling was permuted.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Matthew Fortune <matthew.fortune@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Yongbok Kim [Tue, 9 Oct 2018 16:54:46 +0000 (18:54 +0200)]
target/mips: Implement hardware page table walker for MIPS32
Implement hardware page table walker. This implementation is
limiter only to MIPS32.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Yongbok Kim [Fri, 12 Oct 2018 12:05:25 +0000 (14:05 +0200)]
target/mips: Add reset state for PWSize and PWField registers
Add reset state for PWSize and PWField registers. The reset state
is different for pre-R6 and R6 (and post-R6) ISAa.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Yongbok Kim [Tue, 9 Oct 2018 15:40:40 +0000 (17:40 +0200)]
target/mips: Add CP0 PWCtl register
Add PWCtl register (CP0 Register 5, Select 6).
The PWCtl register configures hardware page table walking for TLB
refills.
This register is required for the hardware page walker feature. It
exists only if Config3 PW bit is set to 1. It contains following
fields:
PWEn (31) - Hardware Page Table walker enable
PWDirExt (30) - If 1, 4-th level implemented (MIPS64 only)
XK (28) - If 1, walker handles xkseg (MIPS64 only)
XS (27) - If 1, walker handles xsseg (MIPS64 only)
XU (26) - If 1, walker handles xuseg (MIPS64 only)
DPH (7) - Dual Page format of Huge Page support
HugePg (6) - Huge Page PTE supported in Directory levels
PSn (5..0) - Bit position of PTEvld in Huge Page PTE
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Yongbok Kim [Tue, 9 Oct 2018 16:42:46 +0000 (18:42 +0200)]
target/mips: Add CP0 PWSize register
Add PWSize register (CP0 Register 5, Select 7).
The PWSize register configures hardware page table walking for TLB
refills.
This register is required for the hardware page walker feature. It
exists only if Config3 PW bit is set to 1. It contains following
fields:
BDW (37..32) Base Directory index width (MIPS64 only)
GDW (29..24) Global Directory index width
UDW (23..18) Upper Directory index width
MDW (17..12) Middle Directory index width
PTW (11..6 ) Page Table index width
PTEW ( 5..0 ) Left shift applied to the Page Table index
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Yongbok Kim [Tue, 9 Oct 2018 16:15:46 +0000 (18:15 +0200)]
target/mips: Add CP0 PWField register
Add PWField register (CP0 Register 5, Select 6).
The PWField register configures hardware page table walking for TLB
refills.
This register is required for the hardware page walker feature. It
exists only if Config3 PW bit is set to 1. It contains following
fields:
MIPS64:
BDI (37..32) - Base Directory index
GDI (29..24) - Global Directory index
UDI (23..18) - Upper Directory index
MDI (17..12) - Middle Directory index
PTI (11..6 ) - Page Table index
PTEI ( 5..0 ) - Page Table Entry shift
MIPS32:
GDW (29..24) - Global Directory index
UDW (23..18) - Upper Directory index
MDW (17..12) - Middle Directory index
PTW (11..6 ) - Page Table index
PTEW ( 5..0 ) - Page Table Entry shift
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Yongbok Kim [Tue, 9 Oct 2018 16:05:51 +0000 (18:05 +0200)]
target/mips: Add CP0 PWBase register
Add PWBase register (CP0 Register 5, Select 5).
The PWBase register contains the Page Table Base virtual address.
This register is required for the hardware page walker feature. It
exists only if Config3 PW bit is set to 1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Tue, 16 Oct 2018 14:59:18 +0000 (16:59 +0200)]
target/mips: Add CP0 Config2 to DisasContext
Add field corresponding to CP0 Config2 to DisasContext. This is
needed for availability control via Config2 bits.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Mon, 8 Oct 2018 15:20:24 +0000 (17:20 +0200)]
target/mips: Improve DSP R2/R3-related naming
Do following replacements:
ASE_DSPR2 -> ASE_DSP_R2
ASE_DSPR3 -> ASE_DSP_R3
MIPS_HFLAG_DSPR2 -> MIPS_HFLAG_DSP_R2
MIPS_HFLAG_DSPR3 -> MIPS_HFLAG_DSP_R3
check_dspr2() -> check_dsp_r2()
check_dspr3() -> check_dsp_r3()
and several other similar minor replacements.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Wed, 3 Oct 2018 12:25:32 +0000 (14:25 +0200)]
target/mips: Add availability control for DSP R3 ASE
Add infrastructure for availability control for DSP R3 ASE MIPS
instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but
this is likely to be changed in near future.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Tue, 16 Oct 2018 10:17:44 +0000 (12:17 +0200)]
target/mips: Add bit definitions for DSP R3 ASE
Add DSP R3 ASE related bit definition for insn_flags and hflags.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Philippe Mathieu-Daudé [Tue, 16 Oct 2018 10:09:54 +0000 (12:09 +0200)]
target/mips: Reorganize bit definitions for insn_flags (ISAs/ASEs flags)
Distribute bits 56-63 vendor-specific ASEs as follows:
- bits 0-31 MIPS base instruction sets
- bits 32-47 MIPS ASEs
- bits 48-55 vendor-specific base instruction sets
- bits 56-63 vendor-specific ASEs
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Philippe Mathieu-Daudé [Tue, 16 Oct 2018 09:52:35 +0000 (11:52 +0200)]
target/mips: Increase 'supported ISAs/ASEs' flag holder size
Increase the size of insn_flags holder size to 64 bits. This is
needed for future extensions since existing bits are almost all used.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 16 Oct 2018 11:39:36 +0000 (13:39 +0200)]
target/mips: Add opcode values of MXU ASE
Add opcode values for all instructions in MXU ASE.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 16 Oct 2018 11:38:01 +0000 (13:38 +0200)]
target/mips: Add organizational chart of MXU ASE
Add a comment that contains an organizational chart of MXU ASE
instructions.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 16 Oct 2018 11:29:10 +0000 (13:29 +0200)]
target/mips: Add assembler mnemonics list for MXU ASE
Add a comment that contains a list all MXU instructions,
expressed in assembler mnemonics.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 16 Oct 2018 11:26:57 +0000 (13:26 +0200)]
target/mips: Add basic description of MXU ASE
Add a comment that contains a basic description of MXU ASE.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Fri, 12 Oct 2018 20:51:18 +0000 (22:51 +0200)]
target/mips: Add a comment before each CP0 register section in cpu.h
Add a comment before each CP0 register section in CPUMIPSState
definition, thus visually separating these sections.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 9 Oct 2018 15:19:57 +0000 (17:19 +0200)]
target/mips: Add a comment with an overview of CP0 registers
Add a comment with an overview of CP0 registers close to the
definition of their corresponding fields in CPUMIPSState.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Fri, 12 Oct 2018 10:57:35 +0000 (12:57 +0200)]
linux-user: Add infrastructure for handling MIPS-specific prctl()
Add infrastructure for handling MIPS-specific prctl(). This is,
for now, just an empty placeholder. The real handling will be
implemented in subsequent patches.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Fri, 12 Oct 2018 10:40:57 +0000 (12:40 +0200)]
linux-user: Add MIPS-specific prctl() options
Add MIPS-specific prctl() options TARGET_PR_SET_FP_MODE and
TARGET_PR_SET_FP_MODE. These values are essentially copied from
linux kernel header include/uapi/linux/prctl.h.
This is done in a way consistent with a similar case of
aarch64-specific prctl() options TARGET_PR_SVE_SET_VL and
TARGET_PR_SVE_GET_VL.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Fredrik Noring [Thu, 18 Oct 2018 16:08:46 +0000 (18:08 +0200)]
elf: Fix comments to EF_MIPS_MACH_xxx constants
Regarding R5900 CPU, some sources indicate that the Emotion Engine
ISA/ASE was designed by Toshiba and licensed to Sony. Others sources
claim it was a joint effort. It therefore makes sense to refer to
the CPU as "Toshiba/Sony R5900".
Also, remove and "'s" in the line for some other CPU, for the sake
of consistency.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reported-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Fri, 5 Oct 2018 15:06:35 +0000 (17:06 +0200)]
elf: Add Mips_elf_abiflags_v0 structure
Add Mips_elf_abiflags_v0 structure to elf.h. The source of information
is kernel header arch/mips/include/asm/elf.h.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Fri, 5 Oct 2018 14:58:45 +0000 (16:58 +0200)]
elf: Add MIPS_ABI_FP_XXX constants
Add MIPS_ABI_FP_XXX constants to elf.h. The source of information
is kernel header arch/mips/include/asm/elf.h.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Markovic [Fri, 5 Oct 2018 14:38:46 +0000 (16:38 +0200)]
elf: Fix PT_MIPS_XXX constants
Fix existing and add missing PT_MIPS_XXX constants in elf.h.
This is copied from kernel header arch/mips/include/asm/elf.h.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 15 Oct 2018 08:10:25 +0000 (10:10 +0200)]
mailmap: Add an item for Yongbok Kim
Yongbok Kim used two email adresses for QEMU contributions -
his company changed its ownership/name.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Peter Maydell [Thu, 18 Oct 2018 12:40:19 +0000 (13:40 +0100)]
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging
- Updates for qtest entries in test/Makefile.include
- Simple updates for some shell scripts
- Misc simple patches for files without regular subsystem pull requests
# gpg: Signature made Wed 17 Oct 2018 08:20:35 BST
# gpg: using RSA key
2ED9D774FE702DB5
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>"
# gpg: aka "Thomas Huth <thuth@redhat.com>"
# gpg: aka "Thomas Huth <huth@tuxfamily.org>"
# gpg: aka "Thomas Huth <th.huth@posteo.de>"
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* remotes/huth-gitlab/tags/pull-request-2018-10-17:
configure: remove glib_subprocess check
hw/core/generic-loader: Compile only once, not for each target
cpu: Provide a proper prototype for target_words_bigendian() in a header
hw/core/generic-loader: Set a category for the generic-loader device
qemu/compiler: Wrap __attribute__((flatten)) in a macro
mailmap: Fix Reimar Döffinger name
show-fixed-bugs.sh: Modern shell scripting (use $() instead of ``)
git-submodule.sh: Modern shell scripting (use $() instead of ``)
archive-source.sh: Modern shell scripting (use $() instead of ``)
MAINTAINERS: update block/sheepdog maintainers
gdbstub: Remove unused include
tests: remove gcov-files- variables
tests: Prevent more accidental test disabling
target/cris/translate: Get rid of qemu_log_separate()
qemu-common.h: update copyright date to 2018
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 18 Oct 2018 10:35:00 +0000 (11:35 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-
20181016' into staging
Queued hppa patch
# gpg: Signature made Tue 16 Oct 2018 23:45:46 BST
# gpg: using RSA key
64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-hppa-
20181016:
target/hppa: Raise exception 26 on emulated hardware
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Marc-André Lureau [Wed, 3 Oct 2018 13:20:41 +0000 (17:20 +0400)]
configure: remove glib_subprocess check
This should have been removed as part of commit
692fbdf9f4c6f6bafd0b3a4d4f94973effd3bbae.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Fri, 5 Oct 2018 12:53:38 +0000 (14:53 +0200)]
hw/core/generic-loader: Compile only once, not for each target
The generic-loader is currently compiled target specific due to one
single "#ifdef TARGET_WORDS_BIGENDIAN" in the file. We have already a
function called target_words_bigendian() for this instead, so we can
put the generic-loader into common-obj to save some compilation time.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Fri, 5 Oct 2018 12:46:02 +0000 (14:46 +0200)]
cpu: Provide a proper prototype for target_words_bigendian() in a header
We've got three places already that provide a prototype for this
function in a .c file - that's ugly. Let's provide a proper prototype
in a header instead, with a proper description why this function should
not be used in most cases.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Fri, 5 Oct 2018 09:39:40 +0000 (11:39 +0200)]
hw/core/generic-loader: Set a category for the generic-loader device
Each device that is instantiatable by the users should be marked with
a category. Since the generic-loader does not fit anywhere else, put
it into the MISC category.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Wed, 26 Sep 2018 15:48:50 +0000 (17:48 +0200)]
qemu/compiler: Wrap __attribute__((flatten)) in a macro
Older versions of Clang (before 3.5) and GCC (before 4.1) do not
support the "__attribute__((flatten))" yet. We don't care about
such old versions of GCC anymore, but since Clang 3.4 is still
used in EPEL for RHEL7 / CentOS 7, we should not use this attribute
directly but with a wrapper macro instead.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Wed, 10 Oct 2018 22:29:43 +0000 (00:29 +0200)]
mailmap: Fix Reimar Döffinger name
This probably happened when interpreting the utf8 name as latin1.
Fixes
dbbaaff6867 and
f4e94dfefb6.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Helge Deller [Sun, 7 Oct 2018 20:51:53 +0000 (22:51 +0200)]
target/hppa: Raise exception 26 on emulated hardware
On PCXS chips (PA7000, pa 1.1a), trap #18 is raised on memory faults,
while all later chips (>= PA7100) generate either trap #26, #27 or #28
(depending on the fault type).
Since the current qemu emulation emulates a B160L machine (with a
PA7300LC PCX-L2 chip, we should raise trap #26 (EXCP_DMAR) instead
of #18 (EXCP_DMP) on access faults by the Linux kernel to page zero.
With the patch we now get the correct output (I tested against real
hardware):
Kernel Fault: Code=26 (Data memory access rights trap)
instead of:
Kernel Fault: Code=18 (Data memory protection/unaligned access trap)
Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <
20181007205153.GA30270@ls3530.fritz.box>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Peter Maydell [Tue, 16 Oct 2018 16:42:56 +0000 (17:42 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20181016-1' into staging
target-arm queue:
* hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
* target/arm: Fix aarch64_sve_change_el wrt EL0
* target/arm: Define fields of ISAR registers
* target/arm: Align cortex-r5 id_isar0
* target/arm: Fix cortex-a7 id_isar0
* net/cadence_gem: Fix various bugs, add support for new
features that will be used by the Xilinx Versal board
* target-arm: powerctl: Enable HVC when starting CPUs to EL2
* target/arm: Add the Cortex-A72
* target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
* target/arm: Mask PMOVSR writes based on supported counters
* target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
* coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
# gpg: Signature made Tue 16 Oct 2018 17:42:01 BST
# gpg: using RSA key
3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-
20181016-1:
coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
target/arm: Mask PMOVSR writes based on supported counters
target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
target/arm: Add the Cortex-A72
target-arm: powerctl: Enable HVC when starting CPUs to EL2
net: cadence_gem: Implement support for 64bit descriptor addresses
net: cadence_gem: Add support for selecting the DMA MemoryRegion
net: cadence_gem: Add support for extended descriptors
net: cadence_gem: Add macro with max number of descriptor words
net: cadence_gem: Use uint32_t for 32bit descriptor words
net: cadence_gem: Disable TSU feature bit
target/arm: Fix cortex-a7 id_isar0
target/arm: Align cortex-r5 id_isar0
target/arm: Define fields of ISAR registers
target/arm: Fix aarch64_sve_change_el wrt EL0
hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Mao Zhongyi [Mon, 15 Oct 2018 09:17:36 +0000 (17:17 +0800)]
show-fixed-bugs.sh: Modern shell scripting (use $() instead of ``)
Various shell files contain a mix between obsolete ``
and modern $(); It would be nice to convert to using $()
everywhere.
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Mao Zhongyi [Mon, 15 Oct 2018 09:17:35 +0000 (17:17 +0800)]
git-submodule.sh: Modern shell scripting (use $() instead of ``)
Various shell files contain a mix between obsolete ``
and modern $(); It would be nice to convert to using $()
everywhere.
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Mao Zhongyi [Mon, 15 Oct 2018 09:17:34 +0000 (17:17 +0800)]
archive-source.sh: Modern shell scripting (use $() instead of ``)
Various shell files contain a mix between obsolete ``
and modern $(); It would be nice to convert to using $()
everywhere.
Signed-off-by: Mao Zhongyi <maozhongyi@cmss.chinamobile.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Peter Maydell [Tue, 9 Oct 2018 18:16:12 +0000 (19:16 +0100)]
coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
Add a new Coccinelle script which replaces uses of the inplace
byteswapping functions *_to_cpus() and cpu_to_*s() with their
not-in-place equivalents. This is useful for where the swapping
is done on members of a packed struct -- taking the address
of the member to pass it to an inplace function is undefined
behaviour in C.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181009181612.10633-1-peter.maydell@linaro.org
Peter Maydell [Thu, 11 Oct 2018 17:20:57 +0000 (18:20 +0100)]
target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
The get_phys_addr() functions take a pointer to an ARMMMUFaultInfo
struct, which they fill in only if a fault occurs. This means that
the caller must always zero-initialize the struct before passing
it in. We forgot to do this in v7m_stack_read() and v7m_stack_write().
Correct the error.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181011172057.9466-1-peter.maydell@linaro.org
Aaron Lindsay [Wed, 10 Oct 2018 20:37:23 +0000 (16:37 -0400)]
target/arm: Mask PMOVSR writes based on supported counters
This is an amendment to my earlier patch:
commit
7ece99b17e832065236c07a158dfac62619ef99b
Author: Aaron Lindsay <alindsay@codeaurora.org>
Date: Thu Apr 26 11:04:39 2018 +0100
target/arm: Mask PMU register writes based on PMCR_EL0.N
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181010203735.27918-3-aclindsa@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Aaron Lindsay [Wed, 10 Oct 2018 20:37:22 +0000 (16:37 -0400)]
target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
I previously fixed this for PMINTENSET_EL1, but missed these.
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
Signed-off-by: Aaron Lindsay <aclindsa@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181010203735.27918-2-aclindsa@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:29 +0000 (04:19 +0200)]
target/arm: Add the Cortex-A72
Add the ARM Cortex-A72.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-11-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:28 +0000 (04:19 +0200)]
target-arm: powerctl: Enable HVC when starting CPUs to EL2
When QEMU provides the equivalent of the EL3 firmware, we
need to enable HVCs in scr_el3 when turning on CPUs that
target EL2.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-10-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:26 +0000 (04:19 +0200)]
net: cadence_gem: Implement support for 64bit descriptor addresses
Implement support for 64bit descriptor addresses.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-8-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:25 +0000 (04:19 +0200)]
net: cadence_gem: Add support for selecting the DMA MemoryRegion
Add support for selecting the Memory Region that the GEM
will do DMA to.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181011021931.4249-7-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:24 +0000 (04:19 +0200)]
net: cadence_gem: Add support for extended descriptors
Add support for extended descriptors with optional 64bit
addressing and timestamping. QEMU will not yet provide
timestamps (always leaving the valid timestamp bit as zero).
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-6-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:23 +0000 (04:19 +0200)]
net: cadence_gem: Add macro with max number of descriptor words
Add macro with max number of DMA descriptor words.
No functional change.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-5-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:22 +0000 (04:19 +0200)]
net: cadence_gem: Use uint32_t for 32bit descriptor words
Use uint32_t instead of unsigned to describe 32bit descriptor words.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-4-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Liu Yuan [Fri, 12 Oct 2018 07:35:10 +0000 (15:35 +0800)]
MAINTAINERS: update block/sheepdog maintainers
E-mail to one of block/sheepdog maintainers Mitake Hitoshi bounces
<mitake.hitoshi@lab.ntt.co.jp>: unknown user: "mitake.hitoshi"
and no current address is known. So just remove it.
Signed-off-by: Liu Yuan <liuyuan1@cmiot.chinamobile.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Fri, 12 Oct 2018 00:21:13 +0000 (02:21 +0200)]
gdbstub: Remove unused include
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Paolo Bonzini [Fri, 5 Oct 2018 16:17:22 +0000 (18:17 +0200)]
tests: remove gcov-files- variables
Commit
31d2dda ("build-system: remove per-test GCOV reporting", 2018-06-20)
removed users of the variables, since those uses can be replaced by a simple
overall report produced by gcovr. However, the variables were never removed.
Do it now.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
[thuth: Fixed up contextual conflicts with the patch from Eric]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Eric Blake [Thu, 11 Oct 2018 14:47:51 +0000 (09:47 -0500)]
tests: Prevent more accidental test disabling
GNU make is perfectly happy to use 'check-FOO-y += bar' to
initialize check-FOO-y. (GNU Automake strictly insists that
you cannot use += until after an initial = per variable, but
thankfully we aren't using automake).
As we have had more than one instance where copy-and-paste of
'check-FOO-y = bar' from a first test under category FOO into
an additional test, which ends up disabling the first (see
commits
992159c7 and
4429532b), it's better to just always use
the form that survives copy-and-paste, even for categories that
don't currently add more than one test.
Done with s/^\(check-[a-z]*-y \)=/\1+=/g
Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 9 Oct 2018 07:40:33 +0000 (09:40 +0200)]
target/cris/translate: Get rid of qemu_log_separate()
The gen_BUG() function calls already cpu_abort(), which prints the
information to stderr and the log already. So instead of additionally
printing the dc->pc via fprintf() and qemu_log here, too, we can
simply pass this information to cpu_abort() instead.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
John Arbuckle [Sun, 9 Sep 2018 15:32:38 +0000 (11:32 -0400)]
qemu-common.h: update copyright date to 2018
Currently the copyright date is set to 2017. Update the date to say
2018.
Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Edgar E. Iglesias [Thu, 11 Oct 2018 02:19:20 +0000 (04:19 +0200)]
net: cadence_gem: Disable TSU feature bit
Disable the Timestamping Unit feature bit since QEMU does not
yet support it. This allows guest SW to correctly probe for
its existance.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181011021931.4249-2-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 8 Oct 2018 21:22:00 +0000 (14:22 -0700)]
target/arm: Fix cortex-a7 id_isar0
The incorrect value advertised only thumb2 div without arm div.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181008212205.17752-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 8 Oct 2018 21:21:59 +0000 (14:21 -0700)]
target/arm: Align cortex-r5 id_isar0
The missing nibble made it more difficult to read.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181008212205.17752-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 8 Oct 2018 21:21:57 +0000 (14:21 -0700)]
target/arm: Define fields of ISAR registers
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181008212205.17752-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 8 Oct 2018 21:21:56 +0000 (14:21 -0700)]
target/arm: Fix aarch64_sve_change_el wrt EL0
At present we assert:
arm_el_is_aa64: Assertion `el >= 1 && el <= 3' failed.
The comment in arm_el_is_aa64 explains why asking about EL0 without
extra information is impossible. Add an extra argument to provide
it from the surrounding context.
Fixes:
0ab5953b00b3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181008212205.17752-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Jerome Forissier [Fri, 5 Oct 2018 08:07:29 +0000 (10:07 +0200)]
hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
Bindings for /secure-chosen and /secure-chosen/stdout-path have been
proposed 1.5 years ago [1] and implemented in OP-TEE at the same time [2].
They've now been officially agreed on, so we can implement them
in QEMU.
This patch creates the property when the machine is secure.
[1] https://patchwork.kernel.org/patch/
9602401/
[2] https://github.com/OP-TEE/optee_os/commit/
4dc31c52544a
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Message-id:
20181005080729.6480-1-jerome.forissier@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: commit message tweak]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 15 Oct 2018 17:44:04 +0000 (18:44 +0100)]
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-
20181015.0' into staging
VFIO updates 2018-10-15
- ramfb support for vfio-pci via new -nohotplug device variant
(Gerd Hoffmann)
- Preparation for generic DT pass-through in vfio-platform
(Geert Uytterhoeven & Eric Auger)
- vfio-pci QOM fixups (Li Qiang)
# gpg: Signature made Mon 15 Oct 2018 18:26:29 BST
# gpg: using RSA key
239B9B6E3BB08B22
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>"
# gpg: aka "Alex Williamson <alex@shazbot.org>"
# gpg: aka "Alex Williamson <alwillia@redhat.com>"
# gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>"
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 8B22
* remotes/awilliam/tags/vfio-updates-
20181015.0:
vfio-pci: make vfio-pci device more QOM conventional
hw/arm/virt: Allow dynamic vfio-platform devices again
hw/arm/sysbus-fdt: Allow device matching with DT compatible value
vfio/platform: Make the vfio-platform device non-abstract
hw/vfio/display: add ramfb support
stubs: add ramfb
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Li Qiang [Mon, 15 Oct 2018 16:52:10 +0000 (10:52 -0600)]
vfio-pci: make vfio-pci device more QOM conventional
Define a TYPE_VFIO_PCI and drop DO_UPCAST.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Geert Uytterhoeven [Mon, 15 Oct 2018 16:52:10 +0000 (10:52 -0600)]
hw/arm/virt: Allow dynamic vfio-platform devices again
Allow the instantation of generic dynamic vfio-platform devices again,
without the need to create a new device-specific vfio type.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Eric Auger [Mon, 15 Oct 2018 16:52:09 +0000 (10:52 -0600)]
hw/arm/sysbus-fdt: Allow device matching with DT compatible value
Up to now we have relied on the device type to identify a device tree
node creation function. Since we would like the vfio-platform device to
be instantiable with different compatible strings we introduce the
capability to specialize the node creation depending on actual
compatible value.
NodeCreationPair is renamed into BindingEntry. The struct is enhanced
with compat and match_fn() fields. We introduce a new matching function
adapted to the vfio-platform generic device.
Soon, the AMD XGBE can be instantiated with either manner, i.e.:
-device vfio-amd-xgbe,host=
e0900000.xgmac
or using the new option line:
-device vfio-platform,host=
e0900000.xgmac
Signed-off-by: Eric Auger <eric.auger@redhat.com>
[geert: Match using compatible values in sysfs instead of user-supplied
manufacturer/model options, reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Eric Auger [Mon, 15 Oct 2018 16:52:09 +0000 (10:52 -0600)]
vfio/platform: Make the vfio-platform device non-abstract
Up to now the vfio-platform device has been abstract and could not be
instantiated. The integration of a new vfio platform device required
creating a dummy derived device which only set the compatible string.
Following the few vfio-platform device integrations we have seen the
actual requested adaptation happens on device tree node creation
(sysbus-fdt).
Hence remove the abstract setting, and read the list of compatible
values from sysfs if not set by a derived device.
Update the amd-xgbe and calxeda-xgmac drivers to fill in the number of
compatible values, as there can now be more than one.
Note that sysbus-fdt does not support the instantiation of the
vfio-platform device yet.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
[geert: Rebase, set user_creatable=true, use compatible values in sysfs
instead of user-supplied manufacturer/model options, reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Gerd Hoffmann [Mon, 15 Oct 2018 16:52:09 +0000 (10:52 -0600)]
hw/vfio/display: add ramfb support
So we have a boot display when using a vgpu as primary display.
ramfb depends on a fw_cfg file. fw_cfg files can not be added and
removed at runtime, therefore a ramfb-enabled vfio device can't be
hotplugged.
Add a nohotplug variant of the vfio-pci device (as child class). Add
the ramfb property to the nohotplug variant only. So to enable the vgpu
display with boot support use this:
-device vfio-pci-nohotplug,display=on,ramfb=on,sysfsdev=...
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Gerd Hoffmann [Mon, 15 Oct 2018 16:52:09 +0000 (10:52 -0600)]
stubs: add ramfb
Needed to make sure code using ramfb (vfio) compiles properly even on
platforms without fw_cfg (and therefore no ramfb) support.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Peter Maydell [Mon, 15 Oct 2018 14:03:45 +0000 (15:03 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/vga-
20181015-pull-request' into staging
vga: config tweaks, edid updates, qxl bugfix, install new vgabios blobs.
# gpg: Signature made Mon 15 Oct 2018 10:05:03 BST
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/vga-
20181015-pull-request:
Makefile: Install new vgabios binaries
hw/display/cirrus_vga: Move "isa-cirrus-vga" device into a separate file
i2c: switch ddc to use the new edid generator
qxl: check qxl_phys2virt return value
bochs-display: wire up edid support
display: add separate config option for bochs-display
edid: fix alignment issues
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Williamson [Fri, 12 Oct 2018 16:26:31 +0000 (10:26 -0600)]
Makefile: Install new vgabios binaries
Difficult to make use of if not installed
Fixes:
cd1bfd5ef336 ("seabios: update bios and vgabios binaries")
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
153936155938.28040.
11513367417790075721.stgit@gimli.home
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Thomas Huth [Fri, 12 Oct 2018 10:11:46 +0000 (12:11 +0200)]
hw/display/cirrus_vga: Move "isa-cirrus-vga" device into a separate file
In downstream distros like RHEL we'd like to disable some of the "legacy"
devices of QEMU. The ISA version of the Cirrus VGA device is one of these
legacy devices. So let's make the build process a little bit more flexible
here by putting the Cirrus ISA code into a separate file which is only
included if both, CONFIG_VGA_CIRRUS and CONFIG_VGA_ISA are set.
Note that this disables "isa-cirrus-vga" for the ppc-softmmu and the
alpha-softmmu target since CONFIG_VGA_ISA is not set there. But I think
this is OK since these targets are only interested in the PCI variant
anyway.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-id:
1539339106-32427-1-git-send-email-thuth@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Fri, 5 Oct 2018 11:08:37 +0000 (13:08 +0200)]
i2c: switch ddc to use the new edid generator
This also makes the default display resolution configurable,
via xres and yres properties. The default is 1024x768.
The old code had a hard-coded resolution of 1600x1200.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20181005110837.28209-1-kraxel@redhat.com
Gerd Hoffmann [Fri, 5 Oct 2018 13:46:08 +0000 (15:46 +0200)]
qxl: check qxl_phys2virt return value
Fixes: CID
1395986
Fixes:
979f7ef8966bc4495a710ed9e4af42098f92ee79
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181005134608.1251-1-kraxel@redhat.com
Gerd Hoffmann [Fri, 5 Oct 2018 16:01:47 +0000 (18:01 +0200)]
bochs-display: wire up edid support
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20181005160147.892-3-kraxel@redhat.com
Gerd Hoffmann [Fri, 5 Oct 2018 16:01:46 +0000 (18:01 +0200)]
display: add separate config option for bochs-display
This allows modern architectures which don't care about vga
compatibility (risc-v for example) build bochs-display without
including all vga emulation too.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181005160147.892-2-kraxel@redhat.com
Gerd Hoffmann [Mon, 15 Oct 2018 05:53:33 +0000 (07:53 +0200)]
edid: fix alignment issues
Use stl_le_p() & friends instead of casts.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20181015055333.32030-1-kraxel@redhat.com
Peter Maydell [Fri, 12 Oct 2018 16:24:23 +0000 (17:24 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/ui2-
20181012-pull-request' into staging
ui: drop gtk2 support.
# gpg: Signature made Fri 12 Oct 2018 15:05:25 BST
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/ui2-
20181012-pull-request:
ui: increase min required GTK3 version to 3.14.0
ui: remove support for GTK2 in favour of GTK3
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 12 Oct 2018 15:45:51 +0000 (16:45 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/ui-
20181012-pull-request' into staging
ui: gtk fixes, support more formats in sdl2.
# gpg: Signature made Fri 12 Oct 2018 14:21:24 BST
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/ui-
20181012-pull-request:
gtk: fix uninitialized variable
sdl2: Support all virtio-gpu formats
gtk: Don't vte_terminal_set_encoding() on new VTE versions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Daniel P. Berrangé [Wed, 22 Aug 2018 13:15:53 +0000 (14:15 +0100)]
ui: increase min required GTK3 version to 3.14.0
Per supported platforms doc[1], the various min GTK3 on relevant distros is:
RHEL-7.0: 3.8.8
RHEL-7.2: 3.14.13
RHEL-7.4: 3.22.10
RHEL-7.5: 3.22.26
Debian (Stretch): 3.22.11
Debian (Jessie): 3.14.5
OpenBSD (Ports): 3.22.30
FreeBSD (Ports): 3.22.29
OpenSUSE Leap 15: 3.22.30
SLE12-SP2: Unknown
Ubuntu (Xenial): 3.18.9
macOS (Homebrew): 3.22.30
This suggests that a minimum GTK3 of 3.14.0 is a reasonable target,
as users are unlikely to be stuck on RHEL-7.0/7.1 still
[1] https://qemu.weilnetz.de/doc/qemu-doc.html#Supported-build-platforms
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id:
20180822131554.3398-3-berrange@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Daniel P. Berrangé [Wed, 22 Aug 2018 13:15:52 +0000 (14:15 +0100)]
ui: remove support for GTK2 in favour of GTK3
GTK2 was deprecated in the 2.12.0 release with:
commit
b7715af2b31f47060cc5b4be930d16c13be93fa9
Author: Daniel P. Berrange <berrange@redhat.com>
Date: Tue Dec 12 11:34:40 2017 +0000
ui: deprecate use of GTK 2.x in favour of 3.x series
The GTK 3.0 release was made in Feb, 2011:
https://blog.gtk.org/2011/02/10/gtk-3-0-released/
That will soon be 7 years ago, which is enough time to consider
the 3.x series widely supported.
Thus we deprecate the GTK 2.x support, which will allow us to
delete it in the last release of 2018. By this time, GTK 3.x
will be almost 8 years old.
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-id:
20171212113440.16483-1-berrange@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
It is thus able to be removed in the 3.1.0 release.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id:
20180822131554.3398-2-berrange@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Paolo Bonzini [Wed, 3 Oct 2018 12:11:38 +0000 (14:11 +0200)]
gtk: fix uninitialized variable
zoom_to_fit is never initialized to false, Coverity complains
(not sure why GCC does not).
Fixes:
e8b1386ea1719525a1a92df03377764703fe8c64
Cc: kraxel@redhat.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181003121138.22037-1-pbonzini@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Max Reitz [Mon, 8 Oct 2018 18:50:13 +0000 (20:50 +0200)]
sdl2: Support all virtio-gpu formats
There are some 2D resource formats that can be used through virtio-gpu,
but which are not supported by SDL2 when used for a scanout; these are
all alpha-channel formats and also XBGR (RGBX in non-BE pixman).
Add these formats in the switch converting pixman to SDL format
constants so a guest cannot crash the VM by triggering the
g_assert_not_reached() with an unsupported format.
Signed-off-by: Max Reitz <mreitz@redhat.com>
Message-id:
20181008185013.19371-1-mreitz@redhat.com
[ kraxel: also update sdl2_2d_check_format() ]
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Kevin Wolf [Thu, 11 Oct 2018 15:30:39 +0000 (17:30 +0200)]
gtk: Don't vte_terminal_set_encoding() on new VTE versions
The function vte_terminal_set_encoding() is deprecated since VTE 0.54,
so stop calling it from that version on. This fixes a build error
because of our use of warning flags [-Werror=deprecated-declarations].
Fixes: https://bugs.launchpad.net/bugs/
1794939
Reported-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-id:
20181011153039.2324-1-kwolf@redhat.com
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Peter Maydell [Fri, 12 Oct 2018 11:40:04 +0000 (12:40 +0100)]
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-
20181012' into staging
More s390x updates:
- introduce support for vfio-ap (s390 crypto devices), including a
Linux headers update to get the new interfaces
- the usual fixing + cleanup
# gpg: Signature made Fri 12 Oct 2018 10:54:38 BST
# gpg: using RSA key
DECF6B93C6F02FAF
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>"
# gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>"
# gpg: aka "Cornelia Huck <cohuck@kernel.org>"
# gpg: aka "Cornelia Huck <cohuck@redhat.com>"
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF
* remotes/cohuck/tags/s390x-
20181012:
hw/s390x: Include the tod-qemu also for builds with --disable-tcg
s390: doc: detailed specifications for AP virtualization
s390x/vfio: ap: Introduce VFIO AP device
s390x/ap: base Adjunct Processor (AP) object model
s390x/kvm: enable AP instruction interpretation for guest
s390x/cpumodel: Set up CPU model for AP device support
linux-headers: update
target/s390x/excp_helper: Remove DPRINTF() macro
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 12 Oct 2018 10:56:43 +0000 (11:56 +0100)]
Merge remote-tracking branch 'remotes/famz/tags/block-pull-request' into staging
Block patches
One fix from Paolo on nvme:// driver.
One fix from Marc-Andre for iothread.
# gpg: Signature made Fri 12 Oct 2018 02:49:42 BST
# gpg: using RSA key
CA35624C6A9171C6
# gpg: Good signature from "Fam Zheng <famz@redhat.com>"
# Primary key fingerprint: 5003 7CB7 9706 0F76 F021 AD56 CA35 624C 6A91 71C6
* remotes/famz/tags/block-pull-request:
nvme: correct locking around completion
iothread: fix crash with invalid properties
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 12 Oct 2018 10:00:07 +0000 (11:00 +0100)]
Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-
20181011a' into staging
Migration pull 2018-10-11
With one bonus HMP fix.
# gpg: Signature made Thu 11 Oct 2018 20:23:12 BST
# gpg: using RSA key
0516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>"
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert/tags/pull-migration-
20181011a:
migration-test: Only generate a single target architecture
qmp, hmp: make subsystem/system-vendor identities optional
vhost-user: Don't ask for reply on postcopy mem table set
vhost-user: Fix userfaultfd leak
migration: Stop postcopy fault thread before notifying
tests/migration: Enable the migration test on s390x, too
tests: Add migration test for aarch64
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Thomas Huth [Thu, 11 Oct 2018 13:32:03 +0000 (15:32 +0200)]
hw/s390x: Include the tod-qemu also for builds with --disable-tcg
The device is required for running qtests, see hw/s390x/tod.c:
void s390_init_tod(void)
{
Object *obj;
if (kvm_enabled()) {
obj = object_new(TYPE_KVM_S390_TOD);
} else {
obj = object_new(TYPE_QEMU_S390_TOD);
}
[...]
}
During qtests, we're running without kvm, so TYPE_QEMU_S390_TOD is
required to avoid that QEMU aborts here.
Fixes:
8046f374a6 ("s390x/tod: factor out TOD into separate device")
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
1539264723-741-1-git-send-email-thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Tony Krowiak [Wed, 10 Oct 2018 17:03:08 +0000 (13:03 -0400)]
s390: doc: detailed specifications for AP virtualization
This patch provides documentation describing the AP architecture and
design concepts behind the virtualization of AP devices. It also
includes an example of how to configure AP devices for exclusive
use of KVM guests.
Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Tested-by: Pierre Morel <pmorel@linux.ibm.com>
Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <
20181010170309.12045-7-akrowiak@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Tony Krowiak [Wed, 10 Oct 2018 17:03:07 +0000 (13:03 -0400)]
s390x/vfio: ap: Introduce VFIO AP device
Introduces a VFIO based AP device. The device is defined via
the QEMU command line by specifying:
-device vfio-ap,sysfsdev=<path-to-mediated-matrix-device>
There may be only one vfio-ap device configured for a guest.
The mediated matrix device is created by the VFIO AP device
driver by writing a UUID to a sysfs attribute file (see
docs/vfio-ap.txt). The mediated matrix device will be named
after the UUID. Symbolic links to the $uuid are created in
many places, so the path to the mediated matrix device $uuid
can be specified in any of the following ways:
/sys/devices/vfio_ap/matrix/$uuid
/sys/devices/vfio_ap/matrix/mdev_supported_types/vfio_ap-passthrough/devices/$uuid
/sys/bus/mdev/devices/$uuid
/sys/bus/mdev/drivers/vfio_mdev/$uuid
When the vfio-ap device is realized, it acquires and opens the
VFIO iommu group to which the mediated matrix device is
bound. This causes a VFIO group notification event to be
signaled. The vfio_ap device driver's group notification
handler will get called at which time the device driver
will configure the the AP devices to which the guest will
be granted access.
Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com>
Tested-by: Pierre Morel <pmorel@linux.ibm.com>
Acked-by: Halil Pasic <pasic@linux.ibm.com>
Tested-by: Pierre Morel <pmorel@linux.ibm.com>
Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <
20181010170309.12045-6-akrowiak@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
[CH: added missing g_free and device category]
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Tony Krowiak [Wed, 10 Oct 2018 17:03:06 +0000 (13:03 -0400)]
s390x/ap: base Adjunct Processor (AP) object model
Introduces the base object model for virtualizing AP devices.
Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com>
Tested-by: Pierre Morel <pmorel@linux.ibm.com>
Acked-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Halil Pasic <pasic@linux.ibm.com>
Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <
20181010170309.12045-5-akrowiak@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Tony Krowiak [Wed, 10 Oct 2018 17:03:05 +0000 (13:03 -0400)]
s390x/kvm: enable AP instruction interpretation for guest
Let's use the KVM_SET_DEVICE_ATTR ioctl to enable hardware
interpretation of AP instructions executed on the guest.
If the S390_FEAT_AP feature is switched on for the guest,
AP instructions must be interpreted by default; otherwise,
they will be intercepted.
This attribute setting may be overridden by a device. For example,
a device may want to provide AP instructions to the guest (i.e.,
S390_FEAT_AP turned on), but it may want to emulate them. In this
case, the AP instructions executed on the guest must be
intercepted; so when the device is realized, it must disable
interpretation.
Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com>
Tested-by: Pierre Morel <pmorel@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Acked-by: Halil Pasic <pasic@linux.ibm.com>
Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <
20181010170309.12045-4-akrowiak@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Tony Krowiak [Wed, 10 Oct 2018 17:03:04 +0000 (13:03 -0400)]
s390x/cpumodel: Set up CPU model for AP device support
A new CPU model feature and two new CPU model facilities are
introduced to support AP devices for a KVM guest.
CPU model features:
1. The S390_FEAT_AP CPU model feature indicates whether AP
instructions are available to the guest. This feature will
be enabled only if the AP instructions are available on the
linux host as determined by the availability of the
KVM_S390_VM_CRYPTO_ENABLE_APIE VM attribute which is exposed
by KVM only if the AP instructions are available on the
host.
This feature must be turned on from userspace to execute AP
instructions on the KVM guest. The QEMU command line to turn
this feature on looks something like this:
qemu-system-s390x ... -cpu xxx,ap=on ...
This feature will be supported for zEC12 and newer CPU models.
The feature will not be supported for older models because
there are few older systems on which to test and the older
crypto cards will be going out of service in the relatively
near future.
CPU model facilities:
1. The S390_FEAT_AP_QUERY_CONFIG_INFO feature indicates whether the
AP Query Configuration Information (QCI) facility is available
to the guest as determined by whether the facility is available
on the host. This feature will be exposed by KVM only if the
QCI facility is installed on the host.
2. The S390_FEAT_AP_FACILITY_TEST feature indicates whether the AP
Facility Test (APFT) facility is available to the guest as
determined by whether the facility is available on the host.
This feature will be exposed by KVM only if APFT is installed
on the host.
Signed-off-by: Tony Krowiak <akrowiak@linux.ibm.com>
Tested-by: Pierre Morel <pmorel@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
Tested-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <
20181010170309.12045-3-akrowiak@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Cornelia Huck [Thu, 11 Oct 2018 09:44:05 +0000 (11:44 +0200)]
linux-headers: update
Update to kvm/next commit
dd5bd0a65ff6 ("Merge tag 'kvm-s390-next-4.20-1'
of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD")
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Thomas Huth [Fri, 5 Oct 2018 15:00:01 +0000 (17:00 +0200)]
target/s390x/excp_helper: Remove DPRINTF() macro
Debug macros that are disabled by default should be avoided (since the
code bit-rots quite easily). Thus turn these debug prints into proper
qemu_log_mask(CPU_LOG_xxx, ...) statements instead. The DPRINTF statements
in do_[ext|io|mchk]_interrupt can even be removed completely since we can
log the information in a central place, s390_cpu_do_interrupt, instead.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
1538751601-7433-1-git-send-email-thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Paolo Bonzini [Tue, 14 Aug 2018 06:27:39 +0000 (08:27 +0200)]
nvme: correct locking around completion
nvme_poll_queues is already protected by q->lock, and
AIO callbacks are invoked outside the AioContext lock.
So remove the acquire/release pair in nvme_handle_event.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20180814062739.19640-1-pbonzini@redhat.com>
Signed-off-by: Fam Zheng <famz@redhat.com>
Marc-André Lureau [Tue, 21 Aug 2018 10:07:16 +0000 (12:07 +0200)]
iothread: fix crash with invalid properties
-object iothread,id=foo,? will crash qemu:
qemu-system-x86_64:qemu-thread-posix.c:128: qemu_cond_destroy: Assertion `cond->initialized' failed.
Use thread_id != -1 to check if iothread_complete() finished
successfully and the mutex/cond have been initialized.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20180821100716.13803-1-marcandre.lureau@redhat.com>
Signed-off-by: Fam Zheng <famz@redhat.com>