OSDN Git Service
Lang Hames [Tue, 23 Sep 2014 18:08:47 +0000 (18:08 +0000)]
[MCJIT] Nuke MachineRelocation and MachineCodeEmitter. Now that the old JIT is
gone they're no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218320
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Jingyue Wu [Tue, 23 Sep 2014 17:35:28 +0000 (17:35 +0000)]
[docs] Fixed a typo in Atomics.rst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218319
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Lang Hames [Tue, 23 Sep 2014 17:10:24 +0000 (17:10 +0000)]
[MCJIT] Remove a few more references to JITMemoryManager that survived r218316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218318
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Lang Hames [Tue, 23 Sep 2014 17:02:24 +0000 (17:02 +0000)]
[MCJIT] Remove #include of JITMemoryManager that accidentally survived r218316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218317
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Lang Hames [Tue, 23 Sep 2014 16:56:02 +0000 (16:56 +0000)]
[MCJIT] Delete the JTIMemoryManager and associated APIs.
This patch removes the old JIT memory manager (which does not provide any
useful functionality now that the old JIT is gone), and migrates the few
remaining clients over to SectionMemoryManager.
http://llvm.org/PR20848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218316
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Sanjay Patel [Tue, 23 Sep 2014 16:24:20 +0000 (16:24 +0000)]
Use SDValue bool operator to reduce code. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218314
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Oliver Stannard [Tue, 23 Sep 2014 15:38:11 +0000 (15:38 +0000)]
Fix segfault in AArch64 backend with -g and -mbig-endian
Fix a null pointer dereference when trying to swap the endianness of
fixups in the .eh_frame section in the AArch64 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218311
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NAKAMURA Takumi [Tue, 23 Sep 2014 14:41:02 +0000 (14:41 +0000)]
Rework r218304, "ExecutionEngineTests: Call llvm_shutdown() on exit for ManagedStatic introduced in r218151."
r218304 caused crash on msvc builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218308
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NAKAMURA Takumi [Tue, 23 Sep 2014 14:19:09 +0000 (14:19 +0000)]
valgrind/x86_64-pc-linux-gnu.supp: We don't care if sed leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218307
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Timur Iskhodzhanov [Tue, 23 Sep 2014 14:07:12 +0000 (14:07 +0000)]
Fix a small typo in the test comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218306
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Sid Manning [Tue, 23 Sep 2014 13:55:50 +0000 (13:55 +0000)]
Loop instead of individual def's for each GPR.
Differential Revision: http://reviews.llvm.org/D5450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218305
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NAKAMURA Takumi [Tue, 23 Sep 2014 13:49:51 +0000 (13:49 +0000)]
ExecutionEngineTests: Call llvm_shutdown() on exit for ManagedStatic introduced in r218151.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218304
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Timur Iskhodzhanov [Tue, 23 Sep 2014 13:49:51 +0000 (13:49 +0000)]
Rebuild the inputs for the codeview-linetables.test with VS2013
Also provide reproducible instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218303
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Petar Jovanovic [Tue, 23 Sep 2014 12:54:19 +0000 (12:54 +0000)]
Do not destroy external linkage when deleting function body
The function deleteBody() converts the linkage to external and thus destroys
original linkage type value. Lack of correct linkage type causes wrong
relocations to be emitted later.
Calling dropAllReferences() instead of deleteBody() will fix the issue.
Differential Revision: http://reviews.llvm.org/D5415
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218302
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Chandler Carruth [Tue, 23 Sep 2014 11:15:19 +0000 (11:15 +0000)]
[x86] Teach the vector comment parsing and printing to correctly handle
undef in the shuffle mask. This shows up when we're printing comments
during lowering and we still have an IR-level constant hanging around
that models undef.
A nice consequence of this is *much* prettier test cases where the undef
lanes actually show up as undef rather than as a particular set of
values. This also allows us to print shuffle comments in cases that use
undef such as the recently added variable VPERMILPS lowering. Now those
test cases have nice shuffle comments attached with their details.
The shuffle lowering for PSHUFB has been augmented to use undef, and the
shuffle combining has been augmented to comprehend it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218301
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Chandler Carruth [Tue, 23 Sep 2014 10:08:29 +0000 (10:08 +0000)]
[x86] Teach the AVX1 path of the new vector shuffle lowering one more
trick that I missed.
VPERMILPS has a non-immediate memory operand mode that allows it to do
asymetric shuffles in the two 128-bit lanes. Use this rather than two
shuffles and a blend.
However, it turns out the variable shuffle path to VPERMILPS (and
VPERMILPD, although that one offers no functional differenc from the
immediate operand other than variability) wasn't even plumbed through
codegen. Do such plumbing so that we can reasonably emit
a variable-masked VPERMILP instruction. Also plumb basic comment parsing
and printing through so that the tests are reasonable.
There are still a few tests which don't show the shuffle pattern. These
are tests with undef lanes. I'll teach the shuffle decoding and printing
to handle undef mask entries in a follow-up. I've looked at the masks
and they seem reasonable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218300
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Michael Kuperstein [Tue, 23 Sep 2014 08:48:01 +0000 (08:48 +0000)]
Ensure bitcode encoding stays stable.
This includes constants, attributes, and some additional instructions not covered by previous tests.
Work was done by lama.saba@intel.com.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218297
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Argyrios Kyrtzidis [Tue, 23 Sep 2014 06:06:43 +0000 (06:06 +0000)]
[ADT/IntrusiveRefCntPtr] Give friend access to IntrusiveRefCntPtr<X> so the relevant move constructor can access 'Obj'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218295
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NAKAMURA Takumi [Tue, 23 Sep 2014 01:09:46 +0000 (01:09 +0000)]
Windows/DynamicLibrary.inc: Remove 'extern "C"' in ELM_Callback.
'extern "C" static' is not accepted by g++-4.7. Rather to tweak, I just removed 'extern "C"', since it doesn't affect the ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218290
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Sanjay Patel [Mon, 22 Sep 2014 22:46:44 +0000 (22:46 +0000)]
tighten up checks
We manage to generate all of the matching instructions (and a lot more) via
the reciprocal optimization function - even if we completely remove the square
root optimization. With CHECK_NEXT, we assure that we're executing the
expected square root optimization paths and not generating extra insts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218284
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Chris Bieneman [Mon, 22 Sep 2014 22:39:20 +0000 (22:39 +0000)]
Converting terminalHasColors mutex to a global ManagedStatic to avoid the static destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218283
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Chandler Carruth [Mon, 22 Sep 2014 22:29:42 +0000 (22:29 +0000)]
[x86] Rename X86ISD::VPERMILP to X86ISD::VPERMILPI (and the same for the
td pattern). Currently we only model the immediate operand variation of
VPERMILPS and VPERMILPD, we should make that clear in the pseudos used.
Will be adding support for the variable mask variant in my next commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218282
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Kaelyn Takata [Mon, 22 Sep 2014 22:17:59 +0000 (22:17 +0000)]
Fix a "typo" from my previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218281
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Kaelyn Takata [Mon, 22 Sep 2014 22:14:13 +0000 (22:14 +0000)]
Silence unused variable warnings in the new stub functions that occur
when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218280
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Sanjay Patel [Mon, 22 Sep 2014 21:52:53 +0000 (21:52 +0000)]
remove unnecessary labels; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218278
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Chandler Carruth [Mon, 22 Sep 2014 21:45:57 +0000 (21:45 +0000)]
[x86] Stub out the integer lowering of 256-bit vectors with AVX2
support. No interesting functionality yet, but this will let me
implement one vector type at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218277
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Yaron Keren [Mon, 22 Sep 2014 21:40:15 +0000 (21:40 +0000)]
In this callback ModuleName includes the file path.
Comparing ModuleName to the file names listed will
always fail.
I wonder how this code ever worked and what its
purpose was. Why exclude the msvc runtime DLLs
but not exclude all Windows system DLLs?
Anyhow, it does not function as intended.
clang-formatted as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218276
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Juergen Ributzka [Mon, 22 Sep 2014 21:08:53 +0000 (21:08 +0000)]
[FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1).
Shift-left immediate with sign-/zero-extensions also works for boolean values.
Update the assert and the test cases to reflect that fact.
This should fix a bug found by Chad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218275
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Ehsan Akhgari [Mon, 22 Sep 2014 20:40:36 +0000 (20:40 +0000)]
ms-inline-asm: Fix parsing label names inside bracket expressions
Summary:
This fixes a couple of issues. One is ensuring that AOK_Label rewrite
rules have a lower priority than AOK_Skip rules, as AOK_Skip needs to
be able to skip the brackets properly. The other part of the fix ensures
that we don't overwrite Identifier when looking up the identifier, and
that we use the locally available information to generate the AOK_Label
rewrite in ParseIntelIdentifier. Doing that in CreateMemForInlineAsm
would be problematic since the Start location there may point to the
beginning of a bracket expression, and not necessarily the beginning of
an identifier.
This also means that we don't need to carry around the InternlName field,
which helps simplify the code.
Test Plan: This will be tested on the clang side.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5445
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218270
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David Majnemer [Mon, 22 Sep 2014 20:39:23 +0000 (20:39 +0000)]
MC: ReadOnlyWithRel section kinds should map to rdata in COFF
Don't consider ReadOnlyWithRel as a writable section in COFF, they
really belong in .rdata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218268
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Chandler Carruth [Mon, 22 Sep 2014 20:25:08 +0000 (20:25 +0000)]
[x86] Introduce tests covering the gamut of 256-bit vector shuffling.
These are just test cases, no actual code yet. This establishes the
baseline fallback strategy we're starting from on AVX2 and the expected
lowering we use on AVX1.
Also, these test cases are very much generated. I've manually crafted
the specific pattern set that I'm hoping will be useful at exercising
the lowering code, but I've not (and could not) manually verify *all* of
these. I've spot checked and they seem legit to me.
As with the rest of vector shuffling, at a certain point the only really
useful way to check the correctness of this stuff is through fuzz
testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218267
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Ehsan Akhgari [Mon, 22 Sep 2014 19:49:07 +0000 (19:49 +0000)]
Make MCAsmParserSemaCallback::LookupInlineAsmLabel a pure virtual function
Summary:
r218229 made this function return a dummy nullptr in order to avoid
API breakage between clang/llvm.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5432
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218266
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Sanjay Patel [Mon, 22 Sep 2014 18:54:01 +0000 (18:54 +0000)]
Use broadcasts to optimize overall size when loading constant splat vectors (x86-64 with AVX or AVX2).
We generate broadcast instructions on CPUs with AVX2 to load some constant splat vectors.
This patch should preserve all existing behavior with regular optimization levels,
but also use splats whenever possible when optimizing for *size* on any CPU with AVX or AVX2.
The tradeoff is up to 5 extra instruction bytes for the broadcast instruction to save
at least 8 bytes (up to 31 bytes) of constant pool data.
Differential Revision: http://reviews.llvm.org/D5347
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218263
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Akira Hatanaka [Mon, 22 Sep 2014 18:07:20 +0000 (18:07 +0000)]
Fix test case commited in r218242 to appease buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218261
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Tom Stellard [Mon, 22 Sep 2014 16:44:04 +0000 (16:44 +0000)]
Revert "R600/SI: Add support for global atomic add"
This reverts commit r218254.
The global_atomics.ll test fails with asserts disabled. For some reason,
the compiler fails to produce the atomic no return variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218257
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Frederic Riss [Mon, 22 Sep 2014 16:17:32 +0000 (16:17 +0000)]
Fix a test introduced in r218246 to work also on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218255
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Tom Stellard [Mon, 22 Sep 2014 15:35:35 +0000 (15:35 +0000)]
R600/SI: Add support for global atomic add
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218254
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Tom Stellard [Mon, 22 Sep 2014 15:35:34 +0000 (15:35 +0000)]
R600/SI: Remove modifier operands from V_CNDMASK_B32_e64
Modifiers don't work for this instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218253
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Tom Stellard [Mon, 22 Sep 2014 15:35:32 +0000 (15:35 +0000)]
R600: Don't set BypassSlowDiv for 64-bit division
BypassSlowDiv is used by codegen prepare to insert a run-time
check to see if the operands to a 64-bit division are really 32-bit
values and if they are it will do 32-bit division instead.
This is not useful for R600, which has predicated control flow since
both the 32-bit and 64-bit paths will be executed in most cases. It
also increases code size which can lead to more instruction cache
misses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218252
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Tom Stellard [Mon, 22 Sep 2014 15:35:30 +0000 (15:35 +0000)]
R600/SI: Use ISD::MUL instead of ISD::UMULO when lowering division
ISD::MUL and ISD:UMULO are the same except that UMULO sets an overflow
bit. Since we aren't using the overflow bit, we should use ISD::MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218251
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Tom Stellard [Mon, 22 Sep 2014 15:35:29 +0000 (15:35 +0000)]
R600/SI: Add enums for some hard-coded values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218250
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Pavel Chupin [Mon, 22 Sep 2014 13:11:35 +0000 (13:11 +0000)]
[x32] Fix segmented stacks support
Summary:
Update segmented-stacks*.ll tests with x32 target case and make
corresponding changes to make them pass.
Test Plan: tests updated with x32 target
Reviewers: nadav, rafael, dschuff
Subscribers: llvm-commits, zinovy.nis
Differential Revision: http://reviews.llvm.org/D5245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218247
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Frederic Riss [Mon, 22 Sep 2014 12:36:04 +0000 (12:36 +0000)]
[dwarfdump] Dump full filenames as DW_AT_(decl|call)_file attribute values
Reviewers: dblaikie samsonov
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5192
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218246
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Frederic Riss [Mon, 22 Sep 2014 12:35:53 +0000 (12:35 +0000)]
Allow DWARFDebugInfoEntryMinimal::getSubroutineName to resolve cross-unit references.
Summary: getSubroutineName is currently only used by llvm-symbolizer, thus add a binary test containing a cross-cu inlining example.
Reviewers: samsonov, dblaikie
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218245
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Robert Lougher [Mon, 22 Sep 2014 11:54:38 +0000 (11:54 +0000)]
Fix assert when decoding PSHUFB mask
The PSHUFB mask decode routine used to assert if the mask index was out of
range (<0 or greater than the size of the vector). The problem is, we can
legitimately have a PSHUFB with a large index using intrinsics. The
instruction only uses the least significant 4 bits. This change removes the
assert and masks the index to match the instruction behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218242
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Oliver Stannard [Mon, 22 Sep 2014 10:45:16 +0000 (10:45 +0000)]
Downgrade DWARF2 section limit error to a warning
We currently emit an error when trying to assemble a file with more
than one section using DWARF2 debug info. This should be a warning
instead, as the resulting file will still be usable, but with a
degraded debug illusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218241
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Hal Finkel [Mon, 22 Sep 2014 06:47:10 +0000 (06:47 +0000)]
Update comment on AtomicRMWInst::Nand
As of July 2014, all backends have been updated to implement
AtomicRMWInst::Nand as ~(x & y) (and not as x & ~y, as some did previously).
This was added to the release notes in r212635 (and the LangRef had been
changed), but it seems that we forgot to update the header-file description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218236
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Chandler Carruth [Mon, 22 Sep 2014 03:05:23 +0000 (03:05 +0000)]
[x86] Move the AVX v4i64 test cases down to group them together.
Increasingly I don't want to mix the integer and floating point tests,
especially with AVX where they are handled quite differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218233
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Jiangning Liu [Mon, 22 Sep 2014 02:23:05 +0000 (02:23 +0000)]
Add two thresholds lvi-overdefined-BB-threshold and lvi-overdefined-threshold
for LVI algorithm. For a specific value to be lowered, when the number of basic
blocks being checked for overdefined lattice value is larger than
lvi-overdefined-BB-threshold, or the times of encountering overdefined value
for a single basic block is larger than lvi-overdefined-threshold, the LVI
algorithm will stop further lowering the lattice value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218231
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Ehsan Akhgari [Mon, 22 Sep 2014 02:21:35 +0000 (02:21 +0000)]
ms-inline-asm: Add a sema callback for looking up label names
The implementation of the callback in clang's Sema will return an
internal name for labels.
Test Plan: Will be tested in clang.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D4587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218229
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Chandler Carruth [Mon, 22 Sep 2014 00:32:15 +0000 (00:32 +0000)]
[x86] Back out a bad choice about lowering v4i64 and pave the way for
a more sane approach to AVX2 support.
Fundamentally, there is no useful way to lower integer vectors in AVX.
None. We always end up with a VINSERTF128 in the end, so we might as
well eagerly switch to the floating point domain and do everything
there. This cleans up lots of weird and unlikely to be correct
differences between integer and floating point shuffles when we only
have AVX1.
The other nice consequence is that by doing things this way we will make
it much easier to write the integer lowering routines as we won't need
to duplicate the logic to check for AVX vs. AVX2 in each one -- if we
actually try to lower a 256-bit vector as an integer vector, we have
AVX2 and can rely on it. I think this will make the code much simpler
and more comprehensible.
Currently, I've disabled *all* support for AVX2 so that we always fall
back to AVX. This keeps everything working rather than asserting. That
will go away with the subsequent series of patches that provide
a baseline AVX2 implementation.
Please note, I'm going to implement AVX2 *without access to hardware*.
That means I cannot correctness test this path. I will be relying on
those with access to AVX2 hardware to do correctness testing and fix
bugs here, but as a courtesy I'm trying to sketch out the framework for
the new-style vector shuffle lowering in the context of the AVX2 ISA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218228
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Chandler Carruth [Sun, 21 Sep 2014 23:46:13 +0000 (23:46 +0000)]
[x86] Teach the new vector shuffle lowering how to cleverly lower single
input v8f32 shuffles which are not 128-bit lane crossing but have
different shuffle patterns in the low and high lanes. This removes most
of the extract/insert traffic that was unnecessary and is particularly
good at lowering cases where only one of the two lanes is shuffled at
all.
I've also added a collection of test cases with undef lanes because this
lowering is somewhat more sensitive to undef lanes than others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218226
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Chandler Carruth [Sun, 21 Sep 2014 23:32:42 +0000 (23:32 +0000)]
[x86] Add a bunch of test cases where we have different shuffle patterns
in the high and low 128-bit lanes of a v8f32 vector.
No functionality change yet, but wanted to set up the baseline for my
next patch which will make these quite a bit better. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218224
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Matt Arsenault [Sun, 21 Sep 2014 17:27:32 +0000 (17:27 +0000)]
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218223
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Matt Arsenault [Sun, 21 Sep 2014 17:27:31 +0000 (17:27 +0000)]
Use llvm_unreachable instead of assert(!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218222
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Matt Arsenault [Sun, 21 Sep 2014 17:27:28 +0000 (17:27 +0000)]
R600/SI: Don't use strings for single characters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218221
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Lang Hames [Sun, 21 Sep 2014 17:21:56 +0000 (17:21 +0000)]
Remove redundant if test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218220
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Sanjay Patel [Sun, 21 Sep 2014 15:19:15 +0000 (15:19 +0000)]
Refactor reciprocal square root estimate into target-independent function; NFC.
This is purely a plumbing patch. No functional changes intended.
The ultimate goal is to allow targets other than PowerPC (certainly X86 and Aarch64) to turn this:
z = y / sqrt(x)
into:
z = y * rsqrte(x)
using whatever HW magic they can use. See http://llvm.org/bugs/show_bug.cgi?id=20900 .
The first step is to add a target hook for RSQRTE, take the already target-independent code selfishly hoarded by PPC, and put it into DAGCombiner.
Next steps:
The code in DAGCombiner::BuildRSQRTE() should be refactored further; tests that exercise that logic need to be added.
Logic in PPCTargetLowering::BuildRSQRTE() should be hoisted into DAGCombiner.
X86 and AArch64 overrides for TargetLowering.BuildRSQRTE() should be added.
Differential Revision: http://reviews.llvm.org/D5425
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218219
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Sanjay Patel [Sun, 21 Sep 2014 14:48:16 +0000 (14:48 +0000)]
mop up: "Don’t duplicate function or class name at the beginning of the comment."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218218
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Chandler Carruth [Sun, 21 Sep 2014 13:37:51 +0000 (13:37 +0000)]
[x86] With the stronger canonicalization of shuffles added in r218216,
the new vector shuffle lowering no longer needs to check both symmetric
forms of UNPCK patterns for v4f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218217
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Chandler Carruth [Sun, 21 Sep 2014 13:35:14 +0000 (13:35 +0000)]
[x86] Teach the new vector shuffle lowering to re-use the SHUFPS
lowering when it can use a symmetric SHUFPS across both 128-bit lanes.
This required making the SHUFPS lowering tolerant of other vector types,
and adjusting our canonicalization to canonicalize harder.
This is the last of the clever uses of symmetry I've thought of for
v8f32. The rest of the tricks I'm aware of here are to work around
assymetry in the mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218216
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Chandler Carruth [Sun, 21 Sep 2014 13:03:00 +0000 (13:03 +0000)]
[x86] Refactor the logic to form SHUFPS instruction patterns to lower
a generic vector shuffle mask into a helper that isn't specific to the
other things that influence which choice is made or the specific types
used with the instruction.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218215
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Chandler Carruth [Sun, 21 Sep 2014 12:49:46 +0000 (12:49 +0000)]
[x86] Teach the new vector shuffle lowering the basics about insertion
of a single element into a zero vector for v4f64 and v4i64 in AVX.
Ironically, there is less to see here because xor+blend is so crazy fast
that we can't really beat that to zero the high 128-bit lane.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218214
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Chandler Carruth [Sun, 21 Sep 2014 12:20:44 +0000 (12:20 +0000)]
[x86] Teach the new vector shuffle lowering how to lower to UNPCKLPS and
UNPCKHPS with AVX vectors by recognizing those patterns when they are
repeated for both 128-bit lanes.
With this, we now generate the exact same (really nice) code for
Quentin's avx_test_case.ll which was the most significant regression
reported for the new shuffle lowering. In fact, I'm out of specific test
cases for AVX lowering, the rest were AVX2 I think. However, there are
a bunch of pretty obvious remaining things to improve with AVX...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218213
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Chandler Carruth [Sun, 21 Sep 2014 12:13:11 +0000 (12:13 +0000)]
[x86] Add test cases for UNPCK instructions with v8f32 AVX vectors in
preparation for enhancing their support in the new vector shuffle
lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218212
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Chandler Carruth [Sun, 21 Sep 2014 12:01:19 +0000 (12:01 +0000)]
[x86] Begin teaching the new vector shuffle lowering among the most
important bits of cleverness: to detect and lower repeated shuffle
patterns between the two 128-bit lanes with a single instruction.
This patch just teaches it how to lower single-input shuffles that fit
this model using VPERMILPS. =] There is more that needs to happen here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218211
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Chandler Carruth [Sun, 21 Sep 2014 11:51:33 +0000 (11:51 +0000)]
[x86] Regenerate this test case now that I've improved my script for
generating the test cases to format things more consistently and
actually catch all the operand sequences that should be elided in favor
of the asm comments. No actual changes here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218210
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Chandler Carruth [Sun, 21 Sep 2014 11:40:39 +0000 (11:40 +0000)]
[x86] Explicitly lower to a blend early if it is trivial to do so for
v8f32 shuffles in the new vector shuffle lowering code.
This is very cheap to do and makes it much more clear that anything more
expensive but overlapping with this lowering should be selected
afterward (for example using AVX2's VPERMPS). However, no functionality
changed here as without this code we would fall through to create no-op
shuffles of each input and a blend. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218209
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Chandler Carruth [Sun, 21 Sep 2014 11:17:55 +0000 (11:17 +0000)]
[x86] Teach the new vector shuffle lowering of v4f64 to prefer a direct
VBLENDPD over using VSHUFPD. While the 256-bit variant of VBLENDPD slows
down to the same speed as VSHUFPD on Sandy Bridge CPUs, it has twice the
reciprocal throughput on Ivy Bridge CPUs much like it does everywhere
for 128-bits. There isn't a downside, so just eagerly use this
instruction when it suffices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218208
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Chandler Carruth [Sun, 21 Sep 2014 11:12:19 +0000 (11:12 +0000)]
[x86] Add some more comprehensive tests for v4f64 blending.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218207
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Chandler Carruth [Sun, 21 Sep 2014 11:07:41 +0000 (11:07 +0000)]
[x86] Re-generate a bunch of the v4f64 test cases with my new script.
This expands the integer cases to cover the fact that AVX2 moves their
lane-crossing shuffles into the integer domain. It also adds proper
support for AVX2 run lines and the "ALL" group when it doesn't matter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218206
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Chandler Carruth [Sun, 21 Sep 2014 10:36:12 +0000 (10:36 +0000)]
[x86] Switch the blend implementation to use a MVT switch rather than
awkward conditions. The readability improvement of this will be even
more important as I generalize it to handle more types.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218205
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Chandler Carruth [Sun, 21 Sep 2014 10:27:14 +0000 (10:27 +0000)]
[x86] Remove some essentially lying comments from the v4f64 path of the
new vector shuffle lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218204
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Chandler Carruth [Sun, 21 Sep 2014 09:35:25 +0000 (09:35 +0000)]
[x86] Fix a helper to reflect that what we actually care about is
128-bit lane crossings, not 'half' crossings. This came up in code
review ages ago, but I hadn't really addresesd it. Also added some
documentation for the helper.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218203
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Chandler Carruth [Sun, 21 Sep 2014 09:35:22 +0000 (09:35 +0000)]
[x86] Teach the new vector shuffle lowering the first step toward more
actual support for complex AVX shuffling tricks. We can do independent
blends of the low and high 128-bit lanes of an avx vector, so shuffle
the inputs into place and then do the blend at 256 bits. This will in
many cases remove one blend instruction.
The next step is to permute the low and high halves in-place rather than
extracting them and re-inserting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218202
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David Majnemer [Sun, 21 Sep 2014 09:18:07 +0000 (09:18 +0000)]
MC: Support aligned COMMON symbols for COFF
link.exe:
Fuzz testing has shown that COMMON symbols with size > 32 will always
have an alignment of at least 32 and all symbols with size < 32 will
have an alignment of at least the largest power of 2 less than the size
of the symbol.
binutils:
The BFD linker essentially work like the link.exe behavior but with
alignment 4 instead of 32. The BFD linker also supports an extension to
COFF which adds an -aligncomm argument to the .drectve section which
permits specifying a precise alignment for a variable but MC currently
doesn't support editing .drectve in this way.
With all of this in mind, we decide to play a little trick: we can
ensure that the alignment will be respected by bumping the size of the
global to it's alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218201
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Chandler Carruth [Sun, 21 Sep 2014 09:01:26 +0000 (09:01 +0000)]
[x86] Add some more test cases covering specific blend patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218200
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Chandler Carruth [Sun, 21 Sep 2014 08:49:27 +0000 (08:49 +0000)]
[x86] Add the beginnings of some tests for our v8f32 shuffle lowering
under AVX.
This really just documents the current state of the world. I'm going to
try to flesh it out to cover any test cases I plan to improve prior to
improving them so that the delta made by changes is actually visible to
code reviewers.
This is made easier by the fact that I now have a script to automate the
process of producing test cases including the check lines. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218199
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NAKAMURA Takumi [Sat, 20 Sep 2014 23:58:13 +0000 (23:58 +0000)]
RTDyldMemoryManager::getSymbolAddress(): Make sure to return 0 if symbol name is not met. [-Wreturn-type]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218195
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Sanjay Patel [Sat, 20 Sep 2014 22:39:16 +0000 (22:39 +0000)]
mop up: "Don’t duplicate function or class name at the beginning of the comment."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218194
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Chandler Carruth [Sat, 20 Sep 2014 22:09:27 +0000 (22:09 +0000)]
[x86] Teach the new vector shuffle lowering to use VPERMILPD for
single-input shuffles with doubles. This allows them to fold memory
operands into the shuffle, etc. This is just the analog to the v4f32
case in my prior commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218193
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Chandler Carruth [Sat, 20 Sep 2014 21:26:41 +0000 (21:26 +0000)]
[x86] Add an AVX run to the 128-bit v2 tests, teach them to have
a generic SSE and AVX mode in addition to a specific AVX1 test path, and
flesh out the AVX tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218192
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David Majnemer [Sat, 20 Sep 2014 21:18:43 +0000 (21:18 +0000)]
Update tests which broke from r218189
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218191
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Chandler Carruth [Sat, 20 Sep 2014 20:52:07 +0000 (20:52 +0000)]
[x86] Teach the new vector shuffle lowering to use the AVX VPERMILPS
instruction for single-vector floating point shuffles. This in turn
allows the shuffles to fold a load into the instruction which is one of
the common regressions hit with the new shuffle lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218190
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David Majnemer [Sat, 20 Sep 2014 20:40:50 +0000 (20:40 +0000)]
MC: Fix MCSectionCOFF::PrintSwitchToSection
We had a few bugs:
- We were considering the GVKind instead of just looking at the section
characteristics
- We would never print out 'y' when a section was meant to be unreadable
- We would never print out 's' when a section was meant to be shared
- We translated IMAGE_SCN_MEM_DISCARDABLE to 'n' when it should've meant
IMAGE_SCN_LNK_REMOVE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218189
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Chandler Carruth [Sat, 20 Sep 2014 18:36:39 +0000 (18:36 +0000)]
[x86] Start moving to a fancier check syntax to reduce the need for
duplication of check lines. The idea is to have broad sets of
compilation modes that will frequently diverge without having to always
and immediately explode to the precise ISA feature set.
While this already helps due to VEX encoded differences, it will help
much more as I teach the new shuffle lowering about more of the new VEX
encoded instructions which can still be used to implement 128-bit
shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218188
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Lang Hames [Sat, 20 Sep 2014 17:44:56 +0000 (17:44 +0000)]
[MCJIT] Make RTDyldMemoryManager::getSymbolAddress's behaviour more consistent.
This patch modifies RTDyldMemoryManager::getSymbolAddress(Name)'s behavior to
make it consistent with how clients are using it: Name should be mangled, and
getSymbolAddress should demangle it on the caller's behalf before looking the
name up in the process. This patch also fixes the one client
(MCJIT::getPointerToFunction) that had been passing unmangled names (by having
it pass mangled names instead).
Background:
RTDyldMemoryManager::getSymbolAddress(Name) has always used a re-try mechanism
when looking up symbol names in the current process. Prior to this patch
getSymbolAddress first tried to look up 'Name' exactly as the user passed it in
and then, if that failed, tried to demangle 'Name' and re-try the look up. The
implication of this behavior is that getSymbolAddress expected to be called with
unmangled names, and that handling mangled names was a fallback for convenience.
This is inconsistent with how clients (particularly the RuntimeDyldImpl
subclasses, but also MCJIT) usually use this API. Most clients pass in mangled
names, and succeed only because of the fallback case. For clients passing in
mangled names, getSymbolAddress's old behavior was actually dangerous, as it
could cause unmangled names in the process to shadow mangled names being looked
up.
For example, consider:
foo.c:
int _x = 7;
int x() { return _x; }
foo.o:
000000000000000c D __x
0000000000000000 T _x
If foo.c becomes part of the process (E.g. via dlopen("libfoo.dylib")) it will
add symbols 'x' (the function) and '_x' (the variable) to the process. However
jit clients looking for the function 'x' will be using the mangled function name
'_x' (note how function 'x' appears in foo.o). When getSymbolAddress goes
looking for '_x' it will find the variable instead, and return its address and
in place of the function, leading to JIT'd code calling the variable and
crashing (if we're lucky).
By requiring that getSymbolAddress be called with mangled names, and demangling
only when we're about to do a lookup in the process, the new behavior
implemented in this patch should eliminate any chance of names being shadowed
during lookup.
There's no good way to test this at the moment: This issue only arrises when
looking up process symbols (not JIT'd symbols). Any test case would have to
generate a platform-appropriate dylib to pass to llvm-rtdyld, and I'm not
aware of any in-tree tool for doing this in a portable way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218187
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Justin Bogner [Sat, 20 Sep 2014 17:19:52 +0000 (17:19 +0000)]
llvm-cov: Allow creating CoverageMappings from filenames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218185
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Justin Bogner [Sat, 20 Sep 2014 15:31:56 +0000 (15:31 +0000)]
llvm-cov: Disentangle the coverage data logic from the display (NFC)
This splits the logic for actually looking up coverage information
from the logic that displays it. These were tangled rather thoroughly
so this change is a bit large, but it mostly consists of moving things
around. The coverage lookup logic itself now lives in the library,
rather than being spread between the library and the tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218184
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Justin Bogner [Sat, 20 Sep 2014 15:31:51 +0000 (15:31 +0000)]
llvm-cov: Move some reader debug output out of the tool.
This debug output is really for testing CoverageMappingReader, not the
llvm-cov tool. Move it to where it can be more useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218183
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Lenny Maiorani [Sat, 20 Sep 2014 13:29:20 +0000 (13:29 +0000)]
Using a deque to manage the stack of nodes is faster here.
Vector is slow due to many reallocations as the size regularly changes in
unpredictable ways. See the investigation provided on the mailing list for
more information:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-
20120116/135228.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218182
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David Majnemer [Sat, 20 Sep 2014 07:31:46 +0000 (07:31 +0000)]
MC: Treat ReadOnlyWithRel and ReadOnlyWithRelLocal as ReadOnly for COFF
A problem with our old behavior becomes observable under x86-64 COFF
when we need a read-only GV which has an initializer which is referenced
using a relocation: we would mark the section as writable. Marking the
section as writable interferes with section merging.
This fixes PR21009.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218179
91177308-0d34-0410-b5e6-
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Chandler Carruth [Sat, 20 Sep 2014 04:15:22 +0000 (04:15 +0000)]
[x86] Teach the v4f32 path of the new shuffle lowering to handle the
tricky case of single-element insertion into the zero lane of a zero
vector.
We can't just use the same pattern here as we do in every other vector
type because the general insertion logic can handle insertion into the
non-zero lane of the vector. However, in SSE4.1 with v4f32 vectors we
have INSERTPS that is a much better choice than the generic one for such
lowerings. But INSERTPS can do lots of other lowerings as well so
factoring its logic into the general insertion logic doesn't work very
well. We also can't just extract the core common part of the general
insertion logic that is faster (forming VZEXT_MOVL synthetic nodes that
lower to MOVSS when they can) because VZEXT_MOVL is often *faster* than
a blend while INSERTPS is slower! So instead we do a restrictive
condition on attempting to use the generic insertion logic to narrow it
to those cases where VZEXT_MOVL won't need a shuffle afterward and thus
will do better than INSERTPS. Then we try blending. Then we go back to
INSERTPS.
This still doesn't generate perfect code for some silly reasons that can
be fixed by tweaking the td files for lowering VZEXT_MOVL to use
XORPS+BLENDPS when available rather than XORPS+MOVSS when the input ends
up in a register rather than a load from memory -- BLENDPSrr has twice
the reciprocal throughput of MOVSSrr. Don't you love this ISA?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218177
91177308-0d34-0410-b5e6-
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Chandler Carruth [Sat, 20 Sep 2014 03:57:01 +0000 (03:57 +0000)]
[x86] Refactor the code for emitting INSERTPS to reuse the zeroable mask
analysis used elsewhere. This removes the last duplicate of this logic.
Also simplify the code here quite a bit. No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218176
91177308-0d34-0410-b5e6-
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Chandler Carruth [Sat, 20 Sep 2014 03:32:25 +0000 (03:32 +0000)]
[x86] Generalize the single-element insertion lowering to work with
floating point types and use it for both v2f64 and v2i64 single-element
insertion lowering.
This fixes the last non-AVX performance regression test case I've gotten
of for the new vector shuffle lowering. There is obvious analogous
lowering for v4f32 that I'll add in a follow-up patch (because with
INSERTPS, v4f32 requires special treatment). After that, its AVX stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218175
91177308-0d34-0410-b5e6-
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Chandler Carruth [Sat, 20 Sep 2014 02:44:21 +0000 (02:44 +0000)]
[x86] Replace some duplicated logic reasoning about whether particular
vector lanes can be modeled as zero with a call to the new function that
computes a bit-vector representing that information.
No functionality changed here, but will allow doing more clever things
with the zero-test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218174
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David Majnemer [Sat, 20 Sep 2014 00:25:06 +0000 (00:25 +0000)]
llvm-readobj: pretty-print special COFF section names
Print IMAGE_SYM_DEBUG and the like instead of (-2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218172
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Peter Collingbourne [Sat, 20 Sep 2014 00:10:47 +0000 (00:10 +0000)]
Fix crash with an insertvalue that produces an empty object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218171
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Robin Morisset [Fri, 19 Sep 2014 23:56:46 +0000 (23:56 +0000)]
[X86] Erase some obsolete comments from README.txt
I just tried reproducing some of the optimization failures in README.txt in the
X86 backend, and many of them could not be reproduced. In general the entire
file appears quite bit-rotted, whatever interesting parts remain should be
moved to bugzilla, and the rest deleted. I did not spend the time to do that,
so I just deleted the few I tried reproducing which are obsolete, to save some
time to whoever will find the courage to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218170
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Fri, 19 Sep 2014 23:30:42 +0000 (23:30 +0000)]
constify the TargetMachine being passed through the Mips subtarget
creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218169
91177308-0d34-0410-b5e6-
96231b3b80d8