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20 months agoMAINTAINERS: Inherit from nanoMIPS
Philippe Mathieu-Daudé [Sun, 30 Oct 2022 22:38:49 +0000 (23:38 +0100)]
MAINTAINERS: Inherit from nanoMIPS

6 months ago Stefan Pejic stepped in as nanoMIPS maintainer
(see commit a 8e0e23445a "target/mips: Undeprecate nanoMIPS
ISA support in QEMU"), however today his email is bouncing:

  ** Message blocked **

  Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information.

  The response from the remote server was:
  550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com]

To avoid unmaintained code, I feel forced to merge this code
back with the generic MIPS section.

Historical references:
- https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/
- https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/

Cc: Vince Del Vecchio <Vince.DelVecchio@mediatek.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <49f41916-687f-b9e5-2de7-9c658fe0d4c7@linaro.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-6-philmd@linaro.org>

20 months agodisas/nanomips: Tidy read for 48-bit opcodes
Richard Henderson [Sun, 6 Nov 2022 02:37:33 +0000 (13:37 +1100)]
disas/nanomips: Tidy read for 48-bit opcodes

There is no point in looking for a 48-bit opcode if we've
not read the second word for a 32-bit opcode.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221106023735.5277-5-richard.henderson@linaro.org>

20 months agodisas/nanomips: Split out read_u16
Richard Henderson [Sun, 6 Nov 2022 02:37:32 +0000 (13:37 +1100)]
disas/nanomips: Split out read_u16

Split out a helper function for reading a uint16_t
with the correct endianness.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221106023735.5277-4-richard.henderson@linaro.org>

20 months agodisas/nanomips: Merge insn{1,2,3} into words[3]
Richard Henderson [Sun, 6 Nov 2022 21:28:48 +0000 (08:28 +1100)]
disas/nanomips: Merge insn{1,2,3} into words[3]

Since Disassemble wants the data in this format, collect
it that way.  This allows using a loop to print the bytes.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221106212852.152384-3-richard.henderson@linaro.org>

20 months agodisas/nanomips: Move setjmp into nanomips_dis
Richard Henderson [Sun, 6 Nov 2022 21:28:47 +0000 (08:28 +1100)]
disas/nanomips: Move setjmp into nanomips_dis

Reduce the number of local variables within the scope of the
setjmp by moving it to the existing helper.  The actual length
returned from Disassemble is not used, because we have already
determined the length while reading bytes.  Fixes:

nanomips.c: In function ‘print_insn_nanomips’:
nanomips.c:21925:14: error: variable ‘insn1’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered]
nanomips.c:21925:25: error: variable ‘insn2’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered]
nanomips.c:21925:36: error: variable ‘insn3’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered]
nanomips.c:21926:22: error: variable ‘buf’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Werror=clobbered]

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221106212852.152384-2-richard.henderson@linaro.org>

20 months agodisas/nanomips: Remove headers already included by "qemu/osdep.h"
Philippe Mathieu-Daudé [Tue, 1 Nov 2022 11:44:57 +0000 (12:44 +0100)]
disas/nanomips: Remove headers already included by "qemu/osdep.h"

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-5-philmd@linaro.org>

20 months agodisas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats
Philippe Mathieu-Daudé [Tue, 1 Nov 2022 11:44:56 +0000 (12:44 +0100)]
disas/nanomips: Use G_GNUC_PRINTF to avoid invalid string formats

Suggested-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-4-philmd@linaro.org>

20 months agodisas/nanomips: Fix invalid PRIx64 format calling img_format()
Philippe Mathieu-Daudé [Tue, 1 Nov 2022 11:44:55 +0000 (12:44 +0100)]
disas/nanomips: Fix invalid PRIx64 format calling img_format()

Fix:

  disas/nanomips.c:12231:62: warning: format specifies type 'char *' but the argument has type 'uint64' (aka 'unsigned long long') [-Wformat]
    return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value);
                                               ~~            ^~~~~~~~~~~
                                               %llu

Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions")
Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-3-philmd@linaro.org>

20 months agodisas/nanomips: Fix invalid PRId64 format calling img_format()
Philippe Mathieu-Daudé [Tue, 1 Nov 2022 11:44:54 +0000 (12:44 +0100)]
disas/nanomips: Fix invalid PRId64 format calling img_format()

Fix warnings such:

  disas/nanomips.c:3251:64: warning: format specifies type 'char *' but the argument has type 'int64' (aka 'long long') [-Wformat]
    return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs);
                                            ~~                 ^~~~~~~
                                            %lld

To avoid crashes such (kernel from commit f375ad6a0d):

  $ qemu-system-mipsel -cpu I7200 -d in_asm -kernel generic_nano32r6el_page4k
  ...
  ----------------
  IN: __bzero
  0x805c6084:  20c4 6950      ADDU r13, a0, a2
  0x805c6088:  9089           ADDIU a0, 1
  Process 70261 stopped
  * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0)
      frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4
  libsystem_platform.dylib`:
  ->  0x1bfe38864 <+4>:  ldr    q0, [x1]
      0x1bfe38868 <+8>:  adr    x3, #-0xc8                ; ___lldb_unnamed_symbol314
      0x1bfe3886c <+12>: ldr    q2, [x3], #0x10
      0x1bfe38870 <+16>: and    x2, x0, #0xf
  Target 0: (qemu-system-mipsel) stopped.
  (lldb) bt
  * thread #6, stop reason = EXC_BAD_ACCESS (code=1, address=0xfffffffffffffff0)
    * frame #0: 0x00000001bfe38864 libsystem_platform.dylib`_platform_strlen + 4
      frame #1: 0x00000001bfce76a0 libsystem_c.dylib`__vfprintf + 4544
      frame #2: 0x00000001bfd158b4 libsystem_c.dylib`_vasprintf + 280
      frame #3: 0x0000000101c22fb0 libglib-2.0.0.dylib`g_vasprintf + 28
      frame #4: 0x0000000101bfb7d8 libglib-2.0.0.dylib`g_strdup_vprintf + 32
      frame #5: 0x000000010000fb70 qemu-system-mipsel`img_format(format=<unavailable>) at nanomips.c:103:14 [opt]
      frame #6: 0x0000000100018868 qemu-system-mipsel`SB_S9_(instruction=<unavailable>, info=<unavailable>) at nanomips.c:12616:12 [opt]
      frame #7: 0x000000010000f90c qemu-system-mipsel`print_insn_nanomips at nanomips.c:589:28 [opt]

Fixes: 4066c152b3 ("disas/nanomips: Remove IMMEDIATE functions")
Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-2-philmd@linaro.org>

20 months agotarget/mips: Don't check COP1X for 64 bit FP mode
Jiaxun Yang [Wed, 2 Nov 2022 16:57:18 +0000 (16:57 +0000)]
target/mips: Don't check COP1X for 64 bit FP mode

Some implementations (i.e. Loongson-2F) may decide to implement
a 64 bit FPU without implementing COP1X instructions.

As the eligibility of 64 bit FP instructions is already determined
by CP0St_FR, there is no need to check for COP1X again.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221102165719.190378-1-jiaxun.yang@flygoat.com>
[PMD: Add missing trailing parenthesis (buildfix)]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
20 months agotarget/mips: Disable DSP ASE for Octeon68XX
Jiaxun Yang [Mon, 31 Oct 2022 13:25:31 +0000 (13:25 +0000)]
target/mips: Disable DSP ASE for Octeon68XX

I don't have access to Octeon68XX hardware but according
to my investigation Octeon never had DSP ASE support.

As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" CP0C3_DSPP is reserved bit and read as 0. Also I do have
access to a Ubiquiti Edgerouter 4 which has Octeon CN7130 processor
and I can confirm CP0C3_DSPP is read as 0 on that processor.

Further more, in linux kernel:
arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
cpu_has_dsp is overridden as 0.

So I believe we shouldn't emulate DSP in QEMU as well.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <20221031132531.18122-4-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
20 months agotarget/mips: Enable LBX/LWX/* instructions for Octeon
Pavel Dovgalyuk [Tue, 1 Nov 2022 05:29:44 +0000 (08:29 +0300)]
target/mips: Enable LBX/LWX/* instructions for Octeon

This patch changes condition and function name for enabling
indexed load instructions for Octeon vCPUs. Octeons do not
have DSP extension, but implement LBX-and-others.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <166728058455.229236.13834649461181619195.stgit@pasha-ThinkPad-X280>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
20 months agotarget/mips: Cast offset field of Octeon BBIT to int16_t
Jiaxun Yang [Mon, 31 Oct 2022 13:25:30 +0000 (13:25 +0000)]
target/mips: Cast offset field of Octeon BBIT to int16_t

As per "Cavium Networks OCTEON Plus CN50XX Hardware Reference
Manual" offset field is signed 16 bit value. However arg_BBIT.offset
is unsigned. We need to cast it as signed to do address calculation.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221031132531.18122-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
20 months agotarget/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
Jiaxun Yang [Mon, 31 Oct 2022 13:25:29 +0000 (13:25 +0000)]
target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F

As per an unpublished document, in later reversion of chips
CP0St_{KX, SX, UX} is not writeable and hardcoded to 1.

Without those bits set, kernel is unable to access XKPHYS address
segment. So just set them up on CPU reset.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221031132531.18122-2-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
20 months agoMerge tag 'pull-request-2022-11-06' of https://gitlab.com/thuth/qemu into staging
Stefan Hajnoczi [Mon, 7 Nov 2022 10:44:44 +0000 (05:44 -0500)]
Merge tag 'pull-request-2022-11-06' of https://gitlab.com/thuth/qemu into staging

* e1000e qtest improvements
* Allow TLS PSK tests on win32
* Increase the timeout of the clang-user CI job
* Some s390x fixes for QEMU 7.2

# -----BEGIN PGP SIGNATURE-----
#
# iQJEBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmNn0vMRHHRodXRoQHJl
# ZGhhdC5jb20ACgkQLtnXdP5wLbXCoQ/1HXhfnPv/sIjdfJqC0M5/DjpOz2VM/fTb
# g/GGf3EiAlbnK09rjvZA939PAar+MQzBC5YJkn77jX6KFAyeQrQR3xCHIsjgeR+S
# c9v5Ix+OD4WAZHMwQ4XFtK5gxIqYHXY9kkBXqJspPC4BbQRRF4wfLXS5z7Mny7pH
# goz2F2FBCaT+hMK7Z8ibh2trdGEAevCoG6rRRUCkgrURy7mGy4fMiSyXHMOR8OD2
# quxUj+1aq57jdqPGix45pqzRNot6SRkqRuJXruSHJ3nV1ZV1192LiHPA1tUZIPpt
# pKNt2HJwcWJY0letAA9zB/xwwX8GppGrnJq65RKprSZXWLFHevM/jXx44KxPCWAz
# X7ASSpyX2ZW6H6MNyWpt+Bs66x0x6j6XYL0nPU4rmVeGteimnKyzYTcWlOcVA3Zp
# LDov8wIBlxTaQPK9RfrgvdiAR9RnH9OHUiSZVIhl9lJycQr2URLRM6pVXGDhXL/O
# YMe6gxoui8es4blXuMeEJfo1PWrZGsvY+sb0Ixz2+AFO/CT8HQYWVkK6lH2j9ymK
# NjDKmfFmNfzv/JA25CqDhY3/eUjLn3Nej2up9tzJBtddHjaqvaN1EzBpLipX42M1
# +QnfzP6WTimMgP+QznT0Y1OE1irJyAi/jNW7lUWcrtMHqSQSgexuLjljVBgyVZls
# 2AyGTz/g+Q==
# =w9Q7
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 06 Nov 2022 10:29:55 EST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2022-11-06' of https://gitlab.com/thuth/qemu:
  s390x/cpu topology: add max_threads machine class attribute
  s390x: Register TYPE_S390_CCW_MACHINE properties as class properties
  s390x/pci: RPCIT second pass when mappings exhausted
  s390x/css: revert SCSW ctrl/flag bits on error
  gitlab-ci: increase clang-user timeout
  tests/qtest: migration-test: Enable TLS PSK tests for win32
  tests/qtest: Fix two format strings
  tests/qtest/libqos/e1000e: Use IVAR shift definitions
  tests/qtest/libqos/e1000e: Use E1000_STATUS_ASDV_1000
  tests/qtest/e1000e-test: Use e1000_regs.h
  tests/qtest/libqos/e1000e: Set E1000_CTRL_SLU
  tests/qtest/libqos/e1000e: Refer common PCI ID definitions

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Stefan Hajnoczi [Mon, 7 Nov 2022 10:44:35 +0000 (05:44 -0500)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* bug fixes for Win32 event loop
* bug fixes for -Wextra
* fix gdb XML for 32-bit x86
* improve error handling for module load

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmNndPcUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroOVVwf+Nfvx9aoDTo6vU4kHmCbh7+BTtcUA
# qEkaccL4pfujwNfRl5gHHKtRhgT6py9OjfIX8pAck3jtc5r+5/niFn7CLcOP2G/C
# xuyVKPx3ONCMKCLjWwg63I8/t4JZDEnYEzyddAfV7Xb5600aUJlrxScW751K5eYQ
# CzHFAASdc00eSiWE2eFL4rV7dcj0NadHnJxfjUcguHX4Qlr1TmK/ihEGv6MMRo5S
# 9Ak/vLmRs+LsQJm2cXUu5QVQiDwp31xbv3AP9knB+irYxrsp4LSDxV8eKZwLehpW
# I4A3gz2xKAprfzVJKZI3Dc/hJSRpoKoCjz+QoI1NeVbWjsnYZAwD+VMSew==
# =Nroy
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 06 Nov 2022 03:48:55 EST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  accel: abort if we fail to load the accelerator plugin
  dmg: warn when opening dmg images containing blocks of unknown type
  module: add Error arguments to module_load and module_load_qom
  module: rename module_load_one to module_load
  module: removed unused function argument "mayfail"
  Add missing include statement for global xml_builtin
  meson: avoid unused arguments of main() in compiler tests
  Fix broken configure with -Wunused-parameter
  gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB
  util/aio-win32: Correct the event array size in aio_poll()
  util/main-loop: Avoid adding the same HANDLE twice
  util/main-loop: Fix maximum number of wait objects for win32

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier...
Stefan Hajnoczi [Mon, 7 Nov 2022 10:44:26 +0000 (05:44 -0500)]
Merge tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging

Pull request trivial branch 20221103-v2

# -----BEGIN PGP SIGNATURE-----
#
# iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmNmvt8SHGxhdXJlbnRA
# dml2aWVyLmV1AAoJEPMMOL0/L748HOMP/35HpUyXmjtpHegSgIQ43KLFNG+lBbj8
# 83W6HmOnd1ogSxiTmAx15a0jbcdfOPlloelG91GqptJsDBuwVBJ3wt2rDN4AseZe
# GTt4pXJPBITp+UGlz6BkGB1WrDTAB8xieijx6sXhyAfLYt1EwNx6qkWnTQh0sQjT
# jqjCTpF6V2odaxHJ7zmhhtlOea84q017ookhguDpOHbzzVEG5ma9YJwW2B5SPMUy
# IWrBEgV48S9epYX1o7HWqRbWN0gP0tuPaTIf+QSEwopqFkaArfBgwgGbPmU2njg6
# NY8TnEwmgEbcK8nxWUSpSWlFJ2YPhKTV1BqpcNSmZkVtG0bLxvLaMJu8TC+p4B90
# vepn7rysQqENCbcSaWUuVDtlhvi8LtRyaGtmeEzu6CrvMhsjzEIsRriVbFmHhDVh
# cmoePVPu4Ypn2QSoT2a8ZXT2KzgB92/9jKCoHpC8K5eR69NH1QAb+YrlmTjum+DE
# XZ5OhuI/nSY6xTR1nU4oRjq0MRHoS4OFR8c82wbA/XhMFju7Ej2Fj2tCeOdKK/IH
# /jFXwkx3GJbwuq1RetCmJdYStJ3K7F9gNDkgCYYSZoW6FsVUheWRakH8Ujyhk7Xb
# xnuOxrEGOw9A2cDjmRiDHqd3ErRJskzFGPtd2XIDr1loOwyWbYKRLd8A6W7HcQiU
# y3W6uHedI1ZL
# =PYU9
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 05 Nov 2022 15:51:59 EDT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'trivial-branch-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu:
  tests/unit: simpler variable sequence for test-io-channel
  target/tricore: Rename csfr.def -> csfr.h.inc
  target/s390x: Rename insn-data/format.def -> insn-data/format.h.inc
  target/m68k: Rename qregs.def -> qregs.h.inc
  xen/pt: fix syntax error that causes FTBFS in some configurations
  Fix some typos in documentation and comments
  qapi: virtio: Fix the introduced version

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agos390x/cpu topology: add max_threads machine class attribute
Pierre Morel [Thu, 3 Nov 2022 17:01:41 +0000 (18:01 +0100)]
s390x/cpu topology: add max_threads machine class attribute

The S390 CPU topology accepts the smp.threads argument while
in reality it does not effectively allow multthreading.

Let's keep this behavior for machines older than 7.2 and
refuse to use threads in newer machines until multithreading
is really exposed to the guest by the machine.

Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
Message-Id: <20221103170150.20789-3-pmorel@linux.ibm.com>
[thuth: Small fixes to the commit description]
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agos390x: Register TYPE_S390_CCW_MACHINE properties as class properties
Pierre Morel [Thu, 3 Nov 2022 17:01:40 +0000 (18:01 +0100)]
s390x: Register TYPE_S390_CCW_MACHINE properties as class properties

Currently, when running 'qemu-system-s390x -M s390-ccw-virtio,help'
the s390x-specific properties are not listed anymore. This happens
because since commit d8fb7d0969 ("vl: switch -M parsing to keyval")
the properties have to be defined at the class level and not at the
instance level anymore. Fix it on s390x now, too, by moving the
registration of the properties to the class level"

Fixes: d8fb7d0969 ("vl: switch -M parsing to keyval")
Signed-off-by: Pierre Morel <pmorel@linux.ibm.com>
Message-Id: <20221103170150.20789-2-pmorel@linux.ibm.com>
[thuth: Add patch description]
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agos390x/pci: RPCIT second pass when mappings exhausted
Matthew Rosato [Fri, 28 Oct 2022 19:47:56 +0000 (15:47 -0400)]
s390x/pci: RPCIT second pass when mappings exhausted

If we encounter a new mapping while the number of available DMA entries
in vfio is 0, we are currently skipping that mapping which is a problem
if we manage to free up DMA space after that within the same RPCIT --
we will return to the guest with CC0 and have not mapped everything
within the specified range.  This issue was uncovered while testing
changes to the s390 linux kernel iommu/dma code, where a different
usage pattern was employed (new mappings start at the end of the
aperture and work back towards the front, making us far more likely
to encounter new mappings before invalidated mappings during a
global refresh).

Fix this by tracking whether any mappings were skipped due to vfio
DMA limit hitting 0; when this occurs, we still continue the range
and unmap/map anything we can - then we must re-run the range again
to pickup anything that was missed.  This must occur in a loop until
all requests are satisfied (success) or we detect that we are still
unable to complete all mappings (return ZPCI_RPCIT_ST_INSUFF_RES).

Link: https://lore.kernel.org/linux-s390/20221019144435.369902-1-schnelle@linux.ibm.com/
Fixes: 37fa32de70 ("s390x/pci: Honor DMA limits set by vfio")
Reported-by: Niklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: Matthew Rosato <mjrosato@linux.ibm.com>
Message-Id: <20221028194758.204007-2-mjrosato@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agos390x/css: revert SCSW ctrl/flag bits on error
Peter Jin [Thu, 27 Oct 2022 21:23:41 +0000 (23:23 +0200)]
s390x/css: revert SCSW ctrl/flag bits on error

Revert the control and flag bits in the subchannel status word in case
the SSCH operation fails with non-zero CC (ditto for CSCH and HSCH).
According to POPS, the control and flag bits are only changed if SSCH,
CSCH, and HSCH return CC 0, and no other action should be taken otherwise.
In order to simulate that after the fact, the bits need to be reverted on
non-zero CC.

While the do_subchannel_work logic for virtual (virtio) devices will
return condition code 0, passthrough (vfio) devices may encounter
errors from either the host kernel or real hardware that need to be
accounted for after this point. This includes restoring the state of
the Subchannel Status Word to reflect the subchannel, as these bits
would not be set in the event of a non-zero condition code from the
affected instructions.

Experimentation has shown that a failure on a START SUBCHANNEL (SSCH)
to a passthrough device would leave the subchannel with the START
PENDING activity control bit set, thus blocking subsequent SSCH
operations in css_do_ssch() until some form of error recovery was
undertaken since no interrupt would be expected.

Signed-off-by: Peter Jin <pjin@linux.ibm.com>
Message-Id: <20221027212341.2904795-1-pjin@linux.ibm.com>
Reviewed-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
[thuth: Updated the commit description to Eric's suggestion]
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agogitlab-ci: increase clang-user timeout
Stefan Hajnoczi [Fri, 4 Nov 2022 11:36:59 +0000 (07:36 -0400)]
gitlab-ci: increase clang-user timeout

The clang-user test exceeds the 1 hour timeout occassionally.

Philippe Mathieu-Daudé has pointed out that the number of tcg tests has
increased since QEMU 7.1. The execution time therefore probably reflects
a legitimate increase in tests rather than a performance regression.

Bump the timeout to prevent CI failures.

Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20221104113659.427690-1-stefanha@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest: migration-test: Enable TLS PSK tests for win32
Bin Meng [Tue, 1 Nov 2022 03:50:21 +0000 (11:50 +0800)]
tests/qtest: migration-test: Enable TLS PSK tests for win32

Since commit f1018ea0a30f ("tests: avoid DOS line endings in PSK file"),
the bug of the helper test_tls_psk_init_common() that caused TLS PSK
tests to fail on Windows was fixed. Let's enable these tests on win32.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20221101035021.729669-1-bin.meng@windriver.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest: Fix two format strings
Stefan Weil [Sat, 5 Nov 2022 11:55:25 +0000 (12:55 +0100)]
tests/qtest: Fix two format strings

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20221105115525.623059-1-sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest/libqos/e1000e: Use IVAR shift definitions
Akihiko Odaki [Sat, 5 Nov 2022 05:30:10 +0000 (14:30 +0900)]
tests/qtest/libqos/e1000e: Use IVAR shift definitions

There were still some constants defined in e1000_regs.h.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221105053010.38037-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest/libqos/e1000e: Use E1000_STATUS_ASDV_1000
Akihiko Odaki [Thu, 3 Nov 2022 08:34:25 +0000 (17:34 +0900)]
tests/qtest/libqos/e1000e: Use E1000_STATUS_ASDV_1000

Nemonics E1000_STATUS_LAN_INIT_DONE and E1000_STATUS_ASDV_1000 have
the same value, and E1000_STATUS_ASDV_1000 should be used here because
E1000_STATUS_ASDV_1000 represents the auto-detected speed tested here
while E1000_STATUS_LAN_INIT_DONE is a value used for a different purpose
with a variant of e1000e family different from the one implemented in
QEMU.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103083425.100590-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest/e1000e-test: Use e1000_regs.h
Akihiko Odaki [Thu, 3 Nov 2022 09:54:16 +0000 (18:54 +0900)]
tests/qtest/e1000e-test: Use e1000_regs.h

The register definitions in tests/qtest/e1000e-test.c had names
different from hw/net/e1000_regs.h, which made it hard to understand
what test codes corresponds to the implementation. Use
hw/net/e1000_regs.h from tests/qtest/libqos/e1000e.c to remove
these duplications.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103095416.110162-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest/libqos/e1000e: Set E1000_CTRL_SLU
Akihiko Odaki [Thu, 3 Nov 2022 02:54:51 +0000 (11:54 +0900)]
tests/qtest/libqos/e1000e: Set E1000_CTRL_SLU

The later device status check depends on E1000_STATUS_LU, which is
enabled by E1000_CTRL_SLU. Though E1000_STATUS_LU is not implemented
and E1000_STATUS_LU is always available in the current implementation,
be a bit nicer and set E1000_CTRL_SLU just in case the bit is
implemented in the future.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103025451.27446-1-akihiko.odaki@daynix.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agotests/qtest/libqos/e1000e: Refer common PCI ID definitions
Akihiko Odaki [Thu, 3 Nov 2022 01:50:17 +0000 (10:50 +0900)]
tests/qtest/libqos/e1000e: Refer common PCI ID definitions

This is yet another minor cleanup to ease understanding and
future refactoring of the tests.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20221103015017.19947-1-akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
20 months agoaccel: abort if we fail to load the accelerator plugin
Claudio Fontana [Thu, 29 Sep 2022 09:30:35 +0000 (11:30 +0200)]
accel: abort if we fail to load the accelerator plugin

if QEMU is configured with modules enabled, it is possible that the
load of an accelerator module will fail.
Exit in this case, relying on module_object_class_by_name to report
the specific load error if any.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio: changed abort() to exit(1)]
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220929093035.4231-6-cfontana@suse.de>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agodmg: warn when opening dmg images containing blocks of unknown type
Kevin Wolf [Thu, 29 Sep 2022 09:30:34 +0000 (11:30 +0200)]
dmg: warn when opening dmg images containing blocks of unknown type

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929093035.4231-5-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agomodule: add Error arguments to module_load and module_load_qom
Claudio Fontana [Thu, 29 Sep 2022 09:30:33 +0000 (11:30 +0200)]
module: add Error arguments to module_load and module_load_qom

improve error handling during module load, by changing:

bool module_load(const char *prefix, const char *lib_name);
void module_load_qom(const char *type);

to:

int module_load(const char *prefix, const char *name, Error **errp);
int module_load_qom(const char *type, Error **errp);

where the return value is:

 -1 on module load error, and errp is set with the error
  0 on module or one of its dependencies are not installed
  1 on module load success
  2 on module load success (module already loaded or built-in)

module_load_qom_one has been introduced in:

commit 28457744c345 ("module: qom module support"), which built on top of
module_load_one, but discarded the bool return value. Restore it.

Adapt all callers to emit errors, or ignore them, or fail hard,
as appropriate in each context.

Replace the previous emission of errors via fprintf in _some_ error
conditions with Error and error_report, so as to emit to the appropriate
target.

A memory leak is also fixed as part of the module_load changes.

audio: when attempting to load an audio module, report module load errors.
Note that still for some callers, a single issue may generate multiple
error reports, and this could be improved further.
Regarding the audio code itself, audio_add() seems to ignore errors,
and this should probably be improved.

block: when attempting to load a block module, report module load errors.
For the code paths that already use the Error API, take advantage of those
to report module load errors into the Error parameter.
For the other code paths, we currently emit the error, but this could be
improved further by adding Error parameters to all possible code paths.

console: when attempting to load a display module, report module load errors.

qdev: when creating a new qdev Device object (DeviceState), report load errors.
      If a module cannot be loaded to create that device, now abort execution
      (if no CONFIG_MODULE) or exit (if CONFIG_MODULE).

qom/object.c: when initializing a QOM object, or looking up class_by_name,
              report module load errors.

qtest: when processing the "module_load" qtest command, report errors
       in the load of the module.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929093035.4231-4-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agomodule: rename module_load_one to module_load
Claudio Fontana [Thu, 29 Sep 2022 09:30:32 +0000 (11:30 +0200)]
module: rename module_load_one to module_load

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220929093035.4231-3-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agomodule: removed unused function argument "mayfail"
Claudio Fontana [Thu, 29 Sep 2022 09:30:31 +0000 (11:30 +0200)]
module: removed unused function argument "mayfail"

mayfail is always passed as false for every invocation throughout the program.
It controls whether to printf or not to printf an error on
g_module_open failure.

Remove this unused argument.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929093035.4231-2-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agoAdd missing include statement for global xml_builtin
Stefan Weil [Thu, 3 Nov 2022 08:38:15 +0000 (09:38 +0100)]
Add missing include statement for global xml_builtin

This fixes some compiler warnings with compiler flag
-Wmissing-variable-declarations (tested with clang):

    aarch64_be-linux-user-gdbstub-xml.c:564:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations]
    aarch64-linux-user-gdbstub-xml.c:564:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations]
    aarch64-softmmu-gdbstub-xml.c:1763:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations]

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agomeson: avoid unused arguments of main() in compiler tests
Paolo Bonzini [Thu, 3 Nov 2022 17:19:18 +0000 (18:19 +0100)]
meson: avoid unused arguments of main() in compiler tests

meson.build has one test where "main" is declared unnecessarily
with argc and argv arguments, but does not use them.  Because
the test needs -Werror too, HAVE_BROKEN_SIZE_MAX is defined
incorrectly.

Fix the test and, for consistency, remove argc and argv whenever
they are not needed.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agoFix broken configure with -Wunused-parameter
Stefan Weil [Wed, 2 Nov 2022 20:22:58 +0000 (21:22 +0100)]
Fix broken configure with -Wunused-parameter

The configure script fails because it tries to compile small C programs
with a main function which is declared with arguments argc and argv
although those arguments are unused.

Running `configure -extra-cflags=-Wunused-parameter` triggers the problem.
configure for a native build does abort but shows the error in config.log.
A cross build configure for Windows with Debian stable aborts with an
error.

Avoiding unused arguments fixes this.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20221102202258.456359-1-sw@weilnetz.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agogdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB
TaiseiIto [Tue, 13 Sep 2022 12:06:00 +0000 (12:06 +0000)]
gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDB

Before this commit, there were contradictory descriptions about size of EFER
register.
Line 113 says the size is 8 bytes.
Line 129 says the size is 4 bytes.

As a result, when GDB is debugging an OS running on QEMU, the GDB cannot
read 'g' packets correctly. This 'g' packet transmits values of each
registers of machine emulated by QEMU to GDB. QEMU, the packet sender,
assign 4 bytes for EFER in 'g' packet based on the line 113.
GDB, the packet receiver, extract 8 bytes for EFER in 'g' packet based on
the line 129. Therefore, all registers located behind EFER in 'g' packet
has been shifted 4 bytes in GDB.

After this commit, GDB can read 'g' packets correctly.

Signed-off-by: TaiseiIto <taisei1212@outlook.jp>
Message-Id: <TY0PR0101MB4285F637209075C9F65FCDA6A4479@TY0PR0101MB4285.apcprd01.prod.exchangelabs.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agoutil/aio-win32: Correct the event array size in aio_poll()
Bin Meng [Wed, 19 Oct 2022 10:20:15 +0000 (18:20 +0800)]
util/aio-win32: Correct the event array size in aio_poll()

WaitForMultipleObjects() can only wait for MAXIMUM_WAIT_OBJECTS
object handles. Correct the event array size in aio_poll() and
add a assert() to ensure it does not cause out of bound access.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20221019102015.2441622-3-bmeng.cn@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agoutil/main-loop: Avoid adding the same HANDLE twice
Bin Meng [Wed, 19 Oct 2022 10:20:14 +0000 (18:20 +0800)]
util/main-loop: Avoid adding the same HANDLE twice

Fix the logic in qemu_add_wait_object() to avoid adding the same
HANDLE twice, as the behavior is undefined when passing an array
that contains same HANDLEs to WaitForMultipleObjects() API.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20221019102015.2441622-2-bmeng.cn@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agoutil/main-loop: Fix maximum number of wait objects for win32
Bin Meng [Wed, 19 Oct 2022 10:20:13 +0000 (18:20 +0800)]
util/main-loop: Fix maximum number of wait objects for win32

The maximum number of wait objects for win32 should be
MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20221019102015.2441622-1-bmeng.cn@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agotests/unit: simpler variable sequence for test-io-channel
Alex Bennée [Thu, 3 Nov 2022 10:23:29 +0000 (10:23 +0000)]
tests/unit: simpler variable sequence for test-io-channel

This avoids some compilers complaining about a potentially
un-initialised [src|dst]argv. In retrospect using GString was overkill
for what we are constructing.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20221103102329.2581508-1-alex.bennee@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agotarget/tricore: Rename csfr.def -> csfr.h.inc
Philippe Mathieu-Daudé [Tue, 25 Oct 2022 23:50:06 +0000 (01:50 +0200)]
target/tricore: Rename csfr.def -> csfr.h.inc

We use the .h.inc extension to include C headers. To be consistent
with the rest of the codebase, rename the C headers using the .def
extension.

IDE/tools using our .editorconfig / .gitattributes will leverage
this consistency.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221025235006.7215-4-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agotarget/s390x: Rename insn-data/format.def -> insn-data/format.h.inc
Philippe Mathieu-Daudé [Tue, 25 Oct 2022 23:50:05 +0000 (01:50 +0200)]
target/s390x: Rename insn-data/format.def -> insn-data/format.h.inc

We use the .h.inc extension to include C headers. To be consistent
with the rest of the codebase, rename the C headers using the .def
extension.

IDE/tools using our .editorconfig / .gitattributes will leverage
this consistency.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221025235006.7215-3-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agotarget/m68k: Rename qregs.def -> qregs.h.inc
Philippe Mathieu-Daudé [Tue, 25 Oct 2022 23:50:04 +0000 (01:50 +0200)]
target/m68k: Rename qregs.def -> qregs.h.inc

We use the .h.inc extension to include C headers. To be consistent
with the rest of the codebase, rename the C headers using the .def
extension.

IDE/tools using our .editorconfig / .gitattributes will leverage
this consistency.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221025235006.7215-2-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agoxen/pt: fix syntax error that causes FTBFS in some configurations
Chuck Zmudzinski [Mon, 31 Oct 2022 21:35:52 +0000 (17:35 -0400)]
xen/pt: fix syntax error that causes FTBFS in some configurations

When Qemu is built with --enable-xen and --disable-xen-pci-passthrough
and the target os is linux, the build fails with:

meson.build:3477:2: ERROR: File xen_pt_stub.c does not exist.

Fixes: 582ea95f5f93 ("meson: convert hw/xen")

Signed-off-by: Chuck Zmudzinski <brchuckz@aol.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <5f1342a13c09af77b1a7b0aeaba5955bcea89731.1667242033.git.brchuckz@aol.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agoFix some typos in documentation and comments
Stefan Weil [Sun, 30 Oct 2022 10:59:44 +0000 (11:59 +0100)]
Fix some typos in documentation and comments

Most of them were found and fixed using codespell.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20221030105944.311940-1-sw@weilnetz.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agoqapi: virtio: Fix the introduced version
Han Han [Tue, 1 Nov 2022 01:46:47 +0000 (09:46 +0800)]
qapi: virtio: Fix the introduced version

The items of qapi/virtio.json are introduced at a5ebce38576. They will be
in the version 7.2 not 7.1.

Signed-off-by: Han Han <hhan@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20221101014647.3000801-1-hhan@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agoMerge tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu into...
Stefan Hajnoczi [Sat, 5 Nov 2022 12:41:01 +0000 (08:41 -0400)]
Merge tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu into staging

VFIO fixes for v7.2-rc0

 * Correct initial migration device state using correct v1
   protocol enum (Avihai Horon)

# -----BEGIN PGP SIGNATURE-----
#
# iQJPBAABCAA5FiEEQvbATlQL0amee4qQI5ubbjuwiyIFAmNkOh4bHGFsZXgud2ls
# bGlhbXNvbkByZWRoYXQuY29tAAoJECObm247sIsiIG8P/2W+Fqz4DrkWUk2MO14G
# djx6S/He7yZURlBLxfdQuGFcGzVQt1gFy7CD3JzMhDPzThIqyMHzMVVVVARODCHo
# NQEss2c2oYAodap/I5NPXxFA9EHqgrHZ8kfJ8ioZbqU0L3eLmMApBZMXz3tK5f6u
# XtKCpF9U2MfJCb+Rzxwa4bKidJJEtzAhX/v0gfWKYfp7hT1iRaNr9bS/IqBny+wV
# Mdf5NVZibjlv8e1e1FAf5X9dMaT9NItBqBMl42X0Pfyy0dDpq9KVpyhewIeeqMGM
# iuMeYadgRGWLuAhdkXSZrj06rLoHWxagIyPhCW57i9b7IXpaV4kkh2pHEx56MrV7
# bruM3znY7Xj3axS0HCM3DGP4OL2bc1MGjHcgNwjB6aMqxUN2rKan9wbvj+c1U0ms
# OjnG9ZTIVnROncL0jaEkulFwi+0MEIWYJiVAh81Miv8iHmpj1Krmn15N0R0XI7bx
# sEQaFrE3gyufgzAuwOht2oz6Qg84bWpwpJT0kQXXaANGfvq1nS1dHk5+4jmExQ+P
# TSE+V3q1q29EEcy/U8nMb1HmRUUdrWdZnV2RWunDbqEvW6KOnLdSX2xq5HKSuS9Y
# H1oqv15gjNBDpJDlelkjlVTQ7MPCcV9MQDBgFMkZRS9TIAHQ/3lRLhCNNCN76GMK
# d1YNd9iZn+Fewb/Knm3+aTxS
# =Nw9N
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 03 Nov 2022 18:01:02 EDT
# gpg:                using RSA key 42F6C04E540BD1A99E7B8A90239B9B6E3BB08B22
# gpg:                issuer "alex.williamson@redhat.com"
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [full]
# gpg:                 aka "Alex Williamson <alex@shazbot.org>" [full]
# gpg:                 aka "Alex Williamson <alwillia@redhat.com>" [full]
# gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>" [full]
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B  8A90 239B 9B6E 3BB0 8B22

* tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu:
  vfio/migration: Fix wrong enum usage

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'pull-target-arm-20221104' of https://git.linaro.org/people/pmaydell/qemu...
Stefan Hajnoczi [Fri, 4 Nov 2022 15:01:17 +0000 (11:01 -0400)]
Merge tag 'pull-target-arm-20221104' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Fix regression booting Trusted Firmware
 * Honor HCR_E2H and HCR_TGE in ats_write64()
 * Copy the entire vector in DO_ZIP
 * Fix Privileged Access Never (PAN) for aarch32
 * Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
 * Set SCR_EL3.HXEn when direct booting kernel
 * Set SME and SVE EL3 vector lengths when direct booting kernel

# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmNk+KkZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vUsD/9SYZP3ne2OZxBe8he98jJ5
# 6apODiBksBLUM+1bKEoYW8Kw4XpS10I1Tbnxe7n0bNAfIiZlsZ7HJAJaYWy4MX4k
# Bq0v1EIFo+Obumocc14ZzWcw9yPpHOGavKHXfPxTtIw0amtOmh3aMBPuOZKiMSaq
# TdI/8654DbAOY3Hp/r6WnXwEgAc23kx/PtGhQFdU4iWhzTdeQeFkgCCsVMO02zFQ
# ZM4wiAATpfNfgf5+Wxoin6RQ8nI9PF+Xf7HhN3d1CiXju3vOl+geYNkubJzIopv1
# itLcnvduYE6+5oJsnXZ4FDNO6/nnqWRNqtyDf0/NjLROfj84BPJpZqMX+FR6Q0I0
# d+4/oEw4A46qfaS5b4/YelbJOiUgiViWU1Xs3g2dkeTMT8CyGfDrJ2HRDKN7AaHo
# llL7s1calkX2oSs+gU0BAw8xRETGwMBSOpF6JmPVh277LjvWfN1vsJzVUG3wrSXL
# G7qa2h+fHV5Xu876sc/i0+d4qHuqcE/EU86VQ6X40f+dRzN02rkSCPAxzGFwLXOr
# 8fl5MsX6z5pqcubnzxkhi66ZHc6fXsvtUjKBxyrVpMyjMlV9PTJ2Q1RCgVctErXk
# lDzsLuplzPSjZBy3Peib/rLnmYUxJHyPe0RFYIumzZv/UHwL4GjZgkI842UVBpAL
# FvIGblcCXHhdP4UFvqgZhw==
# =Fcb4
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 04 Nov 2022 07:34:01 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20221104' of https://git.linaro.org/people/pmaydell/qemu-arm:
  target/arm: Two fixes for secure ptw
  target/arm: Honor HCR_E2H and HCR_TGE in ats_write64()
  target/arm: Copy the entire vector in DO_ZIP
  target/arm: Fix Privileged Access Never (PAN) for aarch32
  target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
  hw/arm/boot: Set SCR_EL3.HXEn when booting kernel
  hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu into staging
Stefan Hajnoczi [Fri, 4 Nov 2022 15:01:00 +0000 (11:01 -0400)]
Merge tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu into staging

pull-loongarch-20221104

v2:
 - fix win32 build error;
 - Add Rui Wang' patches.

# -----BEGIN PGP SIGNATURE-----
#
# iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY2TZsAAKCRBAov/yOSY+
# 30kyA/9VEYvFQaXM9RP78OoiK0bANiByTCQMXCAuos1wXui/FwAcqE9YWXZStzH0
# MHdT2PyH680w9aKjhHuPbGs5xU911cQ94SPWzcTtM4HfEH+3N7RBfF0gS7MA+DLa
# 92vLqEIDC6SbAlY4/CRJVJmOl58d4uhEUUpq6eVzmJHcA3W5qw==
# =wblG
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 04 Nov 2022 05:21:52 EDT
# gpg:                using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C  6C2C 40A2 FFF2 3926 3EDF

* tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu:
  target/loongarch: Fix emulation of float-point disable exception
  target/loongarch: Adjust the layout of hardware flags bit fields
  target/loongarch: Fix raise_mmu_exception() set wrong exception_index
  target/loongarch: Add exception subcode
  hw/loongarch: Add TPM device for LoongArch virt machine
  hw/loongarch: Improve fdt for LoongArch virt machine
  hw/loongarch: Load FDT table into dram memory space
  hw/intc: Fix LoongArch extioi coreisr accessing
  hw/intc: Convert the memops to with_attrs in LoongArch extioi

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agotarget/arm: Two fixes for secure ptw
Richard Henderson [Wed, 2 Nov 2022 05:47:06 +0000 (16:47 +1100)]
target/arm: Two fixes for secure ptw

Reversed the sense of non-secure in get_phys_addr_lpae,
and failed to initialize attrs.secure for ARMMMUIdx_Phys_S.

Fixes: 48da29e4 ("target/arm: Add ptw_idx to S1Translate")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1293
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20 months agotarget/arm: Honor HCR_E2H and HCR_TGE in ats_write64()
Ake Koomsin [Tue, 1 Nov 2022 06:42:53 +0000 (15:42 +0900)]
target/arm: Honor HCR_E2H and HCR_TGE in ats_write64()

We need to check HCR_E2H and HCR_TGE to select the right MMU index for
the correct translation regime.

To check for EL2&0 translation regime:
- For S1E0*, S1E1* and S12E* ops, check both HCR_E2H and HCR_TGE
- For S1E2* ops, check only HCR_E2H

Signed-off-by: Ake Koomsin <ake@igel.co.jp>
Message-id: 20221101064250.12444-1-ake@igel.co.jp
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20 months agotarget/arm: Copy the entire vector in DO_ZIP
Richard Henderson [Thu, 3 Nov 2022 13:10:41 +0000 (13:10 +0000)]
target/arm: Copy the entire vector in DO_ZIP

With odd_ofs set, we weren't copying enough data.

Fixes: 09eb6d7025d1 ("target/arm: Move sve zip high_ofs into simd_data")
Reported-by: Idan Horowitz <idan.horowitz@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221031054144.3574-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20 months agotarget/arm: Fix Privileged Access Never (PAN) for aarch32
Timofey Kutergin [Thu, 3 Nov 2022 13:10:41 +0000 (13:10 +0000)]
target/arm: Fix Privileged Access Never (PAN) for aarch32

When we implemented the PAN support we theoretically wanted
to support it for both AArch32 and AArch64, but in practice
several bugs made it essentially unusable with an AArch32
guest. Fix all those problems:

    - Use CPSR.PAN to check for PAN state in aarch32 mode
    - throw permission fault during address translation when PAN is
      enabled and kernel tries to access user acessible page
    - ignore SCTLR_XP bit for armv7 and armv8 (conflicts with SCTLR_SPAN).

Signed-off-by: Timofey Kutergin <tkutergin@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221027112619.2205229-1-tkutergin@gmail.com
[PMM: tweak commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
20 months agotarget/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB
Peter Maydell [Thu, 3 Nov 2022 13:10:41 +0000 (13:10 +0000)]
target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB

The HCR_EL2.TTLB bit is supposed to trap all EL1 execution of TLB
maintenance instructions.  However we have added new TLB insns for
FEAT_TLBIOS and FEAT_TLBIRANGE, and forgot to set their accessfn to
access_ttlb.  Add the missing accessfns.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
20 months agohw/arm/boot: Set SCR_EL3.HXEn when booting kernel
Peter Maydell [Thu, 3 Nov 2022 13:10:40 +0000 (13:10 +0000)]
hw/arm/boot: Set SCR_EL3.HXEn when booting kernel

When we direct boot a kernel on a CPU which emulates EL3, we need to
set up the EL3 system registers as the Linux kernel documentation
specifies:
     https://www.kernel.org/doc/Documentation/arm64/booting.rst

For CPUs with FEAT_HCX support this includes:
    - SCR_EL3.HXEn (bit 38) must be initialised to 0b1.

but we forgot to do this when implementing FEAT_HCX, which would mean
that a guest trying to access the HCRX_EL2 register would crash.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221027140207.413084-3-peter.maydell@linaro.org

20 months agohw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel
Peter Maydell [Thu, 3 Nov 2022 13:10:40 +0000 (13:10 +0000)]
hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel

When we direct boot a kernel on a CPU which emulates EL3, we need
to set up the EL3 system registers as the Linux kernel documentation
specifies:
 https://www.kernel.org/doc/Documentation/arm64/booting.rst

For SVE and SME this includes:
    - ZCR_EL3.LEN must be initialised to the same value for all CPUs the
      kernel is executed on.
    - SMCR_EL3.LEN must be initialised to the same value for all CPUs the
      kernel will execute on.

Although we are technically compliant with this, the "same value" we
currently use by default is the reset value of 0.  This will end up
forcing the guest kernel's SVE and SME vector length to be only the
smallest supported length.

Initialize the vector length fields to their maximum possible value,
which is 0xf. If the implementation doesn't actually support that
vector length then the effective vector length will be constrained
down to the maximum supported value at point of use.

This allows the guest to use all the vector lengths the emulated CPU
supports (by programming the _EL2 and _EL1 versions of these
registers.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221027140207.413084-2-peter.maydell@linaro.org

20 months agotarget/loongarch: Fix emulation of float-point disable exception
Rui Wang [Fri, 4 Nov 2022 04:05:17 +0000 (12:05 +0800)]
target/loongarch: Fix emulation of float-point disable exception

We need to emulate it to generate a floating point disable exception
when CSR.EUEN.FPE is zero.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Rui Wang <wangrui@loongson.cn>
Message-Id: <20221104040517.222059-3-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agotarget/loongarch: Adjust the layout of hardware flags bit fields
Rui Wang [Fri, 4 Nov 2022 04:05:16 +0000 (12:05 +0800)]
target/loongarch: Adjust the layout of hardware flags bit fields

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Rui Wang <wangrui@loongson.cn>
Message-Id: <20221104040517.222059-2-wangrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agotarget/loongarch: Fix raise_mmu_exception() set wrong exception_index
Song Gao [Tue, 1 Nov 2022 06:53:31 +0000 (14:53 +0800)]
target/loongarch: Fix raise_mmu_exception() set wrong exception_index

When the address is invalid address, We should set exception_index
according to MMUAccessType, and EXCCODE_ADEF need't update badinstr.
Otherwise, The system enters an infinite loop. e.g:
run test.c on system mode
test.c:
    #include<stdio.h>

    void (*func)(int *);

    int main()
    {
        int i = 8;
        void *ptr = (void *)0x4000000000000000;
        func = ptr;
        func(&i);
        return 0;
    }

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20221101073210.3934280-2-gaosong@loongson.cn>

20 months agotarget/loongarch: Add exception subcode
Song Gao [Tue, 1 Nov 2022 03:17:15 +0000 (11:17 +0800)]
target/loongarch: Add exception subcode

We need subcodes to distinguish the same excode cs->exception_indexs,
such as EXCCODE_ADEF/EXCCODE_ADEM.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20221101073210.3934280-1-gaosong@loongson.cn>

20 months agohw/loongarch: Add TPM device for LoongArch virt machine
Xiaojuan Yang [Fri, 28 Oct 2022 01:40:07 +0000 (09:40 +0800)]
hw/loongarch: Add TPM device for LoongArch virt machine

Add TPM device for LoongArch virt machine, including
establish TPM acpi info and add TYPE_TPM_TIS_SYSBUS
to dynamic_sysbus_devices list.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20221028014007.2718352-4-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agohw/loongarch: Improve fdt for LoongArch virt machine
Xiaojuan Yang [Fri, 28 Oct 2022 01:40:06 +0000 (09:40 +0800)]
hw/loongarch: Improve fdt for LoongArch virt machine

Add new items into LoongArch FDT, including rtc and uart info.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20221028014007.2718352-3-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agohw/loongarch: Load FDT table into dram memory space
Xiaojuan Yang [Fri, 28 Oct 2022 01:40:05 +0000 (09:40 +0800)]
hw/loongarch: Load FDT table into dram memory space

Load FDT table into dram memory space, and the addr is 2 MiB.
Since lowmem region starts from 0, FDT base address is located
at 2 MiB to avoid NULL pointer access.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20221028014007.2718352-2-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agohw/intc: Fix LoongArch extioi coreisr accessing
Xiaojuan Yang [Fri, 21 Oct 2022 01:53:07 +0000 (09:53 +0800)]
hw/intc: Fix LoongArch extioi coreisr accessing

1. When cpu read or write extioi COREISR reg, it should access
the reg belonged to itself, so the cpu index of 's->coreisr'
is current cpu number. Using MemTxAttrs' requester_id to get
the cpu index.
2. it need not to mask 0x1f when calculate the coreisr array index.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221021015307.2570844-3-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agohw/intc: Convert the memops to with_attrs in LoongArch extioi
Xiaojuan Yang [Fri, 21 Oct 2022 01:53:06 +0000 (09:53 +0800)]
hw/intc: Convert the memops to with_attrs in LoongArch extioi

Converting the MemoryRegionOps read/write handlers to
with_attrs in LoongArch extioi emulation.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221021015307.2570844-2-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
20 months agovfio/migration: Fix wrong enum usage
Avihai Horon [Sun, 16 Oct 2022 08:57:52 +0000 (11:57 +0300)]
vfio/migration: Fix wrong enum usage

vfio_migration_init() initializes VFIOMigration->device_state using enum
of VFIO migration protocol v2. Current implemented protocol is v1 so v1
enum should be used. Fix it.

Fixes: 429c72800654 ("vfio/migration: Fix incorrect initialization value for parameters in VFIOMigration")
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Reviewed-by: Zhang Chen <chen.zhang@intel.com>
Link: https://lore.kernel.org/r/20221016085752.32740-1-avihaih@nvidia.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
20 months agoMerge tag 'linux-user-for-7.2-pull-request' of https://gitlab.com/laurent_vivier...
Stefan Hajnoczi [Thu, 3 Nov 2022 14:55:05 +0000 (10:55 -0400)]
Merge tag 'linux-user-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging

linux-user pull request 20221103

Fix recvmsg
Fix hppa exception handler
Add close_range
Add strace for timer_settime64

# -----BEGIN PGP SIGNATURE-----
#
# iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmNjgI0SHGxhdXJlbnRA
# dml2aWVyLmV1AAoJEPMMOL0/L7485noP/jx8c5ytN+K5JbTLIdGYAbTJLm82Pnl5
# PP6mzaiII+gqBsmsTmmZhJ92xWjyX9kZmwCY7jD5XYXHQ2jFg3fU96ktYum7q8BU
# XaPP4Cd6TfDE4q8H34PD/4byTGEkHP6o7EhAkIVAKsRQcQgZnsc3tvZetXxncltZ
# UypPqAjvTy3s3uJFRmI4z9sYiAvjEflgk8doci/i5dOSgEBUmcCw/tFUx2GFrHiR
# TdX8BRGaGEt+TPyKAo6sVBgTs1KiU4RzOqrPoxZO8aEClwPCRTLqNw/IONtHmx9f
# EevuwDS7ZdoMdXi7YANDVy17JkmPBU3g8DFSWYGYObRpdmexmD66aW4kCeUYL0BC
# y5aqxRWEi/7Kjvb6QlO3sJnAMfXaOQcCNn1++Tk1V8/O7f3k/xakya700fiMRIaQ
# vyrW+g0TrCWEOgWl1Nyd0yDayX0wCM8CV/5SoO21QHjjzG+zmPxvroDpfVHcwbAl
# V+wzVBj6AE5QBZKXUSE4b5DalcASF3pbUTorB5Xv/HDdsM1cRGZLBo7KECXqLKaa
# L5VLgDdrZdSJz60f4P7Ldyhv0grb3C38JNqYg8fi8gWdj6dEc5M4coX84lA3JE7v
# +Vf3Ys+lGC+DCSp2Qsh5FJvgsRn740ROToLJcXu3jxYPlquEsZpS1hpC+WOTRXOU
# l2tnZIV9/SyH
# =UZJY
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 03 Nov 2022 04:49:17 EDT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'linux-user-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu:
  linux-user: always translate cmsg when recvmsg
  linux-user: Add strace output for timer_settime64() syscall
  linux-user: Add close_range() syscall
  linux-user/hppa: Detect glibc ABORT_INSTRUCTION and EXCP_BREAK handler

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Stefan Hajnoczi [Thu, 3 Nov 2022 14:54:37 +0000 (10:54 -0400)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* bug fixes
* reduced memory footprint for IPI virtualization on Intel processors
* asynchronous teardown support (Linux only)

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmNiVykUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroN0Swf/YxjphCtFgYYSO14WP+7jAnfRZLhm
# 0xWChWP8rco5I352OBFeFU64Av5XoLGNn6SZLl8lcg86lQ/G0D27jxu6wOcDDHgw
# 0yTDO1gevj51UKsbxoC66OWSZwKTEo398/BHPDcI2W41yOFycSdtrPgspOrFRVvf
# 7M3nNjuNPsQorZeuu8NGr3jakqbt99ZDXcyDEWbrEAcmy2JBRMbGgT0Kdnc6aZfW
# CvL+1ljxzldNwGeNBbQW2QgODbfHx5cFZcy4Daze35l5Ra7K/FrgAzr6o/HXptya
# 9fEs5LJQ1JWI6JtpaWwFy7fcIIOsJ0YW/hWWQZSDt9JdAJFE5/+vF+Kz5Q==
# =CgrO
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 02 Nov 2022 07:40:25 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  target/i386: Fix test for paging enabled
  util/log: Close per-thread log file on thread termination
  target/i386: Set maximum APIC ID to KVM prior to vCPU creation
  os-posix: asynchronous teardown for shutdown on Linux
  target/i386: Fix calculation of LOCK NEG eflags

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'nvme-fixes-pull-request' of git://git.infradead.org/qemu-nvme into staging
Stefan Hajnoczi [Thu, 3 Nov 2022 14:54:07 +0000 (10:54 -0400)]
Merge tag 'nvme-fixes-pull-request' of git://git.infradead.org/qemu-nvme into staging

hw/nvme fixes

Two small fixes.

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmNiKUkACgkQTeGvMW1P
# DenBuAf/fwznY98HVg8zYQ/chLGMCmjAa80buf867usnL5Iuhms1XCkxpETFfMAZ
# HR5gg+52vHZg/FCGbQ3E8d/ZLwDZHboiEuZDPo9aYI4uTj3gs66j9S0y6DUVkn5I
# 7Ad+BYW7/d4++8fZAdaUV67rmo89OvjgSqOs+O094nGAPIEgJnsL7HrOFniKnNqu
# MMWvFlK1bAz/iPKPf2WWVeuAs1cMs+TPsjE+ZHhUEYaZAiB1myKVPIAVyOHx5yoT
# 6VTsNMLvNEi5+4Ucg1TkIwb/dAXrYYEvreo8ri1yuHCVOqw4lU9FfPhmiz5h76Sc
# sI0cMiNL/RW5pk6rnDLkPZyjTKw30A==
# =s2fM
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 02 Nov 2022 04:24:41 EDT
# gpg:                using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown]
# gpg:                 aka "Klaus Jensen <k.jensen@samsung.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468  4272 63D5 6FC5 E55D A838
#      Subkey fingerprint: 5228 33AA 75E2 DCE6 A247  66C0 4DE1 AF31 6D4F 0DE9

* tag 'nvme-fixes-pull-request' of git://git.infradead.org/qemu-nvme:
  hw/nvme: Abort copy command when format is one while pif
  hw/nvme: reenable cqe batching

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agolinux-user: always translate cmsg when recvmsg
Icenowy Zheng [Fri, 28 Oct 2022 08:12:20 +0000 (16:12 +0800)]
linux-user: always translate cmsg when recvmsg

It's possible that a message contains both normal payload and ancillary
data in the same message, and even if no ancillary data is available
this information should be passed to the target, otherwise the target
cmsghdr will be left uninitialized and the target is going to access
uninitialized memory if it expects cmsg.

Always call the function that translate cmsg when recvmsg, because that
function should be empty-cmsg-safe (it creates an empty cmsg in the
target).

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20221028081220.1604244-1-uwu@icenowy.me>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agolinux-user: Add strace output for timer_settime64() syscall
Helge Deller [Mon, 24 Oct 2022 20:45:44 +0000 (22:45 +0200)]
linux-user: Add strace output for timer_settime64() syscall

Add missing timer_settime64() strace output and specify format for
timer_settime().

Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <Y1b5eIXFoMRDcDL9@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agolinux-user: Add close_range() syscall
Helge Deller [Tue, 25 Oct 2022 02:34:14 +0000 (04:34 +0200)]
linux-user: Add close_range() syscall

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <Y1dLJoEDhJ2AAYDn@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agolinux-user/hppa: Detect glibc ABORT_INSTRUCTION and EXCP_BREAK handler
Helge Deller [Thu, 27 Oct 2022 06:58:37 +0000 (08:58 +0200)]
linux-user/hppa: Detect glibc ABORT_INSTRUCTION and EXCP_BREAK handler

The glibc on the hppa platform uses the "iitlbp %r0,(%sr0, %r0)"
assembler instruction as ABORT_INSTRUCTION.
If this (in userspace context) illegal assembler statement is found,
dump the registers and report the failure to userspace the same way as
the Linux kernel on physical hardware.

For other illegal instructions report TARGET_ILL_ILLOPC instead of
TARGET_ILL_ILLOPN as si_code.

Additionally add the missing EXCP_BREAK exception handler which occurs
when the "break x,y" assembler instruction is executed and report
EXCP_ASSIST traps.

Signed-off-by: Helge Deller <deller@gmx.de>
Message-Id: <Y1osHVsylkuZNUnY@p100>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
20 months agotarget/i386: Fix test for paging enabled
Richard Henderson [Wed, 2 Nov 2022 09:12:32 +0000 (20:12 +1100)]
target/i386: Fix test for paging enabled

If CR0.PG is unset, pg_mode will be zero, but it will also be zero
for non-PAE/non-PSE page tables with CR0.WP=0.  Restore the
correct test for paging enabled.

Fixes: 98281984a37 ("target/i386: Add MMU_PHYS_IDX and MMU_NESTED_IDX")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1269
Reported-by: Andreas Gustafsson <gson@gson.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221102091232.1092552-1-richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
20 months agohw/nvme: Abort copy command when format is one while pif
Francis Pravin Antony Michael Raj [Wed, 2 Nov 2022 08:06:00 +0000 (09:06 +0100)]
hw/nvme: Abort copy command when format is one while pif

As per the NVMe Command Set specification Section 3.2.2, if

  i)  The namespace is formatted to use 16b Guard Protection
      Information (i.e., pif = 0) and
  ii) The Descriptor Format is not cleared to 0h

Then the copy command should be aborted with the status code of Invalid
Namespace or Format

Fixes: 44219b6029fc ("hw/nvme: 64-bit pi support")
Signed-off-by: Francis Pravin Antony Michael Raj <francis.michael@solidigm.com>
Signed-off-by: Jonathan Derrick <jonathan.derrick@solidigm.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
20 months agohw/nvme: reenable cqe batching
Klaus Jensen [Wed, 19 Oct 2022 20:28:02 +0000 (22:28 +0200)]
hw/nvme: reenable cqe batching

Commit 2e53b0b45024 ("hw/nvme: Use ioeventfd to handle doorbell
updates") had the unintended effect of disabling batching of CQEs.

This patch changes the sq/cq timers to bottom halfs and instead of
calling nvme_post_cqes() immediately (causing an interrupt per cqe), we
defer the call.

                   | iops
  -----------------+------
    baseline       | 138k
    +cqe batching  | 233k

Fixes: 2e53b0b45024 ("hw/nvme: Use ioeventfd to handle doorbell updates")
Reviewed-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Jinhao Fan <fanjinhao21s@ict.ac.cn>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
20 months agoMerge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging
Stefan Hajnoczi [Tue, 1 Nov 2022 17:49:33 +0000 (13:49 -0400)]
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging

Pull request

Note that we're still discussing "block/blkio: Make driver nvme-io_uring take a
"path" instead of a "filename"". I have sent the pull request now so everything
is ready for the soft freeze tomorrow if we decide to go ahead with the patch.

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCAAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmNgGQkACgkQnKSrs4Gr
# c8hLFgf/dnszoHO02hjoJCN2LPAxDalyYKzog+ZU8U5VdzJn2gione1jVlf3Xb0l
# mhTgrioSbKLKXavGZTSwWUki/xRgCJMtG3m07EFmMsLX0QiSOIyzLr0DslQawYdZ
# FlXyCCyAVTUILz7oUXBqORlfTKsGPHms6nlXQYhitTOsDbPyqbT9nNPKAlfGkqfj
# Pwn+oWJmjLC0aARpcrB1bXCMbqQrtZGh4bBgfIXRUJmprWqk227bkFvXNCuXU16x
# PC4oH552+6nyQyRxGpHc3o1W/8gqlxU9DTBb5arDUQaDvsDTKVkuGe2HdDI7knAT
# /m57/BFVUnA35SYOxX+0piiEbawI6Q==
# =UWL7
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 31 Oct 2022 14:50:49 EDT
# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [ultimate]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [ultimate]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
  block/blkio: Make driver nvme-io_uring take a "path" instead of a "filename"
  block/blkio: Tolerate device size changes
  block/blkio: Add virtio-blk-vfio-pci BlockDriver

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'pull-testing-for-7.2-011122-3' of https://github.com/stsquad/qemu into...
Stefan Hajnoczi [Tue, 1 Nov 2022 17:39:05 +0000 (13:39 -0400)]
Merge tag 'pull-testing-for-7.2-011122-3' of https://github.com/stsquad/qemu into staging

testing and plugin updates for 7.2:

  - cleanup win32/64 docker files
  - update test-mingw test
  - add flex/bison to debian-all-test
  - handle --enable-static/--disable-pie in config
  - extend timeouts on x86_64 avocado tests
  - add flex/bison to debian-hexagon-cross
  - use regular semihosting for nios2 check-tcg
  - fix obscure linker error to nios2 softmmu tests
  - various windows portability fixes for tests
  - clean-up of MAINTAINERS
  - use -machine none when appropriate in avocado
  - make raspi2_initrd test detect shutdown
  - disable sh4 rd2 tests on gitlab
  - re-enable threadcount/linux-test for sh4
  - clean-up s390x handling of "ex" instruction
  - better handle new CPUs in execlog plugin
  - pass CONFIG_DEBUG_TCG to plugin builds
  - try and avoid races in test-io-channel-command
  - speed up ssh key checking for tests/vm

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmNhI/MACgkQ+9DbCVqe
# KkSFXggAg0HIpBDcNz0V5Mh5p69F14pwbDSygKqGDFBebdOHeL7f+WCvQPUGEWxp
# 814zjvRY3SC4Mo4mtzguRvNu0styaUpemvRw5FDYK48GpEjg2eVxTnAFD4nr7ud0
# dhw3iaHP+RjA6s3EpPUqQ5nlZEgFJ+Tvkckk3wKSpksBYA4tJra6Uey5kpZ27x0T
# KOzB2P6w+9B/B11n/aeSxvRPZdnXt2MyfS/3pwwfoFYioEyaEQ3Ie6ooachtdSL3
# PEvnJVK0VVYbZQwBXJlycNLlK/D++s4AEwmnZ5GmvDFuXlkRO9YMy9Wa5TKJl7gz
# 76Aw1KHsE03SyAPvH4bE7eGkIwhJOQ==
# =6hXE
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 01 Nov 2022 09:49:39 EDT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-testing-for-7.2-011122-3' of https://github.com/stsquad/qemu: (31 commits)
  tests/vm: use -o IdentitiesOnly=yes for ssh
  tests/unit: cleanups for test-io-channel-command
  contrib/plugins: protect execlog's last_exec expansion
  contrib/plugins: enable debug on CONFIG_DEBUG_TCG
  tests/tcg: include CONFIG_PLUGIN in config-host.mak
  target/s390x: fake instruction loading when handling 'ex'
  target/s390x: don't probe next pc for EXecuted insns
  target/s390x: don't use ld_code2 to probe next pc
  tests/tcg: re-enable threadcount for sh4
  tests/tcg: re-enable linux-test for sh4
  tests/avocado: disable sh4 rd2 tests on Gitlab
  tests/avocado: raspi2_initrd: Wait for guest shutdown message before stopping
  tests/avocado: set -machine none for userfwd and vnc tests
  MAINTAINERS: fix-up for check-tcg Makefile changes
  MAINTAINERS: add features_to_c.sh to gdbstub files
  MAINTAINERS: add entries for the key build bits
  hw/usb: dev-mtp: Use g_mkdir()
  block/vvfat: Unify the mkdir() call
  tcg: Avoid using hardcoded /tmp
  semihosting/arm-compat-semi: Avoid using hardcoded /tmp
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'pull-tcg-20221031-2' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi [Tue, 1 Nov 2022 13:36:13 +0000 (09:36 -0400)]
Merge tag 'pull-tcg-20221031-2' of https://gitlab.com/rth7680/qemu into staging

Remove sparc32plus support from tcg/sparc.
target/i386: Use cpu_unwind_state_data for tpr access.
target/i386: Expand eflags updates inline
Complete cpu initialization before registration

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNgQvIdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9bxAf/X6904X+2I55LTMP7
# jLCxMAlSgFiwaWW4sQLvfUS2qjjMNw7dtljF0HaYVJCawABI4tIY3nEYL8dhLiGU
# WpMTmDIY/cBrQ0aMWfUTGRIFZOIpCLsZwiG6zW6w5KxfKUaakeZSgxqhzgFFcM2k
# UDb9HYC6jwEDDZJYTRpcTIsnYHjaiu/ofKjbjWoslq9DIrThLr1UZgoOxzZ9w2Rh
# xEDBNnD42Kzb0Lbc5B1cX4tla43g9KfHkfG6Ww3fJVYZcFxFhAp40y1chtq5qaia
# 64cPOfSdjoHWaZKdXop3hDYvqRTour56S+e1n1VxHVhbsVRh0KKYBvzAZtiN4FEu
# w8E8bA==
# =fxqA
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 31 Oct 2022 17:49:38 EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20221031-2' of https://gitlab.com/rth7680/qemu:
  tests/tcg/multiarch: Add munmap-pthread.c
  accel/tcg: Complete cpu initialization before registration
  target/i386: Expand eflags updates inline
  accel/tcg: Remove reset_icount argument from cpu_restore_state_from_tb
  accel/tcg: Remove will_exit argument from cpu_restore_state
  target/openrisc: Use cpu_unwind_state_data for mfspr
  target/openrisc: Always exit after mtspr npc
  target/i386: Use cpu_unwind_state_data for tpr access
  accel/tcg: Introduce cpu_unwind_state_data
  tcg/tci: fix logic error when registering helpers via FFI
  tcg/sparc64: Remove sparc32plus constraints
  tcg/sparc64: Rename from tcg/sparc
  tcg/sparc: Remove support for sparc32plus

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agoMerge tag 'qemu-macppc-20221031' of https://github.com/mcayland/qemu into staging
Stefan Hajnoczi [Tue, 1 Nov 2022 13:35:45 +0000 (09:35 -0400)]
Merge tag 'qemu-macppc-20221031' of https://github.com/mcayland/qemu into staging

qemu-macppc updates for 7.2

# -----BEGIN PGP SIGNATURE-----
#
# iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmNgIqAeHG1hcmsuY2F2
# ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIfWU0H/iG6k04L9jrKJ4ao
# wA/CQlvRxG+gRSj1I5oeuLJEqoMSzU5d5flQNPpfv068wngIS/0gHM7UNRGDAOIj
# 8Gu6lf+eB0lwOlmF0Gq2o9/RV6ZWEZtziX3s7G6CYQK0tkQsKZBD36P3Mssr3pWt
# 2XX44eV1qULreFEHWT6I97zV9gFTEuHXJ3j8YDuz7fpqW1B38WUq1TOftiMi9JP4
# PEVhfTOwi6MhsrRpt2uouGPLhmANLucvaXgKgMFRHyy0xOlzYKxjKXbq6nbAFSRd
# 8xEbnLaMWHUKtsmsxtjPJnCV9obO7YzPLXJBLbg2CxhEc/ktDC7YjKL5EXLT2mHC
# s7kVfyM=
# =rc9K
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 31 Oct 2022 15:31:44 EDT
# gpg:                using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg:                issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* tag 'qemu-macppc-20221031' of https://github.com/mcayland/qemu:
  mac_newworld: Turn CORE99_VIA_CONFIG defines into an enum
  mac_{old|new}world: Code style fix adding missing braces to if-s
  mac_nvram: Use NVRAM_SIZE constant
  hw/ppc/mac.h: Rename to include/hw/nvram/mac_nvram.h
  hw/ppc/mac.h: Move PROM and KERNEL defines to board code
  hw/ppc/mac.h: Move grackle-pcihost type declaration out to a header
  hw/ppc/mac.h: Move macio specific parts out from shared header
  hw/ppc/mac.h: Move newworld specific parts out from shared header
  mac_{old|new}world: Reduce number of QOM casts
  mac_newworld: Clean up creation of Uninorth devices
  mac_{old|new}world: Avoid else branch by setting default value
  mac_{old|new}world: Set tbfreq at declaration
  mac_oldworld: Drop some more variables
  mac_newworld: Drop some variables

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
20 months agotests/tcg/multiarch: Add munmap-pthread.c
Ilya Leoshkevich [Fri, 28 Oct 2022 12:42:27 +0000 (14:42 +0200)]
tests/tcg/multiarch: Add munmap-pthread.c

Add a test to detect races between munmap() and creating new threads.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20221028124227.2354792-3-iii@linux.ibm.com>
[rth: add more return insns]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agoaccel/tcg: Complete cpu initialization before registration
Richard Henderson [Mon, 31 Oct 2022 02:26:36 +0000 (13:26 +1100)]
accel/tcg: Complete cpu initialization before registration

Delay cpu_list_add until realize is complete, so that cross-cpu
interaction does not happen with incomplete cpu state.  For this,
we must delay plugin initialization out of tcg_exec_realizefn,
because no cpu_index has been assigned.

Fixes a problem with cross-cpu jump cache flushing, when the
jump cache has not yet been allocated.

Fixes: a976a99a2975 ("include/hw/core: Create struct CPUJumpCache")
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reported-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agotarget/i386: Expand eflags updates inline
Richard Henderson [Mon, 24 Oct 2022 06:16:30 +0000 (16:16 +1000)]
target/i386: Expand eflags updates inline

The helpers for reset_rf, cli, sti, clac, stac are
completely trivial; implement them inline.

Drop some nearby #if 0 code.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agoaccel/tcg: Remove reset_icount argument from cpu_restore_state_from_tb
Richard Henderson [Mon, 24 Oct 2022 13:12:56 +0000 (23:12 +1000)]
accel/tcg: Remove reset_icount argument from cpu_restore_state_from_tb

The value passed is always true.

Reviewed-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agoaccel/tcg: Remove will_exit argument from cpu_restore_state
Richard Henderson [Mon, 24 Oct 2022 13:09:57 +0000 (23:09 +1000)]
accel/tcg: Remove will_exit argument from cpu_restore_state

The value passed is always true, and if the target's
synchronize_from_tb hook is non-trivial, not exiting
may be erroneous.

Reviewed-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agotarget/openrisc: Use cpu_unwind_state_data for mfspr
Richard Henderson [Mon, 24 Oct 2022 12:55:26 +0000 (22:55 +1000)]
target/openrisc: Use cpu_unwind_state_data for mfspr

Since we do not plan to exit, use cpu_unwind_state_data
and extract exactly the data requested.

This is a bug fix, in that we no longer clobber dflag.

Consider:

        l.j       L2         // branch
        l.mfspr   r1, ppc    // delay

L1:     boom
L2:     l.lwa     r3, (r4)

Here, dflag would be set by cpu_restore_state (because that is the current
state of the cpu), but but not cleared by tb_stop on exiting the TB
(because DisasContext has recorded the current value as zero).

The next TB begins at L2 with dflag incorrectly set.  If the load has a
tlb miss, then the exception will be delivered as per a delay slot:
with DSX set in the status register and PC decremented (delay slots
restart by re-executing the branch). This will cause the return from
interrupt to go to L1, and boom!

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agotarget/openrisc: Always exit after mtspr npc
Richard Henderson [Mon, 24 Oct 2022 12:54:15 +0000 (22:54 +1000)]
target/openrisc: Always exit after mtspr npc

We have called cpu_restore_state asserting will_exit.
Do not go back on that promise.  This affects icount.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agotarget/i386: Use cpu_unwind_state_data for tpr access
Richard Henderson [Mon, 24 Oct 2022 12:45:29 +0000 (22:45 +1000)]
target/i386: Use cpu_unwind_state_data for tpr access

Avoid cpu_restore_state, and modifying env->eip out from
underneath the translator with TARGET_TB_PCREL.  There is
some slight duplication from x86_restore_state_to_opc,
but it's just a few lines.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1269
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
20 months agotests/vm: use -o IdentitiesOnly=yes for ssh
Ilya Leoshkevich [Thu, 27 Oct 2022 18:36:36 +0000 (19:36 +0100)]
tests/vm: use -o IdentitiesOnly=yes for ssh

When one has a lot of keys in ~/.ssh directory, the ssh command will
try all of them before the one specified on the command line, and this
may cause the remote ssh server to reject the connection due to too
many failed authentication attempts.

Fix by adding -o IdentitiesOnly=yes, which makes the ssh client
consider only the keys specified on the command line.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20221027113026.2280863-1-iii@linux.ibm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221027183637.2772968-31-alex.bennee@linaro.org>

20 months agotests/unit: cleanups for test-io-channel-command
Alex Bennée [Thu, 27 Oct 2022 18:36:35 +0000 (19:36 +0100)]
tests/unit: cleanups for test-io-channel-command

This test is hanging under heavy load when the two socats race while
trying to create the socket. I've tried various approaches to avoid
the race but it seems "creat=0" won't stop socat trying to create a
pipe if it executes first. In the end I just use a small sleep which
seems to be reliable enough on the load situations I've tried.

While I was there I also properly created a tmpdir for the socket to
live in which is cleaned up at the end of the test.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>
Cc: Marc-André Lureau <marcandre.lureau@redhat.com>
Cc: Juan Quintela <quintela@redhat.com>
Message-Id: <20221027183637.2772968-30-alex.bennee@linaro.org>

20 months agocontrib/plugins: protect execlog's last_exec expansion
Alex Bennée [Thu, 27 Oct 2022 18:36:34 +0000 (19:36 +0100)]
contrib/plugins: protect execlog's last_exec expansion

We originally naively treated expansion as safe because we expected
each new CPU/thread to appear in order. However the -M raspi2 model
triggered a case where a new high cpu_index thread started executing
just before a smaller one.

Clean this up by converting the GArray into the simpler GPtrArray and
then holding a lock for the expansion.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Alexandre Iooss <erdnaxe@crans.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221027183637.2772968-29-alex.bennee@linaro.org>

20 months agocontrib/plugins: enable debug on CONFIG_DEBUG_TCG
Alex Bennée [Thu, 27 Oct 2022 18:36:33 +0000 (19:36 +0100)]
contrib/plugins: enable debug on CONFIG_DEBUG_TCG

We used to rely on QEMU_CFLAGS to expose the debug flags but now this
is synthesised by meson and only available to the main build. Add our
own flags if we detect the build has been enabled with
CONFIG_DEBUG_TCG (which is the default for --enable-debug anyway).

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20221027183637.2772968-28-alex.bennee@linaro.org>

20 months agotests/tcg: include CONFIG_PLUGIN in config-host.mak
Paolo Bonzini [Thu, 27 Oct 2022 18:36:32 +0000 (19:36 +0100)]
tests/tcg: include CONFIG_PLUGIN in config-host.mak

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20221013131304.623740-1-pbonzini@redhat.com>
Message-Id: <20221027183637.2772968-27-alex.bennee@linaro.org>

20 months agotarget/s390x: fake instruction loading when handling 'ex'
Alex Bennée [Thu, 27 Oct 2022 18:36:31 +0000 (19:36 +0100)]
target/s390x: fake instruction loading when handling 'ex'

The s390x EXecute instruction is a bit weird as we synthesis the
executed instruction from what we have stored in memory. This missed
the plugin instrumentation.

Work around this with a special helper to inform the rest of the
translator about the instruction so things stay consistent.

Reviewed-by: David Hildenbrand <david@redhat.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221027183637.2772968-26-alex.bennee@linaro.org>

20 months agotarget/s390x: don't probe next pc for EXecuted insns
Alex Bennée [Thu, 27 Oct 2022 18:36:30 +0000 (19:36 +0100)]
target/s390x: don't probe next pc for EXecuted insns

We have finished the TB anyway so we can shortcut the other tests by
checking dc->ex_value first.

Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221027183637.2772968-25-alex.bennee@linaro.org>

20 months agotarget/s390x: don't use ld_code2 to probe next pc
Alex Bennée [Thu, 27 Oct 2022 18:36:29 +0000 (19:36 +0100)]
target/s390x: don't use ld_code2 to probe next pc

This isn't an translator picking up an instruction so we shouldn't use
the translator_lduw function which has side effects for plugins.

Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20221027183637.2772968-24-alex.bennee@linaro.org>

20 months agotests/tcg: re-enable threadcount for sh4
Alex Bennée [Thu, 27 Oct 2022 18:36:28 +0000 (19:36 +0100)]
tests/tcg: re-enable threadcount for sh4

This test was marked as broken due to bug #856 which was fixed by
ab419fd8a0 (target/sh4: Fix TB_FLAG_UNALIGN). Local testing shows this
is solid now so lets re-enable the test.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20221027183637.2772968-23-alex.bennee@linaro.org>

20 months agotests/tcg: re-enable linux-test for sh4
Alex Bennée [Thu, 27 Oct 2022 18:36:27 +0000 (19:36 +0100)]
tests/tcg: re-enable linux-test for sh4

This test was marked as broken due to bug #704 which was fixed by
aee14c77f4 (linux-user: Rewrite do_getdents, do_getdents64). Local
testing shows this is solid now so lets re-enable the test.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20221027183637.2772968-22-alex.bennee@linaro.org>