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Matt Arsenault [Thu, 22 May 2014 17:45:20 +0000 (17:45 +0000)]
R600/SI: Move instruction pattern to instruction definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209454
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Diego Novillo [Thu, 22 May 2014 17:19:01 +0000 (17:19 +0000)]
Remove LLVMContextImpl::optimizationRemarkEnabledFor.
Summary:
This patch moves the handling of -pass-remarks* over to
lib/DiagnosticInfo.cpp. This allows the removal of the
optimizationRemarkEnabledFor functions from LLVMContextImpl, as they're
not needed anymore.
Reviewers: qcolombet
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3878
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209453
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Andrea Di Biagio [Thu, 22 May 2014 16:21:39 +0000 (16:21 +0000)]
[X86] Improve the lowering of BITCAST from MVT::f64 to MVT::v4i16/MVT::v8i8.
This patch teaches the x86 backend how to efficiently lower ISD::BITCAST dag
nodes from MVT::f64 to MVT::v4i16 (and vice versa), and from MVT::f64 to
MVT::v8i8 (and vice versa).
This patch extends the logic from revision 208107 to also handle MVT::v4i16
and MVT::v8i8. Also, this patch correctly propagates Undef values when
performing the widening of a vector (example: when widening from v2i32 to
v4i32, the upper 64bits of the resulting vector are 'undef').
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209451
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Tim Northover [Thu, 22 May 2014 14:20:05 +0000 (14:20 +0000)]
ARM64: remove '#' from annotation of add/sub immediate
The full string used to be "// =#12" for example, which looks too
busy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209443
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Diego Novillo [Thu, 22 May 2014 14:19:46 +0000 (14:19 +0000)]
Add support for missed and analysis optimization remarks.
Summary:
This adds two new diagnostics: -pass-remarks-missed and
-pass-remarks-analysis. They take the same values as -pass-remarks but
are intended to be triggered in different contexts.
-pass-remarks-missed is used by LLVMContext::emitOptimizationRemarkMissed,
which passes call when they tried to apply a transformation but
couldn't.
-pass-remarks-analysis is used by LLVMContext::emitOptimizationRemarkAnalysis,
which passes call when they want to inform the user about analysis
results.
The patch also:
1- Adds support in the inliner for the two new remarks and a
test case.
2- Moves emitOptimizationRemark* functions to the llvm namespace.
3- Adds an LLVMContext argument instead of making them member functions
of LLVMContext.
Reviewers: qcolombet
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3682
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209442
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Tim Northover [Thu, 22 May 2014 13:03:43 +0000 (13:03 +0000)]
Segmented stacks: omit __morestack call when there's no frame.
Patch by Florian Zeitz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209436
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Tim Northover [Thu, 22 May 2014 12:14:49 +0000 (12:14 +0000)]
ARM64: these work too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209430
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Tim Northover [Thu, 22 May 2014 12:14:02 +0000 (12:14 +0000)]
Yes they do
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209429
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Tim Northover [Thu, 22 May 2014 11:56:20 +0000 (11:56 +0000)]
ARM64: model pre/post-indexed operations properly.
We should be keeping track of the writeback on these instructions,
otherwise we're relying on LLVM's stupidity for correct code.
Fortunately, the MC layer can now handle all required constraints,
which means we can get rid of the CodeGen only PseudoInsts too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209426
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Tim Northover [Thu, 22 May 2014 11:56:09 +0000 (11:56 +0000)]
ARM64: separate load/store operands to simplify assembler
This changes ARM64 to use separate operands for each component of an
address, and look for separate '[', '$Rn, ..., ']' tokens when
parsing.
This allows us to do away with quite a bit of special C++ code to
handle monolithic "addressing modes" in the MC components. The more
incremental matching of the assembler operands also allows for better
diagnostics when LLVM is presented with invalid input.
Most of the complexity here is with the register-offset instructions,
which were extremely dodgy beforehand: even when the instruction used
wM, LLVM's model had xM as an operand. We papered over this
discrepancy before, but that approach doesn't work now so I split them
into separate X and W variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209425
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Daniel Sanders [Thu, 22 May 2014 11:55:04 +0000 (11:55 +0000)]
[mips] Make unalignedload.ll test stricter and easier to modify for MIPS32r6/MIPS64r6
Summary:
* Split into two functions, one to test each struct.
* R0 and R2 must be defined by an lw with a %got reference to the correct
symbol.
* Test for $4 (first argument) where appropriate instead of accepting any
register.
* Test that the two lbu's are correctly combined into $4
Depends on D3844
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3845
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209424
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Daniel Sanders [Thu, 22 May 2014 11:51:06 +0000 (11:51 +0000)]
[mips] Change lwl and lwr in inlineasm_constraint.ll to lw
Summary:
lwl and lwr are not available in MIPS32r6/MIPS64r6. The purpose of the test
is to check that the '$1' expands to '0($x)' rather than to test something related
to the lwl or lwr instructions so we can simply switch to lw.
Depends on D3842
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209423
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Daniel Sanders [Thu, 22 May 2014 11:46:58 +0000 (11:46 +0000)]
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
Summary:
This patch is necessary so that they do not fail on MIPS32r6/MIPS64r6 when
-integrated-as is enabled by default and we correctly detect the host CPU.
No functional change since these tests are testing the behaviour of the
constraint used for the third operand rather than the mnemonic.
Depends on D3842
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3843
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209421
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Bradley Smith [Thu, 22 May 2014 11:44:34 +0000 (11:44 +0000)]
Extend sys::getHostCPUFeatures to work on AArch64 platforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209420
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Daniel Sanders [Thu, 22 May 2014 11:42:31 +0000 (11:42 +0000)]
[mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6
Summary: Depends on D3787. Tablegen will raise an assertion without it.
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209419
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Daniel Sanders [Thu, 22 May 2014 11:37:38 +0000 (11:37 +0000)]
[mips][mips64r6] Test that paired single instructions are invalid
Summary:
These emit the 'unknown instruction' instead of the correct error
because they have not been implemented in LLVM for any MIPS ISA.
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3841
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209418
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Daniel Sanders [Thu, 22 May 2014 11:23:21 +0000 (11:23 +0000)]
[mips][mips64r6] Add b[on]vc
Summary:
This required me to implement the disassembler for MIPS64r6 since the encodings
are ambiguous with other instructions. This in turn revealed a few
assembly/disassembly bugs which I have fixed.
* da[ht]i only take two operands according to the spec, not three.
* DecodeBranchTarget2[16] correctly handles wider immediates than simm16
* Also made non-functional change to DecodeBranchTarget and
DecodeBranchTargetMM to keep implementation style consistent between
them.
* Difficult encodings are handled by a custom decode method on the most
general encoding in the group. This method will convert the MCInst to a
different opcode if necessary.
DecodeBranchTarget is not currently the inverse of getBranchTargetOpValue
so disassembling some branch instructions emit incorrect output. This seems
to affect branches with delay slots on all MIPS ISA's. I've left this bug
for now and temporarily removed the check for the immediate on
bc[12]eqz/bc[12]nez in the MIPS32r6/MIPS64r6 tests.
jialc and jic crash the disassembler for some reason. I've left these
instructions commented out for the moment.
Depends on D3760
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3761
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209415
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Tim Northover [Thu, 22 May 2014 07:41:37 +0000 (07:41 +0000)]
ARM64: assert if we see i64 -> i64 extend in the DAG.
Should be no change in behaviour, but it makes the intended
functionality a bit clearer and means we only have to reason about
real extend operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209409
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Tim Northover [Thu, 22 May 2014 07:40:55 +0000 (07:40 +0000)]
AArch64/ARM64: enable more AArch64 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209408
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Saleem Abdulrasool [Thu, 22 May 2014 06:02:59 +0000 (06:02 +0000)]
MC: initialise MCAsmParser variable
Properly initialise HadError to false during construction. Detected as
use-of-uninitialised variable by MSan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209393
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Eric Christopher [Thu, 22 May 2014 05:33:03 +0000 (05:33 +0000)]
Remove unused variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209391
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Saleem Abdulrasool [Thu, 22 May 2014 04:46:46 +0000 (04:46 +0000)]
ARM: introduce llvm.arm.undefined intrinsic
This intrinsic permits the emission of platform specific undefined sequences.
ARM has reserved the 0xde opcode which takes a single integer parameter (ignored
by the CPU). This permits the operating system to implement custom behaviour on
this trap. The llvm.arm.undefined intrinsic is meant to provide a means for
generating the target specific behaviour from the frontend. This is
particularly useful for Windows on ARM which has made use of a series of these
special opcodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209390
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Matt Arsenault [Thu, 22 May 2014 03:20:30 +0000 (03:20 +0000)]
R600/SI: Match fp_to_uint / uint_to_fp for f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209388
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Saleem Abdulrasool [Thu, 22 May 2014 02:18:10 +0000 (02:18 +0000)]
MC: formalise some assertions into proper errors
Now that clang can be used as an assembler via the IAS, invalid assembler inputs
would cause the assertions to trigger. Although we cannot recover from the
errors here, nor provide caret diagnostics, attempt to handle them slightly more
gracefully by reporting a fatal error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209387
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Eric Christopher [Thu, 22 May 2014 02:00:27 +0000 (02:00 +0000)]
Override runOnMachineFunction for ARMISelDAGToDAG so that we can
reset the subtarget on each function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209386
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Eric Christopher [Thu, 22 May 2014 01:53:26 +0000 (01:53 +0000)]
Override runOnMachineFunction for X86ISelDAGToDAG so that we can
reset the subtarget on each function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209384
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Eric Christopher [Thu, 22 May 2014 01:46:02 +0000 (01:46 +0000)]
Avoid using subtarget features when adding X86 specific passes to
the pass pipeline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209382
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Eric Christopher [Thu, 22 May 2014 01:45:59 +0000 (01:45 +0000)]
Remove extra local variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209381
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Eric Christopher [Thu, 22 May 2014 01:45:57 +0000 (01:45 +0000)]
Rename createGlobalBaseRegPass -> createX86GlobalBaseRegPass to make
it obvious that it's a target specific pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209380
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Eric Christopher [Thu, 22 May 2014 01:21:44 +0000 (01:21 +0000)]
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209377
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Eric Christopher [Thu, 22 May 2014 01:21:35 +0000 (01:21 +0000)]
Avoid using subtarget features when initializing the pass pipeline
on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209376
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Eric Christopher [Thu, 22 May 2014 01:07:24 +0000 (01:07 +0000)]
Reset the subtarget for DAGToDAG on every iteration of runOnMachineFunction.
This required updating the generated functions and TD file accordingly
to be pointers rather than const references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209375
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Eric Christopher [Thu, 22 May 2014 01:07:21 +0000 (01:07 +0000)]
Reset the subtarget for DAGToDAG on every iteration of runOnMachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209374
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Eric Christopher [Thu, 22 May 2014 01:07:18 +0000 (01:07 +0000)]
Sort includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209373
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David Blaikie [Thu, 22 May 2014 00:48:36 +0000 (00:48 +0000)]
DebugInfo: Simplify dead variable collection slightly.
constructSubprogramDIE was already called for every subprogram in every
CU when the module was started - there's no need to call it again at
module finalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209372
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Andrew Trick [Thu, 22 May 2014 00:37:03 +0000 (00:37 +0000)]
Fix a bug in SCEV's backedge taken count computation from my prior fix in Jan.
This has to do with the trip count computation for loops with multiple
exits, which is quite subtle. Most passes just ask for a single trip
count number, so we must be conservative assuming any exit could be
taken. Normally, we rely on the "exact" trip count, which was
correctly given as "unknown". However, SCEV also gives a "max"
back-edge taken count. The loops max BE taken count is conservatively
a maximum over the max of each exit's non-exiting iterations
count. Note that some exit tests can be skipped so the max loop
back-edge taken count can actually exceed the max non-exiting
iterations for some exits. However, when we know the loop *latch*
cannot be skipped, we can directly use its max taken count
disregarding other exits. I previously took the minimum here without
checking whether the other exit could be skipped. The correct, and
simpler thing to do here is just to directly use the loop latch's max
non-exiting iterations as the loops max back-edge count.
In the problematic test case, the first loop exit had a max of zero
non-exiting iterations, but could be skipped. The loop latch was known
not to be skipped but had max of one non-exiting iteration. We
incorrectly claimed the loop back-edge could be taken zero times, when
it is actually taken one time.
Fixes Loop %for.body.i: <multiple exits> Unpredictable backedge-taken count.
Loop %for.body.i: max backedge-taken count is 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209358
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Eli Bendersky [Thu, 22 May 2014 00:02:52 +0000 (00:02 +0000)]
Similar to bitcast, treat addrspacecast as a foldable operand.
Added a test sink-addrspacecast.ll to verify this change.
Patch by Jingyue Wu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209343
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Eric Christopher [Wed, 21 May 2014 23:51:57 +0000 (23:51 +0000)]
Fix compilation issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209342
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Eric Christopher [Wed, 21 May 2014 23:40:26 +0000 (23:40 +0000)]
Make early if conversion dependent upon the subtarget and add
a subtarget hook to enable. Unconditionally add to the pass pipeline
for targets that might want to use it. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209340
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Eric Christopher [Wed, 21 May 2014 23:40:18 +0000 (23:40 +0000)]
Group the scheduling functions together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209339
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David Blaikie [Wed, 21 May 2014 23:27:41 +0000 (23:27 +0000)]
Revert "DebugInfo: Don't put fission type units in comdat sections."
This reverts commit r208930, r208933, and r208975.
It seems not all fission consumers are ready to handle this behavior.
Reverting until tools are brought up to spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209338
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Saleem Abdulrasool [Wed, 21 May 2014 23:17:56 +0000 (23:17 +0000)]
MC: correct IMAGE_REL_ARM_MOV32T relocation emission
This corrects the emission of IMAGE_REL_ARM_MOV32T relocations. Previously, we
were avoiding the high portion of the relocation too early. If there was a
section-relative relocation with an offset greater than 16-bits (65535), you
would end up truncating the high order bits of the offset. Allow the current
relocation representation to flow through out the MC layer to the object writer.
Use the new ability to restrict recorded relocations to avoid emitting the
relocation into the final object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209337
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Saleem Abdulrasool [Wed, 21 May 2014 23:17:50 +0000 (23:17 +0000)]
MC: introduce ability to restrict recorded relocations
Add support to allow a target specific COFF object writer to restrict the
recorded resolutions in the emitted object files. This is motivated by the need
in Windows on ARM, where an intermediate relocation needs to be prevented from
being emitted in the object file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209336
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David Blaikie [Wed, 21 May 2014 23:14:12 +0000 (23:14 +0000)]
DebugInfo: Use the SPMap to find the parent CU of inlined functions as they may not be in the current CU
Committed in r209178 then reverted in r209251 due to LTO breakage,
here's a proper fix for the case of the missing subprogram DIE. The DIEs
were there, just in other compile units. Using the SPMap we can find the
right compile unit to search for and produce cross-unit references to
describe this kind of inlining.
One existing test case needed to be updated because it had a function
that wasn't in the CU's subprogram list, so it didn't appear in the
SPMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209335
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Matt Arsenault [Wed, 21 May 2014 22:59:17 +0000 (22:59 +0000)]
R600: Add comment describing problems with LowerConstantInitializer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209333
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Matt Arsenault [Wed, 21 May 2014 22:42:42 +0000 (22:42 +0000)]
R600: Partially fix constant initializers for structs and vectors.
This should extend the current workaround to work with structs
that only contain legal, scalar types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209331
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Matt Arsenault [Wed, 21 May 2014 22:42:38 +0000 (22:42 +0000)]
R600: Add failing testcases for constant initializers.
Constant initializers involving illegal types hit an assertion.
Patch by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209330
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Eric Christopher [Wed, 21 May 2014 22:42:07 +0000 (22:42 +0000)]
Remove getTargetLowering from TargetPassConfig as the target lowering
can change depending upon subtarget/subtarget features for a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209329
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Eric Christopher [Wed, 21 May 2014 22:42:02 +0000 (22:42 +0000)]
Remove unused member variable from hexagon pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209328
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David Blaikie [Wed, 21 May 2014 22:41:17 +0000 (22:41 +0000)]
DebugInfo: Ensure concrete out of line variables from inlined functions reference their abstract origins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209327
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Quentin Colombet [Wed, 21 May 2014 22:00:39 +0000 (22:00 +0000)]
[X86] Fix a bug in the lowering of BLENDI introduced in r209043.
ISD::VSELECT mask uses 1 to identify the first argument and 0 to identify the
second argument.
On the other hand, BLENDI uses 0 to identify the first argument and 1 to
identify the second argument.
Fix the generation of the blend mask to account for this difference.
The bug did not show up with r209043, because we were not checking for the
actual arguments of the blend instruction!
This commit also fixes the test cases.
Note: The same mask works for the BLENDr variant because the arguments are
swapped during instruction selection (see the BLENDXXrr patterns).
<rdar://problem/
16975435>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209324
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Eric Christopher [Wed, 21 May 2014 21:05:09 +0000 (21:05 +0000)]
Move MCOptions that aren't shared between programs into their specific
program and have them initialize the MCOptions struct explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209321
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Eric Christopher [Wed, 21 May 2014 21:05:05 +0000 (21:05 +0000)]
Make a couple of command lines static and remove an unnecessary
initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209320
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David Blaikie [Wed, 21 May 2014 18:04:33 +0000 (18:04 +0000)]
DebugInfo: Simplify subprogram declaration creation/references and accidentally refix PR11300.
Also simplifies the linkage name handling a little too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209311
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Matt Arsenault [Wed, 21 May 2014 18:03:59 +0000 (18:03 +0000)]
Use cast<> instead of unchecked dyn_cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209310
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Saleem Abdulrasool [Wed, 21 May 2014 17:53:18 +0000 (17:53 +0000)]
MC: loosen an overzealous assertion
Permit active macro expansions when terminating the assembler if there were
errors during the expansion. This would only trigger on invalid input when
built with assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209309
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Greg Fitzgerald [Wed, 21 May 2014 16:44:03 +0000 (16:44 +0000)]
Use llvm-lit if LLVM source tree is unavailable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209308
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Dave Estes [Wed, 21 May 2014 16:19:51 +0000 (16:19 +0000)]
Test comment commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209306
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Daniel Sanders [Wed, 21 May 2014 12:56:39 +0000 (12:56 +0000)]
[mips][mips64r6] Add bc[12](eq|ne)z
Summary: Depends on D3691
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209292
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Daniel Sanders [Wed, 21 May 2014 10:11:24 +0000 (10:11 +0000)]
[asm matcher] Fix incorrect assertion when there are exactly 32 SubtargetFeatures
Summary:
The minimal type needs to hold a value of '1ULL << 31' but
getMinimalTypeForRange() is called with a value of '1ULL << 32'.
This patch will also reduce the size of the matcher table when there are 8
or 16 SubtargetFeatures.
Also added a dump of the SubtargetFeatures to the -debug output and corrected getMinimalTypeInRange() to consider 0xffffffffull to be a 32-bit value.
The testcase is that no existing code is broken and that LLVM still successfully
compiles after adding MIPS64r6 CodeGen support.
Reviewers: rafael
Reviewed By: rafael
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D3787
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209288
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Evgeniy Stepanov [Wed, 21 May 2014 08:14:24 +0000 (08:14 +0000)]
[asan] Fix x86-32 asm instrumentation to preserve flags.
Patch by Yuri Gorshenin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209280
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Saleem Abdulrasool [Wed, 21 May 2014 05:15:01 +0000 (05:15 +0000)]
MC: mark COFF .drectve section as REMOVE
The .drectve section should be marked as IMAGE_SCN_LNK_REMOVE. This matches what
the MSVC toolchain does and accurately reflects that this section should not be
emitted into the final binary. This section is merely information for the
linker, comprising of additional linker directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209273
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Richard Smith [Wed, 21 May 2014 02:46:14 +0000 (02:46 +0000)]
[modules] Add module maps for LLVM. These are not quite ready for prime-time
yet, but only a few more Clang patches need to land. (I have 'ninja check'
passing locally.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209269
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Saleem Abdulrasool [Wed, 21 May 2014 01:25:24 +0000 (01:25 +0000)]
ARM: correct bundle generation for MOV32T relocations
Although the previous code would construct a bundle and add the correct elements
to it, it would not finalise the bundle. This resulted in the InternalRead
markers not being added to the MachineOperands nor, more importantly, the
externally visible defs to the bundle itself. So, although the bundle was not
exposing the def, the generated code would be correct because there was no
optimisations being performed. When optimisations were enabled, the post
register allocator would kick in, and the hazard recognizer would reorder
operations around the load which would define the value being operated upon.
Rather than manually constructing the bundle, simply construct and finalise the
bundle via the finaliseBundle call after both MIs have been emitted. This
improves the code generation with optimisations where IMAGE_REL_ARM_MOV32T
relocations are emitted.
The changes to the other tests are the result of the bundle generation
preventing the scheduler from hoisting the moves across the loads. The net
effect of the generated code is equivalent, but, is much more identical to what
is actually being lowered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209267
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Eric Christopher [Wed, 21 May 2014 00:20:01 +0000 (00:20 +0000)]
This command line option is only used in one place. Move it there and
rename it to something more descriptive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209263
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Eric Christopher [Wed, 21 May 2014 00:02:50 +0000 (00:02 +0000)]
Add a comment here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209262
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Eric Christopher [Tue, 20 May 2014 23:59:54 +0000 (23:59 +0000)]
Move this test to the backend from the frontend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209259
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Eric Christopher [Tue, 20 May 2014 23:59:50 +0000 (23:59 +0000)]
Move the verbose asm option to be part of the options struct and
set appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209258
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Kevin Enderby [Tue, 20 May 2014 23:04:47 +0000 (23:04 +0000)]
Update MachOObjectFile::getSymbolAddress so it returns UnknownAddressOrSize
for undefined symbols, so it matches what COFFObjectFile::getSymbolAddress
does. This allows llvm-nm to print spaces instead of 0’s for the value
of undefined symbols in Mach-O files.
To make this change other uses of MachOObjectFile::getSymbolAddress
are updated to handle when the Value is returned as UnknownAddressOrSize.
Which is needed to keep two of the ExecutionEngine tests working for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209253
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Alexey Samsonov [Tue, 20 May 2014 22:40:31 +0000 (22:40 +0000)]
Fix test added in r209242: llc shouldn't create files in source tree
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209252
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David Blaikie [Tue, 20 May 2014 22:33:09 +0000 (22:33 +0000)]
Revert "DebugInfo: Assume all subprogram DIEs have been created before any abstract subprograms are constructed."
This reverts commit r209178.
This seems to be asserting in an LTO build on some internal Apple
buildbots. No upstream reproduction (and I don't have an LLVM-aware gold
built right now to reproduce it personally) but it's a small patch & the
failure's semi-plausible so I'm going to revert first while I try to
reproduce this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209251
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Adam Nemet [Tue, 20 May 2014 21:47:07 +0000 (21:47 +0000)]
[ARM64] PR19792: Fix cycle in DAG after performPostLD1Combine
Povray and dealII currently assert with "Overran sorted position" in
AssignTopologicalOrder. The problem is that performPostLD1Combine can
introduce cycles.
Consider:
(insert_vector_elt (INSERT_SUBREG undef,
(load (add %vreg0, Constant<8>), undef), <= A
TargetConstant<2>),
(load %vreg0, undef), <= B
Constant<1>)
This is turned into a LD1LANEpost node. However the address in A is not a
valid user of the post-incremented address of B in LD1LANEpost.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209242
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David Blaikie [Tue, 20 May 2014 21:40:13 +0000 (21:40 +0000)]
Unbreak the sanitizer buildbots after r209226 due to SROA issue described in reviews.llvm.org/D3714
Undecided whether this should include a test case - SROA produces bad
dbg.value metadata describing a value for a reference that is actually
the value of the thing the reference refers to. For now, loosening the
assert lets this not assert, but it's still bogus/wrong output...
If someone wants to tell me to add a test, I'm willing/able, just
undecided. Hopefully we'll get SROA fixed soon & we can tighten up this
assertion again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209240
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Eric Christopher [Tue, 20 May 2014 21:25:34 +0000 (21:25 +0000)]
Move the function and data section flags into the options struct and
make the functions to set them non-static.
Move and rename the llvm specific backend options to avoid conflicting
with the clang option.
Paired with a backend commit to update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209238
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Kevin Enderby [Tue, 20 May 2014 21:10:15 +0000 (21:10 +0000)]
Revert r209235 as it broke two tests:
Failing Tests (2):
LLVM :: ExecutionEngine/MCJIT/stubs-sm-pic.ll
LLVM :: ExecutionEngine/MCJIT/stubs.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209236
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Kevin Enderby [Tue, 20 May 2014 20:32:18 +0000 (20:32 +0000)]
Update MachOObjectFile::getSymbolAddress so it returns UnknownAddressOrSize
for undefined symbols. Allowing llvm-nm to print spaces instead of 0’s for
the value of undefined symbols in Mach-O files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209235
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Quentin Colombet [Tue, 20 May 2014 19:25:04 +0000 (19:25 +0000)]
[LSR] Canonicalize reg1 + ... + regN into reg1 + ... + 1*regN.
This commit introduces a canonical representation for the formulae.
Basically, as soon as a formula has more that one base register, the scaled
register field is used for one of them. The register put into the scaled
register is preferably a loop variant.
The commit refactors how the formulae are built in order to produce such
representation.
This yields a more accurate, but still perfectible, cost model.
<rdar://problem/
16731508>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209230
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Duncan P. N. Exon Smith [Tue, 20 May 2014 19:00:58 +0000 (19:00 +0000)]
GlobalValue: Automatically reset visibility when setting local linkage
r208264 started asserting in `setLinkage()` and `setVisibility()` that
visibility and linkage are compatible. There are a few places in clang
where visibility is set first, and then linkage later, so the assert
fires. In `setLinkage()`, it's clear what the visibility *should* be,
so rather than updating all the call sites just automatically fix the
visibility.
The testcase for this is for *clang*, so it'll follow separately in cfe.
PR19760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209227
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David Blaikie [Tue, 20 May 2014 18:36:35 +0000 (18:36 +0000)]
Fix test breakage introduced in r209223.
Oops, broke the broken enum constants again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209226
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Alexey Samsonov [Tue, 20 May 2014 18:34:54 +0000 (18:34 +0000)]
Rewrite calculateDbgValueHistory to make it (hopefully) more transparent.
This change preserves the original algorithm of generating history
for user variables, but makes it more clear.
High-level description of algorithm:
Scan all the machine basic blocks and machine instructions in the order
they are emitted to the object file. Do the following:
1) If we see a DBG_VALUE instruction, add it to the history of the
corresponding user variable. Keep track of all user variables, whose
locations are described by a register.
2) If we see a regular instruction, look at all the registers it clobbers,
and terminate the location range for all variables described by these registers.
3) At the end of the basic block, terminate location ranges for all
user variables described by some register.
Although this change shouldn't be user-visible (the contents of .debug_loc section
should be the same), it changes some internal assumptions about the set
of instructions used to track the variable locations. Watching the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209225
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David Blaikie [Tue, 20 May 2014 18:21:51 +0000 (18:21 +0000)]
PR19767: DebugInfo emission of pointer constants.
In refactoring DwarfUnit::isUnsignedDIType I restricted it to only work
on values with signedness (unsigned or signed), asserting on anything
else (which did uncover some bugs). But it turns out that we do need to
emit constants of signless data, such as pointer constants - only null
pointer constants are known to need this so far, but it's conceivable
that there might be non-null pointer constants at some point (hardcoded
address offsets for device drivers?).
This patch just uses 'unsigned' for signless data such as pointer
constants. Arguably we could use signless representations
(DW_FORM_dataN) instead, allowing a trinary result from isUnsignedDIType
(signed, unsigned, signless), but this seems reasonable for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209223
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Renato Golin [Tue, 20 May 2014 17:40:03 +0000 (17:40 +0000)]
Avoids DCE on write_register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209222
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Adam Nemet [Tue, 20 May 2014 17:20:34 +0000 (17:20 +0000)]
[PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16Immediate
The SplitIndexingFromLoad changes exposed a latent isel bug in the PowerPC64
backend. We matched an immediate offset with STWX8 even though it only
supports register offset.
The culprit is the complex-pattern predicate, SelectAddrIdx, which decides
that if the offset is not ISD::Constant it must be a register.
Many thanks to Bill Schmidt for testing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209219
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Eric Christopher [Tue, 20 May 2014 17:11:11 +0000 (17:11 +0000)]
Clean up language and grammar.
Based on a patch by jfcaron3@gmail.com!
PR19806
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209216
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Daniel Sanders [Tue, 20 May 2014 14:46:24 +0000 (14:46 +0000)]
Temporarily revert: r209129 - [mips][mips64r6] Sorted *_ENC, *_DESC classes and tests
After discussion with Zoran, we have decided to temporarily revert this commit.
It's causing some difficult to resolve conflicts and we are under time pressure
to deliver an initial MIPS64r6 compiler.
We will re-apply an equivalent patch once the time pressure has passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209211
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Bradley Smith [Tue, 20 May 2014 13:33:41 +0000 (13:33 +0000)]
[ARM64] Port basic-a64-diagnostics.s over to ARM64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209207
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Tim Northover [Tue, 20 May 2014 11:52:46 +0000 (11:52 +0000)]
TableGen: permit non-leaf ComplexPattern uses
This allows the results of a ComplexPattern check to be distributed to separate
named Operands, instead of the current system where all results must apply (and
match perfectly) with a single Operand.
For example, if "some_addrmode" is a ComplexPattern producing two results, you
can write:
def : Pat<(load (some_addrmode GPR64:$base, imm:$offset)),
(INST GPR64:$base, imm:$offset)>;
This should allow neater instruction definitions in TableGen that don't put all
possible aspects of addressing into a single operand, but are still usable with
relatively simple C++ CodeGen idioms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209206
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Simon Atanasyan [Tue, 20 May 2014 10:23:04 +0000 (10:23 +0000)]
Add parentheses to suppress the gcc warning '-Wparentheses'.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209203
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Benjamin Kramer [Tue, 20 May 2014 09:42:31 +0000 (09:42 +0000)]
Legalizer: Make bswap promotion safe for vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209202
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Simon Atanasyan [Tue, 20 May 2014 09:27:49 +0000 (09:27 +0000)]
[Mips] Add more relocation types and MIPS specific e_flags constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209201
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Christian Pirker [Tue, 20 May 2014 09:24:37 +0000 (09:24 +0000)]
ARMEB: Additional test files for ARM fixups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209200
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Tim Northover [Tue, 20 May 2014 09:17:16 +0000 (09:17 +0000)]
TableGen: convert InstAlias's Emit bit to an int.
When multiple aliases overlap, the correct string to print can often be
determined purely by considering the InstAlias declarations in some particular
order. This allows the user to specify that order manually when desired,
without resorting to hacking around with the default lexicographical order on
Record instantiation, which is error-prone and ugly.
I was also mistaken about "add w2, w3, w4" being the same as "add w2, w3, w4,
uxtw". That's only true if Rn is the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209199
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Alexey Volkov [Tue, 20 May 2014 08:55:50 +0000 (08:55 +0000)]
[X86] Tune LEA usage for Silvermont
According to Intel Software Optimization Manual on Silvermont in some cases LEA
is better to be replaced with ADD instructions:
"The rule of thumb for ADDs and LEAs is that it is justified to use LEA
with a valid index and/or displacement for non-destructive destination purposes
(especially useful for stack offset cases), or to use a SCALE.
Otherwise, ADD(s) are preferable."
Differential Revision: http://reviews.llvm.org/D3826
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209198
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Zinovy Nis [Tue, 20 May 2014 08:26:20 +0000 (08:26 +0000)]
[LV][REFACTOR] One more tiny fix for printing debug locations in loop vectorizer. Now consistent with the remarks emitter.
Differential Revision: http://reviews.llvm.org/D3821
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209197
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Saleem Abdulrasool [Tue, 20 May 2014 05:18:06 +0000 (05:18 +0000)]
llvm-readobj: use range-based for loop
Convert an additional site to a range based for loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209194
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Nick Lewycky [Tue, 20 May 2014 05:13:21 +0000 (05:13 +0000)]
Teach isKnownNonNull that a nonnull return is not null. Add a test for this case as well as the case of a nonnull attribute (already handled but not tested).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209193
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David Blaikie [Tue, 20 May 2014 03:23:24 +0000 (03:23 +0000)]
DebugInfo: Emit function definitions within their namespace scope.
This workaround (presumably for ancient GDB) doesn't appear to be
required (GDB 7.5 seems to tolerate function definition DIEs in
namespace scope just fine).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209189
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David Blaikie [Tue, 20 May 2014 02:40:34 +0000 (02:40 +0000)]
Follow up to 209187, updating a test to use FileCheck. Needed to ignore an extra DW_TAG_class_type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209188
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David Blaikie [Tue, 20 May 2014 02:19:15 +0000 (02:19 +0000)]
Update test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll to use FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209187
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Nick Lewycky [Tue, 20 May 2014 01:23:40 +0000 (01:23 +0000)]
Add 'nonnull', a new parameter and return attribute which indicates that the pointer is not null. Instcombine will elide comparisons between these and null. Patch by Luqman Aden!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209185
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